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* [PATCH v4] KVM: arm64: Advertise ID_AA64PFR0_EL1.CSV2/3 to protected VMs
@ 2023-04-03 13:29 Fuad Tabba
  2023-04-03 13:50 ` Marc Zyngier
  0 siblings, 1 reply; 3+ messages in thread
From: Fuad Tabba @ 2023-04-03 13:29 UTC (permalink / raw)
  To: kvmarm
  Cc: maz, oliver.upton, oupton, will, pbonzini, james.morse,
	alexandru.elisei, suzuki.poulose, reijiw, ricarkol, rananta,
	jingzhangos, tabba

The existing pKVM code attempts to advertise CSV2/3 using values
initialized to 0, but never set. To advertise CSV2/3 to protected
guests, pass the CSV2/3 values to hyp when initializing hyp's
view of guests' ID_AA64PFR0_EL1.

Similar to non-protected KVM, these are system-wide, rather than
per cpu, for simplicity.

Fixes: 6c30bfb18d0b ("KVM: arm64: Add handlers for protected VM System Registers")
Signed-off-by: Fuad Tabba <tabba@google.com>

---

Based on: 197b6b60ae7b (6.3-rc4)
Changes from V3: Fix masking to constrain CSV2/3 to 1 (Oliver).

 arch/arm64/kvm/arm.c                          | 25 ++++++++++++++++++-
 .../arm64/kvm/hyp/include/nvhe/fixed_config.h |  5 +++-
 arch/arm64/kvm/hyp/nvhe/sys_regs.c            |  7 ------
 3 files changed, 28 insertions(+), 9 deletions(-)

diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c
index 3bd732eaf087..04401c2851f8 100644
--- a/arch/arm64/kvm/arm.c
+++ b/arch/arm64/kvm/arm.c
@@ -1889,9 +1889,32 @@ static int __init do_pkvm_init(u32 hyp_va_bits)
 	return ret;
 }
 
+static u64 get_hyp_id_aa64pfr0_el1(void)
+{
+	u64 mask = ~(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV2) |
+		     ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV3));
+
+	/*
+	 * Track whether the system isn't affected by spectre/meltown in the
+	 * hypervisor's view of id_aa64pfr0_el1, used for protected VMs.
+	 * Although this is per-CPU, we make it global for simplicity, e.g., not
+	 * to have to worry about vcpu migration.
+	 *
+	 * Unlike for non-protected VMs, userspace cannot override this for
+	 * protected VMs.
+	 */
+	mask |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV2),
+			   arm64_get_spectre_v2_state() == SPECTRE_UNAFFECTED);
+
+	mask |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV3),
+			   arm64_get_meltdown_state() == SPECTRE_UNAFFECTED);
+
+	return read_sanitised_ftr_reg(SYS_ID_AA64PFR0_EL1) & mask;
+}
+
 static void kvm_hyp_init_symbols(void)
 {
-	kvm_nvhe_sym(id_aa64pfr0_el1_sys_val) = read_sanitised_ftr_reg(SYS_ID_AA64PFR0_EL1);
+	kvm_nvhe_sym(id_aa64pfr0_el1_sys_val) = get_hyp_id_aa64pfr0_el1();
 	kvm_nvhe_sym(id_aa64pfr1_el1_sys_val) = read_sanitised_ftr_reg(SYS_ID_AA64PFR1_EL1);
 	kvm_nvhe_sym(id_aa64isar0_el1_sys_val) = read_sanitised_ftr_reg(SYS_ID_AA64ISAR0_EL1);
 	kvm_nvhe_sym(id_aa64isar1_el1_sys_val) = read_sanitised_ftr_reg(SYS_ID_AA64ISAR1_EL1);
diff --git a/arch/arm64/kvm/hyp/include/nvhe/fixed_config.h b/arch/arm64/kvm/hyp/include/nvhe/fixed_config.h
index 07edfc7524c9..37440e1dda93 100644
--- a/arch/arm64/kvm/hyp/include/nvhe/fixed_config.h
+++ b/arch/arm64/kvm/hyp/include/nvhe/fixed_config.h
@@ -33,11 +33,14 @@
  * Allow for protected VMs:
  * - Floating-point and Advanced SIMD
  * - Data Independent Timing
+ * - Spectre/Meltdown Mitigation
  */
 #define PVM_ID_AA64PFR0_ALLOW (\
 	ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_FP) | \
 	ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_AdvSIMD) | \
-	ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_DIT) \
+	ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_DIT) | \
+	ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV2) | \
+	ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV3) \
 	)
 
 /*
diff --git a/arch/arm64/kvm/hyp/nvhe/sys_regs.c b/arch/arm64/kvm/hyp/nvhe/sys_regs.c
index 08d2b004f4b7..edd969a1f36b 100644
--- a/arch/arm64/kvm/hyp/nvhe/sys_regs.c
+++ b/arch/arm64/kvm/hyp/nvhe/sys_regs.c
@@ -85,19 +85,12 @@ static u64 get_restricted_features_unsigned(u64 sys_reg_val,
 
 static u64 get_pvm_id_aa64pfr0(const struct kvm_vcpu *vcpu)
 {
-	const struct kvm *kvm = (const struct kvm *)kern_hyp_va(vcpu->kvm);
 	u64 set_mask = 0;
 	u64 allow_mask = PVM_ID_AA64PFR0_ALLOW;
 
 	set_mask |= get_restricted_features_unsigned(id_aa64pfr0_el1_sys_val,
 		PVM_ID_AA64PFR0_RESTRICT_UNSIGNED);
 
-	/* Spectre and Meltdown mitigation in KVM */
-	set_mask |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV2),
-			       (u64)kvm->arch.pfr0_csv2);
-	set_mask |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV3),
-			       (u64)kvm->arch.pfr0_csv3);
-
 	return (id_aa64pfr0_el1_sys_val & allow_mask) | set_mask;
 }
 

base-commit: 197b6b60ae7bc51dd0814953c562833143b292aa
-- 
2.40.0.348.gf938b09366-goog


^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [PATCH v4] KVM: arm64: Advertise ID_AA64PFR0_EL1.CSV2/3 to protected VMs
  2023-04-03 13:29 [PATCH v4] KVM: arm64: Advertise ID_AA64PFR0_EL1.CSV2/3 to protected VMs Fuad Tabba
@ 2023-04-03 13:50 ` Marc Zyngier
  2023-04-03 16:41   ` Fuad Tabba
  0 siblings, 1 reply; 3+ messages in thread
From: Marc Zyngier @ 2023-04-03 13:50 UTC (permalink / raw)
  To: Fuad Tabba
  Cc: kvmarm, oliver.upton, oupton, will, pbonzini, james.morse,
	alexandru.elisei, suzuki.poulose, reijiw, ricarkol, rananta,
	jingzhangos

On Mon, 03 Apr 2023 14:29:53 +0100,
Fuad Tabba <tabba@google.com> wrote:
> 
> The existing pKVM code attempts to advertise CSV2/3 using values
> initialized to 0, but never set. To advertise CSV2/3 to protected
> guests, pass the CSV2/3 values to hyp when initializing hyp's
> view of guests' ID_AA64PFR0_EL1.
> 
> Similar to non-protected KVM, these are system-wide, rather than
> per cpu, for simplicity.
> 
> Fixes: 6c30bfb18d0b ("KVM: arm64: Add handlers for protected VM System Registers")
> Signed-off-by: Fuad Tabba <tabba@google.com>
> 
> ---
> 
> Based on: 197b6b60ae7b (6.3-rc4)
> Changes from V3: Fix masking to constrain CSV2/3 to 1 (Oliver).
> 
>  arch/arm64/kvm/arm.c                          | 25 ++++++++++++++++++-
>  .../arm64/kvm/hyp/include/nvhe/fixed_config.h |  5 +++-
>  arch/arm64/kvm/hyp/nvhe/sys_regs.c            |  7 ------
>  3 files changed, 28 insertions(+), 9 deletions(-)
> 
> diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c
> index 3bd732eaf087..04401c2851f8 100644
> --- a/arch/arm64/kvm/arm.c
> +++ b/arch/arm64/kvm/arm.c
> @@ -1889,9 +1889,32 @@ static int __init do_pkvm_init(u32 hyp_va_bits)
>  	return ret;
>  }
>  
> +static u64 get_hyp_id_aa64pfr0_el1(void)
> +{
> +	u64 mask = ~(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV2) |
> +		     ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV3));
> +
> +	/*
> +	 * Track whether the system isn't affected by spectre/meltown in the
> +	 * hypervisor's view of id_aa64pfr0_el1, used for protected VMs.
> +	 * Although this is per-CPU, we make it global for simplicity, e.g., not
> +	 * to have to worry about vcpu migration.
> +	 *
> +	 * Unlike for non-protected VMs, userspace cannot override this for
> +	 * protected VMs.
> +	 */
> +	mask |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV2),
> +			   arm64_get_spectre_v2_state() == SPECTRE_UNAFFECTED);
> +
> +	mask |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV3),
> +			   arm64_get_meltdown_state() == SPECTRE_UNAFFECTED);
> +
> +	return read_sanitised_ftr_reg(SYS_ID_AA64PFR0_EL1) & mask;

I'm confused. PFR0.CSV2 is only set if the HW advertises it. But KVM
should advertises it to guests if arm64_get_spectre_v2_state() reports
"UNAFFECTED".

In that later case, "read_sanitised_ftr_reg(SYS_ID_AA64PFR0_EL1) &
mask" will always leave CSV2 to 0. Same thing for CSV3.

I'd expect something like:

	u64 val = read_sanitised_ftr_reg(SYS_ID_AA64PFR0_EL1);

	val &= ~(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV2) |
		 ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV3));
	val |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV2),
			  arm64_get_spectre_v2_state() == SPECTRE_UNAFFECTED);
	val |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV3),
			  arm64_get_meltdown_state() == SPECTRE_UNAFFECTED);

	return val;

Or did I read that completely wrong?

	M.

-- 
Without deviation from the norm, progress is not possible.

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH v4] KVM: arm64: Advertise ID_AA64PFR0_EL1.CSV2/3 to protected VMs
  2023-04-03 13:50 ` Marc Zyngier
@ 2023-04-03 16:41   ` Fuad Tabba
  0 siblings, 0 replies; 3+ messages in thread
From: Fuad Tabba @ 2023-04-03 16:41 UTC (permalink / raw)
  To: Marc Zyngier
  Cc: kvmarm, oliver.upton, oupton, will, pbonzini, james.morse,
	alexandru.elisei, suzuki.poulose, reijiw, ricarkol, rananta,
	jingzhangos

Hi Marc,

On Mon, Apr 3, 2023 at 2:50 PM Marc Zyngier <maz@kernel.org> wrote:
>
> On Mon, 03 Apr 2023 14:29:53 +0100,
> Fuad Tabba <tabba@google.com> wrote:
> >
> > The existing pKVM code attempts to advertise CSV2/3 using values
> > initialized to 0, but never set. To advertise CSV2/3 to protected
> > guests, pass the CSV2/3 values to hyp when initializing hyp's
> > view of guests' ID_AA64PFR0_EL1.
> >
> > Similar to non-protected KVM, these are system-wide, rather than
> > per cpu, for simplicity.
> >
> > Fixes: 6c30bfb18d0b ("KVM: arm64: Add handlers for protected VM System Registers")
> > Signed-off-by: Fuad Tabba <tabba@google.com>
> >
> > ---
> >
> > Based on: 197b6b60ae7b (6.3-rc4)
> > Changes from V3: Fix masking to constrain CSV2/3 to 1 (Oliver).
> >
> >  arch/arm64/kvm/arm.c                          | 25 ++++++++++++++++++-
> >  .../arm64/kvm/hyp/include/nvhe/fixed_config.h |  5 +++-
> >  arch/arm64/kvm/hyp/nvhe/sys_regs.c            |  7 ------
> >  3 files changed, 28 insertions(+), 9 deletions(-)
> >
> > diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c
> > index 3bd732eaf087..04401c2851f8 100644
> > --- a/arch/arm64/kvm/arm.c
> > +++ b/arch/arm64/kvm/arm.c
> > @@ -1889,9 +1889,32 @@ static int __init do_pkvm_init(u32 hyp_va_bits)
> >       return ret;
> >  }
> >
> > +static u64 get_hyp_id_aa64pfr0_el1(void)
> > +{
> > +     u64 mask = ~(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV2) |
> > +                  ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV3));
> > +
> > +     /*
> > +      * Track whether the system isn't affected by spectre/meltown in the
> > +      * hypervisor's view of id_aa64pfr0_el1, used for protected VMs.
> > +      * Although this is per-CPU, we make it global for simplicity, e.g., not
> > +      * to have to worry about vcpu migration.
> > +      *
> > +      * Unlike for non-protected VMs, userspace cannot override this for
> > +      * protected VMs.
> > +      */
> > +     mask |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV2),
> > +                        arm64_get_spectre_v2_state() == SPECTRE_UNAFFECTED);
> > +
> > +     mask |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV3),
> > +                        arm64_get_meltdown_state() == SPECTRE_UNAFFECTED);
> > +
> > +     return read_sanitised_ftr_reg(SYS_ID_AA64PFR0_EL1) & mask;
>
> I'm confused. PFR0.CSV2 is only set if the HW advertises it. But KVM
> should advertises it to guests if arm64_get_spectre_v2_state() reports
> "UNAFFECTED".
>
> In that later case, "read_sanitised_ftr_reg(SYS_ID_AA64PFR0_EL1) &
> mask" will always leave CSV2 to 0. Same thing for CSV3.
>
> I'd expect something like:
>
>         u64 val = read_sanitised_ftr_reg(SYS_ID_AA64PFR0_EL1);
>
>         val &= ~(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV2) |
>                  ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV3));
>         val |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV2),
>                           arm64_get_spectre_v2_state() == SPECTRE_UNAFFECTED);
>         val |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV3),
>                           arm64_get_meltdown_state() == SPECTRE_UNAFFECTED);
>
>         return val;
>
> Or did I read that completely wrong?

No, I missed the case where the hardware isn't unaffected and doesn't
advertise these bits. Your suggestion covers that and ensures that
pKVM behaves the same as non-protected KVM. I'll fix this and resend.

Thanks again!

/fuad

>
>         M.
>
> --
> Without deviation from the norm, progress is not possible.

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2023-04-03 16:41 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2023-04-03 13:29 [PATCH v4] KVM: arm64: Advertise ID_AA64PFR0_EL1.CSV2/3 to protected VMs Fuad Tabba
2023-04-03 13:50 ` Marc Zyngier
2023-04-03 16:41   ` Fuad Tabba

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