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From: Thomas Gleixner <tglx@kernel.org>
To: Haofeng Li <920484857@qq.com>
Cc: linux-kernel@vger.kernel.org, Haofeng Li <13266079573@163.com>,
	Haofeng Li <lihaofeng@kylinos.cn>,
	Jason Cooper <jason@lakedaemon.net>,
	Marc Zyngier <maz@kernel.org>, Tony Lindgren <tony@atomide.com>
Subject: Re: [PATCH 04/16] irqchip/crossbar: fix allocation and init cleanup
Date: Thu, 20 Aug 2026 08:52:26 +0200	[thread overview]
Message-ID: <871pbtjnbp.ffs@fw13> (raw)
In-Reply-To: <tencent_A96C34482A0364BDB1B266ED697B1A817708@qq.com>

On Tue, Jul 14 2026 at 21:24, Haofeng Li wrote:
> From: Haofeng Li <lihaofeng@kylinos.cn>
>
> crossbar_domain_alloc() returns in the middle of a multi-IRQ

Please write out 'interrupts'. This is a technical document and not a
SMS service.

> allocation without freeing IRQs and crossbar slots allocated by
> earlier iterations.
>
> If irq_domain_create_hierarchy() fails after crossbar_of_init(), the
> global crossbar object and its maps and MMIO mapping are also leaked.
>
> Roll back prior IRQs through crossbar_domain_free(), and release all
> crossbar resources when domain creation fails.
>
> Fixes: 783d31863fb8 ("irqchip: crossbar: Convert dra7 crossbar to stacked domains")
>

Stray newline.

> Signed-off-by: Haofeng Li <lihaofeng@kylinos.cn>

Thanks,

        tglx

  parent reply	other threads:[~2026-08-20  6:52 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-14 12:23 [PATCH 00/16] irqchip: harden initialization error paths Haofeng Li
2026-07-14 12:23 ` Haofeng Li
2026-07-14 12:23 ` [PATCH 01/16] irqchip/riscv-imsic: fix MMIO lookup OOB and NULL cleanup Haofeng Li
2026-07-14 12:23   ` Haofeng Li
2026-07-14 13:15   ` Anup Patel
2026-07-14 13:15     ` Anup Patel
2026-07-25 16:13   ` Radu Rendec
2026-07-25 16:13     ` Radu Rendec
2026-07-14 12:23 ` [PATCH 02/16] irqchip/loongarch-ir: fix redirect free and alloc leaks Haofeng Li
2026-07-26  2:26   ` Radu Rendec
2026-07-14 13:24 ` [PATCH 03/16] irqchip/sifive-plic: do not iounmap devm mappings Haofeng Li
2026-07-14 13:24   ` Haofeng Li
2026-07-14 15:05   ` Anup Patel
2026-07-14 15:05     ` Anup Patel
2026-08-20  6:36   ` Thomas Gleixner
2026-08-20  6:36     ` Thomas Gleixner
     [not found] ` <20260714132453.3302672-1-920484857@qq.com>
2026-07-14 13:24   ` [PATCH 04/16] irqchip/crossbar: fix allocation and init cleanup Haofeng Li
2026-08-02 15:12     ` Radu Rendec
2026-08-20  6:52     ` Thomas Gleixner [this message]
2026-07-14 13:24   ` [PATCH 05/16] irqchip/bcm7038-l1: clean up init failure paths Haofeng Li
2026-07-28 17:36     ` Florian Fainelli
2026-07-14 13:24   ` [PATCH 06/16] irqchip/loongson-liointc: unmap per-core iomaps on error Haofeng Li
2026-08-02 16:31     ` Radu Rendec
2026-07-14 13:24   ` [PATCH 07/16] irqchip/mips-gic: clean up IRQ domain creation failure Haofeng Li
2026-08-02 19:19     ` Radu Rendec
2026-07-14 13:24   ` [PATCH 08/16] irqchip/mips-gic: clean up if IPI domain registration fails Haofeng Li
2026-08-02 19:26     ` Radu Rendec
2026-07-14 13:24   ` [PATCH 09/16] irqchip/econet: clean up VEIC initialization Haofeng Li
2026-07-23  1:09     ` Caleb James DeLisle
2026-07-14 13:24   ` [PATCH 10/16] irqchip/aspeed-vic: publish handler only after domain creation Haofeng Li
2026-07-14 13:24   ` [PATCH 11/16] irqchip/loongson-eiointc: preserve live state on cascade failure Haofeng Li
2026-07-14 13:24   ` [PATCH 12/16] irqchip/realtek-rtl: unmap per-CPU bases on init failure Haofeng Li
2026-07-15  6:12     ` AW: " Markus Stockhausen
2026-07-14 13:24   ` [PATCH 13/16] irqchip/realtek-rtl: dispose parent mapping on domain failure Haofeng Li
2026-07-14 13:24   ` [PATCH 14/16] irqchip/renesas-rzg2l: fix wrong errno in reset error log Haofeng Li
2026-07-14 13:24   ` [PATCH 15/16] irqchip/gic-v3: fail T241 quirk if alias ioremap fails Haofeng Li
2026-07-14 14:53     ` Marc Zyngier
2026-07-14 13:24   ` [PATCH 16/16] irqchip/bcm7120-l2: fix parent IRQ count error handling Haofeng Li
2026-07-28 15:57     ` Florian Fainelli
2026-07-25 16:29 ` [PATCH 00/16] irqchip: harden initialization error paths Radu Rendec
2026-07-25 16:29   ` Radu Rendec
2026-08-20  7:49 ` Thomas Gleixner
2026-08-20  7:49   ` Thomas Gleixner

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