From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Santhosh Kumar K <s-k6@ti.com>
Cc: <broonie@kernel.org>, <robh@kernel.org>, <krzk+dt@kernel.org>,
<conor+dt@kernel.org>, <richard@nod.at>, <vigneshr@ti.com>,
<pratyush@kernel.org>, <mwalle@kernel.org>,
<takahiro.kuwano@infineon.com>, <linux-spi@vger.kernel.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-mtd@lists.infradead.org>, <praneeth@ti.com>,
<u-kumar1@ti.com>, <a-dutta@ti.com>
Subject: Re: [PATCH v4 09/16] spi: cadence-quadspi: skip DDR PHY tuning for 2-byte-address ops (i2383)
Date: Thu, 02 Jul 2026 15:35:40 +0200 [thread overview]
Message-ID: <871pdlqztf.fsf@bootlin.com> (raw)
In-Reply-To: <20260618073725.84733-10-s-k6@ti.com> (Santhosh Kumar K.'s message of "Thu, 18 Jun 2026 13:07:18 +0530")
On 18/06/2026 at 13:07:18 +0530, Santhosh Kumar K <s-k6@ti.com> wrote:
> Erratum i2383 on AM654 locks the address phase in PHY DDR mode when a
> 2-byte column address is used. DDR PHY tuning must not be attempted for
> such operations; non-PHY DDR usage is unaffected. [0]
>
> Add CQSPI_NO_2BYTE_ADDR_PHY_DDR quirk and check it in
> cqspi_am654_ospi_execute_tuning(). When the erratum applies, return 0
> with read_op->max_freq cleared.
>
> [0] https://www.ti.com/lit/er/sprz544c/sprz544c.pdf
>
> Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
> ---
> drivers/spi/spi-cadence-quadspi.c | 17 ++++++++++++++++-
> 1 file changed, 16 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c
> index 72768292a32b..22df5f3bdb96 100644
> --- a/drivers/spi/spi-cadence-quadspi.c
> +++ b/drivers/spi/spi-cadence-quadspi.c
> @@ -49,6 +49,7 @@ static_assert(CQSPI_MAX_CHIPSELECT <= SPI_DEVICE_CS_CNT_MAX);
> #define CQSPI_DISABLE_RUNTIME_PM BIT(10)
> #define CQSPI_NO_INDIRECT_MODE BIT(11)
> #define CQSPI_HAS_WR_PROTECT BIT(12)
> +#define CQSPI_NO_2BYTE_ADDR_PHY_DDR BIT(13)
Can we rename the flag to make it more readable? I would propose:
#define CQSPI_NO_PHY_TUNING_WITH_ODDR_2B_ADDR BIT(13)
Long, but more self explanatory.
Thanks,
Miquèl
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WARNING: multiple messages have this Message-ID (diff)
From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Santhosh Kumar K <s-k6@ti.com>
Cc: <broonie@kernel.org>, <robh@kernel.org>, <krzk+dt@kernel.org>,
<conor+dt@kernel.org>, <richard@nod.at>, <vigneshr@ti.com>,
<pratyush@kernel.org>, <mwalle@kernel.org>,
<takahiro.kuwano@infineon.com>, <linux-spi@vger.kernel.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-mtd@lists.infradead.org>, <praneeth@ti.com>,
<u-kumar1@ti.com>, <a-dutta@ti.com>
Subject: Re: [PATCH v4 09/16] spi: cadence-quadspi: skip DDR PHY tuning for 2-byte-address ops (i2383)
Date: Thu, 02 Jul 2026 15:35:40 +0200 [thread overview]
Message-ID: <871pdlqztf.fsf@bootlin.com> (raw)
In-Reply-To: <20260618073725.84733-10-s-k6@ti.com> (Santhosh Kumar K.'s message of "Thu, 18 Jun 2026 13:07:18 +0530")
On 18/06/2026 at 13:07:18 +0530, Santhosh Kumar K <s-k6@ti.com> wrote:
> Erratum i2383 on AM654 locks the address phase in PHY DDR mode when a
> 2-byte column address is used. DDR PHY tuning must not be attempted for
> such operations; non-PHY DDR usage is unaffected. [0]
>
> Add CQSPI_NO_2BYTE_ADDR_PHY_DDR quirk and check it in
> cqspi_am654_ospi_execute_tuning(). When the erratum applies, return 0
> with read_op->max_freq cleared.
>
> [0] https://www.ti.com/lit/er/sprz544c/sprz544c.pdf
>
> Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
> ---
> drivers/spi/spi-cadence-quadspi.c | 17 ++++++++++++++++-
> 1 file changed, 16 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c
> index 72768292a32b..22df5f3bdb96 100644
> --- a/drivers/spi/spi-cadence-quadspi.c
> +++ b/drivers/spi/spi-cadence-quadspi.c
> @@ -49,6 +49,7 @@ static_assert(CQSPI_MAX_CHIPSELECT <= SPI_DEVICE_CS_CNT_MAX);
> #define CQSPI_DISABLE_RUNTIME_PM BIT(10)
> #define CQSPI_NO_INDIRECT_MODE BIT(11)
> #define CQSPI_HAS_WR_PROTECT BIT(12)
> +#define CQSPI_NO_2BYTE_ADDR_PHY_DDR BIT(13)
Can we rename the flag to make it more readable? I would propose:
#define CQSPI_NO_PHY_TUNING_WITH_ODDR_2B_ADDR BIT(13)
Long, but more self explanatory.
Thanks,
Miquèl
next prev parent reply other threads:[~2026-07-02 13:35 UTC|newest]
Thread overview: 72+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-18 7:37 [PATCH v4 00/16] spi: cadence-quadspi: add PHY tuning support Santhosh Kumar K
2026-06-18 7:37 ` Santhosh Kumar K
2026-06-18 7:37 ` [PATCH v4 01/16] spi: dt-bindings: add spi-max-post-config-frequency property Santhosh Kumar K
2026-06-18 7:37 ` Santhosh Kumar K
2026-06-18 16:36 ` Conor Dooley
2026-06-18 16:36 ` Conor Dooley
2026-06-22 9:14 ` Krzysztof Kozlowski
2026-06-22 9:14 ` Krzysztof Kozlowski
2026-06-22 19:46 ` Conor Dooley
2026-06-22 19:46 ` Conor Dooley
2026-06-29 15:41 ` Miquel Raynal
2026-06-29 15:41 ` Miquel Raynal
2026-06-18 7:37 ` [PATCH v4 02/16] spi: dt-bindings: add spi-phy-pattern-partition property Santhosh Kumar K
2026-06-18 7:37 ` Santhosh Kumar K
2026-06-18 7:50 ` sashiko-bot
2026-06-22 9:17 ` Krzysztof Kozlowski
2026-06-22 9:17 ` Krzysztof Kozlowski
2026-06-22 17:11 ` Miquel Raynal
2026-06-22 17:11 ` Miquel Raynal
2026-06-18 7:37 ` [PATCH v4 03/16] spi: parse spi-max-post-config-frequency into post_config_max_speed_hz Santhosh Kumar K
2026-06-18 7:37 ` Santhosh Kumar K
2026-06-18 7:54 ` sashiko-bot
2026-06-29 15:43 ` Miquel Raynal
2026-06-29 15:43 ` Miquel Raynal
2026-06-18 7:37 ` [PATCH v4 04/16] spi: spi-mem: teach spi_mem_adjust_op_freq() about post-config ops Santhosh Kumar K
2026-06-18 7:37 ` Santhosh Kumar K
2026-06-18 8:02 ` sashiko-bot
2026-07-02 13:32 ` Miquel Raynal
2026-07-02 13:32 ` Miquel Raynal
2026-06-18 7:37 ` [PATCH v4 05/16] spi: spi-mem: add execute_tuning callback and spi_mem_execute_tuning() Santhosh Kumar K
2026-06-18 7:37 ` Santhosh Kumar K
2026-06-18 7:57 ` sashiko-bot
2026-06-18 7:37 ` [PATCH v4 06/16] spi: cadence-quadspi: move cqspi_readdata_capture earlier Santhosh Kumar K
2026-06-18 7:37 ` Santhosh Kumar K
2026-06-18 7:48 ` sashiko-bot
2026-06-18 7:37 ` [PATCH v4 07/16] spi: cadence-quadspi: add DQS support to read data capture Santhosh Kumar K
2026-06-18 7:37 ` Santhosh Kumar K
2026-06-18 7:37 ` [PATCH v4 08/16] spi: cadence-quadspi: add PHY tuning support Santhosh Kumar K
2026-06-18 7:37 ` Santhosh Kumar K
2026-06-18 7:59 ` sashiko-bot
2026-06-19 17:33 ` Mark Brown
2026-06-19 17:33 ` Mark Brown
2026-06-18 7:37 ` [PATCH v4 09/16] spi: cadence-quadspi: skip DDR PHY tuning for 2-byte-address ops (i2383) Santhosh Kumar K
2026-06-18 7:37 ` Santhosh Kumar K
2026-06-18 8:04 ` sashiko-bot
2026-07-02 13:35 ` Miquel Raynal [this message]
2026-07-02 13:35 ` Miquel Raynal
2026-06-18 7:37 ` [PATCH v4 10/16] spi: cadence-quadspi: refactor direct read path for PHY support Santhosh Kumar K
2026-06-18 7:37 ` Santhosh Kumar K
2026-06-18 7:57 ` sashiko-bot
2026-06-18 7:37 ` [PATCH v4 11/16] spi: cadence-quadspi: enable PHY for direct reads Santhosh Kumar K
2026-06-18 7:37 ` Santhosh Kumar K
2026-06-18 7:53 ` sashiko-bot
2026-06-18 7:37 ` [PATCH v4 12/16] spi: cadence-quadspi: enable PHY for indirect writes Santhosh Kumar K
2026-06-18 7:37 ` Santhosh Kumar K
2026-06-18 7:53 ` sashiko-bot
2026-06-18 7:37 ` [PATCH v4 13/16] mtd: spinand: extract variant ranking logic into spinand_op_find_best() Santhosh Kumar K
2026-06-18 7:37 ` Santhosh Kumar K
2026-07-02 13:41 ` Miquel Raynal
2026-07-02 13:41 ` Miquel Raynal
2026-06-18 7:37 ` [PATCH v4 14/16] mtd: spinand: negotiate optimal PHY operating point before dirmap creation Santhosh Kumar K
2026-06-18 7:37 ` Santhosh Kumar K
2026-06-18 8:02 ` sashiko-bot
2026-07-02 15:08 ` Miquel Raynal
2026-07-02 15:08 ` Miquel Raynal
2026-06-18 7:37 ` [PATCH v4 15/16] mtd: spi-nor: extract read op template construction into helper Santhosh Kumar K
2026-06-18 7:37 ` Santhosh Kumar K
2026-06-18 7:37 ` [PATCH v4 16/16] mtd: spi-nor: run PHY tuning after init and update dirmap frequency Santhosh Kumar K
2026-06-18 7:37 ` Santhosh Kumar K
2026-06-18 8:01 ` sashiko-bot
2026-06-22 4:30 ` [PATCH v4 00/16] spi: cadence-quadspi: add PHY tuning support Mahapatra, Amit Kumar
2026-06-22 4:30 ` Mahapatra, Amit Kumar
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