From: Jani Nikula <jani.nikula@linux.intel.com>
To: "Gupta, Anshuman" <anshuman.gupta@intel.com>,
Andi Shyti <andi.shyti@linux.intel.com>,
"Vivi, Rodrigo" <rodrigo.vivi@intel.com>
Cc: "linux-hwmon@vger.kernel.org" <linux-hwmon@vger.kernel.org>,
"intel-xe@lists.freedesktop.org" <intel-xe@lists.freedesktop.org>,
"linux@roeck-us.net" <linux@roeck-us.net>
Subject: Re: [Intel-xe] [PATCH v5 1/6] drm/xe: Add XE_MISSING_CASE macro
Date: Mon, 25 Sep 2023 15:08:08 +0300 [thread overview]
Message-ID: <871qemo3pz.fsf@intel.com> (raw)
In-Reply-To: <CY5PR11MB6211E9C38F74EBB728448AFD95FFA@CY5PR11MB6211.namprd11.prod.outlook.com>
On Fri, 22 Sep 2023, "Gupta, Anshuman" <anshuman.gupta@intel.com> wrote:
>> -----Original Message-----
>> From: Andi Shyti <andi.shyti@linux.intel.com>
>> Sent: Friday, September 22, 2023 8:46 PM
>> To: Vivi, Rodrigo <rodrigo.vivi@intel.com>
>> Cc: Nilawar, Badal <badal.nilawar@intel.com>; intel-xe@lists.freedesktop.org;
>> linux-hwmon@vger.kernel.org; Gupta, Anshuman
>> <anshuman.gupta@intel.com>; Dixit, Ashutosh <ashutosh.dixit@intel.com>;
>> linux@roeck-us.net; andi.shyti@linux.intel.com; Tauro, Riana
>> <riana.tauro@intel.com>; Brost, Matthew <matthew.brost@intel.com>
>> Subject: Re: [PATCH v5 1/6] drm/xe: Add XE_MISSING_CASE macro
>>
>> Hi Rodrigo,
>>
>> On Thu, Sep 21, 2023 at 12:03:26PM -0400, Rodrigo Vivi wrote:
>> > On Thu, Sep 21, 2023 at 03:55:14PM +0530, Badal Nilawar wrote:
>> > > Add XE_MISSING_CASE macro to handle missing switch case
>> > >
>> > > v2: Add comment about macro usage (Himal)
>> > >
>> > > Cc: Andi Shyti <andi.shyti@linux.intel.com>
>> > > Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
>> > > Reviewed-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
>> > > ---
>> > > drivers/gpu/drm/xe/xe_macros.h | 4 ++++
>> > > 1 file changed, 4 insertions(+)
>> > >
>> > > diff --git a/drivers/gpu/drm/xe/xe_macros.h
>> > > b/drivers/gpu/drm/xe/xe_macros.h index daf56c846d03..6c74c69920ed
>> > > 100644
>> > > --- a/drivers/gpu/drm/xe/xe_macros.h
>> > > +++ b/drivers/gpu/drm/xe/xe_macros.h
>> > > @@ -15,4 +15,8 @@
>> > > "Ioctl argument check failed at %s:%d: %s", \
>> > > __FILE__, __LINE__, #cond), 1))
>> > >
>> > > +/* Parameter to macro should be a variable name */ #define
>> > > +XE_MISSING_CASE(x) WARN(1, "Missing case (%s == %ld)\n", \
>> > > + __stringify(x), (long)(x))
>> > > +
>> >
>> > No, please! Let's not add unnecessary macros.
>>
>> it's not a bad idea, actually... in i915 we have the MISSING_CASE for switch
>> cases with a defined number of cases and print warnings in case none if them
>> is the one inside the switch.
> IMHO Our CI aborts the on MISSING_CASE, which is not recoverable, drm_warn would
> Be better alternative here.
The whole point is that it aborts, so it won't get ignored. It's only
for cases like this.
BR,
Jani.
> Thanks,
> Anshuman Gupta.
>>
>> It's so widely used and actually nice to have that I thought many times to
>> move it to some core kernel libraries.
>>
>> Andi
--
Jani Nikula, Intel
next prev parent reply other threads:[~2023-09-25 12:08 UTC|newest]
Thread overview: 53+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-21 10:25 [Intel-xe] [PATCH v5 0/6] Add HWMON support for DGFX Badal Nilawar
2023-09-21 10:25 ` Badal Nilawar
2023-09-21 10:21 ` [Intel-xe] ✓ CI.Patch_applied: success for Add HWMON support for DGFX (rev5) Patchwork
2023-09-21 10:21 ` [Intel-xe] ✗ CI.checkpatch: warning " Patchwork
2023-09-21 10:23 ` [Intel-xe] ✓ CI.KUnit: success " Patchwork
2023-09-21 10:25 ` [Intel-xe] [PATCH v5 1/6] drm/xe: Add XE_MISSING_CASE macro Badal Nilawar
2023-09-21 10:25 ` Badal Nilawar
2023-09-21 16:03 ` [Intel-xe] " Rodrigo Vivi
2023-09-21 16:03 ` Rodrigo Vivi
2023-09-21 16:59 ` [Intel-xe] " Nilawar, Badal
2023-09-21 16:59 ` Nilawar, Badal
2023-09-22 10:05 ` [Intel-xe] " Jani Nikula
2023-09-22 15:16 ` Andi Shyti
2023-09-22 15:16 ` Andi Shyti
2023-09-22 15:19 ` [Intel-xe] " Gupta, Anshuman
2023-09-22 15:19 ` Gupta, Anshuman
2023-09-25 12:08 ` Jani Nikula [this message]
2023-09-22 19:03 ` [Intel-xe] " Rodrigo Vivi
2023-09-22 19:03 ` Rodrigo Vivi
2023-09-25 4:07 ` [Intel-xe] " Nilawar, Badal
2023-09-25 4:07 ` Nilawar, Badal
2023-09-21 10:25 ` [Intel-xe] [PATCH v5 2/6] drm/xe/hwmon: Expose power attributes Badal Nilawar
2023-09-21 10:25 ` Badal Nilawar
2023-09-21 13:22 ` [Intel-xe] " Riana Tauro
2023-09-21 13:22 ` Riana Tauro
2023-09-21 16:25 ` [Intel-xe] " Rodrigo Vivi
2023-09-21 16:25 ` Rodrigo Vivi
2023-09-22 9:57 ` Nilawar, Badal
2023-09-22 9:57 ` Nilawar, Badal
2023-09-22 17:24 ` Andi Shyti
2023-09-22 17:24 ` Andi Shyti
2023-09-25 4:34 ` [Intel-xe] " Nilawar, Badal
2023-09-25 4:34 ` Nilawar, Badal
2023-09-21 10:25 ` [Intel-xe] [PATCH v5 3/6] drm/xe/hwmon: Expose card reactive critical power Badal Nilawar
2023-09-21 10:25 ` Badal Nilawar
2023-09-21 10:25 ` [Intel-xe] [PATCH v5 4/6] drm/xe/hwmon: Expose input voltage attribute Badal Nilawar
2023-09-21 10:25 ` Badal Nilawar
2023-09-21 10:25 ` [Intel-xe] [PATCH v5 5/6] drm/xe/hwmon: Expose hwmon energy attribute Badal Nilawar
2023-09-21 10:25 ` Badal Nilawar
2023-09-21 14:09 ` [Intel-xe] " Riana Tauro
2023-09-21 14:09 ` Riana Tauro
2023-09-21 10:25 ` [Intel-xe] [PATCH v5 6/6] drm/xe/hwmon: Expose power1_max_interval Badal Nilawar
2023-09-21 10:25 ` Badal Nilawar
2023-09-21 11:43 ` [Intel-xe] " Ghimiray, Himal Prasad
2023-09-21 11:43 ` Ghimiray, Himal Prasad
2023-09-22 9:49 ` Nilawar, Badal
2023-09-22 9:49 ` Nilawar, Badal
2023-09-22 12:43 ` Ghimiray, Himal Prasad
2023-09-22 12:43 ` Ghimiray, Himal Prasad
2023-09-21 10:30 ` [Intel-xe] ✓ CI.Build: success for Add HWMON support for DGFX (rev5) Patchwork
2023-09-21 10:30 ` [Intel-xe] ✗ CI.Hooks: failure " Patchwork
2023-09-21 10:31 ` [Intel-xe] ✓ CI.checksparse: success " Patchwork
2023-09-21 11:05 ` [Intel-xe] ✗ CI.BAT: failure " Patchwork
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