* [Intel-gfx] [PATCH v3 00/22] drm/i915: Init DDI ports in VBT order
@ 2023-02-21 23:02 Ville Syrjala
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 01/22] drm/i915: Populate dig_port->connected() before connector init Ville Syrjala
` (26 more replies)
0 siblings, 27 replies; 35+ messages in thread
From: Ville Syrjala @ 2023-02-21 23:02 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
I just wanted to init DDI ports in VBT child device order
without any up front assumptions about which conflicting
child device defition is valid. That is pretty much what
we need to do for the ADL laptops with the phantom eDP vs.
native HDMI on DDI B.
However that approach doesn't work for some of the weird
SKL boards that have a phantom eDP on DDI A+AUX A and
and a real DP->VGA converter on DDI E+AUX A. For those
I had to introduce HPD live status check during eDP init.
One of the remaining concerns I still have is what happens
when we encounter VBTs with more AUX CH/DDC pin conflicts?
I think what we might want to do eventually is ignore the
conflicts as much as possible, and just init everything
based on VBT, trusting HPD to take care of things in the
end. That of course does have certain issues wrt. connector
forcing, but dunno if we can avoid those at all.
Also I think we need to nuke all the platform default AUX
CH/DDC pin stuff, or at least only try to utilize those
only once we've consumed the VBT fully.
v2: Fix SKL DDI A HPD live state
v3: Replace AUX CH/DDC pin sanitation with availability checks
Ville Syrjälä (22):
drm/i915: Populate dig_port->connected() before connector init
drm/i915: Fix SKL DDI A digital port .connected()
drm/i915: Get rid of the gm45 HPD live state nonsense
drm/i915: Introduce <platoform>_hotplug_mask()
drm/i915: Introduce intel_hpd_detection()
drm/i915: Check HPD live state during eDP probe
drm/i915: Sanitize child devices later
drm/i915: Split map_aux_ch() into per-platform arrays
drm/i915: Flip VBT DDC pin maps around
drm/i915: Nuke intel_bios_is_port_dp_dual_mode()
drm/i915: Remove bogus DDI-F from hsw/bdw output init
drm/i915: Introduce device info port_mask
drm/i915: Assert that device info bitmasks have enough bits
drm/i915: Assert that the port being initialized is valid
drm/i915: Beef up SDVO/HDMI port checks
drm/i915: Init DDI outputs based on port_mask on skl+
drm/i915: Try to initialize DDI/ICL+ DSI ports for every VBT child
device
drm/i915: Convert HSW/BDW to use VBT driven DDI probe
drm/i915: Remove DDC pin sanitation
drm/i915: Remove AUX CH sanitation
drm/i915: Initialize dig_port->aux_ch to NONE to be sure
drm/i915: Only populate aux_ch is really needed
drivers/gpu/drm/i915/display/g4x_dp.c | 39 +-
drivers/gpu/drm/i915/display/g4x_hdmi.c | 26 +-
drivers/gpu/drm/i915/display/icl_dsi.c | 11 +-
drivers/gpu/drm/i915/display/icl_dsi.h | 6 +-
drivers/gpu/drm/i915/display/intel_bios.c | 422 +++++++-----------
drivers/gpu/drm/i915/display/intel_bios.h | 12 +-
drivers/gpu/drm/i915/display/intel_crt.c | 2 +
drivers/gpu/drm/i915/display/intel_ddi.c | 148 ++++--
drivers/gpu/drm/i915/display/intel_ddi.h | 5 +-
drivers/gpu/drm/i915/display/intel_display.c | 89 +---
drivers/gpu/drm/i915/display/intel_display.h | 2 +
.../gpu/drm/i915/display/intel_display_core.h | 2 -
drivers/gpu/drm/i915/display/intel_dp.c | 28 ++
drivers/gpu/drm/i915/display/intel_dp_aux.c | 51 ++-
drivers/gpu/drm/i915/display/intel_dvo.c | 2 +
drivers/gpu/drm/i915/display/intel_hdmi.c | 78 +++-
drivers/gpu/drm/i915/display/intel_sdvo.c | 20 +-
drivers/gpu/drm/i915/i915_irq.c | 365 ++++++++++++---
drivers/gpu/drm/i915/i915_irq.h | 2 +
drivers/gpu/drm/i915/i915_pci.c | 31 ++
drivers/gpu/drm/i915/i915_reg.h | 13 +-
drivers/gpu/drm/i915/intel_device_info.c | 9 +
drivers/gpu/drm/i915/intel_device_info.h | 1 +
23 files changed, 843 insertions(+), 521 deletions(-)
--
2.39.2
^ permalink raw reply [flat|nested] 35+ messages in thread
* [Intel-gfx] [PATCH v3 01/22] drm/i915: Populate dig_port->connected() before connector init
2023-02-21 23:02 [Intel-gfx] [PATCH v3 00/22] drm/i915: Init DDI ports in VBT order Ville Syrjala
@ 2023-02-21 23:02 ` Ville Syrjala
2023-02-28 17:58 ` Jani Nikula
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 02/22] drm/i915: Fix SKL DDI A digital port .connected() Ville Syrjala
` (25 subsequent siblings)
26 siblings, 1 reply; 35+ messages in thread
From: Ville Syrjala @ 2023-02-21 23:02 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
We'll need dig_port->connected() to be there for a HPD live
state check during eDP connector probing. Reorder intel_ddi_init()
accordingly. g4x_dp_init() is already fine.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_ddi.c | 40 ++++++++++++------------
1 file changed, 20 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index e5979427b38b..40b5c93f9223 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -4503,8 +4503,28 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
drm_WARN_ON(&dev_priv->drm, port > PORT_I);
dig_port->ddi_io_power_domain = intel_display_power_ddi_io_domain(dev_priv, port);
+ if (DISPLAY_VER(dev_priv) >= 11) {
+ if (intel_phy_is_tc(dev_priv, phy))
+ dig_port->connected = intel_tc_port_connected;
+ else
+ dig_port->connected = lpt_digital_port_connected;
+ } else if (DISPLAY_VER(dev_priv) >= 8) {
+ if (port == PORT_A || IS_GEMINILAKE(dev_priv) ||
+ IS_BROXTON(dev_priv))
+ dig_port->connected = bdw_digital_port_connected;
+ else
+ dig_port->connected = lpt_digital_port_connected;
+ } else {
+ if (port == PORT_A)
+ dig_port->connected = hsw_digital_port_connected;
+ else
+ dig_port->connected = lpt_digital_port_connected;
+ }
+
+ intel_infoframe_init(dig_port);
+
if (init_dp) {
if (!intel_ddi_init_dp_connector(dig_port))
goto err;
@@ -4520,28 +4540,8 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
if (!intel_ddi_init_hdmi_connector(dig_port))
goto err;
}
- if (DISPLAY_VER(dev_priv) >= 11) {
- if (intel_phy_is_tc(dev_priv, phy))
- dig_port->connected = intel_tc_port_connected;
- else
- dig_port->connected = lpt_digital_port_connected;
- } else if (DISPLAY_VER(dev_priv) >= 8) {
- if (port == PORT_A || IS_GEMINILAKE(dev_priv) ||
- IS_BROXTON(dev_priv))
- dig_port->connected = bdw_digital_port_connected;
- else
- dig_port->connected = lpt_digital_port_connected;
- } else {
- if (port == PORT_A)
- dig_port->connected = hsw_digital_port_connected;
- else
- dig_port->connected = lpt_digital_port_connected;
- }
-
- intel_infoframe_init(dig_port);
-
return;
err:
drm_encoder_cleanup(&encoder->base);
--
2.39.2
^ permalink raw reply related [flat|nested] 35+ messages in thread
* [Intel-gfx] [PATCH v3 02/22] drm/i915: Fix SKL DDI A digital port .connected()
2023-02-21 23:02 [Intel-gfx] [PATCH v3 00/22] drm/i915: Init DDI ports in VBT order Ville Syrjala
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 01/22] drm/i915: Populate dig_port->connected() before connector init Ville Syrjala
@ 2023-02-21 23:02 ` Ville Syrjala
2023-02-28 18:18 ` Jani Nikula
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 03/22] drm/i915: Get rid of the gm45 HPD live state nonsense Ville Syrjala
` (24 subsequent siblings)
26 siblings, 1 reply; 35+ messages in thread
From: Ville Syrjala @ 2023-02-21 23:02 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
SKL doesn't have any north DE hotplug stuff. Currently we're
trying to read DDI A live state from the BDW north DE bit,
instead of the approproate south DE bit. Fix it.
And for good measure clear the pointer to the north hpd
pin array, so that we'll actually notice if some other
place is also using the wrong thing.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_ddi.c | 11 +++++++----
drivers/gpu/drm/i915/i915_irq.c | 2 ++
2 files changed, 9 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 40b5c93f9223..1a042f3658eb 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -4508,15 +4508,18 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
if (intel_phy_is_tc(dev_priv, phy))
dig_port->connected = intel_tc_port_connected;
else
dig_port->connected = lpt_digital_port_connected;
- } else if (DISPLAY_VER(dev_priv) >= 8) {
- if (port == PORT_A || IS_GEMINILAKE(dev_priv) ||
- IS_BROXTON(dev_priv))
+ } else if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv)) {
+ dig_port->connected = bdw_digital_port_connected;
+ } else if (DISPLAY_VER(dev_priv) == 9) {
+ dig_port->connected = lpt_digital_port_connected;
+ } else if (IS_BROADWELL(dev_priv)) {
+ if (port == PORT_A)
dig_port->connected = bdw_digital_port_connected;
else
dig_port->connected = lpt_digital_port_connected;
- } else {
+ } else if (IS_HASWELL(dev_priv)) {
if (port == PORT_A)
dig_port->connected = hsw_digital_port_connected;
else
dig_port->connected = lpt_digital_port_connected;
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index b024a3a7ca19..13ada0916c2a 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -197,8 +197,10 @@ static void intel_hpd_init_pins(struct drm_i915_private *dev_priv)
if (DISPLAY_VER(dev_priv) >= 11)
hpd->hpd = hpd_gen11;
else if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv))
hpd->hpd = hpd_bxt;
+ else if (DISPLAY_VER(dev_priv) == 9)
+ hpd->hpd = NULL; /* no north HPD on SKL */
else if (DISPLAY_VER(dev_priv) >= 8)
hpd->hpd = hpd_bdw;
else if (DISPLAY_VER(dev_priv) >= 7)
hpd->hpd = hpd_ivb;
--
2.39.2
^ permalink raw reply related [flat|nested] 35+ messages in thread
* [Intel-gfx] [PATCH v3 03/22] drm/i915: Get rid of the gm45 HPD live state nonsense
2023-02-21 23:02 [Intel-gfx] [PATCH v3 00/22] drm/i915: Init DDI ports in VBT order Ville Syrjala
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 01/22] drm/i915: Populate dig_port->connected() before connector init Ville Syrjala
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 02/22] drm/i915: Fix SKL DDI A digital port .connected() Ville Syrjala
@ 2023-02-21 23:02 ` Ville Syrjala
2023-02-28 18:19 ` Jani Nikula
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 04/22] drm/i915: Introduce <platoform>_hotplug_mask() Ville Syrjala
` (23 subsequent siblings)
26 siblings, 1 reply; 35+ messages in thread
From: Ville Syrjala @ 2023-02-21 23:02 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
The idea that ctg uses different HPD live state bits is
total nonsense, at least on my machine (Dell Latitude
E5400).
The only reason DP-B even works on my ctg is that DP-D
live state is stuck high, even though there is no physical
DP-D port. So when the detect checks DP-B live state it
sees the stuck live state of DP-D instead. If I hack
the driver to not register DP-D at all, and thus we never
enabe DP-D HPD, DP-B stops working as well.
Just to put some conclusive evidence into this mess,
here are the actual hotplug register values for each port:
Everything disconnected:
PORT_HOTPLUG_EN (0x00061110): 0x00000000
PORT_HOTPLUG_STAT (0x00061114): 0x00000000
PORT_HOTPLUG_EN (0x00061110): 0x08000000
PORT_HOTPLUG_STAT (0x00061114): 0x08000000
PORT_HOTPLUG_EN (0x00061110): 0x10000000
PORT_HOTPLUG_STAT (0x00061114): 0x00000000
PORT_HOTPLUG_EN (0x00061110): 0x20000000
PORT_HOTPLUG_STAT (0x00061114): 0x00000000
Only port B connected:
PORT_HOTPLUG_EN (0x00061110): 0x00000000
PORT_HOTPLUG_STAT (0x00061114): 0x00000000
PORT_HOTPLUG_EN (0x00061110): 0x08000000
PORT_HOTPLUG_STAT (0x00061114): 0x08000000
PORT_HOTPLUG_EN (0x00061110): 0x10000000
PORT_HOTPLUG_STAT (0x00061114): 0x00000000
PORT_HOTPLUG_EN (0x00061110): 0x20000000
PORT_HOTPLUG_STAT (0x00061114): 0x20000000
Only port C connected:
PORT_HOTPLUG_EN (0x00061110): 0x00000000
PORT_HOTPLUG_STAT (0x00061114): 0x00000000
PORT_HOTPLUG_EN (0x00061110): 0x08000000
PORT_HOTPLUG_STAT (0x00061114): 0x08000000
PORT_HOTPLUG_EN (0x00061110): 0x10000000
PORT_HOTPLUG_STAT (0x00061114): 0x10000000
PORT_HOTPLUG_EN (0x00061110): 0x20000000
PORT_HOTPLUG_STAT (0x00061114): 0x00000000
So the enable bit and live state bit always match 1:1.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/g4x_dp.c | 28 +--------------------------
drivers/gpu/drm/i915/i915_reg.h | 13 +------------
2 files changed, 2 insertions(+), 39 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c b/drivers/gpu/drm/i915/display/g4x_dp.c
index a50ad0fff57c..920d570f7594 100644
--- a/drivers/gpu/drm/i915/display/g4x_dp.c
+++ b/drivers/gpu/drm/i915/display/g4x_dp.c
@@ -1196,31 +1196,8 @@ static bool g4x_digital_port_connected(struct intel_encoder *encoder)
return intel_de_read(dev_priv, PORT_HOTPLUG_STAT) & bit;
}
-static bool gm45_digital_port_connected(struct intel_encoder *encoder)
-{
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
- u32 bit;
-
- switch (encoder->hpd_pin) {
- case HPD_PORT_B:
- bit = PORTB_HOTPLUG_LIVE_STATUS_GM45;
- break;
- case HPD_PORT_C:
- bit = PORTC_HOTPLUG_LIVE_STATUS_GM45;
- break;
- case HPD_PORT_D:
- bit = PORTD_HOTPLUG_LIVE_STATUS_GM45;
- break;
- default:
- MISSING_CASE(encoder->hpd_pin);
- return false;
- }
-
- return intel_de_read(dev_priv, PORT_HOTPLUG_STAT) & bit;
-}
-
static bool ilk_digital_port_connected(struct intel_encoder *encoder)
{
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
u32 bit = dev_priv->display.hotplug.hpd[encoder->hpd_pin];
@@ -1383,12 +1360,9 @@ bool g4x_dp_init(struct drm_i915_private *dev_priv,
dig_port->hpd_pulse = intel_dp_hpd_pulse;
if (HAS_GMCH(dev_priv)) {
- if (IS_GM45(dev_priv))
- dig_port->connected = gm45_digital_port_connected;
- else
- dig_port->connected = g4x_digital_port_connected;
+ dig_port->connected = g4x_digital_port_connected;
} else {
if (port == PORT_A)
dig_port->connected = ilk_digital_port_connected;
else
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index c1efa655fb68..de58695ad1c0 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -2482,20 +2482,9 @@
#define CRT_HOTPLUG_DETECT_VOLTAGE_325MV (0 << 2)
#define CRT_HOTPLUG_DETECT_VOLTAGE_475MV (1 << 2)
#define PORT_HOTPLUG_STAT _MMIO(DISPLAY_MMIO_BASE(dev_priv) + 0x61114)
-/*
- * HDMI/DP bits are g4x+
- *
- * WARNING: Bspec for hpd status bits on gen4 seems to be completely confused.
- * Please check the detailed lore in the commit message for for experimental
- * evidence.
- */
-/* Bspec says GM45 should match G4X/VLV/CHV, but reality disagrees */
-#define PORTD_HOTPLUG_LIVE_STATUS_GM45 (1 << 29)
-#define PORTC_HOTPLUG_LIVE_STATUS_GM45 (1 << 28)
-#define PORTB_HOTPLUG_LIVE_STATUS_GM45 (1 << 27)
-/* G4X/VLV/CHV DP/HDMI bits again match Bspec */
+/* HDMI/DP bits are g4x+ */
#define PORTD_HOTPLUG_LIVE_STATUS_G4X (1 << 27)
#define PORTC_HOTPLUG_LIVE_STATUS_G4X (1 << 28)
#define PORTB_HOTPLUG_LIVE_STATUS_G4X (1 << 29)
#define PORTD_HOTPLUG_INT_STATUS (3 << 21)
--
2.39.2
^ permalink raw reply related [flat|nested] 35+ messages in thread
* [Intel-gfx] [PATCH v3 04/22] drm/i915: Introduce <platoform>_hotplug_mask()
2023-02-21 23:02 [Intel-gfx] [PATCH v3 00/22] drm/i915: Init DDI ports in VBT order Ville Syrjala
` (2 preceding siblings ...)
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 03/22] drm/i915: Get rid of the gm45 HPD live state nonsense Ville Syrjala
@ 2023-02-21 23:02 ` Ville Syrjala
2023-02-28 18:36 ` Jani Nikula
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 05/22] drm/i915: Introduce intel_hpd_detection() Ville Syrjala
` (22 subsequent siblings)
26 siblings, 1 reply; 35+ messages in thread
From: Ville Syrjala @ 2023-02-21 23:02 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Pair each <platform>_hotplug_enables() function with
a corresponding <platform>_hotplug_mask() function so that
we can determine right bits to clear on a per hpd_pin basis.
We'll need this for turning on HPD sense for a specific
encoder rather than just all of them.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/i915_irq.c | 231 ++++++++++++++++++++++----------
1 file changed, 160 insertions(+), 71 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 13ada0916c2a..ecfa6dad145a 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2835,8 +2835,25 @@ static void cherryview_irq_reset(struct drm_i915_private *dev_priv)
vlv_display_irq_reset(dev_priv);
spin_unlock_irq(&dev_priv->irq_lock);
}
+static u32 ibx_hotplug_mask(struct drm_i915_private *i915,
+ enum hpd_pin hpd_pin)
+{
+ switch (hpd_pin) {
+ case HPD_PORT_A:
+ return PORTA_HOTPLUG_ENABLE;
+ case HPD_PORT_B:
+ return PORTB_HOTPLUG_ENABLE | PORTB_PULSE_DURATION_MASK;
+ case HPD_PORT_C:
+ return PORTC_HOTPLUG_ENABLE | PORTC_PULSE_DURATION_MASK;
+ case HPD_PORT_D:
+ return PORTD_HOTPLUG_ENABLE | PORTD_PULSE_DURATION_MASK;
+ default:
+ return 0;
+ }
+}
+
static u32 ibx_hotplug_enables(struct intel_encoder *encoder)
{
struct drm_i915_private *i915 = to_i915(encoder->base.dev);
@@ -2869,15 +2886,12 @@ static void ibx_hpd_detection_setup(struct drm_i915_private *dev_priv)
* duration to 2ms (which is the minimum in the Display Port spec).
* The pulse duration bits are reserved on LPT+.
*/
intel_uncore_rmw(&dev_priv->uncore, PCH_PORT_HOTPLUG,
- PORTA_HOTPLUG_ENABLE |
- PORTB_HOTPLUG_ENABLE |
- PORTC_HOTPLUG_ENABLE |
- PORTD_HOTPLUG_ENABLE |
- PORTB_PULSE_DURATION_MASK |
- PORTC_PULSE_DURATION_MASK |
- PORTD_PULSE_DURATION_MASK,
+ ibx_hotplug_mask(dev_priv, HPD_PORT_A) |
+ ibx_hotplug_mask(dev_priv, HPD_PORT_B) |
+ ibx_hotplug_mask(dev_priv, HPD_PORT_C) |
+ ibx_hotplug_mask(dev_priv, HPD_PORT_D),
intel_hpd_hotplug_enables(dev_priv, ibx_hotplug_enables));
}
static void ibx_hpd_irq_setup(struct drm_i915_private *dev_priv)
@@ -2891,55 +2905,75 @@ static void ibx_hpd_irq_setup(struct drm_i915_private *dev_priv)
ibx_hpd_detection_setup(dev_priv);
}
+static u32 _icp_ddi_hotplug_enables(enum hpd_pin hpd_pin)
+{
+ switch (hpd_pin) {
+ case HPD_PORT_A:
+ case HPD_PORT_B:
+ case HPD_PORT_C:
+ case HPD_PORT_D:
+ return SHOTPLUG_CTL_DDI_HPD_ENABLE(hpd_pin);
+ default:
+ return 0;
+ }
+}
+
+static u32 icp_ddi_hotplug_mask(struct drm_i915_private *i915, enum hpd_pin hpd_pin)
+{
+ return _icp_ddi_hotplug_enables(hpd_pin);
+}
+
static u32 icp_ddi_hotplug_enables(struct intel_encoder *encoder)
{
- switch (encoder->hpd_pin) {
- case HPD_PORT_A:
- case HPD_PORT_B:
- case HPD_PORT_C:
- case HPD_PORT_D:
- return SHOTPLUG_CTL_DDI_HPD_ENABLE(encoder->hpd_pin);
+ return _icp_ddi_hotplug_enables(encoder->hpd_pin);
+}
+
+static u32 _icp_tc_hotplug_enables(enum hpd_pin hpd_pin)
+{
+ switch (hpd_pin) {
+ case HPD_PORT_TC1:
+ case HPD_PORT_TC2:
+ case HPD_PORT_TC3:
+ case HPD_PORT_TC4:
+ case HPD_PORT_TC5:
+ case HPD_PORT_TC6:
+ return ICP_TC_HPD_ENABLE(hpd_pin);
default:
return 0;
}
}
+static u32 icp_tc_hotplug_mask(struct drm_i915_private *i915, enum hpd_pin hpd_pin)
+{
+ return _icp_tc_hotplug_enables(hpd_pin);
+}
+
static u32 icp_tc_hotplug_enables(struct intel_encoder *encoder)
{
- switch (encoder->hpd_pin) {
- case HPD_PORT_TC1:
- case HPD_PORT_TC2:
- case HPD_PORT_TC3:
- case HPD_PORT_TC4:
- case HPD_PORT_TC5:
- case HPD_PORT_TC6:
- return ICP_TC_HPD_ENABLE(encoder->hpd_pin);
- default:
- return 0;
- }
+ return _icp_tc_hotplug_enables(encoder->hpd_pin);
}
static void icp_ddi_hpd_detection_setup(struct drm_i915_private *dev_priv)
{
intel_uncore_rmw(&dev_priv->uncore, SHOTPLUG_CTL_DDI,
- SHOTPLUG_CTL_DDI_HPD_ENABLE(HPD_PORT_A) |
- SHOTPLUG_CTL_DDI_HPD_ENABLE(HPD_PORT_B) |
- SHOTPLUG_CTL_DDI_HPD_ENABLE(HPD_PORT_C) |
- SHOTPLUG_CTL_DDI_HPD_ENABLE(HPD_PORT_D),
+ icp_ddi_hotplug_mask(dev_priv, HPD_PORT_A) |
+ icp_ddi_hotplug_mask(dev_priv, HPD_PORT_B) |
+ icp_ddi_hotplug_mask(dev_priv, HPD_PORT_C) |
+ icp_ddi_hotplug_mask(dev_priv, HPD_PORT_D),
intel_hpd_hotplug_enables(dev_priv, icp_ddi_hotplug_enables));
}
static void icp_tc_hpd_detection_setup(struct drm_i915_private *dev_priv)
{
intel_uncore_rmw(&dev_priv->uncore, SHOTPLUG_CTL_TC,
- ICP_TC_HPD_ENABLE(HPD_PORT_TC1) |
- ICP_TC_HPD_ENABLE(HPD_PORT_TC2) |
- ICP_TC_HPD_ENABLE(HPD_PORT_TC3) |
- ICP_TC_HPD_ENABLE(HPD_PORT_TC4) |
- ICP_TC_HPD_ENABLE(HPD_PORT_TC5) |
- ICP_TC_HPD_ENABLE(HPD_PORT_TC6),
+ icp_tc_hotplug_mask(dev_priv, HPD_PORT_TC1) |
+ icp_tc_hotplug_mask(dev_priv, HPD_PORT_TC2) |
+ icp_tc_hotplug_mask(dev_priv, HPD_PORT_TC3) |
+ icp_tc_hotplug_mask(dev_priv, HPD_PORT_TC4) |
+ icp_tc_hotplug_mask(dev_priv, HPD_PORT_TC5) |
+ icp_tc_hotplug_mask(dev_priv, HPD_PORT_TC6),
intel_hpd_hotplug_enables(dev_priv, icp_tc_hotplug_enables));
}
static void icp_hpd_irq_setup(struct drm_i915_private *dev_priv)
@@ -2957,21 +2991,31 @@ static void icp_hpd_irq_setup(struct drm_i915_private *dev_priv)
icp_ddi_hpd_detection_setup(dev_priv);
icp_tc_hpd_detection_setup(dev_priv);
}
+static u32 _gen11_hotplug_enables(enum hpd_pin hpd_pin)
+{
+ switch (hpd_pin) {
+ case HPD_PORT_TC1:
+ case HPD_PORT_TC2:
+ case HPD_PORT_TC3:
+ case HPD_PORT_TC4:
+ case HPD_PORT_TC5:
+ case HPD_PORT_TC6:
+ return GEN11_HOTPLUG_CTL_ENABLE(hpd_pin);
+ default:
+ return 0;
+ }
+}
+
+static u32 gen11_hotplug_mask(struct drm_i915_private *i915, enum hpd_pin hpd_pin)
+{
+ return _gen11_hotplug_enables(hpd_pin);
+}
+
static u32 gen11_hotplug_enables(struct intel_encoder *encoder)
{
- switch (encoder->hpd_pin) {
- case HPD_PORT_TC1:
- case HPD_PORT_TC2:
- case HPD_PORT_TC3:
- case HPD_PORT_TC4:
- case HPD_PORT_TC5:
- case HPD_PORT_TC6:
- return GEN11_HOTPLUG_CTL_ENABLE(encoder->hpd_pin);
- default:
- return 0;
- }
+ return _gen11_hotplug_enables(encoder->hpd_pin);
}
static void dg1_hpd_invert(struct drm_i915_private *i915)
{
@@ -2990,26 +3034,26 @@ static void dg1_hpd_irq_setup(struct drm_i915_private *dev_priv)
static void gen11_tc_hpd_detection_setup(struct drm_i915_private *dev_priv)
{
intel_uncore_rmw(&dev_priv->uncore, GEN11_TC_HOTPLUG_CTL,
- GEN11_HOTPLUG_CTL_ENABLE(HPD_PORT_TC1) |
- GEN11_HOTPLUG_CTL_ENABLE(HPD_PORT_TC2) |
- GEN11_HOTPLUG_CTL_ENABLE(HPD_PORT_TC3) |
- GEN11_HOTPLUG_CTL_ENABLE(HPD_PORT_TC4) |
- GEN11_HOTPLUG_CTL_ENABLE(HPD_PORT_TC5) |
- GEN11_HOTPLUG_CTL_ENABLE(HPD_PORT_TC6),
+ gen11_hotplug_mask(dev_priv, HPD_PORT_TC1) |
+ gen11_hotplug_mask(dev_priv, HPD_PORT_TC2) |
+ gen11_hotplug_mask(dev_priv, HPD_PORT_TC3) |
+ gen11_hotplug_mask(dev_priv, HPD_PORT_TC4) |
+ gen11_hotplug_mask(dev_priv, HPD_PORT_TC5) |
+ gen11_hotplug_mask(dev_priv, HPD_PORT_TC6),
intel_hpd_hotplug_enables(dev_priv, gen11_hotplug_enables));
}
static void gen11_tbt_hpd_detection_setup(struct drm_i915_private *dev_priv)
{
intel_uncore_rmw(&dev_priv->uncore, GEN11_TBT_HOTPLUG_CTL,
- GEN11_HOTPLUG_CTL_ENABLE(HPD_PORT_TC1) |
- GEN11_HOTPLUG_CTL_ENABLE(HPD_PORT_TC2) |
- GEN11_HOTPLUG_CTL_ENABLE(HPD_PORT_TC3) |
- GEN11_HOTPLUG_CTL_ENABLE(HPD_PORT_TC4) |
- GEN11_HOTPLUG_CTL_ENABLE(HPD_PORT_TC5) |
- GEN11_HOTPLUG_CTL_ENABLE(HPD_PORT_TC6),
+ gen11_hotplug_mask(dev_priv, HPD_PORT_TC1) |
+ gen11_hotplug_mask(dev_priv, HPD_PORT_TC2) |
+ gen11_hotplug_mask(dev_priv, HPD_PORT_TC3) |
+ gen11_hotplug_mask(dev_priv, HPD_PORT_TC4) |
+ gen11_hotplug_mask(dev_priv, HPD_PORT_TC5) |
+ gen11_hotplug_mask(dev_priv, HPD_PORT_TC6),
intel_hpd_hotplug_enables(dev_priv, gen11_hotplug_enables));
}
static void gen11_hpd_irq_setup(struct drm_i915_private *dev_priv)
@@ -3029,11 +3073,11 @@ static void gen11_hpd_irq_setup(struct drm_i915_private *dev_priv)
if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP)
icp_hpd_irq_setup(dev_priv);
}
-static u32 spt_hotplug_enables(struct intel_encoder *encoder)
+static u32 _spt_hotplug_enables(enum hpd_pin hpd_pin)
{
- switch (encoder->hpd_pin) {
+ switch (hpd_pin) {
case HPD_PORT_A:
return PORTA_HOTPLUG_ENABLE;
case HPD_PORT_B:
return PORTB_HOTPLUG_ENABLE;
@@ -3045,18 +3089,38 @@ static u32 spt_hotplug_enables(struct intel_encoder *encoder)
return 0;
}
}
-static u32 spt_hotplug2_enables(struct intel_encoder *encoder)
+static u32 spt_hotplug_mask(struct drm_i915_private *i915, enum hpd_pin hpd_pin)
{
- switch (encoder->hpd_pin) {
+ return _spt_hotplug_enables(hpd_pin);
+}
+
+static u32 spt_hotplug_enables(struct intel_encoder *encoder)
+{
+ return _spt_hotplug_enables(encoder->hpd_pin);
+}
+
+static u32 _spt_hotplug2_enables(enum hpd_pin hpd_pin)
+{
+ switch (hpd_pin) {
case HPD_PORT_E:
return PORTE_HOTPLUG_ENABLE;
default:
return 0;
}
}
+static u32 spt_hotplug2_mask(struct drm_i915_private *i915, enum hpd_pin hpd_pin)
+{
+ return _spt_hotplug2_enables(hpd_pin);
+}
+
+static u32 spt_hotplug2_enables(struct intel_encoder *encoder)
+{
+ return _spt_hotplug2_enables(encoder->hpd_pin);
+}
+
static void spt_hpd_detection_setup(struct drm_i915_private *dev_priv)
{
/* Display WA #1179 WaHardHangonHotPlug: cnp */
if (HAS_PCH_CNP(dev_priv)) {
@@ -3065,15 +3129,16 @@ static void spt_hpd_detection_setup(struct drm_i915_private *dev_priv)
}
/* Enable digital hotplug on the PCH */
intel_uncore_rmw(&dev_priv->uncore, PCH_PORT_HOTPLUG,
- PORTA_HOTPLUG_ENABLE |
- PORTB_HOTPLUG_ENABLE |
- PORTC_HOTPLUG_ENABLE |
- PORTD_HOTPLUG_ENABLE,
+ spt_hotplug_mask(dev_priv, HPD_PORT_A) |
+ spt_hotplug_mask(dev_priv, HPD_PORT_B) |
+ spt_hotplug_mask(dev_priv, HPD_PORT_C) |
+ spt_hotplug_mask(dev_priv, HPD_PORT_D),
intel_hpd_hotplug_enables(dev_priv, spt_hotplug_enables));
- intel_uncore_rmw(&dev_priv->uncore, PCH_PORT_HOTPLUG2, PORTE_HOTPLUG_ENABLE,
+ intel_uncore_rmw(&dev_priv->uncore, PCH_PORT_HOTPLUG2,
+ spt_hotplug2_mask(dev_priv, HPD_PORT_E),
intel_hpd_hotplug_enables(dev_priv, spt_hotplug2_enables));
}
static void spt_hpd_irq_setup(struct drm_i915_private *dev_priv)
@@ -3090,8 +3155,19 @@ static void spt_hpd_irq_setup(struct drm_i915_private *dev_priv)
spt_hpd_detection_setup(dev_priv);
}
+static u32 ilk_hotplug_mask(struct drm_i915_private *i915, enum hpd_pin hpd_pin)
+{
+ switch (hpd_pin) {
+ case HPD_PORT_A:
+ return DIGITAL_PORTA_HOTPLUG_ENABLE |
+ DIGITAL_PORTA_PULSE_DURATION_MASK;
+ default:
+ return 0;
+ }
+}
+
static u32 ilk_hotplug_enables(struct intel_encoder *encoder)
{
switch (encoder->hpd_pin) {
case HPD_PORT_A:
@@ -3109,9 +3185,9 @@ static void ilk_hpd_detection_setup(struct drm_i915_private *dev_priv)
* duration to 2ms (which is the minimum in the Display Port spec)
* The pulse duration bits are reserved on HSW+.
*/
intel_uncore_rmw(&dev_priv->uncore, DIGITAL_PORT_HOTPLUG_CNTRL,
- DIGITAL_PORTA_HOTPLUG_ENABLE | DIGITAL_PORTA_PULSE_DURATION_MASK,
+ ilk_hotplug_mask(dev_priv, HPD_PORT_A),
intel_hpd_hotplug_enables(dev_priv, ilk_hotplug_enables));
}
static void ilk_hpd_irq_setup(struct drm_i915_private *dev_priv)
@@ -3130,8 +3206,22 @@ static void ilk_hpd_irq_setup(struct drm_i915_private *dev_priv)
ibx_hpd_irq_setup(dev_priv);
}
+static u32 bxt_hotplug_mask(struct drm_i915_private *i915, enum hpd_pin hpd_pin)
+{
+ switch (hpd_pin) {
+ case HPD_PORT_A:
+ return PORTA_HOTPLUG_ENABLE | BXT_DDIA_HPD_INVERT;
+ case HPD_PORT_B:
+ return PORTB_HOTPLUG_ENABLE | BXT_DDIB_HPD_INVERT;
+ case HPD_PORT_C:
+ return PORTC_HOTPLUG_ENABLE | BXT_DDIC_HPD_INVERT;
+ default:
+ return 0;
+ }
+}
+
static u32 bxt_hotplug_enables(struct intel_encoder *encoder)
{
u32 hotplug;
@@ -3158,12 +3248,11 @@ static u32 bxt_hotplug_enables(struct intel_encoder *encoder)
static void bxt_hpd_detection_setup(struct drm_i915_private *dev_priv)
{
intel_uncore_rmw(&dev_priv->uncore, PCH_PORT_HOTPLUG,
- PORTA_HOTPLUG_ENABLE |
- PORTB_HOTPLUG_ENABLE |
- PORTC_HOTPLUG_ENABLE |
- BXT_DDI_HPD_INVERT_MASK,
+ bxt_hotplug_mask(dev_priv, HPD_PORT_A) |
+ bxt_hotplug_mask(dev_priv, HPD_PORT_B) |
+ bxt_hotplug_mask(dev_priv, HPD_PORT_C),
intel_hpd_hotplug_enables(dev_priv, bxt_hotplug_enables));
}
static void bxt_hpd_irq_setup(struct drm_i915_private *dev_priv)
--
2.39.2
^ permalink raw reply related [flat|nested] 35+ messages in thread
* [Intel-gfx] [PATCH v3 05/22] drm/i915: Introduce intel_hpd_detection()
2023-02-21 23:02 [Intel-gfx] [PATCH v3 00/22] drm/i915: Init DDI ports in VBT order Ville Syrjala
` (3 preceding siblings ...)
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 04/22] drm/i915: Introduce <platoform>_hotplug_mask() Ville Syrjala
@ 2023-02-21 23:02 ` Ville Syrjala
2023-02-28 12:40 ` Jani Nikula
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 06/22] drm/i915: Check HPD live state during eDP probe Ville Syrjala
` (21 subsequent siblings)
26 siblings, 1 reply; 35+ messages in thread
From: Ville Syrjala @ 2023-02-21 23:02 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Add a mechanism by which we can toggle the HPD sense for
individual encoders.
This will be used during eDP probing to figure out if
anything is actually connected. The normal intel_hpd_irq_setup()
thing doesn't work since we only do that after probing the
outputs, and we only enable HPD sense for encoders that were
successfully probed.
The other idea that crossed my minds was to just turn on
HPD sense for all pins before output probing and let hpd_irq_setup()
clean it up afterwards. But that doesn't work for BXT/GLK where
the HPD invert information comes from the VBT child device.
So looks like this really needs to be per-encoder.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/i915_irq.c | 132 ++++++++++++++++++++++++++++++++
drivers/gpu/drm/i915/i915_irq.h | 2 +
2 files changed, 134 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index ecfa6dad145a..c5058d834f99 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2893,8 +2893,17 @@ static void ibx_hpd_detection_setup(struct drm_i915_private *dev_priv)
ibx_hotplug_mask(dev_priv, HPD_PORT_D),
intel_hpd_hotplug_enables(dev_priv, ibx_hotplug_enables));
}
+static void ibx_hpd_detection(struct intel_encoder *encoder, bool enable)
+{
+ struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+
+ intel_uncore_rmw(&i915->uncore, PCH_PORT_HOTPLUG,
+ ibx_hotplug_mask(i915, encoder->hpd_pin),
+ enable ? ibx_hotplug_enables(encoder) : 0);
+}
+
static void ibx_hpd_irq_setup(struct drm_i915_private *dev_priv)
{
u32 hotplug_irqs, enabled_irqs;
@@ -2963,8 +2972,17 @@ static void icp_ddi_hpd_detection_setup(struct drm_i915_private *dev_priv)
icp_ddi_hotplug_mask(dev_priv, HPD_PORT_D),
intel_hpd_hotplug_enables(dev_priv, icp_ddi_hotplug_enables));
}
+static void icp_ddi_hpd_detection(struct intel_encoder *encoder, bool enable)
+{
+ struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+
+ intel_uncore_rmw(&i915->uncore, SHOTPLUG_CTL_DDI,
+ icp_ddi_hotplug_mask(i915, encoder->hpd_pin),
+ enable ? icp_ddi_hotplug_enables(encoder) : 0);
+}
+
static void icp_tc_hpd_detection_setup(struct drm_i915_private *dev_priv)
{
intel_uncore_rmw(&dev_priv->uncore, SHOTPLUG_CTL_TC,
icp_tc_hotplug_mask(dev_priv, HPD_PORT_TC1) |
@@ -2975,8 +2993,23 @@ static void icp_tc_hpd_detection_setup(struct drm_i915_private *dev_priv)
icp_tc_hotplug_mask(dev_priv, HPD_PORT_TC6),
intel_hpd_hotplug_enables(dev_priv, icp_tc_hotplug_enables));
}
+static void icp_tc_hpd_detection(struct intel_encoder *encoder, bool enable)
+{
+ struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+
+ intel_uncore_rmw(&i915->uncore, SHOTPLUG_CTL_TC,
+ icp_tc_hotplug_mask(i915, encoder->hpd_pin),
+ enable ? icp_tc_hotplug_enables(encoder) : 0);
+}
+
+static void icp_hpd_detection(struct intel_encoder *encoder, bool enable)
+{
+ icp_ddi_hpd_detection(encoder, enable);
+ icp_tc_hpd_detection(encoder, enable);
+}
+
static void icp_hpd_irq_setup(struct drm_i915_private *dev_priv)
{
u32 hotplug_irqs, enabled_irqs;
@@ -3025,8 +3058,16 @@ static void dg1_hpd_invert(struct drm_i915_private *i915)
INVERT_DDID_HPD);
intel_uncore_rmw(&i915->uncore, SOUTH_CHICKEN1, 0, val);
}
+static void dg1_hpd_detection(struct intel_encoder *encoder, bool enable)
+{
+ struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+
+ dg1_hpd_invert(i915);
+ icp_hpd_detection(encoder, enable);
+}
+
static void dg1_hpd_irq_setup(struct drm_i915_private *dev_priv)
{
dg1_hpd_invert(dev_priv);
icp_hpd_irq_setup(dev_priv);
@@ -3043,8 +3084,17 @@ static void gen11_tc_hpd_detection_setup(struct drm_i915_private *dev_priv)
gen11_hotplug_mask(dev_priv, HPD_PORT_TC6),
intel_hpd_hotplug_enables(dev_priv, gen11_hotplug_enables));
}
+static void gen11_tc_hpd_detection(struct intel_encoder *encoder, bool enable)
+{
+ struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+
+ intel_uncore_rmw(&i915->uncore, GEN11_TC_HOTPLUG_CTL,
+ gen11_hotplug_mask(i915, encoder->hpd_pin),
+ enable ? gen11_hotplug_enables(encoder) : 0);
+}
+
static void gen11_tbt_hpd_detection_setup(struct drm_i915_private *dev_priv)
{
intel_uncore_rmw(&dev_priv->uncore, GEN11_TBT_HOTPLUG_CTL,
gen11_hotplug_mask(dev_priv, HPD_PORT_TC1) |
@@ -3055,8 +3105,28 @@ static void gen11_tbt_hpd_detection_setup(struct drm_i915_private *dev_priv)
gen11_hotplug_mask(dev_priv, HPD_PORT_TC6),
intel_hpd_hotplug_enables(dev_priv, gen11_hotplug_enables));
}
+static void gen11_tbt_hpd_detection(struct intel_encoder *encoder, bool enable)
+{
+ struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+
+ intel_uncore_rmw(&i915->uncore, GEN11_TBT_HOTPLUG_CTL,
+ gen11_hotplug_mask(i915, encoder->hpd_pin),
+ enable ? gen11_hotplug_enables(encoder) : 0);
+}
+
+static void gen11_hpd_detection(struct intel_encoder *encoder, bool enable)
+{
+ struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+
+ gen11_tc_hpd_detection(encoder, enable);
+ gen11_tbt_hpd_detection(encoder, enable);
+
+ if (INTEL_PCH_TYPE(i915) >= PCH_ICP)
+ icp_hpd_detection(encoder, enable);
+}
+
static void gen11_hpd_irq_setup(struct drm_i915_private *dev_priv)
{
u32 hotplug_irqs, enabled_irqs;
@@ -3140,8 +3210,28 @@ static void spt_hpd_detection_setup(struct drm_i915_private *dev_priv)
spt_hotplug2_mask(dev_priv, HPD_PORT_E),
intel_hpd_hotplug_enables(dev_priv, spt_hotplug2_enables));
}
+static void spt_hpd_detection(struct intel_encoder *encoder, bool enable)
+{
+ struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+
+ /* Display WA #1179 WaHardHangonHotPlug: cnp */
+ if (HAS_PCH_CNP(i915)) {
+ intel_uncore_rmw(&i915->uncore, SOUTH_CHICKEN1,
+ CHASSIS_CLK_REQ_DURATION_MASK,
+ CHASSIS_CLK_REQ_DURATION(0xf));
+ }
+
+ intel_uncore_rmw(&i915->uncore, PCH_PORT_HOTPLUG,
+ spt_hotplug_mask(i915, encoder->hpd_pin),
+ enable ? spt_hotplug_enables(encoder) : 0);
+
+ intel_uncore_rmw(&i915->uncore, PCH_PORT_HOTPLUG2,
+ spt_hotplug2_mask(i915, encoder->hpd_pin),
+ enable ? spt_hotplug2_enables(encoder) : 0);
+}
+
static void spt_hpd_irq_setup(struct drm_i915_private *dev_priv)
{
u32 hotplug_irqs, enabled_irqs;
@@ -3189,8 +3279,19 @@ static void ilk_hpd_detection_setup(struct drm_i915_private *dev_priv)
ilk_hotplug_mask(dev_priv, HPD_PORT_A),
intel_hpd_hotplug_enables(dev_priv, ilk_hotplug_enables));
}
+static void ilk_hpd_detection(struct intel_encoder *encoder, bool enable)
+{
+ struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+
+ intel_uncore_rmw(&i915->uncore, DIGITAL_PORT_HOTPLUG_CNTRL,
+ ilk_hotplug_mask(i915, encoder->hpd_pin),
+ enable ? ilk_hotplug_enables(encoder) : 0);
+
+ ibx_hpd_detection(encoder, enable);
+}
+
static void ilk_hpd_irq_setup(struct drm_i915_private *dev_priv)
{
u32 hotplug_irqs, enabled_irqs;
@@ -3254,8 +3355,17 @@ static void bxt_hpd_detection_setup(struct drm_i915_private *dev_priv)
bxt_hotplug_mask(dev_priv, HPD_PORT_C),
intel_hpd_hotplug_enables(dev_priv, bxt_hotplug_enables));
}
+static void bxt_hpd_detection(struct intel_encoder *encoder, bool enable)
+{
+ struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+
+ intel_uncore_rmw(&i915->uncore, PCH_PORT_HOTPLUG,
+ bxt_hotplug_mask(i915, encoder->hpd_pin),
+ enable ? bxt_hotplug_enables(encoder) : 0);
+}
+
static void bxt_hpd_irq_setup(struct drm_i915_private *dev_priv)
{
u32 hotplug_irqs, enabled_irqs;
@@ -3885,8 +3995,18 @@ static void i965_irq_postinstall(struct drm_i915_private *dev_priv)
i915_enable_asle_pipestat(dev_priv);
}
+static void i915_hpd_detection(struct intel_encoder *encoder, bool enable)
+{
+ struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+ u32 hotplug_en = hpd_mask_i915[encoder->hpd_pin];
+
+ /* HPD sense and interrupt enable are one and the same */
+ i915_hotplug_interrupt_update(i915, hotplug_en,
+ enable ? hotplug_en : 0);
+}
+
static void i915_hpd_irq_setup(struct drm_i915_private *dev_priv)
{
u32 hotplug_en;
@@ -3970,14 +4090,18 @@ static irqreturn_t i965_irq_handler(int irq, void *arg)
return ret;
}
struct intel_hotplug_funcs {
+ /* Enable HPD sense and interrupts for all present encoders */
void (*hpd_irq_setup)(struct drm_i915_private *i915);
+ /* Enable/disable HPD sense for a single encoder */
+ void (*hpd_detection)(struct intel_encoder *encoder, bool enable);
};
#define HPD_FUNCS(platform) \
static const struct intel_hotplug_funcs platform##_hpd_funcs = { \
.hpd_irq_setup = platform##_hpd_irq_setup, \
+ .hpd_detection = platform##_hpd_detection, \
}
HPD_FUNCS(i915);
HPD_FUNCS(dg1);
@@ -3987,8 +4111,16 @@ HPD_FUNCS(icp);
HPD_FUNCS(spt);
HPD_FUNCS(ilk);
#undef HPD_FUNCS
+void intel_hpd_detection(struct intel_encoder *encoder, bool enable)
+{
+ struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+
+ if (i915->display.funcs.hotplug)
+ i915->display.funcs.hotplug->hpd_detection(encoder, enable);
+}
+
void intel_hpd_irq_setup(struct drm_i915_private *i915)
{
if (i915->display_irqs_enabled && i915->display.funcs.hotplug)
i915->display.funcs.hotplug->hpd_irq_setup(i915);
diff --git a/drivers/gpu/drm/i915/i915_irq.h b/drivers/gpu/drm/i915/i915_irq.h
index 03ee4c8b1ed3..a5eb85ed7537 100644
--- a/drivers/gpu/drm/i915/i915_irq.h
+++ b/drivers/gpu/drm/i915/i915_irq.h
@@ -16,8 +16,9 @@ struct drm_crtc;
struct drm_device;
struct drm_display_mode;
struct drm_i915_private;
struct intel_crtc;
+struct intel_encoder;
struct intel_uncore;
void intel_irq_init(struct drm_i915_private *dev_priv);
void intel_irq_fini(struct drm_i915_private *dev_priv);
@@ -36,8 +37,9 @@ i915_disable_pipestat(struct drm_i915_private *dev_priv, enum pipe pipe,
void valleyview_enable_display_irqs(struct drm_i915_private *dev_priv);
void valleyview_disable_display_irqs(struct drm_i915_private *dev_priv);
+void intel_hpd_detection(struct intel_encoder *encoder, bool enable);
void intel_hpd_irq_setup(struct drm_i915_private *i915);
void i915_hotplug_interrupt_update(struct drm_i915_private *dev_priv,
u32 mask,
u32 bits);
--
2.39.2
^ permalink raw reply related [flat|nested] 35+ messages in thread
* [Intel-gfx] [PATCH v3 06/22] drm/i915: Check HPD live state during eDP probe
2023-02-21 23:02 [Intel-gfx] [PATCH v3 00/22] drm/i915: Init DDI ports in VBT order Ville Syrjala
` (4 preceding siblings ...)
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 05/22] drm/i915: Introduce intel_hpd_detection() Ville Syrjala
@ 2023-02-21 23:02 ` Ville Syrjala
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 07/22] drm/i915: Sanitize child devices later Ville Syrjala
` (20 subsequent siblings)
26 siblings, 0 replies; 35+ messages in thread
From: Ville Syrjala @ 2023-02-21 23:02 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
We need to untangle the mess where some SKL machines (at least)
declare both DDI A and DDI E to be present in their VBT, and
both using AUX A. DDI A is a ghost eDP, wheres DDI E may be a
real DP->VGA converter.
Currently that is handled by checking the VBT child devices
for conflicts before output probing. But that kind of solution
will not work for the ADL phantom dual eDP VBTs. I think on
those we just have to probe the eDP first. And would be nice
to use the same probe scheme for everything.
On these SKL systems if we probe DDI A first (which is only
natural given it's declared by VBT first) we will get an answer
via AUX, but it came from the DP->VGA converter hooked to the
DDI E, not DDI A. Thus we mistakenly register eDP on DDI A
and screw up the real DP device in DDI E.
To fix this let's check the HPD live state during the eDP probe.
If we got an answer via DPCD but HPD is still down let's assume
we got the answer from someone else.
Smoke tested on all my eDP machines (ilk,hsw-ult,tgl,adl) and
I also tested turning off all HPD hardware prior to loading
i915 to make sure it all comes up properly. And I simulated
the failure path too by not turning on HPD sense and that
correctly gave up on eDP.
I *think* Windows might just fully depend on HPD here. I
couldn't really find any other way they probe displays. And
I did find code where they also check the live state prior
to AUX transfers (something Imre and I have also talked
about perhaps doing). That would also solve this as we'd
not succeed in the eDP probe DPCD reads.
Other solutions I've considered:
- Reintrduce DDI strap checks on SKL. Unfortunately we just
don't have any idea how reliable they are on real production
hardware, and commit 5a2376d1360b ("drm/i915/skl: WaIgnoreDDIAStrap
is forever, always init DDI A") does suggest that not very.
Sadly that commit is very poor in details :/
Also the systems (Asrock B250M-HDV at least) fixed by commit
41e35ffb380b ("drm/i915: Favor last VBT child device with
conflicting AUX ch/DDC pin") might still not work since we
don't know what their straps indicate. Stupid me for not
asking the reporter to check those at the time :(
We have currently two CI machines (fi-cfl-guc,fi-cfl-8700k
both MS-7B54/Z370M) that also declare both DDI A and DDI E
in VBT to use AUX A, and on these the DDI A strap is also
set. There doesn't seem to be anything hooked up to either
DDI however. But given the DDI A strap is wrong on these it
might well be wrong on the Asrock too.
Most other CI machines seem to have straps that generally
match the VBT. fi-kbl-soraka is an exception though as DDI D
strap is not set, but it is declared in VBT as a DP++ port.
No idea if there's a real physical port to go with it or not.
- Some kind of quirk just for the cases where both DDI A and DDI E
are present in VBT. Might be feasible given we've ignored
DDI A in these cases up to now successfully. But feels rather
unsatisfactory, and not very future proof against funny VBTs.
References: https://bugs.freedesktop.org/show_bug.cgi?id=111966
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 28 +++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index b77bd4565864..8a871a657b74 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -45,8 +45,9 @@
#include "g4x_dp.h"
#include "i915_debugfs.h"
#include "i915_drv.h"
+#include "i915_irq.h"
#include "i915_reg.h"
#include "intel_atomic.h"
#include "intel_audio.h"
#include "intel_backlight.h"
@@ -5303,8 +5304,17 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp,
*/
goto out_vdd_off;
}
+ /*
+ * Enable HPD sense for live status check.
+ * intel_hpd_irq_setup() will turn it off again
+ * if it's no longer needed later.
+ *
+ * The DPCD probe below will make sure VDD is on.
+ */
+ intel_hpd_detection(encoder, true);
+
/* Cache DPCD and EDID for edp. */
has_dpcd = intel_edp_init_dpcd(intel_dp);
if (!has_dpcd) {
@@ -5314,8 +5324,26 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp,
encoder->base.base.id, encoder->base.name);
goto out_vdd_off;
}
+ /*
+ * VBT and straps are liars. Also check HPD as that seems
+ * to be the most reliable piece of information available.
+ */
+ if (!intel_digital_port_connected(encoder)) {
+ /*
+ * If this fails, presume the DPCD answer came
+ * from some other port using the same AUX CH.
+ *
+ * FIXME maybe cleaner to check this before the
+ * DPCD read? Would need sort out the VDD handling...
+ */
+ drm_info(&dev_priv->drm,
+ "[ENCODER:%d:%s] HPD is down, disabling eDP\n",
+ encoder->base.base.id, encoder->base.name);
+ goto out_vdd_off;
+ }
+
mutex_lock(&dev_priv->drm.mode_config.mutex);
drm_edid = drm_edid_read_ddc(connector, &intel_dp->aux.ddc);
if (!drm_edid) {
/* Fallback to EDID from ACPI OpRegion, if any */
--
2.39.2
^ permalink raw reply related [flat|nested] 35+ messages in thread
* [Intel-gfx] [PATCH v3 07/22] drm/i915: Sanitize child devices later
2023-02-21 23:02 [Intel-gfx] [PATCH v3 00/22] drm/i915: Init DDI ports in VBT order Ville Syrjala
` (5 preceding siblings ...)
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 06/22] drm/i915: Check HPD live state during eDP probe Ville Syrjala
@ 2023-02-21 23:02 ` Ville Syrjala
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 08/22] drm/i915: Split map_aux_ch() into per-platform arrays Ville Syrjala
` (19 subsequent siblings)
26 siblings, 0 replies; 35+ messages in thread
From: Ville Syrjala @ 2023-02-21 23:02 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Currently we sanitize the child device aux_ch/ddc_pin while parsing
the ports from VBT. But that won't work when we have duplicate child
devices for the same port.
Instead let's sanitize just before initializing the encoder,
based on which resources were consumed by encoders that were
(successfully) initialized earlier.
I also included the intel_bios_encoder_sanitize() calls in the
g4x+ DP/HDMI code, but there we need to be careful not confuse
the split DP vs. HDMI encoders as conflicting child devices.
Checking encoder->devdata for equality should suffice.
TODO: the sanitation only affects the VBT assigned stuff, but
we could still have a conflict if one port came from VBT
with a non-default pin, and another port just used the
platform default which happens be the same pin...
TODO: Need to double check the details on commit 41e35ffb380b ("drm/i915:
Favor last VBT child device with conflicting AUX ch/DDC pin")
to make sure we're not breaking stuff with the new
sanitation scheme
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/g4x_dp.c | 3 +-
drivers/gpu/drm/i915/display/g4x_hdmi.c | 3 +-
drivers/gpu/drm/i915/display/intel_bios.c | 91 +++++++++++++----------
drivers/gpu/drm/i915/display/intel_bios.h | 4 +-
drivers/gpu/drm/i915/display/intel_ddi.c | 4 +-
5 files changed, 62 insertions(+), 43 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c b/drivers/gpu/drm/i915/display/g4x_dp.c
index 920d570f7594..5e1892f9cd54 100644
--- a/drivers/gpu/drm/i915/display/g4x_dp.c
+++ b/drivers/gpu/drm/i915/display/g4x_dp.c
@@ -1252,15 +1252,16 @@ static const struct drm_encoder_funcs intel_dp_enc_funcs = {
bool g4x_dp_init(struct drm_i915_private *dev_priv,
i915_reg_t output_reg, enum port port)
{
- const struct intel_bios_encoder_data *devdata;
+ struct intel_bios_encoder_data *devdata;
struct intel_digital_port *dig_port;
struct intel_encoder *intel_encoder;
struct drm_encoder *encoder;
struct intel_connector *intel_connector;
devdata = intel_bios_encoder_data_lookup(dev_priv, port);
+ intel_bios_encoder_sanitize(devdata, port);
/* FIXME bail? */
if (!devdata)
drm_dbg_kms(&dev_priv->drm, "No VBT child device for DP-%c\n",
diff --git a/drivers/gpu/drm/i915/display/g4x_hdmi.c b/drivers/gpu/drm/i915/display/g4x_hdmi.c
index 448ea26786e0..d730cf79a402 100644
--- a/drivers/gpu/drm/i915/display/g4x_hdmi.c
+++ b/drivers/gpu/drm/i915/display/g4x_hdmi.c
@@ -548,14 +548,15 @@ intel_hdmi_hotplug(struct intel_encoder *encoder,
void g4x_hdmi_init(struct drm_i915_private *dev_priv,
i915_reg_t hdmi_reg, enum port port)
{
- const struct intel_bios_encoder_data *devdata;
+ struct intel_bios_encoder_data *devdata;
struct intel_digital_port *dig_port;
struct intel_encoder *intel_encoder;
struct intel_connector *intel_connector;
devdata = intel_bios_encoder_data_lookup(dev_priv, port);
+ intel_bios_encoder_sanitize(devdata, port);
/* FIXME bail? */
if (!devdata)
drm_dbg_kms(&dev_priv->drm, "No VBT child device for HDMI-%c\n",
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index f35ef3675d39..19be8862261b 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -2221,33 +2221,33 @@ static u8 map_ddc_pin(struct drm_i915_private *i915, u8 vbt_pin)
vbt_pin);
return 0;
}
-static enum port get_port_by_ddc_pin(struct drm_i915_private *i915, u8 ddc_pin)
+static struct intel_encoder *
+get_encoder_by_ddc_pin(struct drm_i915_private *i915, u8 ddc_pin)
{
- enum port port;
+ struct intel_encoder *encoder;
if (!ddc_pin)
- return PORT_NONE;
+ return NULL;
- for_each_port(port) {
- const struct intel_bios_encoder_data *devdata =
- i915->display.vbt.ports[port];
+ for_each_intel_encoder(&i915->drm, encoder) {
+ const struct intel_bios_encoder_data *devdata = encoder->devdata;
if (devdata && ddc_pin == devdata->child.ddc_pin)
- return port;
+ return encoder;
}
- return PORT_NONE;
+ return NULL;
}
static void sanitize_ddc_pin(struct intel_bios_encoder_data *devdata,
enum port port)
{
struct drm_i915_private *i915 = devdata->i915;
- struct child_device_config *child;
+ struct child_device_config *child = &devdata->child;
+ struct intel_encoder *other;
u8 mapped_ddc_pin;
- enum port p;
if (!devdata->child.ddc_pin)
return;
@@ -2260,81 +2260,87 @@ static void sanitize_ddc_pin(struct intel_bios_encoder_data *devdata,
devdata->child.ddc_pin = 0;
return;
}
- p = get_port_by_ddc_pin(i915, devdata->child.ddc_pin);
- if (p == PORT_NONE)
+ other = get_encoder_by_ddc_pin(i915, devdata->child.ddc_pin);
+ if (!other)
+ return;
+
+ /*
+ * Pre-HSW uses separate DP and HDMI encoders
+ * for the same port. Let them pass.
+ */
+ if (!HAS_DDI(i915) && devdata == other->devdata)
return;
drm_dbg_kms(&i915->drm,
"port %c trying to use the same DDC pin (0x%x) as port %c, "
"disabling port %c DVI/HDMI support\n",
port_name(port), mapped_ddc_pin,
- port_name(p), port_name(p));
+ port_name(other->port), port_name(port));
/*
* If we have multiple ports supposedly sharing the pin, then dvi/hdmi
* couldn't exist on the shared port. Otherwise they share the same ddc
* pin and system couldn't communicate with them separately.
*
- * Give inverse child device order the priority, last one wins. Yes,
- * there are real machines (eg. Asrock B250M-HDV) where VBT has both
- * port A and port E with the same AUX ch and we must pick port E :(
+ * First successfully initialized encoder wins.
*/
- child = &i915->display.vbt.ports[p]->child;
-
child->device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING;
child->device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT;
child->ddc_pin = 0;
}
-static enum port get_port_by_aux_ch(struct drm_i915_private *i915, u8 aux_ch)
+static struct intel_encoder *
+get_encoder_by_aux_ch(struct drm_i915_private *i915, u8 aux_ch)
{
- enum port port;
+ struct intel_encoder *encoder;
if (!aux_ch)
- return PORT_NONE;
+ return NULL;
- for_each_port(port) {
- const struct intel_bios_encoder_data *devdata =
- i915->display.vbt.ports[port];
+ for_each_intel_encoder(&i915->drm, encoder) {
+ const struct intel_bios_encoder_data *devdata = encoder->devdata;
if (devdata && aux_ch == devdata->child.aux_channel)
- return port;
+ return encoder;
}
- return PORT_NONE;
+ return NULL;
}
static void sanitize_aux_ch(struct intel_bios_encoder_data *devdata,
enum port port)
{
struct drm_i915_private *i915 = devdata->i915;
- struct child_device_config *child;
- enum port p;
+ struct child_device_config *child = &devdata->child;
+ struct intel_encoder *other;
- p = get_port_by_aux_ch(i915, devdata->child.aux_channel);
- if (p == PORT_NONE)
+ other = get_encoder_by_aux_ch(i915, devdata->child.aux_channel);
+ if (!other)
+ return;
+
+ /*
+ * Pre-HSW uses separate DP and HDMI encoders
+ * for the same port. Let them pass.
+ */
+ if (!HAS_DDI(i915) && devdata == other->devdata)
return;
drm_dbg_kms(&i915->drm,
"port %c trying to use the same AUX CH (0x%x) as port %c, "
"disabling port %c DP support\n",
port_name(port), devdata->child.aux_channel,
- port_name(p), port_name(p));
+ port_name(other->port), port_name(port));
/*
* If we have multiple ports supposedly sharing the aux channel, then DP
* couldn't exist on the shared port. Otherwise they share the same aux
* channel and system couldn't communicate with them separately.
*
- * Give inverse child device order the priority, last one wins. Yes,
- * there are real machines (eg. Asrock B250M-HDV) where VBT has both
- * port A and port E with the same AUX ch and we must pick port E :(
+ * First successfully initialized encoder wins.
*/
- child = &i915->display.vbt.ports[p]->child;
-
child->device_type &= ~DEVICE_TYPE_DISPLAYPORT_OUTPUT;
child->aux_channel = 0;
}
@@ -2743,15 +2749,22 @@ static void parse_ddi_port(struct intel_bios_encoder_data *devdata)
}
sanitize_device_type(devdata, port);
+ i915->display.vbt.ports[port] = devdata;
+}
+
+void intel_bios_encoder_sanitize(struct intel_bios_encoder_data *devdata,
+ enum port port)
+{
+ if (!devdata)
+ return;
+
if (intel_bios_encoder_supports_dvi(devdata))
sanitize_ddc_pin(devdata, port);
if (intel_bios_encoder_supports_dp(devdata))
sanitize_aux_ch(devdata, port);
-
- i915->display.vbt.ports[port] = devdata;
}
static bool has_ddi_port_info(struct drm_i915_private *i915)
{
@@ -3703,9 +3716,9 @@ bool intel_bios_encoder_hpd_invert(const struct intel_bios_encoder_data *devdata
{
return devdata && devdata->child.hpd_invert;
}
-const struct intel_bios_encoder_data *
+struct intel_bios_encoder_data *
intel_bios_encoder_data_lookup(struct drm_i915_private *i915, enum port port)
{
return i915->display.vbt.ports[port];
}
diff --git a/drivers/gpu/drm/i915/display/intel_bios.h b/drivers/gpu/drm/i915/display/intel_bios.h
index 8a0730c9b48c..a3ff67c41128 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.h
+++ b/drivers/gpu/drm/i915/display/intel_bios.h
@@ -253,10 +253,12 @@ bool intel_bios_get_dsc_params(struct intel_encoder *encoder,
struct intel_crtc_state *crtc_state,
int dsc_max_bpc);
bool intel_bios_port_supports_typec_usb(struct drm_i915_private *i915, enum port port);
bool intel_bios_port_supports_tbt(struct drm_i915_private *i915, enum port port);
+void intel_bios_encoder_sanitize(struct intel_bios_encoder_data *devdata,
+ enum port port);
-const struct intel_bios_encoder_data *
+struct intel_bios_encoder_data *
intel_bios_encoder_data_lookup(struct drm_i915_private *i915, enum port port);
bool intel_bios_encoder_supports_dvi(const struct intel_bios_encoder_data *devdata);
bool intel_bios_encoder_supports_hdmi(const struct intel_bios_encoder_data *devdata);
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 1a042f3658eb..8a269fed3bd1 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -34,8 +34,9 @@
#include "i915_reg.h"
#include "intel_audio.h"
#include "intel_audio_regs.h"
#include "intel_backlight.h"
+#include "intel_bios.h"
#include "intel_combo_phy.h"
#include "intel_combo_phy_regs.h"
#include "intel_connector.h"
#include "intel_crtc.h"
@@ -4259,9 +4260,9 @@ static void intel_ddi_encoder_shutdown(struct intel_encoder *encoder)
void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
{
struct intel_digital_port *dig_port;
struct intel_encoder *encoder;
- const struct intel_bios_encoder_data *devdata;
+ struct intel_bios_encoder_data *devdata;
bool init_hdmi, init_dp;
enum phy phy = intel_port_to_phy(dev_priv, port);
/*
@@ -4282,8 +4283,9 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
"VBT says port %c is not present\n",
port_name(port));
return;
}
+ intel_bios_encoder_sanitize(devdata, port);
init_hdmi = intel_bios_encoder_supports_dvi(devdata) ||
intel_bios_encoder_supports_hdmi(devdata);
init_dp = intel_bios_encoder_supports_dp(devdata);
--
2.39.2
^ permalink raw reply related [flat|nested] 35+ messages in thread
* [Intel-gfx] [PATCH v3 08/22] drm/i915: Split map_aux_ch() into per-platform arrays
2023-02-21 23:02 [Intel-gfx] [PATCH v3 00/22] drm/i915: Init DDI ports in VBT order Ville Syrjala
` (6 preceding siblings ...)
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 07/22] drm/i915: Sanitize child devices later Ville Syrjala
@ 2023-02-21 23:02 ` Ville Syrjala
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 09/22] drm/i915: Flip VBT DDC pin maps around Ville Syrjala
` (18 subsequent siblings)
26 siblings, 0 replies; 35+ messages in thread
From: Ville Syrjala @ 2023-02-21 23:02 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
The big switch+if statement mess in map_aux_ch() is
illegible. Split up into cleaner per-platform arrays
like we already have for the gmbus pins.
We use enum aux_ch as the index and the VBT thing as
the value. Slightly non-intuitive perhaps but if we
did it the other way around we'd have problems with
AUX_CH_A being zero, and thus any non-populated
element would look like AUX_CH_A.
v2: flip the index vs. value around
TODO: Didn't bother with the platform variants beyond the
ones that really need remapping, which means if the
VBT is bogus we end up with a nonexistent aux ch.
Might be nice to check this a bit better.
Yet another bitmask in device info?
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_bios.c | 144 +++++++++++-----------
1 file changed, 71 insertions(+), 73 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 19be8862261b..5eae34295d4e 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -3584,86 +3584,84 @@ bool intel_bios_get_dsc_params(struct intel_encoder *encoder,
return false;
}
+static const u8 xelpd_aux_ch_map[] = {
+ [AUX_CH_A] = DP_AUX_A,
+ [AUX_CH_B] = DP_AUX_B,
+ [AUX_CH_C] = DP_AUX_C,
+ [AUX_CH_D_XELPD] = DP_AUX_D,
+ [AUX_CH_E_XELPD] = DP_AUX_E,
+ [AUX_CH_USBC1] = DP_AUX_F,
+ [AUX_CH_USBC2] = DP_AUX_G,
+ [AUX_CH_USBC3] = DP_AUX_H,
+ [AUX_CH_USBC4] = DP_AUX_I,
+};
+
+/*
+ * ADL-S VBT uses PHY based mapping. Combo PHYs A,B,C,D,E
+ * map to DDI A,TC1,TC2,TC3,TC4 respectively.
+ */
+static const u8 adls_aux_ch_map[] = {
+ [AUX_CH_A] = DP_AUX_A,
+ [AUX_CH_USBC1] = DP_AUX_B,
+ [AUX_CH_USBC2] = DP_AUX_C,
+ [AUX_CH_USBC3] = DP_AUX_D,
+ [AUX_CH_USBC4] = DP_AUX_E,
+};
+
+/*
+ * RKL/DG1 VBT uses PHY based mapping. Combo PHYs A,B,C,D
+ * map to DDI A,B,TC1,TC2 respectively.
+ */
+static const u8 rkl_aux_ch_map[] = {
+ [AUX_CH_A] = DP_AUX_A,
+ [AUX_CH_B] = DP_AUX_B,
+ [AUX_CH_USBC1] = DP_AUX_C,
+ [AUX_CH_USBC2] = DP_AUX_D,
+};
+
+static const u8 direct_aux_ch_map[] = {
+ [AUX_CH_A] = DP_AUX_A,
+ [AUX_CH_B] = DP_AUX_B,
+ [AUX_CH_C] = DP_AUX_C,
+ [AUX_CH_D] = DP_AUX_D, /* aka AUX_CH_USBC1 */
+ [AUX_CH_E] = DP_AUX_E, /* aka AUX_CH_USBC2 */
+ [AUX_CH_F] = DP_AUX_F, /* aka AUX_CH_USBC3 */
+ [AUX_CH_G] = DP_AUX_G, /* aka AUX_CH_USBC4 */
+ [AUX_CH_H] = DP_AUX_H, /* aka AUX_CH_USBC5 */
+ [AUX_CH_I] = DP_AUX_I, /* aka AUX_CH_USBC6 */
+};
+
static enum aux_ch map_aux_ch(struct drm_i915_private *i915, u8 aux_channel)
{
- enum aux_ch aux_ch;
+ const u8 *aux_ch_map;
+ int i, n_entries;
- /*
- * RKL/DG1 VBT uses PHY based mapping. Combo PHYs A,B,C,D
- * map to DDI A,B,TC1,TC2 respectively.
- *
- * ADL-S VBT uses PHY based mapping. Combo PHYs A,B,C,D,E
- * map to DDI A,TC1,TC2,TC3,TC4 respectively.
- */
- switch (aux_channel) {
- case DP_AUX_A:
- aux_ch = AUX_CH_A;
- break;
- case DP_AUX_B:
- if (IS_ALDERLAKE_S(i915))
- aux_ch = AUX_CH_USBC1;
- else
- aux_ch = AUX_CH_B;
- break;
- case DP_AUX_C:
- if (IS_ALDERLAKE_S(i915))
- aux_ch = AUX_CH_USBC2;
- else if (IS_DG1(i915) || IS_ROCKETLAKE(i915))
- aux_ch = AUX_CH_USBC1;
- else
- aux_ch = AUX_CH_C;
- break;
- case DP_AUX_D:
- if (DISPLAY_VER(i915) >= 13)
- aux_ch = AUX_CH_D_XELPD;
- else if (IS_ALDERLAKE_S(i915))
- aux_ch = AUX_CH_USBC3;
- else if (IS_DG1(i915) || IS_ROCKETLAKE(i915))
- aux_ch = AUX_CH_USBC2;
- else
- aux_ch = AUX_CH_D;
- break;
- case DP_AUX_E:
- if (DISPLAY_VER(i915) >= 13)
- aux_ch = AUX_CH_E_XELPD;
- else if (IS_ALDERLAKE_S(i915))
- aux_ch = AUX_CH_USBC4;
- else
- aux_ch = AUX_CH_E;
- break;
- case DP_AUX_F:
- if (DISPLAY_VER(i915) >= 13)
- aux_ch = AUX_CH_USBC1;
- else
- aux_ch = AUX_CH_F;
- break;
- case DP_AUX_G:
- if (DISPLAY_VER(i915) >= 13)
- aux_ch = AUX_CH_USBC2;
- else
- aux_ch = AUX_CH_G;
- break;
- case DP_AUX_H:
- if (DISPLAY_VER(i915) >= 13)
- aux_ch = AUX_CH_USBC3;
- else
- aux_ch = AUX_CH_H;
- break;
- case DP_AUX_I:
- if (DISPLAY_VER(i915) >= 13)
- aux_ch = AUX_CH_USBC4;
- else
- aux_ch = AUX_CH_I;
- break;
- default:
- MISSING_CASE(aux_channel);
- aux_ch = AUX_CH_A;
- break;
+ if (DISPLAY_VER(i915) >= 13) {
+ aux_ch_map = xelpd_aux_ch_map;
+ n_entries = ARRAY_SIZE(xelpd_aux_ch_map);
+ } else if (IS_ALDERLAKE_S(i915)) {
+ aux_ch_map = adls_aux_ch_map;
+ n_entries = ARRAY_SIZE(adls_aux_ch_map);
+ } else if (IS_DG1(i915) || IS_ROCKETLAKE(i915)) {
+ aux_ch_map = rkl_aux_ch_map;
+ n_entries = ARRAY_SIZE(rkl_aux_ch_map);
+ } else {
+ aux_ch_map = direct_aux_ch_map;
+ n_entries = ARRAY_SIZE(direct_aux_ch_map);
}
- return aux_ch;
+ for (i = 0; i < n_entries; i++) {
+ if (aux_ch_map[i] == aux_channel)
+ return i;
+ }
+
+ drm_dbg_kms(&i915->drm,
+ "Ignoring alternate AUX CH: VBT claims AUX 0x%x, which is not valid for this platform\n",
+ aux_channel);
+
+ return AUX_CH_NONE;
}
enum aux_ch intel_bios_dp_aux_ch(const struct intel_bios_encoder_data *devdata)
{
--
2.39.2
^ permalink raw reply related [flat|nested] 35+ messages in thread
* [Intel-gfx] [PATCH v3 09/22] drm/i915: Flip VBT DDC pin maps around
2023-02-21 23:02 [Intel-gfx] [PATCH v3 00/22] drm/i915: Init DDI ports in VBT order Ville Syrjala
` (7 preceding siblings ...)
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 08/22] drm/i915: Split map_aux_ch() into per-platform arrays Ville Syrjala
@ 2023-02-21 23:02 ` Ville Syrjala
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 10/22] drm/i915: Nuke intel_bios_is_port_dp_dual_mode() Ville Syrjala
` (17 subsequent siblings)
26 siblings, 0 replies; 35+ messages in thread
From: Ville Syrjala @ 2023-02-21 23:02 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Swap the roles of the index vs. value for the VBT DDC pin
mapping tables. This is not strictly necessary for DDC pins
but it will make this work exactly like the AUX CH mapping
tables where the role reversal is necessary (or at least makes
things easier). Consistency is good.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_bios.c | 70 ++++++++++++-----------
1 file changed, 36 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 5eae34295d4e..cec38ed935e0 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -2134,60 +2134,60 @@ static u8 translate_iboost(u8 val)
}
static const u8 cnp_ddc_pin_map[] = {
[0] = 0, /* N/A */
- [DDC_BUS_DDI_B] = GMBUS_PIN_1_BXT,
- [DDC_BUS_DDI_C] = GMBUS_PIN_2_BXT,
- [DDC_BUS_DDI_D] = GMBUS_PIN_4_CNP, /* sic */
- [DDC_BUS_DDI_F] = GMBUS_PIN_3_BXT, /* sic */
+ [GMBUS_PIN_1_BXT] = DDC_BUS_DDI_B,
+ [GMBUS_PIN_2_BXT] = DDC_BUS_DDI_C,
+ [GMBUS_PIN_4_CNP] = DDC_BUS_DDI_D, /* sic */
+ [GMBUS_PIN_3_BXT] = DDC_BUS_DDI_F, /* sic */
};
static const u8 icp_ddc_pin_map[] = {
- [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
- [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
- [TGL_DDC_BUS_DDI_C] = GMBUS_PIN_3_BXT,
- [ICL_DDC_BUS_PORT_1] = GMBUS_PIN_9_TC1_ICP,
- [ICL_DDC_BUS_PORT_2] = GMBUS_PIN_10_TC2_ICP,
- [ICL_DDC_BUS_PORT_3] = GMBUS_PIN_11_TC3_ICP,
- [ICL_DDC_BUS_PORT_4] = GMBUS_PIN_12_TC4_ICP,
- [TGL_DDC_BUS_PORT_5] = GMBUS_PIN_13_TC5_TGP,
- [TGL_DDC_BUS_PORT_6] = GMBUS_PIN_14_TC6_TGP,
+ [GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A,
+ [GMBUS_PIN_2_BXT] = ICL_DDC_BUS_DDI_B,
+ [GMBUS_PIN_3_BXT] = TGL_DDC_BUS_DDI_C,
+ [GMBUS_PIN_9_TC1_ICP] = ICL_DDC_BUS_PORT_1,
+ [GMBUS_PIN_10_TC2_ICP] = ICL_DDC_BUS_PORT_2,
+ [GMBUS_PIN_11_TC3_ICP] = ICL_DDC_BUS_PORT_3,
+ [GMBUS_PIN_12_TC4_ICP] = ICL_DDC_BUS_PORT_4,
+ [GMBUS_PIN_13_TC5_TGP] = TGL_DDC_BUS_PORT_5,
+ [GMBUS_PIN_14_TC6_TGP] = TGL_DDC_BUS_PORT_6,
};
static const u8 rkl_pch_tgp_ddc_pin_map[] = {
- [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
- [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
- [RKL_DDC_BUS_DDI_D] = GMBUS_PIN_9_TC1_ICP,
- [RKL_DDC_BUS_DDI_E] = GMBUS_PIN_10_TC2_ICP,
+ [GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A,
+ [GMBUS_PIN_2_BXT] = ICL_DDC_BUS_DDI_B,
+ [GMBUS_PIN_9_TC1_ICP] = RKL_DDC_BUS_DDI_D,
+ [GMBUS_PIN_10_TC2_ICP] = RKL_DDC_BUS_DDI_E,
};
static const u8 adls_ddc_pin_map[] = {
- [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
- [ADLS_DDC_BUS_PORT_TC1] = GMBUS_PIN_9_TC1_ICP,
- [ADLS_DDC_BUS_PORT_TC2] = GMBUS_PIN_10_TC2_ICP,
- [ADLS_DDC_BUS_PORT_TC3] = GMBUS_PIN_11_TC3_ICP,
- [ADLS_DDC_BUS_PORT_TC4] = GMBUS_PIN_12_TC4_ICP,
+ [GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A,
+ [GMBUS_PIN_9_TC1_ICP] = ADLS_DDC_BUS_PORT_TC1,
+ [GMBUS_PIN_10_TC2_ICP] = ADLS_DDC_BUS_PORT_TC2,
+ [GMBUS_PIN_11_TC3_ICP] = ADLS_DDC_BUS_PORT_TC3,
+ [GMBUS_PIN_12_TC4_ICP] = ADLS_DDC_BUS_PORT_TC4,
};
static const u8 gen9bc_tgp_ddc_pin_map[] = {
- [DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
- [DDC_BUS_DDI_C] = GMBUS_PIN_9_TC1_ICP,
- [DDC_BUS_DDI_D] = GMBUS_PIN_10_TC2_ICP,
+ [GMBUS_PIN_2_BXT] = DDC_BUS_DDI_B,
+ [GMBUS_PIN_9_TC1_ICP] = DDC_BUS_DDI_C,
+ [GMBUS_PIN_10_TC2_ICP] = DDC_BUS_DDI_D,
};
static const u8 adlp_ddc_pin_map[] = {
- [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
- [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
- [ADLP_DDC_BUS_PORT_TC1] = GMBUS_PIN_9_TC1_ICP,
- [ADLP_DDC_BUS_PORT_TC2] = GMBUS_PIN_10_TC2_ICP,
- [ADLP_DDC_BUS_PORT_TC3] = GMBUS_PIN_11_TC3_ICP,
- [ADLP_DDC_BUS_PORT_TC4] = GMBUS_PIN_12_TC4_ICP,
+ [GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A,
+ [GMBUS_PIN_2_BXT] = ICL_DDC_BUS_DDI_B,
+ [GMBUS_PIN_9_TC1_ICP] = ADLP_DDC_BUS_PORT_TC1,
+ [GMBUS_PIN_10_TC2_ICP] = ADLP_DDC_BUS_PORT_TC2,
+ [GMBUS_PIN_11_TC3_ICP] = ADLP_DDC_BUS_PORT_TC3,
+ [GMBUS_PIN_12_TC4_ICP] = ADLP_DDC_BUS_PORT_TC4,
};
static u8 map_ddc_pin(struct drm_i915_private *i915, u8 vbt_pin)
{
const u8 *ddc_pin_map;
- int n_entries;
+ int i, n_entries;
if (HAS_PCH_MTP(i915) || IS_ALDERLAKE_P(i915)) {
ddc_pin_map = adlp_ddc_pin_map;
n_entries = ARRAY_SIZE(adlp_ddc_pin_map);
@@ -2212,10 +2212,12 @@ static u8 map_ddc_pin(struct drm_i915_private *i915, u8 vbt_pin)
/* Assuming direct map */
return vbt_pin;
}
- if (vbt_pin < n_entries && ddc_pin_map[vbt_pin] != 0)
- return ddc_pin_map[vbt_pin];
+ for (i = 0; i < n_entries; i++) {
+ if (ddc_pin_map[i] == vbt_pin)
+ return i;
+ }
drm_dbg_kms(&i915->drm,
"Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n",
vbt_pin);
--
2.39.2
^ permalink raw reply related [flat|nested] 35+ messages in thread
* [Intel-gfx] [PATCH v3 10/22] drm/i915: Nuke intel_bios_is_port_dp_dual_mode()
2023-02-21 23:02 [Intel-gfx] [PATCH v3 00/22] drm/i915: Init DDI ports in VBT order Ville Syrjala
` (8 preceding siblings ...)
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 09/22] drm/i915: Flip VBT DDC pin maps around Ville Syrjala
@ 2023-02-21 23:02 ` Ville Syrjala
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 11/22] drm/i915: Remove bogus DDI-F from hsw/bdw output init Ville Syrjala
` (16 subsequent siblings)
26 siblings, 0 replies; 35+ messages in thread
From: Ville Syrjala @ 2023-02-21 23:02 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Now that we have encoder->devdata everwhere we don't need
the intel_bios_is_port_dp_dual_mode() wrapper any more.
And while at it let's include it in the child device log
dump as well since the logic in there is a bit more complex
than just DP&&HDMI.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_bios.c | 14 +++-----------
drivers/gpu/drm/i915/display/intel_bios.h | 2 +-
drivers/gpu/drm/i915/display/intel_hdmi.c | 6 +++---
3 files changed, 7 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index cec38ed935e0..4ddced8c049c 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -2676,10 +2676,11 @@ static void print_ddi_port(const struct intel_bios_encoder_data *devdata,
supports_typec_usb = intel_bios_encoder_supports_typec_usb(devdata);
supports_tbt = intel_bios_encoder_supports_tbt(devdata);
drm_dbg_kms(&i915->drm,
- "Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d DSI:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n",
+ "Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d DSI:%d DP++:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n",
port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp, is_dsi,
+ intel_bios_encoder_supports_dp_dual_mode(devdata),
intel_bios_encoder_is_lspcon(devdata),
supports_typec_usb, supports_tbt,
devdata->dsc != NULL);
@@ -3432,9 +3433,9 @@ bool intel_bios_is_port_present(struct drm_i915_private *i915, enum port port)
return false;
}
-static bool intel_bios_encoder_supports_dp_dual_mode(const struct intel_bios_encoder_data *devdata)
+bool intel_bios_encoder_supports_dp_dual_mode(const struct intel_bios_encoder_data *devdata)
{
const struct child_device_config *child = &devdata->child;
if (!intel_bios_encoder_supports_dp(devdata) ||
@@ -3451,17 +3452,8 @@ static bool intel_bios_encoder_supports_dp_dual_mode(const struct intel_bios_enc
return false;
}
-bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *i915,
- enum port port)
-{
- const struct intel_bios_encoder_data *devdata =
- intel_bios_encoder_data_lookup(i915, port);
-
- return devdata && intel_bios_encoder_supports_dp_dual_mode(devdata);
-}
-
/**
* intel_bios_is_dsi_present - is DSI present in VBT
* @i915: i915 device instance
* @port: port for DSI if present
diff --git a/drivers/gpu/drm/i915/display/intel_bios.h b/drivers/gpu/drm/i915/display/intel_bios.h
index a3ff67c41128..3c4f7d5e909b 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.h
+++ b/drivers/gpu/drm/i915/display/intel_bios.h
@@ -246,9 +246,8 @@ bool intel_bios_is_valid_vbt(const void *buf, size_t size);
bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv);
bool intel_bios_is_lvds_present(struct drm_i915_private *dev_priv, u8 *i2c_pin);
bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port port);
bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port);
-bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv, enum port port);
bool intel_bios_is_dsi_present(struct drm_i915_private *dev_priv, enum port *port);
bool intel_bios_get_dsc_params(struct intel_encoder *encoder,
struct intel_crtc_state *crtc_state,
int dsc_max_bpc);
@@ -265,8 +264,9 @@ bool intel_bios_encoder_supports_hdmi(const struct intel_bios_encoder_data *devd
bool intel_bios_encoder_supports_dp(const struct intel_bios_encoder_data *devdata);
bool intel_bios_encoder_supports_edp(const struct intel_bios_encoder_data *devdata);
bool intel_bios_encoder_supports_typec_usb(const struct intel_bios_encoder_data *devdata);
bool intel_bios_encoder_supports_tbt(const struct intel_bios_encoder_data *devdata);
+bool intel_bios_encoder_supports_dp_dual_mode(const struct intel_bios_encoder_data *devdata);
bool intel_bios_encoder_is_lspcon(const struct intel_bios_encoder_data *devdata);
bool intel_bios_encoder_lane_reversal(const struct intel_bios_encoder_data *devdata);
bool intel_bios_encoder_hpd_invert(const struct intel_bios_encoder_data *devdata);
enum aux_ch intel_bios_dp_aux_ch(const struct intel_bios_encoder_data *devdata);
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index c7e9e1fbed37..e6f887d75a70 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -2371,9 +2371,9 @@ static void
intel_hdmi_dp_dual_mode_detect(struct drm_connector *connector)
{
struct drm_i915_private *dev_priv = to_i915(connector->dev);
struct intel_hdmi *hdmi = intel_attached_hdmi(to_intel_connector(connector));
- enum port port = hdmi_to_dig_port(hdmi)->base.port;
+ struct intel_encoder *encoder = &hdmi_to_dig_port(hdmi)->base;
struct i2c_adapter *adapter =
intel_gmbus_get_adapter(dev_priv, hdmi->ddc_bus);
enum drm_dp_dual_mode_type type = drm_dp_dual_mode_detect(&dev_priv->drm, adapter);
@@ -2387,9 +2387,9 @@ intel_hdmi_dp_dual_mode_detect(struct drm_connector *connector)
* if the port is a dual mode capable DP port.
*/
if (type == DRM_DP_DUAL_MODE_UNKNOWN) {
if (!connector->force &&
- intel_bios_is_port_dp_dual_mode(dev_priv, port)) {
+ intel_bios_encoder_supports_dp_dual_mode(encoder->devdata)) {
drm_dbg_kms(&dev_priv->drm,
"Assuming DP dual mode adaptor presence based on VBT\n");
type = DRM_DP_DUAL_MODE_TYPE1_DVI;
} else {
@@ -2410,9 +2410,9 @@ intel_hdmi_dp_dual_mode_detect(struct drm_connector *connector)
hdmi->dp_dual_mode.max_tmds_clock);
/* Older VBTs are often buggy and can't be trusted :( Play it safe. */
if ((DISPLAY_VER(dev_priv) >= 8 || IS_HASWELL(dev_priv)) &&
- !intel_bios_is_port_dp_dual_mode(dev_priv, port)) {
+ !intel_bios_encoder_supports_dp_dual_mode(encoder->devdata)) {
drm_dbg_kms(&dev_priv->drm,
"Ignoring DP dual mode adaptor max TMDS clock for native HDMI port\n");
hdmi->dp_dual_mode.max_tmds_clock = 0;
}
--
2.39.2
^ permalink raw reply related [flat|nested] 35+ messages in thread
* [Intel-gfx] [PATCH v3 11/22] drm/i915: Remove bogus DDI-F from hsw/bdw output init
2023-02-21 23:02 [Intel-gfx] [PATCH v3 00/22] drm/i915: Init DDI ports in VBT order Ville Syrjala
` (9 preceding siblings ...)
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 10/22] drm/i915: Nuke intel_bios_is_port_dp_dual_mode() Ville Syrjala
@ 2023-02-21 23:02 ` Ville Syrjala
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 12/22] drm/i915: Introduce device info port_mask Ville Syrjala
` (15 subsequent siblings)
26 siblings, 0 replies; 35+ messages in thread
From: Ville Syrjala @ 2023-02-21 23:02 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
HSW/BDW don't have DDI-F so don't go looking for one.
Seems to have been accidentally left behind when the
skl+ stuff got split out in commit 097d9e902068
("drm/i915/display: remove strap checks from gen 9").
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index a1fbdf32bd21..f497a02a50ea 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7907,10 +7907,8 @@ static void intel_setup_outputs(struct drm_i915_private *dev_priv)
if (found & SFUSE_STRAP_DDIC_DETECTED)
intel_ddi_init(dev_priv, PORT_C);
if (found & SFUSE_STRAP_DDID_DETECTED)
intel_ddi_init(dev_priv, PORT_D);
- if (found & SFUSE_STRAP_DDIF_DETECTED)
- intel_ddi_init(dev_priv, PORT_F);
} else if (HAS_PCH_SPLIT(dev_priv)) {
int found;
/*
--
2.39.2
^ permalink raw reply related [flat|nested] 35+ messages in thread
* [Intel-gfx] [PATCH v3 12/22] drm/i915: Introduce device info port_mask
2023-02-21 23:02 [Intel-gfx] [PATCH v3 00/22] drm/i915: Init DDI ports in VBT order Ville Syrjala
` (10 preceding siblings ...)
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 11/22] drm/i915: Remove bogus DDI-F from hsw/bdw output init Ville Syrjala
@ 2023-02-21 23:02 ` Ville Syrjala
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 13/22] drm/i915: Assert that device info bitmasks have enough bits Ville Syrjala
` (14 subsequent siblings)
26 siblings, 0 replies; 35+ messages in thread
From: Ville Syrjala @ 2023-02-21 23:02 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Declare the available DVO/SDVO/HDMI/DP/DDI ports in the
device info. The other outputs (LVDS/TV/DSI/VGA) are left
out since for most of them we don't consider them as "ports".
DSI we should probably perhaps include somehow in the device
info. Just not sure how. Or we just introduce a HAS_DSI() and
call it a day?
TODO: figure out what to do about the subplatform stuff. Would
it be better to declare those directly with a different
device info or not? Also not sure the icl port-f stuff
matters even. Bspec claims there are icl SKUs with far
less ports than that and we don't seem to check for those
either?
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/i915_pci.c | 31 ++++++++++++++++++++++++
drivers/gpu/drm/i915/intel_device_info.c | 5 ++++
drivers/gpu/drm/i915/intel_device_info.h | 1 +
3 files changed, 37 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index a8d942b16223..9faf2b2827ed 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -217,31 +217,36 @@
static const struct intel_device_info i830_info = {
I830_FEATURES,
PLATFORM(INTEL_I830),
+ .__runtime.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C), /* DVO A/B/C */
};
static const struct intel_device_info i845g_info = {
I845_FEATURES,
PLATFORM(INTEL_I845G),
+ .__runtime.port_mask = BIT(PORT_B) | BIT(PORT_C), /* DVO B/C */
};
static const struct intel_device_info i85x_info = {
I830_FEATURES,
PLATFORM(INTEL_I85X),
.__runtime.fbc_mask = BIT(INTEL_FBC_A),
+ .__runtime.port_mask = BIT(PORT_B) | BIT(PORT_C), /* DVO B/C */
};
static const struct intel_device_info i865g_info = {
I845_FEATURES,
PLATFORM(INTEL_I865G),
.__runtime.fbc_mask = BIT(INTEL_FBC_A),
+ .__runtime.port_mask = BIT(PORT_B) | BIT(PORT_C), /* DVO B/C */
};
#define GEN3_FEATURES \
GEN(3), \
.__runtime.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \
.__runtime.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B), \
+ .__runtime.port_mask = BIT(PORT_B) | BIT(PORT_C), /* SDVO B/C */ \
.display.has_gmch = 1, \
.gpu_reset_clobbers_display = true, \
.__runtime.platform_engine_mask = BIT(RCS0), \
.has_3d_pipeline = 1, \
@@ -348,8 +353,9 @@ static const struct intel_device_info pnv_m_info = {
static const struct intel_device_info i965g_info = {
GEN4_FEATURES,
PLATFORM(INTEL_I965G),
+ .__runtime.port_mask = BIT(PORT_B) | BIT(PORT_C), /* SDVO B/C */
.display.has_overlay = 1,
.hws_needs_physical = 1,
.has_snoop = false,
};
@@ -358,8 +364,9 @@ static const struct intel_device_info i965gm_info = {
GEN4_FEATURES,
PLATFORM(INTEL_I965GM),
.is_mobile = 1,
.__runtime.fbc_mask = BIT(INTEL_FBC_A),
+ .__runtime.port_mask = BIT(PORT_B) | BIT(PORT_C), /* SDVO B/C */
.display.has_overlay = 1,
.display.supports_tv = 1,
.hws_needs_physical = 1,
.has_snoop = false,
@@ -367,8 +374,9 @@ static const struct intel_device_info i965gm_info = {
static const struct intel_device_info g45_info = {
GEN4_FEATURES,
PLATFORM(INTEL_G45),
+ .__runtime.port_mask = BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* SDVO/HDMI/DP B/C, DP D */
.__runtime.platform_engine_mask = BIT(RCS0) | BIT(VCS0),
.gpu_reset_clobbers_display = false,
};
@@ -376,8 +384,9 @@ static const struct intel_device_info gm45_info = {
GEN4_FEATURES,
PLATFORM(INTEL_GM45),
.is_mobile = 1,
.__runtime.fbc_mask = BIT(INTEL_FBC_A),
+ .__runtime.port_mask = BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* SDVO/HDMI/DP B/C, DP D */
.display.supports_tv = 1,
.__runtime.platform_engine_mask = BIT(RCS0) | BIT(VCS0),
.gpu_reset_clobbers_display = false,
};
@@ -385,8 +394,9 @@ static const struct intel_device_info gm45_info = {
#define GEN5_FEATURES \
GEN(5), \
.__runtime.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \
.__runtime.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B), \
+ .__runtime.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */ \
.display.has_hotplug = 1, \
.__runtime.platform_engine_mask = BIT(RCS0) | BIT(VCS0), \
.has_3d_pipeline = 1, \
.has_snoop = true, \
@@ -416,8 +426,9 @@ static const struct intel_device_info ilk_m_info = {
#define GEN6_FEATURES \
GEN(6), \
.__runtime.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \
.__runtime.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B), \
+ .__runtime.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */ \
.display.has_hotplug = 1, \
.__runtime.fbc_mask = BIT(INTEL_FBC_A), \
.__runtime.platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
.has_3d_pipeline = 1, \
@@ -469,8 +480,9 @@ static const struct intel_device_info snb_m_gt2_info = {
#define GEN7_FEATURES \
GEN(7), \
.__runtime.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C), \
.__runtime.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | BIT(TRANSCODER_C), \
+ .__runtime.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */ \
.display.has_hotplug = 1, \
.__runtime.fbc_mask = BIT(INTEL_FBC_A), \
.__runtime.platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
.has_3d_pipeline = 1, \
@@ -533,8 +545,9 @@ static const struct intel_device_info vlv_info = {
GEN(7),
.is_lp = 1,
.__runtime.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B),
.__runtime.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B),
+ .__runtime.port_mask = BIT(PORT_B) | BIT(PORT_C), /* HDMI/DP B/C */
.has_runtime_pm = 1,
.has_rc6 = 1,
.has_reset_engine = true,
.has_rps = true,
@@ -558,8 +571,9 @@ static const struct intel_device_info vlv_info = {
GEN7_FEATURES, \
.__runtime.platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0), \
.__runtime.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP), \
+ .__runtime.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E), \
.display.has_ddi = 1, \
.display.has_fpga_dbg = 1, \
.display.has_dp_mst = 1, \
.has_rc6p = 0 /* RC6p removed-by HSW */, \
@@ -628,8 +642,9 @@ static const struct intel_device_info chv_info = {
PLATFORM(INTEL_CHERRYVIEW),
GEN(8),
.__runtime.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C),
.__runtime.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | BIT(TRANSCODER_C),
+ .__runtime.port_mask = BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* HDMI/DP B/C/D */
.display.has_hotplug = 1,
.is_lp = 1,
.__runtime.platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0),
.has_64bit_reloc = 1,
@@ -708,8 +723,9 @@ static const struct intel_device_info skl_gt4_info = {
.__runtime.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C), \
.__runtime.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP) | \
BIT(TRANSCODER_DSI_A) | BIT(TRANSCODER_DSI_C), \
+ .__runtime.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C), \
.has_3d_pipeline = 1, \
.has_64bit_reloc = 1, \
.display.has_ddi = 1, \
.display.has_fpga_dbg = 1, \
@@ -845,22 +861,25 @@ static const struct intel_device_info cml_gt2_info = {
static const struct intel_device_info icl_info = {
GEN11_FEATURES,
PLATFORM(INTEL_ICELAKE),
+ .__runtime.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E),
.__runtime.platform_engine_mask =
BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2),
};
static const struct intel_device_info ehl_info = {
GEN11_FEATURES,
PLATFORM(INTEL_ELKHARTLAKE),
+ .__runtime.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D),
.__runtime.platform_engine_mask = BIT(RCS0) | BIT(BCS0) | BIT(VCS0) | BIT(VECS0),
.__runtime.ppgtt_size = 36,
};
static const struct intel_device_info jsl_info = {
GEN11_FEATURES,
PLATFORM(INTEL_JASPERLAKE),
+ .__runtime.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D),
.__runtime.platform_engine_mask = BIT(RCS0) | BIT(BCS0) | BIT(VCS0) | BIT(VECS0),
.__runtime.ppgtt_size = 36,
};
@@ -895,8 +914,10 @@ static const struct intel_device_info jsl_info = {
static const struct intel_device_info tgl_info = {
GEN12_FEATURES,
PLATFORM(INTEL_TIGERLAKE),
+ .__runtime.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) |
+ BIT(PORT_TC1) | BIT(PORT_TC2) | BIT(PORT_TC3) | BIT(PORT_TC4) | BIT(PORT_TC5) | BIT(PORT_TC5),
.display.has_modular_fia = 1,
.__runtime.platform_engine_mask =
BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2),
};
@@ -907,8 +928,10 @@ static const struct intel_device_info rkl_info = {
.display.abox_mask = BIT(0),
.__runtime.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C),
.__runtime.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) |
BIT(TRANSCODER_C),
+ .__runtime.port_mask = BIT(PORT_A) | BIT(PORT_B) |
+ BIT(PORT_TC1) | BIT(PORT_TC2),
.display.has_hti = 1,
.display.has_psr_hw_tracking = 0,
.__runtime.platform_engine_mask =
BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0),
@@ -927,8 +950,10 @@ static const struct intel_device_info dg1_info = {
DGFX_FEATURES,
.__runtime.graphics.ip.rel = 10,
PLATFORM(INTEL_DG1),
.__runtime.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D),
+ .__runtime.port_mask = BIT(PORT_A) | BIT(PORT_B) |
+ BIT(PORT_TC1) | BIT(PORT_TC2),
.require_force_probe = 1,
.__runtime.platform_engine_mask =
BIT(RCS0) | BIT(BCS0) | BIT(VECS0) |
BIT(VCS0) | BIT(VCS2),
@@ -939,8 +964,10 @@ static const struct intel_device_info dg1_info = {
static const struct intel_device_info adl_s_info = {
GEN12_FEATURES,
PLATFORM(INTEL_ALDERLAKE_S),
.__runtime.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D),
+ .__runtime.port_mask = BIT(PORT_A) |
+ BIT(PORT_TC1) | BIT(PORT_TC2) | BIT(PORT_TC3) | BIT(PORT_TC4),
.display.has_hti = 1,
.display.has_psr_hw_tracking = 0,
.__runtime.platform_engine_mask =
BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2),
@@ -994,8 +1021,10 @@ static const struct intel_device_info adl_p_info = {
PLATFORM(INTEL_ALDERLAKE_P),
.__runtime.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) |
BIT(TRANSCODER_C) | BIT(TRANSCODER_D) |
BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1),
+ .__runtime.port_mask = BIT(PORT_A) | BIT(PORT_B) |
+ BIT(PORT_TC1) | BIT(PORT_TC2) | BIT(PORT_TC3) | BIT(PORT_TC4),
.display.has_cdclk_crawl = 1,
.display.has_modular_fia = 1,
.display.has_psr_hw_tracking = 0,
.__runtime.platform_engine_mask =
@@ -1079,8 +1108,10 @@ static const struct intel_device_info dg2_info = {
DG2_FEATURES,
XE_LPD_FEATURES,
.__runtime.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) |
BIT(TRANSCODER_C) | BIT(TRANSCODER_D),
+ .__runtime.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D_XELPD) |
+ BIT(PORT_TC1),
};
static const struct intel_device_info ats_m_info = {
DG2_FEATURES,
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index fc5cd14adfcc..4ef7dd1d3bbe 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -258,17 +258,21 @@ static void intel_device_info_subplatform_init(struct drm_i915_private *i915)
/* Find and mark subplatform bits based on the PCI device id. */
if (find_devid(devid, subplatform_ult_ids,
ARRAY_SIZE(subplatform_ult_ids))) {
mask = BIT(INTEL_SUBPLATFORM_ULT);
+ if (IS_HASWELL(i915) || IS_BROADWELL(i915))
+ RUNTIME_INFO(i915)->port_mask &= ~BIT(PORT_D);
} else if (find_devid(devid, subplatform_ulx_ids,
ARRAY_SIZE(subplatform_ulx_ids))) {
mask = BIT(INTEL_SUBPLATFORM_ULX);
if (IS_HASWELL(i915) || IS_BROADWELL(i915)) {
/* ULX machines are also considered ULT. */
mask |= BIT(INTEL_SUBPLATFORM_ULT);
+ RUNTIME_INFO(i915)->port_mask &= ~BIT(PORT_D);
}
} else if (find_devid(devid, subplatform_portf_ids,
ARRAY_SIZE(subplatform_portf_ids))) {
+ RUNTIME_INFO(i915)->port_mask |= BIT(PORT_F);
mask = BIT(INTEL_SUBPLATFORM_PORTF);
} else if (find_devid(devid, subplatform_uy_ids,
ARRAY_SIZE(subplatform_uy_ids))) {
mask = BIT(INTEL_SUBPLATFORM_UY);
@@ -533,8 +537,9 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv)
DRIVER_ATOMIC);
memset(&info->display, 0, sizeof(info->display));
runtime->cpu_transcoder_mask = 0;
+ runtime->port_mask = 0;
memset(runtime->num_sprites, 0, sizeof(runtime->num_sprites));
memset(runtime->num_scalers, 0, sizeof(runtime->num_scalers));
runtime->fbc_mask = 0;
runtime->has_hdcp = false;
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index b30cc8b97c3a..5f6393a2cf83 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -250,8 +250,9 @@ struct intel_runtime_info {
/* display */
struct {
u8 pipe_mask;
u8 cpu_transcoder_mask;
+ u16 port_mask; /* DVO/sDVO/DP/HDMI/DDI ports */
u8 num_sprites[I915_MAX_PIPES];
u8 num_scalers[I915_MAX_PIPES];
--
2.39.2
^ permalink raw reply related [flat|nested] 35+ messages in thread
* [Intel-gfx] [PATCH v3 13/22] drm/i915: Assert that device info bitmasks have enough bits
2023-02-21 23:02 [Intel-gfx] [PATCH v3 00/22] drm/i915: Init DDI ports in VBT order Ville Syrjala
` (11 preceding siblings ...)
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 12/22] drm/i915: Introduce device info port_mask Ville Syrjala
@ 2023-02-21 23:02 ` Ville Syrjala
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 14/22] drm/i915: Assert that the port being initialized is valid Ville Syrjala
` (13 subsequent siblings)
26 siblings, 0 replies; 35+ messages in thread
From: Ville Syrjala @ 2023-02-21 23:02 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Sprinkle in some BUILD_BUG_ON()s to make sure some of
the bitmasks used in the device info have enough bits.
Do we have a better place for this sort of stuff?
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_device_info.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index 4ef7dd1d3bbe..70846e5d9a33 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -406,8 +406,12 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv)
struct intel_device_info *info = mkwrite_device_info(dev_priv);
struct intel_runtime_info *runtime = RUNTIME_INFO(dev_priv);
enum pipe pipe;
+ BUILD_BUG_ON(BITS_PER_TYPE(runtime->pipe_mask) < I915_MAX_PIPES);
+ BUILD_BUG_ON(BITS_PER_TYPE(runtime->cpu_transcoder_mask) < I915_MAX_TRANSCODERS);
+ BUILD_BUG_ON(BITS_PER_TYPE(runtime->port_mask) < I915_MAX_PORTS);
+
/* Wa_14011765242: adl-s A0,A1 */
if (IS_ADLS_DISPLAY_STEP(dev_priv, STEP_A0, STEP_A2))
for_each_pipe(dev_priv, pipe)
runtime->num_scalers[pipe] = 0;
--
2.39.2
^ permalink raw reply related [flat|nested] 35+ messages in thread
* [Intel-gfx] [PATCH v3 14/22] drm/i915: Assert that the port being initialized is valid
2023-02-21 23:02 [Intel-gfx] [PATCH v3 00/22] drm/i915: Init DDI ports in VBT order Ville Syrjala
` (12 preceding siblings ...)
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 13/22] drm/i915: Assert that device info bitmasks have enough bits Ville Syrjala
@ 2023-02-21 23:02 ` Ville Syrjala
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 15/22] drm/i915: Beef up SDVO/HDMI port checks Ville Syrjala
` (12 subsequent siblings)
26 siblings, 0 replies; 35+ messages in thread
From: Ville Syrjala @ 2023-02-21 23:02 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Sprinkle some asserts to catch any mishaps in the port_mask
vs. output init.
For DDI/DP/HDMI/SDVO I decided that we want to bail out for
an invalid port since those are the encoder types where
we might want consider driving the whole thing from the VBT
child device list, and bogus VBTs could be a real issue
(if for no other reason than the i915.vbt_firmware).
For DVO and HSW/BDW CRT port I just threw the assert in
there for good measure.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/g4x_dp.c | 3 +++
drivers/gpu/drm/i915/display/g4x_hdmi.c | 3 +++
drivers/gpu/drm/i915/display/intel_crt.c | 2 ++
drivers/gpu/drm/i915/display/intel_ddi.c | 3 +++
drivers/gpu/drm/i915/display/intel_display.c | 6 ++++++
drivers/gpu/drm/i915/display/intel_display.h | 2 ++
drivers/gpu/drm/i915/display/intel_dvo.c | 2 ++
drivers/gpu/drm/i915/display/intel_sdvo.c | 3 +++
8 files changed, 24 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c b/drivers/gpu/drm/i915/display/g4x_dp.c
index 5e1892f9cd54..b5b0b323c1f4 100644
--- a/drivers/gpu/drm/i915/display/g4x_dp.c
+++ b/drivers/gpu/drm/i915/display/g4x_dp.c
@@ -1258,8 +1258,11 @@ bool g4x_dp_init(struct drm_i915_private *dev_priv,
struct intel_encoder *intel_encoder;
struct drm_encoder *encoder;
struct intel_connector *intel_connector;
+ if (!assert_port_valid(dev_priv, port))
+ return false;
+
devdata = intel_bios_encoder_data_lookup(dev_priv, port);
intel_bios_encoder_sanitize(devdata, port);
/* FIXME bail? */
diff --git a/drivers/gpu/drm/i915/display/g4x_hdmi.c b/drivers/gpu/drm/i915/display/g4x_hdmi.c
index d730cf79a402..8edbb0189a1c 100644
--- a/drivers/gpu/drm/i915/display/g4x_hdmi.c
+++ b/drivers/gpu/drm/i915/display/g4x_hdmi.c
@@ -553,8 +553,11 @@ void g4x_hdmi_init(struct drm_i915_private *dev_priv,
struct intel_digital_port *dig_port;
struct intel_encoder *intel_encoder;
struct intel_connector *intel_connector;
+ if (!assert_port_valid(dev_priv, port))
+ return;
+
devdata = intel_bios_encoder_data_lookup(dev_priv, port);
intel_bios_encoder_sanitize(devdata, port);
/* FIXME bail? */
diff --git a/drivers/gpu/drm/i915/display/intel_crt.c b/drivers/gpu/drm/i915/display/intel_crt.c
index 8f2ebead0826..76b2e3d97096 100644
--- a/drivers/gpu/drm/i915/display/intel_crt.c
+++ b/drivers/gpu/drm/i915/display/intel_crt.c
@@ -1057,8 +1057,10 @@ void intel_crt_init(struct drm_i915_private *dev_priv)
intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
}
if (HAS_DDI(dev_priv)) {
+ assert_port_valid(dev_priv, PORT_E);
+
crt->base.port = PORT_E;
crt->base.get_config = hsw_crt_get_config;
crt->base.get_hw_state = intel_ddi_get_hw_state;
crt->base.compute_config = hsw_crt_compute_config;
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 8a269fed3bd1..0aa8356bb484 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -4264,8 +4264,11 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
struct intel_bios_encoder_data *devdata;
bool init_hdmi, init_dp;
enum phy phy = intel_port_to_phy(dev_priv, port);
+ if (!assert_port_valid(dev_priv, port))
+ return;
+
/*
* On platforms with HTI (aka HDPORT), if it's enabled at boot it may
* have taken over some of the PHYs and made them unavailable to the
* driver. In that case we should skip initializing the corresponding
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index f497a02a50ea..85fc450e0e44 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7819,8 +7819,14 @@ static bool intel_ddi_crt_present(struct drm_i915_private *dev_priv)
return true;
}
+bool assert_port_valid(struct drm_i915_private *i915, enum port port)
+{
+ return !drm_WARN(&i915->drm, !(RUNTIME_INFO(i915)->port_mask & BIT(port)),
+ "Platform does not support port %c\n", port_name(port));
+}
+
static void intel_setup_outputs(struct drm_i915_private *dev_priv)
{
struct intel_encoder *encoder;
bool dpd_is_edp = false;
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index 50285fb4fcf5..f474d57a7d64 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -553,8 +553,10 @@ void assert_transcoder(struct drm_i915_private *dev_priv,
enum transcoder cpu_transcoder, bool state);
#define assert_transcoder_enabled(d, t) assert_transcoder(d, t, true)
#define assert_transcoder_disabled(d, t) assert_transcoder(d, t, false)
+bool assert_port_valid(struct drm_i915_private *i915, enum port port);
+
/* Use I915_STATE_WARN(x) and I915_STATE_WARN_ON() (rather than WARN() and
* WARN_ON()) for hw state sanity checks to check for unexpected conditions
* which may not necessarily be a user visible problem. This will either
* WARN() or DRM_ERROR() depending on the verbose_checks moduleparam, to
diff --git a/drivers/gpu/drm/i915/display/intel_dvo.c b/drivers/gpu/drm/i915/display/intel_dvo.c
index eb2dcd866cc8..7f045cc6b75e 100644
--- a/drivers/gpu/drm/i915/display/intel_dvo.c
+++ b/drivers/gpu/drm/i915/display/intel_dvo.c
@@ -507,8 +507,10 @@ void intel_dvo_init(struct drm_i915_private *i915)
intel_connector_free(connector);
return;
}
+ assert_port_valid(i915, intel_dvo->dev.port);
+
encoder->type = INTEL_OUTPUT_DVO;
encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
encoder->port = intel_dvo->dev.port;
encoder->pipe_mask = ~0;
diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c b/drivers/gpu/drm/i915/display/intel_sdvo.c
index e12ba458636c..adce8b15612d 100644
--- a/drivers/gpu/drm/i915/display/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
@@ -3328,8 +3328,11 @@ bool intel_sdvo_init(struct drm_i915_private *dev_priv,
struct intel_encoder *intel_encoder;
struct intel_sdvo *intel_sdvo;
int i;
+ if (!assert_port_valid(dev_priv, port))
+ return false;
+
assert_sdvo_port_valid(dev_priv, port);
intel_sdvo = kzalloc(sizeof(*intel_sdvo), GFP_KERNEL);
if (!intel_sdvo)
--
2.39.2
^ permalink raw reply related [flat|nested] 35+ messages in thread
* [Intel-gfx] [PATCH v3 15/22] drm/i915: Beef up SDVO/HDMI port checks
2023-02-21 23:02 [Intel-gfx] [PATCH v3 00/22] drm/i915: Init DDI ports in VBT order Ville Syrjala
` (13 preceding siblings ...)
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 14/22] drm/i915: Assert that the port being initialized is valid Ville Syrjala
@ 2023-02-21 23:02 ` Ville Syrjala
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 16/22] drm/i915: Init DDI outputs based on port_mask on skl+ Ville Syrjala
` (11 subsequent siblings)
26 siblings, 0 replies; 35+ messages in thread
From: Ville Syrjala @ 2023-02-21 23:02 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
The SDVO code already warns when the port in question doesn't
actually support SDVO. Let's make that also bail the encoder
registration like the generic assert_port_valid() we added.
And add a similar thing for g4x HDMI, mainly because on g4x
itsefl port D only supports DP but not SDVO/HDMI. For the
other platforms the generic port_mask check should actually
be sufficient, but since we're here might as well list the
ports.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/g4x_hdmi.c | 17 +++++++++++++++++
drivers/gpu/drm/i915/display/intel_sdvo.c | 17 ++++++++++++-----
2 files changed, 29 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/g4x_hdmi.c b/drivers/gpu/drm/i915/display/g4x_hdmi.c
index 8edbb0189a1c..0e61c7c2112a 100644
--- a/drivers/gpu/drm/i915/display/g4x_hdmi.c
+++ b/drivers/gpu/drm/i915/display/g4x_hdmi.c
@@ -545,8 +545,22 @@ intel_hdmi_hotplug(struct intel_encoder *encoder,
return state;
}
+static bool is_hdmi_port_valid(struct drm_i915_private *i915, enum port port)
+{
+ if (IS_G4X(i915) || IS_VALLEYVIEW(i915))
+ return port == PORT_B || port == PORT_C;
+ else
+ return port == PORT_B || port == PORT_C || port == PORT_D;
+}
+
+static bool assert_hdmi_port_valid(struct drm_i915_private *i915, enum port port)
+{
+ return !drm_WARN(&i915->drm, !is_hdmi_port_valid(i915, port),
+ "Platform does not support HDMI %c\n", port_name(port));
+}
+
void g4x_hdmi_init(struct drm_i915_private *dev_priv,
i915_reg_t hdmi_reg, enum port port)
{
struct intel_bios_encoder_data *devdata;
@@ -556,8 +570,11 @@ void g4x_hdmi_init(struct drm_i915_private *dev_priv,
if (!assert_port_valid(dev_priv, port))
return;
+ if (!assert_hdmi_port_valid(dev_priv, port))
+ return;
+
devdata = intel_bios_encoder_data_lookup(dev_priv, port);
intel_bios_encoder_sanitize(devdata, port);
/* FIXME bail? */
diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c b/drivers/gpu/drm/i915/display/intel_sdvo.c
index adce8b15612d..a8cd64b1c0da 100644
--- a/drivers/gpu/drm/i915/display/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
@@ -3312,15 +3312,21 @@ intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
return i2c_add_adapter(&sdvo->ddc) == 0;
}
-static void assert_sdvo_port_valid(const struct drm_i915_private *dev_priv,
- enum port port)
+static bool is_sdvo_port_valid(struct drm_i915_private *dev_priv, enum port port)
{
if (HAS_PCH_SPLIT(dev_priv))
- drm_WARN_ON(&dev_priv->drm, port != PORT_B);
+ return port == PORT_B;
else
- drm_WARN_ON(&dev_priv->drm, port != PORT_B && port != PORT_C);
+ return port == PORT_B || port == PORT_C;
+}
+
+static bool assert_sdvo_port_valid(struct drm_i915_private *dev_priv,
+ enum port port)
+{
+ return !drm_WARN(&dev_priv->drm, !is_sdvo_port_valid(dev_priv, port),
+ "Platform does not support SDVO %c\n", port_name(port));
}
bool intel_sdvo_init(struct drm_i915_private *dev_priv,
i915_reg_t sdvo_reg, enum port port)
@@ -3331,9 +3337,10 @@ bool intel_sdvo_init(struct drm_i915_private *dev_priv,
if (!assert_port_valid(dev_priv, port))
return false;
- assert_sdvo_port_valid(dev_priv, port);
+ if (!assert_sdvo_port_valid(dev_priv, port))
+ return false;
intel_sdvo = kzalloc(sizeof(*intel_sdvo), GFP_KERNEL);
if (!intel_sdvo)
return false;
--
2.39.2
^ permalink raw reply related [flat|nested] 35+ messages in thread
* [Intel-gfx] [PATCH v3 16/22] drm/i915: Init DDI outputs based on port_mask on skl+
2023-02-21 23:02 [Intel-gfx] [PATCH v3 00/22] drm/i915: Init DDI ports in VBT order Ville Syrjala
` (14 preceding siblings ...)
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 15/22] drm/i915: Beef up SDVO/HDMI port checks Ville Syrjala
@ 2023-02-21 23:02 ` Ville Syrjala
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 17/22] drm/i915: Try to initialize DDI/ICL+ DSI ports for every VBT child device Ville Syrjala
` (10 subsequent siblings)
26 siblings, 0 replies; 35+ messages in thread
From: Ville Syrjala @ 2023-02-21 23:02 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Instead of listing every platform's possible DDI outputs
in intel_setup_outputs() just loop over the new port_mask
to achieve the same thing.
HSW/BDW were left as is since they still look at the straps
as well.
DSI is still a mess. For now just check for the relevant
platforms explicitly.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 73 ++++----------------
1 file changed, 13 insertions(+), 60 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 85fc450e0e44..dec68e1d5f9d 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7835,68 +7835,21 @@ static void intel_setup_outputs(struct drm_i915_private *dev_priv)
if (!HAS_DISPLAY(dev_priv))
return;
- if (IS_DG2(dev_priv)) {
- intel_ddi_init(dev_priv, PORT_A);
- intel_ddi_init(dev_priv, PORT_B);
- intel_ddi_init(dev_priv, PORT_C);
- intel_ddi_init(dev_priv, PORT_D_XELPD);
- intel_ddi_init(dev_priv, PORT_TC1);
- } else if (IS_ALDERLAKE_P(dev_priv)) {
- intel_ddi_init(dev_priv, PORT_A);
- intel_ddi_init(dev_priv, PORT_B);
- intel_ddi_init(dev_priv, PORT_TC1);
- intel_ddi_init(dev_priv, PORT_TC2);
- intel_ddi_init(dev_priv, PORT_TC3);
- intel_ddi_init(dev_priv, PORT_TC4);
- icl_dsi_init(dev_priv);
- } else if (IS_ALDERLAKE_S(dev_priv)) {
- intel_ddi_init(dev_priv, PORT_A);
- intel_ddi_init(dev_priv, PORT_TC1);
- intel_ddi_init(dev_priv, PORT_TC2);
- intel_ddi_init(dev_priv, PORT_TC3);
- intel_ddi_init(dev_priv, PORT_TC4);
- } else if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv)) {
- intel_ddi_init(dev_priv, PORT_A);
- intel_ddi_init(dev_priv, PORT_B);
- intel_ddi_init(dev_priv, PORT_TC1);
- intel_ddi_init(dev_priv, PORT_TC2);
- } else if (DISPLAY_VER(dev_priv) >= 12) {
- intel_ddi_init(dev_priv, PORT_A);
- intel_ddi_init(dev_priv, PORT_B);
- intel_ddi_init(dev_priv, PORT_TC1);
- intel_ddi_init(dev_priv, PORT_TC2);
- intel_ddi_init(dev_priv, PORT_TC3);
- intel_ddi_init(dev_priv, PORT_TC4);
- intel_ddi_init(dev_priv, PORT_TC5);
- intel_ddi_init(dev_priv, PORT_TC6);
- icl_dsi_init(dev_priv);
- } else if (IS_JSL_EHL(dev_priv)) {
- intel_ddi_init(dev_priv, PORT_A);
- intel_ddi_init(dev_priv, PORT_B);
- intel_ddi_init(dev_priv, PORT_C);
- intel_ddi_init(dev_priv, PORT_D);
- icl_dsi_init(dev_priv);
- } else if (DISPLAY_VER(dev_priv) == 11) {
- intel_ddi_init(dev_priv, PORT_A);
- intel_ddi_init(dev_priv, PORT_B);
- intel_ddi_init(dev_priv, PORT_C);
- intel_ddi_init(dev_priv, PORT_D);
- intel_ddi_init(dev_priv, PORT_E);
- intel_ddi_init(dev_priv, PORT_F);
- icl_dsi_init(dev_priv);
- } else if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv)) {
- intel_ddi_init(dev_priv, PORT_A);
- intel_ddi_init(dev_priv, PORT_B);
- intel_ddi_init(dev_priv, PORT_C);
- vlv_dsi_init(dev_priv);
- } else if (DISPLAY_VER(dev_priv) >= 9) {
- intel_ddi_init(dev_priv, PORT_A);
- intel_ddi_init(dev_priv, PORT_B);
- intel_ddi_init(dev_priv, PORT_C);
- intel_ddi_init(dev_priv, PORT_D);
- intel_ddi_init(dev_priv, PORT_E);
+ if (DISPLAY_VER(dev_priv) >= 9) {
+ enum port port;
+
+ for_each_port_masked(port, RUNTIME_INFO(dev_priv)->port_mask)
+ intel_ddi_init(dev_priv, port);
+
+ /* FIXME do something about DSI */
+ if (IS_ALDERLAKE_P(dev_priv) || IS_TIGERLAKE(dev_priv) ||
+ DISPLAY_VER(dev_priv) == 11)
+ icl_dsi_init(dev_priv);
+
+ if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv))
+ vlv_dsi_init(dev_priv);
} else if (HAS_DDI(dev_priv)) {
u32 found;
if (intel_ddi_crt_present(dev_priv))
--
2.39.2
^ permalink raw reply related [flat|nested] 35+ messages in thread
* [Intel-gfx] [PATCH v3 17/22] drm/i915: Try to initialize DDI/ICL+ DSI ports for every VBT child device
2023-02-21 23:02 [Intel-gfx] [PATCH v3 00/22] drm/i915: Init DDI ports in VBT order Ville Syrjala
` (15 preceding siblings ...)
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 16/22] drm/i915: Init DDI outputs based on port_mask on skl+ Ville Syrjala
@ 2023-02-21 23:02 ` Ville Syrjala
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 18/22] drm/i915: Convert HSW/BDW to use VBT driven DDI probe Ville Syrjala
` (9 subsequent siblings)
26 siblings, 0 replies; 35+ messages in thread
From: Ville Syrjala @ 2023-02-21 23:02 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Try to deal with duplicate child devices for the same DDI port
by attempting to initialize them in VBT defined order The first
on to succeed for a specific DDI port will be the one we use.
TODO: DSI dual link handling is sketchy at best
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/icl_dsi.c | 11 ++--
drivers/gpu/drm/i915/display/icl_dsi.h | 6 +-
drivers/gpu/drm/i915/display/intel_bios.c | 65 ++++++++++++++-----
drivers/gpu/drm/i915/display/intel_bios.h | 6 ++
drivers/gpu/drm/i915/display/intel_ddi.c | 56 ++++++++++++----
drivers/gpu/drm/i915/display/intel_ddi.h | 5 +-
drivers/gpu/drm/i915/display/intel_display.c | 19 ++----
.../gpu/drm/i915/display/intel_display_core.h | 2 -
8 files changed, 117 insertions(+), 53 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index b5316715bb3b..60cce2a1a3fc 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -1896,18 +1896,16 @@ static void icl_dsi_add_properties(struct intel_connector *connector)
fixed_mode->hdisplay,
fixed_mode->vdisplay);
}
-void icl_dsi_init(struct drm_i915_private *dev_priv)
+void icl_dsi_init(struct drm_i915_private *dev_priv,
+ struct intel_bios_encoder_data *devdata,
+ enum port port)
{
struct intel_dsi *intel_dsi;
struct intel_encoder *encoder;
struct intel_connector *intel_connector;
struct drm_connector *connector;
- enum port port;
-
- if (!intel_bios_is_dsi_present(dev_priv, &port))
- return;
intel_dsi = kzalloc(sizeof(*intel_dsi), GFP_KERNEL);
if (!intel_dsi)
return;
@@ -1921,8 +1919,10 @@ void icl_dsi_init(struct drm_i915_private *dev_priv)
encoder = &intel_dsi->base;
intel_dsi->attached_connector = intel_connector;
connector = &intel_connector->base;
+ encoder->devdata = devdata;
+
/* register DSI encoder with DRM subsystem */
drm_encoder_init(&dev_priv->drm, &encoder->base, &gen11_dsi_encoder_funcs,
DRM_MODE_ENCODER_DSI, "DSI %c", port_name(port));
@@ -1955,9 +1955,8 @@ void icl_dsi_init(struct drm_i915_private *dev_priv)
/* attach connector to encoder */
intel_connector_attach_encoder(intel_connector, encoder);
- encoder->devdata = intel_bios_encoder_data_lookup(dev_priv, port);
intel_bios_init_panel_late(dev_priv, &intel_connector->panel, encoder->devdata, NULL);
mutex_lock(&dev_priv->drm.mode_config.mutex);
intel_panel_add_vbt_lfp_fixed_mode(intel_connector);
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.h b/drivers/gpu/drm/i915/display/icl_dsi.h
index b4861b56b5b2..05901b923735 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.h
+++ b/drivers/gpu/drm/i915/display/icl_dsi.h
@@ -5,11 +5,15 @@
#ifndef __ICL_DSI_H__
#define __ICL_DSI_H__
+enum port;
struct drm_i915_private;
+struct intel_bios_encoder_data;
struct intel_crtc_state;
-void icl_dsi_init(struct drm_i915_private *i915);
+void icl_dsi_init(struct drm_i915_private *i915,
+ struct intel_bios_encoder_data *devdata,
+ enum port port);
void icl_dsi_frame_update(struct intel_crtc_state *crtc_state);
#endif /* __ICL_DSI_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 4ddced8c049c..1bfbe1382670 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -2599,9 +2599,9 @@ intel_bios_encoder_supports_edp(const struct intel_bios_encoder_data *devdata)
return intel_bios_encoder_supports_dp(devdata) &&
devdata->child.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR;
}
-static bool
+bool
intel_bios_encoder_supports_dsi(const struct intel_bios_encoder_data *devdata)
{
return devdata->child.device_type & DEVICE_TYPE_MIPI_OUTPUT;
}
@@ -2657,15 +2657,21 @@ static bool is_port_valid(struct drm_i915_private *i915, enum port port)
return true;
}
-static void print_ddi_port(const struct intel_bios_encoder_data *devdata,
- enum port port)
+static void print_ddi_port(const struct intel_bios_encoder_data *devdata)
{
struct drm_i915_private *i915 = devdata->i915;
const struct child_device_config *child = &devdata->child;
bool is_dvi, is_hdmi, is_dp, is_edp, is_dsi, is_crt, supports_typec_usb, supports_tbt;
int dp_boost_level, dp_max_link_rate, hdmi_boost_level, hdmi_level_shift, max_tmds_clock;
+ enum port port;
+
+ port = dvo_port_to_port(i915, child->dvo_port);
+ if (port == PORT_NONE && DISPLAY_VER(i915) >= 11)
+ port = dsi_dvo_port_to_port(i915, child->dvo_port);
+ if (port == PORT_NONE)
+ return;
is_dvi = intel_bios_encoder_supports_dvi(devdata);
is_dp = intel_bios_encoder_supports_dp(devdata);
is_crt = intel_bios_encoder_supports_crt(devdata);
@@ -2743,18 +2749,9 @@ static void parse_ddi_port(struct intel_bios_encoder_data *devdata)
port_name(port));
return;
}
- if (i915->display.vbt.ports[port]) {
- drm_dbg_kms(&i915->drm,
- "More than one child device for port %c in VBT, using the first.\n",
- port_name(port));
- return;
- }
-
sanitize_device_type(devdata, port);
-
- i915->display.vbt.ports[port] = devdata;
}
void intel_bios_encoder_sanitize(struct intel_bios_encoder_data *devdata,
enum port port)
@@ -2776,20 +2773,17 @@ static bool has_ddi_port_info(struct drm_i915_private *i915)
static void parse_ddi_ports(struct drm_i915_private *i915)
{
struct intel_bios_encoder_data *devdata;
- enum port port;
if (!has_ddi_port_info(i915))
return;
list_for_each_entry(devdata, &i915->display.vbt.display_devices, node)
parse_ddi_port(devdata);
- for_each_port(port) {
- if (i915->display.vbt.ports[port])
- print_ddi_port(i915->display.vbt.ports[port], port);
- }
+ list_for_each_entry(devdata, &i915->display.vbt.display_devices, node)
+ print_ddi_port(devdata);
}
static void
parse_general_definitions(struct drm_i915_private *i915)
@@ -3711,6 +3705,41 @@ bool intel_bios_encoder_hpd_invert(const struct intel_bios_encoder_data *devdata
struct intel_bios_encoder_data *
intel_bios_encoder_data_lookup(struct drm_i915_private *i915, enum port port)
{
- return i915->display.vbt.ports[port];
+ struct intel_bios_encoder_data *devdata;
+
+ list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
+ const struct child_device_config *child = &devdata->child;
+ enum port p;
+
+ p = dvo_port_to_port(i915, child->dvo_port);
+ if (p == PORT_NONE && DISPLAY_VER(i915) >= 11)
+ p = dsi_dvo_port_to_port(i915, child->dvo_port);
+
+ if (p == port)
+ return devdata;
+ }
+
+ return NULL;
+}
+
+void intel_bios_for_each_encoder(struct drm_i915_private *i915,
+ void (*func)(struct drm_i915_private *i915,
+ struct intel_bios_encoder_data *devdata,
+ enum port port))
+{
+ struct intel_bios_encoder_data *devdata;
+
+ list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
+ const struct child_device_config *child = &devdata->child;
+ enum port port;
+
+ port = dvo_port_to_port(i915, child->dvo_port);
+ if (port == PORT_NONE && DISPLAY_VER(i915) >= 11)
+ port = dsi_dvo_port_to_port(i915, child->dvo_port);
+ if (port == PORT_NONE)
+ continue;
+
+ func(i915, devdata, port);
+ }
}
diff --git a/drivers/gpu/drm/i915/display/intel_bios.h b/drivers/gpu/drm/i915/display/intel_bios.h
index 3c4f7d5e909b..bf461cb8783a 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.h
+++ b/drivers/gpu/drm/i915/display/intel_bios.h
@@ -264,8 +264,9 @@ bool intel_bios_encoder_supports_hdmi(const struct intel_bios_encoder_data *devd
bool intel_bios_encoder_supports_dp(const struct intel_bios_encoder_data *devdata);
bool intel_bios_encoder_supports_edp(const struct intel_bios_encoder_data *devdata);
bool intel_bios_encoder_supports_typec_usb(const struct intel_bios_encoder_data *devdata);
bool intel_bios_encoder_supports_tbt(const struct intel_bios_encoder_data *devdata);
+bool intel_bios_encoder_supports_dsi(const struct intel_bios_encoder_data *devdata);
bool intel_bios_encoder_supports_dp_dual_mode(const struct intel_bios_encoder_data *devdata);
bool intel_bios_encoder_is_lspcon(const struct intel_bios_encoder_data *devdata);
bool intel_bios_encoder_lane_reversal(const struct intel_bios_encoder_data *devdata);
bool intel_bios_encoder_hpd_invert(const struct intel_bios_encoder_data *devdata);
@@ -277,5 +278,10 @@ int intel_bios_hdmi_boost_level(const struct intel_bios_encoder_data *devdata);
int intel_bios_hdmi_ddc_pin(const struct intel_bios_encoder_data *devdata);
int intel_bios_hdmi_level_shift(const struct intel_bios_encoder_data *devdata);
int intel_bios_hdmi_max_tmds_clock(const struct intel_bios_encoder_data *devdata);
+void intel_bios_for_each_encoder(struct drm_i915_private *i915,
+ void (*func)(struct drm_i915_private *i915,
+ struct intel_bios_encoder_data *devdata,
+ enum port port));
+
#endif /* _INTEL_BIOS_H_ */
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 0aa8356bb484..e94eb7bb6e53 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -31,8 +31,9 @@
#include <drm/drm_privacy_screen_consumer.h>
#include "i915_drv.h"
#include "i915_reg.h"
+#include "icl_dsi.h"
#include "intel_audio.h"
#include "intel_audio_regs.h"
#include "intel_backlight.h"
#include "intel_bios.h"
@@ -4256,19 +4257,61 @@ static void intel_ddi_encoder_shutdown(struct intel_encoder *encoder)
#define port_tc_name(port) ((port) - PORT_TC1 + '1')
#define tc_port_name(tc_port) ((tc_port) - TC_PORT_1 + '1')
-void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
+static bool assert_has_icl_dsi(struct drm_i915_private *i915)
+{
+ return !drm_WARN(&i915->drm, !IS_ALDERLAKE_P(i915) &&
+ !IS_TIGERLAKE(i915) && DISPLAY_VER(i915) != 11,
+ "Platform does not support DSI\n");
+}
+
+static bool port_in_use(struct drm_i915_private *i915, enum port port)
+{
+ struct intel_encoder *encoder;
+
+ for_each_intel_encoder(&i915->drm, encoder) {
+ /* FIXME what about second port for dual link DSI? */
+ if (encoder->port == port)
+ return true;
+ }
+
+ return false;
+}
+
+void intel_ddi_init(struct drm_i915_private *dev_priv,
+ struct intel_bios_encoder_data *devdata,
+ enum port port)
{
struct intel_digital_port *dig_port;
struct intel_encoder *encoder;
- struct intel_bios_encoder_data *devdata;
bool init_hdmi, init_dp;
enum phy phy = intel_port_to_phy(dev_priv, port);
if (!assert_port_valid(dev_priv, port))
return;
+ if (port_in_use(dev_priv, port)) {
+ drm_dbg_kms(&dev_priv->drm,
+ "Port %c already claimed\n", port_name(port));
+ return;
+ }
+
+ /* FIXME convert HSW/BDW */
+ if (!devdata)
+ devdata = intel_bios_encoder_data_lookup(dev_priv, port);
+
+ intel_bios_encoder_sanitize(devdata, port);
+
+ if (intel_bios_encoder_supports_dsi(devdata)) {
+ /* BXT/GLK handled elsewhere, for now at least */
+ if (!assert_has_icl_dsi(dev_priv))
+ return;
+
+ icl_dsi_init(dev_priv, devdata, port);
+ return;
+ }
+
/*
* On platforms with HTI (aka HDPORT), if it's enabled at boot it may
* have taken over some of the PHYs and made them unavailable to the
* driver. In that case we should skip initializing the corresponding
@@ -4279,17 +4322,8 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
port_name(port), phy_name(phy));
return;
}
- devdata = intel_bios_encoder_data_lookup(dev_priv, port);
- if (!devdata) {
- drm_dbg_kms(&dev_priv->drm,
- "VBT says port %c is not present\n",
- port_name(port));
- return;
- }
- intel_bios_encoder_sanitize(devdata, port);
-
init_hdmi = intel_bios_encoder_supports_dvi(devdata) ||
intel_bios_encoder_supports_hdmi(devdata);
init_dp = intel_bios_encoder_supports_dp(devdata);
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.h b/drivers/gpu/drm/i915/display/intel_ddi.h
index 361f6874dde5..cdeac3d67357 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.h
+++ b/drivers/gpu/drm/i915/display/intel_ddi.h
@@ -10,8 +10,9 @@
struct drm_connector_state;
struct drm_i915_private;
struct intel_atomic_state;
+struct intel_bios_encoder_data;
struct intel_connector;
struct intel_crtc;
struct intel_crtc_state;
struct intel_dp;
@@ -46,9 +47,11 @@ struct intel_shared_dpll *icl_ddi_combo_get_pll(struct intel_encoder *encoder);
void hsw_prepare_dp_ddi_buffers(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state);
void intel_wait_ddi_buf_idle(struct drm_i915_private *dev_priv,
enum port port);
-void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port);
+void intel_ddi_init(struct drm_i915_private *dev_priv,
+ struct intel_bios_encoder_data *devdata,
+ enum port port);
bool intel_ddi_get_hw_state(struct intel_encoder *encoder, enum pipe *pipe);
void intel_ddi_enable_transcoder_func(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state);
void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state);
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index dec68e1d5f9d..7325edb3ca65 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -55,9 +55,8 @@
#include "i915_reg.h"
#include "i915_utils.h"
#include "i9xx_plane.h"
#include "i9xx_wm.h"
-#include "icl_dsi.h"
#include "intel_acpi.h"
#include "intel_atomic.h"
#include "intel_atomic_plane.h"
#include "intel_audio.h"
@@ -7836,17 +7835,9 @@ static void intel_setup_outputs(struct drm_i915_private *dev_priv)
if (!HAS_DISPLAY(dev_priv))
return;
if (DISPLAY_VER(dev_priv) >= 9) {
- enum port port;
-
- for_each_port_masked(port, RUNTIME_INFO(dev_priv)->port_mask)
- intel_ddi_init(dev_priv, port);
-
- /* FIXME do something about DSI */
- if (IS_ALDERLAKE_P(dev_priv) || IS_TIGERLAKE(dev_priv) ||
- DISPLAY_VER(dev_priv) == 11)
- icl_dsi_init(dev_priv);
+ intel_bios_for_each_encoder(dev_priv, intel_ddi_init);
if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv))
vlv_dsi_init(dev_priv);
} else if (HAS_DDI(dev_priv)) {
@@ -7857,17 +7848,17 @@ static void intel_setup_outputs(struct drm_i915_private *dev_priv)
/* Haswell uses DDI functions to detect digital outputs. */
found = intel_de_read(dev_priv, DDI_BUF_CTL(PORT_A)) & DDI_INIT_DISPLAY_DETECTED;
if (found)
- intel_ddi_init(dev_priv, PORT_A);
+ intel_ddi_init(dev_priv, NULL, PORT_A);
found = intel_de_read(dev_priv, SFUSE_STRAP);
if (found & SFUSE_STRAP_DDIB_DETECTED)
- intel_ddi_init(dev_priv, PORT_B);
+ intel_ddi_init(dev_priv, NULL, PORT_B);
if (found & SFUSE_STRAP_DDIC_DETECTED)
- intel_ddi_init(dev_priv, PORT_C);
+ intel_ddi_init(dev_priv, NULL, PORT_C);
if (found & SFUSE_STRAP_DDID_DETECTED)
- intel_ddi_init(dev_priv, PORT_D);
+ intel_ddi_init(dev_priv, NULL, PORT_D);
} else if (HAS_PCH_SPLIT(dev_priv)) {
int found;
/*
diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
index b870f7f47f2b..33570d9aaea5 100644
--- a/drivers/gpu/drm/i915/display/intel_display_core.h
+++ b/drivers/gpu/drm/i915/display/intel_display_core.h
@@ -33,9 +33,8 @@ struct drm_property_blob;
struct i915_audio_component;
struct i915_hdcp_comp_master;
struct intel_atomic_state;
struct intel_audio_funcs;
-struct intel_bios_encoder_data;
struct intel_cdclk_funcs;
struct intel_cdclk_vals;
struct intel_color_funcs;
struct intel_crtc;
@@ -206,9 +205,8 @@ struct intel_vbt_data {
struct list_head display_devices;
struct list_head bdb_blocks;
- struct intel_bios_encoder_data *ports[I915_MAX_PORTS]; /* Non-NULL if port present. */
struct sdvo_device_mapping {
u8 initialized;
u8 dvo_port;
u8 slave_addr;
--
2.39.2
^ permalink raw reply related [flat|nested] 35+ messages in thread
* [Intel-gfx] [PATCH v3 18/22] drm/i915: Convert HSW/BDW to use VBT driven DDI probe
2023-02-21 23:02 [Intel-gfx] [PATCH v3 00/22] drm/i915: Init DDI ports in VBT order Ville Syrjala
` (16 preceding siblings ...)
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 17/22] drm/i915: Try to initialize DDI/ICL+ DSI ports for every VBT child device Ville Syrjala
@ 2023-02-21 23:02 ` Ville Syrjala
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 19/22] drm/i915: Remove DDC pin sanitation Ville Syrjala
` (8 subsequent siblings)
26 siblings, 0 replies; 35+ messages in thread
From: Ville Syrjala @ 2023-02-21 23:02 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Make HSW/BDW use the new VBT child device driven output
probing as well. To achieve that the strap checks are
moved into intel_ddi_init() itself.
I have one HSW ULT laptop here which declares all the ports
A-D in the VBT, so in order to avoid assert_port_valid() tripping
on DDI D (which is not present on ULT/ULX) I kept the strap
check as the first thing we do. Thought arguably this particular
machine is an internal development device so not something any
real user should have. But I suppose it's possible that real
consumer systems also had similar VBTs in this era.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_ddi.c | 37 +++++++++++++++++---
drivers/gpu/drm/i915/display/intel_display.c | 17 +--------
2 files changed, 34 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index e94eb7bb6e53..6deaa3433958 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -4277,8 +4277,29 @@ static bool port_in_use(struct drm_i915_private *i915, enum port port)
return false;
}
+static bool port_strap_detected(struct drm_i915_private *i915, enum port port)
+{
+ /* straps not used on skl+ */
+ if (DISPLAY_VER(i915) >= 9)
+ return true;
+
+ switch (port) {
+ case PORT_A:
+ return intel_de_read(i915, DDI_BUF_CTL(PORT_A)) & DDI_INIT_DISPLAY_DETECTED;
+ case PORT_B:
+ return intel_de_read(i915, SFUSE_STRAP) & SFUSE_STRAP_DDIB_DETECTED;
+ case PORT_C:
+ return intel_de_read(i915, SFUSE_STRAP) & SFUSE_STRAP_DDIC_DETECTED;
+ case PORT_D:
+ return intel_de_read(i915, SFUSE_STRAP) & SFUSE_STRAP_DDID_DETECTED;
+ default:
+ MISSING_CASE(port);
+ return false;
+ }
+}
+
void intel_ddi_init(struct drm_i915_private *dev_priv,
struct intel_bios_encoder_data *devdata,
enum port port)
{
@@ -4286,8 +4307,20 @@ void intel_ddi_init(struct drm_i915_private *dev_priv,
struct intel_encoder *encoder;
bool init_hdmi, init_dp;
enum phy phy = intel_port_to_phy(dev_priv, port);
+ /*
+ * On some HSW ULT systems the VBT has been observed
+ * to advertise DDI D, even though it does not exist on
+ * the platform. Check the strap first to avoid tripping
+ * assert_port_valid().
+ */
+ if (!port_strap_detected(dev_priv, port)) {
+ drm_dbg_kms(&dev_priv->drm,
+ "Port %c strap not detected\n", port_name(port));
+ return;
+ }
+
if (!assert_port_valid(dev_priv, port))
return;
if (port_in_use(dev_priv, port)) {
@@ -4295,12 +4328,8 @@ void intel_ddi_init(struct drm_i915_private *dev_priv,
"Port %c already claimed\n", port_name(port));
return;
}
- /* FIXME convert HSW/BDW */
- if (!devdata)
- devdata = intel_bios_encoder_data_lookup(dev_priv, port);
-
intel_bios_encoder_sanitize(devdata, port);
if (intel_bios_encoder_supports_dsi(devdata)) {
/* BXT/GLK handled elsewhere, for now at least */
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 7325edb3ca65..0598ac14db05 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7834,31 +7834,16 @@ static void intel_setup_outputs(struct drm_i915_private *dev_priv)
if (!HAS_DISPLAY(dev_priv))
return;
- if (DISPLAY_VER(dev_priv) >= 9) {
+ if (HAS_DDI(dev_priv)) {
intel_bios_for_each_encoder(dev_priv, intel_ddi_init);
if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv))
vlv_dsi_init(dev_priv);
- } else if (HAS_DDI(dev_priv)) {
- u32 found;
if (intel_ddi_crt_present(dev_priv))
intel_crt_init(dev_priv);
-
- /* Haswell uses DDI functions to detect digital outputs. */
- found = intel_de_read(dev_priv, DDI_BUF_CTL(PORT_A)) & DDI_INIT_DISPLAY_DETECTED;
- if (found)
- intel_ddi_init(dev_priv, NULL, PORT_A);
-
- found = intel_de_read(dev_priv, SFUSE_STRAP);
- if (found & SFUSE_STRAP_DDIB_DETECTED)
- intel_ddi_init(dev_priv, NULL, PORT_B);
- if (found & SFUSE_STRAP_DDIC_DETECTED)
- intel_ddi_init(dev_priv, NULL, PORT_C);
- if (found & SFUSE_STRAP_DDID_DETECTED)
- intel_ddi_init(dev_priv, NULL, PORT_D);
} else if (HAS_PCH_SPLIT(dev_priv)) {
int found;
/*
--
2.39.2
^ permalink raw reply related [flat|nested] 35+ messages in thread
* [Intel-gfx] [PATCH v3 19/22] drm/i915: Remove DDC pin sanitation
2023-02-21 23:02 [Intel-gfx] [PATCH v3 00/22] drm/i915: Init DDI ports in VBT order Ville Syrjala
` (17 preceding siblings ...)
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 18/22] drm/i915: Convert HSW/BDW to use VBT driven DDI probe Ville Syrjala
@ 2023-02-21 23:02 ` Ville Syrjala
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 20/22] drm/i915: Remove AUX CH sanitation Ville Syrjala
` (7 subsequent siblings)
26 siblings, 0 replies; 35+ messages in thread
From: Ville Syrjala @ 2023-02-21 23:02 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Stop with the VBT DDC pin sanitation, and instead just check
that the appropriate DDC pin is still available when initializing
a HDMI connector.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_bios.c | 72 -----------------------
drivers/gpu/drm/i915/display/intel_hdmi.c | 72 +++++++++++++++++++----
2 files changed, 59 insertions(+), 85 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 1bfbe1382670..682c9cb6a736 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -2223,77 +2223,8 @@ static u8 map_ddc_pin(struct drm_i915_private *i915, u8 vbt_pin)
vbt_pin);
return 0;
}
-static struct intel_encoder *
-get_encoder_by_ddc_pin(struct drm_i915_private *i915, u8 ddc_pin)
-{
- struct intel_encoder *encoder;
-
- if (!ddc_pin)
- return NULL;
-
- for_each_intel_encoder(&i915->drm, encoder) {
- const struct intel_bios_encoder_data *devdata = encoder->devdata;
-
- if (devdata && ddc_pin == devdata->child.ddc_pin)
- return encoder;
- }
-
- return NULL;
-}
-
-static void sanitize_ddc_pin(struct intel_bios_encoder_data *devdata,
- enum port port)
-{
- struct drm_i915_private *i915 = devdata->i915;
- struct child_device_config *child = &devdata->child;
- struct intel_encoder *other;
- u8 mapped_ddc_pin;
-
- if (!devdata->child.ddc_pin)
- return;
-
- mapped_ddc_pin = map_ddc_pin(i915, devdata->child.ddc_pin);
- if (!intel_gmbus_is_valid_pin(i915, mapped_ddc_pin)) {
- drm_dbg_kms(&i915->drm,
- "Port %c has invalid DDC pin %d, "
- "sticking to defaults\n",
- port_name(port), mapped_ddc_pin);
- devdata->child.ddc_pin = 0;
- return;
- }
-
- other = get_encoder_by_ddc_pin(i915, devdata->child.ddc_pin);
- if (!other)
- return;
-
- /*
- * Pre-HSW uses separate DP and HDMI encoders
- * for the same port. Let them pass.
- */
- if (!HAS_DDI(i915) && devdata == other->devdata)
- return;
-
- drm_dbg_kms(&i915->drm,
- "port %c trying to use the same DDC pin (0x%x) as port %c, "
- "disabling port %c DVI/HDMI support\n",
- port_name(port), mapped_ddc_pin,
- port_name(other->port), port_name(port));
-
- /*
- * If we have multiple ports supposedly sharing the pin, then dvi/hdmi
- * couldn't exist on the shared port. Otherwise they share the same ddc
- * pin and system couldn't communicate with them separately.
- *
- * First successfully initialized encoder wins.
- */
- child->device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING;
- child->device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT;
-
- child->ddc_pin = 0;
-}
-
static struct intel_encoder *
get_encoder_by_aux_ch(struct drm_i915_private *i915, u8 aux_ch)
{
struct intel_encoder *encoder;
@@ -2758,11 +2689,8 @@ void intel_bios_encoder_sanitize(struct intel_bios_encoder_data *devdata,
{
if (!devdata)
return;
- if (intel_bios_encoder_supports_dvi(devdata))
- sanitize_ddc_pin(devdata, port);
-
if (intel_bios_encoder_supports_dp(devdata))
sanitize_aux_ch(devdata, port);
}
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index e6f887d75a70..99dd9fbe6944 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -2848,23 +2848,14 @@ static u8 g4x_port_to_ddc_pin(struct drm_i915_private *dev_priv,
}
return ddc_pin;
}
-static u8 intel_hdmi_ddc_pin(struct intel_encoder *encoder)
+static u8 intel_hdmi_default_ddc_pin(struct intel_encoder *encoder)
{
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
enum port port = encoder->port;
u8 ddc_pin;
- ddc_pin = intel_bios_hdmi_ddc_pin(encoder->devdata);
- if (ddc_pin) {
- drm_dbg_kms(&dev_priv->drm,
- "[ENCODER:%d:%s] Using DDC pin 0x%x (VBT)\n",
- encoder->base.base.id, encoder->base.name,
- ddc_pin);
- return ddc_pin;
- }
-
if (IS_ALDERLAKE_S(dev_priv))
ddc_pin = adls_port_to_ddc_pin(dev_priv, port);
else if (INTEL_PCH_TYPE(dev_priv) >= PCH_DG1)
ddc_pin = dg1_port_to_ddc_pin(dev_priv, port);
@@ -2884,12 +2875,64 @@ static u8 intel_hdmi_ddc_pin(struct intel_encoder *encoder)
ddc_pin = chv_port_to_ddc_pin(dev_priv, port);
else
ddc_pin = g4x_port_to_ddc_pin(dev_priv, port);
- drm_dbg_kms(&dev_priv->drm,
- "[ENCODER:%d:%s] Using DDC pin 0x%x (platform default)\n",
+ return ddc_pin;
+}
+
+static struct intel_encoder *
+get_encoder_by_ddc_pin(struct intel_encoder *encoder, u8 ddc_pin)
+{
+ struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+ struct intel_encoder *other;
+
+ for_each_intel_encoder(&i915->drm, other) {
+ if (other == encoder)
+ continue;
+
+ if (!intel_encoder_is_dig_port(other))
+ continue;
+
+ if (enc_to_dig_port(other)->hdmi.ddc_bus == ddc_pin)
+ return other;
+ }
+
+ return NULL;
+}
+
+static u8 intel_hdmi_ddc_pin(struct intel_encoder *encoder)
+{
+ struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+ struct intel_encoder *other;
+ const char *source;
+ u8 ddc_pin;
+
+ ddc_pin = intel_bios_hdmi_ddc_pin(encoder->devdata);
+ source = "VBT";
+
+ if (!ddc_pin) {
+ ddc_pin = intel_hdmi_default_ddc_pin(encoder);
+ source = "platform default";
+ }
+
+ if (!intel_gmbus_is_valid_pin(i915, ddc_pin)) {
+ drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s] Invalid DDC pin %d\n",
+ encoder->base.base.id, encoder->base.name, ddc_pin);
+ return 0;
+ }
+
+ other = get_encoder_by_ddc_pin(encoder, ddc_pin);
+ if (other) {
+ drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s] DDC pin %d already claimed by [ENCODER:%d:%s]\n",
+ encoder->base.base.id, encoder->base.name, ddc_pin,
+ other->base.base.id, other->base.name);
+ return 0;
+ }
+
+ drm_dbg_kms(&i915->drm,
+ "[ENCODER:%d:%s] Using DDC pin 0x%x (%s)\n",
encoder->base.base.id, encoder->base.name,
- ddc_pin);
+ ddc_pin, source);
return ddc_pin;
}
@@ -2958,8 +3001,11 @@ void intel_hdmi_init_connector(struct intel_digital_port *dig_port,
intel_encoder->base.name))
return;
intel_hdmi->ddc_bus = intel_hdmi_ddc_pin(intel_encoder);
+ if (!intel_hdmi->ddc_bus)
+ return;
+
ddc = intel_gmbus_get_adapter(dev_priv, intel_hdmi->ddc_bus);
drm_connector_init_with_ddc(dev, connector,
&intel_hdmi_connector_funcs,
--
2.39.2
^ permalink raw reply related [flat|nested] 35+ messages in thread
* [Intel-gfx] [PATCH v3 20/22] drm/i915: Remove AUX CH sanitation
2023-02-21 23:02 [Intel-gfx] [PATCH v3 00/22] drm/i915: Init DDI ports in VBT order Ville Syrjala
` (18 preceding siblings ...)
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 19/22] drm/i915: Remove DDC pin sanitation Ville Syrjala
@ 2023-02-21 23:02 ` Ville Syrjala
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 21/22] drm/i915: Initialize dig_port->aux_ch to NONE to be sure Ville Syrjala
` (6 subsequent siblings)
26 siblings, 0 replies; 35+ messages in thread
From: Ville Syrjala @ 2023-02-21 23:02 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Stop with the VBT AUX CH sanitation, and instead just check
that the appropriate AUX CH is still available when initializing
a DP/TC port.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/g4x_dp.c | 3 ++
drivers/gpu/drm/i915/display/intel_bios.c | 56 ---------------------
drivers/gpu/drm/i915/display/intel_ddi.c | 3 ++
drivers/gpu/drm/i915/display/intel_dp_aux.c | 51 ++++++++++++++++---
4 files changed, 49 insertions(+), 64 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c b/drivers/gpu/drm/i915/display/g4x_dp.c
index b5b0b323c1f4..6c9b9c8ef790 100644
--- a/drivers/gpu/drm/i915/display/g4x_dp.c
+++ b/drivers/gpu/drm/i915/display/g4x_dp.c
@@ -1376,8 +1376,11 @@ bool g4x_dp_init(struct drm_i915_private *dev_priv,
if (port != PORT_A)
intel_infoframe_init(dig_port);
dig_port->aux_ch = intel_dp_aux_ch(intel_encoder);
+ if (dig_port->aux_ch == AUX_CH_NONE)
+ goto err_init_connector;
+
if (!intel_dp_init_connector(dig_port, intel_connector))
goto err_init_connector;
return true;
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 682c9cb6a736..de3c5493f38f 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -2223,61 +2223,8 @@ static u8 map_ddc_pin(struct drm_i915_private *i915, u8 vbt_pin)
vbt_pin);
return 0;
}
-static struct intel_encoder *
-get_encoder_by_aux_ch(struct drm_i915_private *i915, u8 aux_ch)
-{
- struct intel_encoder *encoder;
-
- if (!aux_ch)
- return NULL;
-
- for_each_intel_encoder(&i915->drm, encoder) {
- const struct intel_bios_encoder_data *devdata = encoder->devdata;
-
- if (devdata && aux_ch == devdata->child.aux_channel)
- return encoder;
- }
-
- return NULL;
-}
-
-static void sanitize_aux_ch(struct intel_bios_encoder_data *devdata,
- enum port port)
-{
- struct drm_i915_private *i915 = devdata->i915;
- struct child_device_config *child = &devdata->child;
- struct intel_encoder *other;
-
- other = get_encoder_by_aux_ch(i915, devdata->child.aux_channel);
- if (!other)
- return;
-
- /*
- * Pre-HSW uses separate DP and HDMI encoders
- * for the same port. Let them pass.
- */
- if (!HAS_DDI(i915) && devdata == other->devdata)
- return;
-
- drm_dbg_kms(&i915->drm,
- "port %c trying to use the same AUX CH (0x%x) as port %c, "
- "disabling port %c DP support\n",
- port_name(port), devdata->child.aux_channel,
- port_name(other->port), port_name(port));
-
- /*
- * If we have multiple ports supposedly sharing the aux channel, then DP
- * couldn't exist on the shared port. Otherwise they share the same aux
- * channel and system couldn't communicate with them separately.
- *
- * First successfully initialized encoder wins.
- */
- child->device_type &= ~DEVICE_TYPE_DISPLAYPORT_OUTPUT;
- child->aux_channel = 0;
-}
-
static u8 dvo_port_type(u8 dvo_port)
{
switch (dvo_port) {
case DVO_PORT_HDMIA:
@@ -2688,11 +2635,8 @@ void intel_bios_encoder_sanitize(struct intel_bios_encoder_data *devdata,
enum port port)
{
if (!devdata)
return;
-
- if (intel_bios_encoder_supports_dp(devdata))
- sanitize_aux_ch(devdata, port);
}
static bool has_ddi_port_info(struct drm_i915_private *i915)
{
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 6deaa3433958..70b161d53c17 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -4555,9 +4555,12 @@ void intel_ddi_init(struct drm_i915_private *dev_priv,
dig_port->saved_port_bits |= DDI_BUF_PORT_REVERSAL;
dig_port->dp.output_reg = INVALID_MMIO_REG;
dig_port->max_lanes = intel_ddi_max_lanes(dig_port);
+
dig_port->aux_ch = intel_dp_aux_ch(encoder);
+ if (dig_port->aux_ch == AUX_CH_NONE)
+ goto err;
if (intel_phy_is_tc(dev_priv, phy)) {
bool is_legacy =
!intel_bios_encoder_supports_typec_usb(devdata) &&
diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux.c b/drivers/gpu/drm/i915/display/intel_dp_aux.c
index 96967e21c94c..927c877938b4 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_aux.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_aux.c
@@ -749,26 +749,61 @@ static enum aux_ch default_aux_ch(struct intel_encoder *encoder)
return (enum aux_ch)encoder->port;
}
+static struct intel_encoder *
+get_encoder_by_aux_ch(struct intel_encoder *encoder,
+ enum aux_ch aux_ch)
+{
+ struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+ struct intel_encoder *other;
+
+ for_each_intel_encoder(&i915->drm, other) {
+ if (other == encoder)
+ continue;
+
+ if (!intel_encoder_is_dig_port(other))
+ continue;
+
+ if (enc_to_dig_port(other)->aux_ch == aux_ch)
+ return other;
+ }
+
+ return NULL;
+}
+
enum aux_ch intel_dp_aux_ch(struct intel_encoder *encoder)
{
struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+ struct intel_encoder *other;
+ const char *source;
enum aux_ch aux_ch;
aux_ch = intel_bios_dp_aux_ch(encoder->devdata);
- if (aux_ch != AUX_CH_NONE) {
- drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s] using AUX %c (VBT)\n",
- encoder->base.base.id, encoder->base.name,
- aux_ch_name(aux_ch));
- return aux_ch;
+ source = "VBT";
+
+ if (aux_ch == AUX_CH_NONE) {
+ aux_ch = default_aux_ch(encoder);
+ source = "platform default";
}
- aux_ch = default_aux_ch(encoder);
+ if (aux_ch == AUX_CH_NONE)
+ return AUX_CH_NONE;
+
+ /* FIXME validate aux_ch against platform caps */
+
+ other = get_encoder_by_aux_ch(encoder, aux_ch);
+ if (other) {
+ drm_dbg_kms(&i915->drm,
+ "[ENCODER:%d:%s] AUX CH %c already claimed by [ENCODER:%d:%s]\n",
+ encoder->base.base.id, encoder->base.name, aux_ch_name(aux_ch),
+ other->base.base.id, other->base.name);
+ return AUX_CH_NONE;
+ }
drm_dbg_kms(&i915->drm,
- "[ENCODER:%d:%s] using AUX %c (platform default)\n",
+ "[ENCODER:%d:%s] Using AUX CH %c (%s)\n",
encoder->base.base.id, encoder->base.name,
- aux_ch_name(aux_ch));
+ aux_ch_name(aux_ch), source);
return aux_ch;
}
--
2.39.2
^ permalink raw reply related [flat|nested] 35+ messages in thread
* [Intel-gfx] [PATCH v3 21/22] drm/i915: Initialize dig_port->aux_ch to NONE to be sure
2023-02-21 23:02 [Intel-gfx] [PATCH v3 00/22] drm/i915: Init DDI ports in VBT order Ville Syrjala
` (19 preceding siblings ...)
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 20/22] drm/i915: Remove AUX CH sanitation Ville Syrjala
@ 2023-02-21 23:02 ` Ville Syrjala
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 22/22] drm/i915: Only populate aux_ch is really needed Ville Syrjala
` (5 subsequent siblings)
26 siblings, 0 replies; 35+ messages in thread
From: Ville Syrjala @ 2023-02-21 23:02 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Make sure dig_port->aux_ch is trustworthy by initializing it
to NONE at the start. The encoder init will later fill in
the actual value, if appropriate.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/g4x_dp.c | 2 ++
drivers/gpu/drm/i915/display/g4x_hdmi.c | 2 ++
drivers/gpu/drm/i915/display/intel_ddi.c | 2 ++
3 files changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c b/drivers/gpu/drm/i915/display/g4x_dp.c
index 6c9b9c8ef790..c477223e40a9 100644
--- a/drivers/gpu/drm/i915/display/g4x_dp.c
+++ b/drivers/gpu/drm/i915/display/g4x_dp.c
@@ -1273,8 +1273,10 @@ bool g4x_dp_init(struct drm_i915_private *dev_priv,
dig_port = kzalloc(sizeof(*dig_port), GFP_KERNEL);
if (!dig_port)
return false;
+ dig_port->aux_ch = AUX_CH_NONE;
+
intel_connector = intel_connector_alloc();
if (!intel_connector)
goto err_connector_alloc;
diff --git a/drivers/gpu/drm/i915/display/g4x_hdmi.c b/drivers/gpu/drm/i915/display/g4x_hdmi.c
index 0e61c7c2112a..7c66deb457ae 100644
--- a/drivers/gpu/drm/i915/display/g4x_hdmi.c
+++ b/drivers/gpu/drm/i915/display/g4x_hdmi.c
@@ -585,8 +585,10 @@ void g4x_hdmi_init(struct drm_i915_private *dev_priv,
dig_port = kzalloc(sizeof(*dig_port), GFP_KERNEL);
if (!dig_port)
return;
+ dig_port->aux_ch = AUX_CH_NONE;
+
intel_connector = intel_connector_alloc();
if (!intel_connector) {
kfree(dig_port);
return;
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 70b161d53c17..1208bfcd4e30 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -4385,8 +4385,10 @@ void intel_ddi_init(struct drm_i915_private *dev_priv,
dig_port = kzalloc(sizeof(*dig_port), GFP_KERNEL);
if (!dig_port)
return;
+ dig_port->aux_ch = AUX_CH_NONE;
+
encoder = &dig_port->base;
encoder->devdata = devdata;
if (DISPLAY_VER(dev_priv) >= 13 && port >= PORT_D_XELPD) {
--
2.39.2
^ permalink raw reply related [flat|nested] 35+ messages in thread
* [Intel-gfx] [PATCH v3 22/22] drm/i915: Only populate aux_ch is really needed
2023-02-21 23:02 [Intel-gfx] [PATCH v3 00/22] drm/i915: Init DDI ports in VBT order Ville Syrjala
` (20 preceding siblings ...)
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 21/22] drm/i915: Initialize dig_port->aux_ch to NONE to be sure Ville Syrjala
@ 2023-02-21 23:02 ` Ville Syrjala
2023-02-21 23:35 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Init DDI ports in VBT order (rev3) Patchwork
` (4 subsequent siblings)
26 siblings, 0 replies; 35+ messages in thread
From: Ville Syrjala @ 2023-02-21 23:02 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Mixing VBT based AUX CH with platform defaults seems like
a recipe for conflicts. Let's only populate AUX CH if we
absolutely need it, that is only if we are dealing with
a DP output or a TC port (which need ot due to some power
well shenanigans).
TODO: double check that real VBTs do in fact populate
the AUX CH for HDMI TC legacy ports...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/g4x_hdmi.c | 1 -
drivers/gpu/drm/i915/display/intel_ddi.c | 16 +++++++++++++---
2 files changed, 13 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/g4x_hdmi.c b/drivers/gpu/drm/i915/display/g4x_hdmi.c
index 7c66deb457ae..eb5bdad98590 100644
--- a/drivers/gpu/drm/i915/display/g4x_hdmi.c
+++ b/drivers/gpu/drm/i915/display/g4x_hdmi.c
@@ -662,7 +662,6 @@ void g4x_hdmi_init(struct drm_i915_private *dev_priv,
dig_port->max_lanes = 4;
intel_infoframe_init(dig_port);
- dig_port->aux_ch = intel_dp_aux_ch(intel_encoder);
intel_hdmi_init_connector(dig_port, intel_connector);
}
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 1208bfcd4e30..4a23e1e58261 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -4298,8 +4298,16 @@ static bool port_strap_detected(struct drm_i915_private *i915, enum port port)
return false;
}
}
+static bool need_aux_ch(struct intel_encoder *encoder, bool init_dp)
+{
+ struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+ enum phy phy = intel_port_to_phy(i915, encoder->port);
+
+ return init_dp || intel_phy_is_tc(i915, phy);
+}
+
void intel_ddi_init(struct drm_i915_private *dev_priv,
struct intel_bios_encoder_data *devdata,
enum port port)
{
@@ -4558,11 +4566,13 @@ void intel_ddi_init(struct drm_i915_private *dev_priv,
dig_port->dp.output_reg = INVALID_MMIO_REG;
dig_port->max_lanes = intel_ddi_max_lanes(dig_port);
- dig_port->aux_ch = intel_dp_aux_ch(encoder);
- if (dig_port->aux_ch == AUX_CH_NONE)
- goto err;
+ if (need_aux_ch(encoder, init_dp)) {
+ dig_port->aux_ch = intel_dp_aux_ch(encoder);
+ if (dig_port->aux_ch == AUX_CH_NONE)
+ goto err;
+ }
if (intel_phy_is_tc(dev_priv, phy)) {
bool is_legacy =
!intel_bios_encoder_supports_typec_usb(devdata) &&
--
2.39.2
^ permalink raw reply related [flat|nested] 35+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Init DDI ports in VBT order (rev3)
2023-02-21 23:02 [Intel-gfx] [PATCH v3 00/22] drm/i915: Init DDI ports in VBT order Ville Syrjala
` (21 preceding siblings ...)
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 22/22] drm/i915: Only populate aux_ch is really needed Ville Syrjala
@ 2023-02-21 23:35 ` Patchwork
2023-02-22 3:04 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
` (3 subsequent siblings)
26 siblings, 0 replies; 35+ messages in thread
From: Patchwork @ 2023-02-21 23:35 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Init DDI ports in VBT order (rev3)
URL : https://patchwork.freedesktop.org/series/114200/
State : warning
== Summary ==
Error: dim checkpatch failed
ea1f0f0395ad drm/i915: Populate dig_port->connected() before connector init
-:59: WARNING:BLOCK_COMMENT_STYLE: Block comments use a trailing */ on a separate line
#59: FILE: drivers/gpu/drm/i915/display/intel_ddi.c:4538:
+ * case we have some really bad VBTs... */
total: 0 errors, 1 warnings, 0 checks, 46 lines checked
3c4bb315ed61 drm/i915: Fix SKL DDI A digital port .connected()
142a87734c7a drm/i915: Get rid of the gm45 HPD live state nonsense
4da44e70da6f drm/i915: Introduce <platoform>_hotplug_mask()
b8669596b0d9 drm/i915: Introduce intel_hpd_detection()
eae5e4e9c443 drm/i915: Check HPD live state during eDP probe
-:51: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+ chars of sha1> ("<title line>")' - ie: 'commit 41e35ffb380b ("drm/i915: Favor last VBT child device with conflicting AUX ch/DDC pin")'
#51:
Also the systems (Asrock B250M-HDV at least) fixed by commit
total: 1 errors, 0 warnings, 0 checks, 46 lines checked
2868553400c6 drm/i915: Sanitize child devices later
d36cbaa926e2 drm/i915: Split map_aux_ch() into per-platform arrays
188ae41f6087 drm/i915: Flip VBT DDC pin maps around
215be5a7b15f drm/i915: Nuke intel_bios_is_port_dp_dual_mode()
0d802b09553d drm/i915: Remove bogus DDI-F from hsw/bdw output init
034b87a9e248 drm/i915: Introduce device info port_mask
-:101: WARNING:LONG_LINE: line length of 127 exceeds 100 columns
#101: FILE: drivers/gpu/drm/i915/i915_pci.c:398:
+ .__runtime.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */ \
-:109: WARNING:LONG_LINE: line length of 127 exceeds 100 columns
#109: FILE: drivers/gpu/drm/i915/i915_pci.c:430:
+ .__runtime.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */ \
-:117: WARNING:LONG_LINE: line length of 127 exceeds 100 columns
#117: FILE: drivers/gpu/drm/i915/i915_pci.c:484:
+ .__runtime.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */ \
-:133: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#133: FILE: drivers/gpu/drm/i915/i915_pci.c:575:
+ .__runtime.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E), \
-:182: WARNING:LONG_LINE: line length of 110 exceeds 100 columns
#182: FILE: drivers/gpu/drm/i915/i915_pci.c:919:
+ BIT(PORT_TC1) | BIT(PORT_TC2) | BIT(PORT_TC3) | BIT(PORT_TC4) | BIT(PORT_TC5) | BIT(PORT_TC5),
total: 0 errors, 5 warnings, 0 checks, 213 lines checked
383d43ca7c3e drm/i915: Assert that device info bitmasks have enough bits
5040de9e1f61 drm/i915: Assert that the port being initialized is valid
a9721d9047da drm/i915: Beef up SDVO/HDMI port checks
a8cd594259dd drm/i915: Init DDI outputs based on port_mask on skl+
72edba1c991e drm/i915: Try to initialize DDI/ICL+ DSI ports for every VBT child device
-:174: ERROR:OPEN_BRACE: that open brace { should be on the previous line
#174: FILE: drivers/gpu/drm/i915/display/intel_bios.c:3726:
+void intel_bios_for_each_encoder(struct drm_i915_private *i915,
+ void (*func)(struct drm_i915_private *i915,
+ struct intel_bios_encoder_data *devdata,
+ enum port port))
+{
total: 1 errors, 0 warnings, 0 checks, 326 lines checked
097a33969bcf drm/i915: Convert HSW/BDW to use VBT driven DDI probe
93a34a29b518 drm/i915: Remove DDC pin sanitation
2007e5d25a55 drm/i915: Remove AUX CH sanitation
ca7a0beace6f drm/i915: Initialize dig_port->aux_ch to NONE to be sure
dc0e3ae75ded drm/i915: Only populate aux_ch is really needed
^ permalink raw reply [flat|nested] 35+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Init DDI ports in VBT order (rev3)
2023-02-21 23:02 [Intel-gfx] [PATCH v3 00/22] drm/i915: Init DDI ports in VBT order Ville Syrjala
` (22 preceding siblings ...)
2023-02-21 23:35 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Init DDI ports in VBT order (rev3) Patchwork
@ 2023-02-22 3:04 ` Patchwork
2023-02-22 5:11 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
` (2 subsequent siblings)
26 siblings, 0 replies; 35+ messages in thread
From: Patchwork @ 2023-02-22 3:04 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 11446 bytes --]
== Series Details ==
Series: drm/i915: Init DDI ports in VBT order (rev3)
URL : https://patchwork.freedesktop.org/series/114200/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12768 -> Patchwork_114200v3
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/index.html
Participating hosts (38 -> 37)
------------------------------
Additional (1): bat-atsm-1
Missing (2): fi-kbl-soraka fi-snb-2520m
Known issues
------------
Here are the changes found in Patchwork_114200v3 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@fbdev@eof:
- bat-atsm-1: NOTRUN -> [SKIP][1] ([i915#2582]) +4 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/bat-atsm-1/igt@fbdev@eof.html
* igt@gem_lmem_swapping@basic:
- fi-apl-guc: NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#4613]) +3 similar issues
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/fi-apl-guc/igt@gem_lmem_swapping@basic.html
* igt@gem_mmap@basic:
- bat-atsm-1: NOTRUN -> [SKIP][3] ([i915#4083])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/bat-atsm-1/igt@gem_mmap@basic.html
* igt@gem_tiled_fence_blits@basic:
- bat-atsm-1: NOTRUN -> [SKIP][4] ([i915#4077]) +2 similar issues
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/bat-atsm-1/igt@gem_tiled_fence_blits@basic.html
* igt@gem_tiled_pread_basic:
- bat-atsm-1: NOTRUN -> [SKIP][5] ([i915#4079]) +1 similar issue
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/bat-atsm-1/igt@gem_tiled_pread_basic.html
* igt@i915_pm_rps@basic-api:
- bat-atsm-1: NOTRUN -> [SKIP][6] ([i915#6621])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/bat-atsm-1/igt@i915_pm_rps@basic-api.html
* igt@i915_selftest@live@slpc:
- bat-rpls-2: NOTRUN -> [DMESG-FAIL][7] ([i915#6367])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/bat-rpls-2/igt@i915_selftest@live@slpc.html
- bat-rpls-1: [PASS][8] -> [DMESG-FAIL][9] ([i915#6367] / [i915#7996])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12768/bat-rpls-1/igt@i915_selftest@live@slpc.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/bat-rpls-1/igt@i915_selftest@live@slpc.html
* igt@i915_suspend@basic-s3-without-i915:
- bat-atsm-1: NOTRUN -> [SKIP][10] ([i915#6645])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/bat-atsm-1/igt@i915_suspend@basic-s3-without-i915.html
* igt@kms_addfb_basic@size-max:
- bat-atsm-1: NOTRUN -> [SKIP][11] ([i915#6077]) +36 similar issues
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/bat-atsm-1/igt@kms_addfb_basic@size-max.html
* igt@kms_chamelium_hpd@common-hpd-after-suspend:
- bat-rpls-2: NOTRUN -> [SKIP][12] ([i915#7828])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/bat-rpls-2/igt@kms_chamelium_hpd@common-hpd-after-suspend.html
- fi-apl-guc: NOTRUN -> [SKIP][13] ([fdo#109271])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/fi-apl-guc/igt@kms_chamelium_hpd@common-hpd-after-suspend.html
- bat-rpls-1: NOTRUN -> [SKIP][14] ([i915#7828])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/bat-rpls-1/igt@kms_chamelium_hpd@common-hpd-after-suspend.html
* igt@kms_cursor_legacy@basic-flip-after-cursor:
- bat-atsm-1: NOTRUN -> [SKIP][15] ([i915#6078]) +14 similar issues
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/bat-atsm-1/igt@kms_cursor_legacy@basic-flip-after-cursor.html
* igt@kms_flip@basic-plain-flip:
- bat-atsm-1: NOTRUN -> [SKIP][16] ([i915#6166]) +3 similar issues
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/bat-atsm-1/igt@kms_flip@basic-plain-flip.html
* igt@kms_force_connector_basic@prune-stale-modes:
- bat-atsm-1: NOTRUN -> [SKIP][17] ([i915#6093]) +3 similar issues
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/bat-atsm-1/igt@kms_force_connector_basic@prune-stale-modes.html
* igt@kms_pipe_crc_basic@hang-read-crc:
- bat-atsm-1: NOTRUN -> [SKIP][18] ([i915#1836]) +6 similar issues
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/bat-atsm-1/igt@kms_pipe_crc_basic@hang-read-crc.html
* igt@kms_pipe_crc_basic@suspend-read-crc:
- bat-rpls-1: NOTRUN -> [SKIP][19] ([i915#1845])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/bat-rpls-1/igt@kms_pipe_crc_basic@suspend-read-crc.html
- bat-rpls-2: NOTRUN -> [SKIP][20] ([i915#1845])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/bat-rpls-2/igt@kms_pipe_crc_basic@suspend-read-crc.html
* igt@kms_pipe_crc_basic@suspend-read-crc@pipe-c-edp-1:
- bat-adlp-6: [PASS][21] -> [DMESG-WARN][22] ([i915#2867])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12768/bat-adlp-6/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-c-edp-1.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/bat-adlp-6/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-c-edp-1.html
* igt@kms_prop_blob@basic:
- bat-atsm-1: NOTRUN -> [SKIP][23] ([i915#7357])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/bat-atsm-1/igt@kms_prop_blob@basic.html
* igt@kms_psr@sprite_plane_onoff:
- bat-atsm-1: NOTRUN -> [SKIP][24] ([i915#1072]) +3 similar issues
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/bat-atsm-1/igt@kms_psr@sprite_plane_onoff.html
* igt@kms_setmode@basic-clone-single-crtc:
- bat-atsm-1: NOTRUN -> [SKIP][25] ([i915#6094])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/bat-atsm-1/igt@kms_setmode@basic-clone-single-crtc.html
* igt@prime_vgem@basic-fence-flip:
- bat-atsm-1: NOTRUN -> [SKIP][26] ([fdo#109295] / [i915#6078])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/bat-atsm-1/igt@prime_vgem@basic-fence-flip.html
* igt@prime_vgem@basic-fence-mmap:
- bat-atsm-1: NOTRUN -> [SKIP][27] ([fdo#109295] / [i915#4077]) +1 similar issue
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/bat-atsm-1/igt@prime_vgem@basic-fence-mmap.html
* igt@prime_vgem@basic-write:
- bat-atsm-1: NOTRUN -> [SKIP][28] ([fdo#109295]) +3 similar issues
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/bat-atsm-1/igt@prime_vgem@basic-write.html
#### Possible fixes ####
* igt@core_hotunplug@unbind-rebind:
- fi-apl-guc: [ABORT][29] -> [PASS][30]
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12768/fi-apl-guc/igt@core_hotunplug@unbind-rebind.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/fi-apl-guc/igt@core_hotunplug@unbind-rebind.html
* igt@gem_exec_suspend@basic-s3@smem:
- bat-rpls-1: [ABORT][31] ([i915#6687] / [i915#7978]) -> [PASS][32]
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12768/bat-rpls-1/igt@gem_exec_suspend@basic-s3@smem.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/bat-rpls-1/igt@gem_exec_suspend@basic-s3@smem.html
* igt@i915_selftest@live@reset:
- bat-rpls-2: [ABORT][33] ([i915#4983]) -> [PASS][34]
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12768/bat-rpls-2/igt@i915_selftest@live@reset.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/bat-rpls-2/igt@i915_selftest@live@reset.html
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1836]: https://gitlab.freedesktop.org/drm/intel/issues/1836
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
[i915#2867]: https://gitlab.freedesktop.org/drm/intel/issues/2867
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#6077]: https://gitlab.freedesktop.org/drm/intel/issues/6077
[i915#6078]: https://gitlab.freedesktop.org/drm/intel/issues/6078
[i915#6093]: https://gitlab.freedesktop.org/drm/intel/issues/6093
[i915#6094]: https://gitlab.freedesktop.org/drm/intel/issues/6094
[i915#6166]: https://gitlab.freedesktop.org/drm/intel/issues/6166
[i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
[i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
[i915#6645]: https://gitlab.freedesktop.org/drm/intel/issues/6645
[i915#6687]: https://gitlab.freedesktop.org/drm/intel/issues/6687
[i915#7357]: https://gitlab.freedesktop.org/drm/intel/issues/7357
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#7978]: https://gitlab.freedesktop.org/drm/intel/issues/7978
[i915#7996]: https://gitlab.freedesktop.org/drm/intel/issues/7996
Build changes
-------------
* Linux: CI_DRM_12768 -> Patchwork_114200v3
CI-20190529: 20190529
CI_DRM_12768: d9a0aa492e367314a1681974bf178363a4b5587a @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7168: 165df656261863684067cd53f95c3a301e67fa24 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_114200v3: d9a0aa492e367314a1681974bf178363a4b5587a @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
3e0fd61e19dd drm/i915: Only populate aux_ch is really needed
bb4a7e6f76a5 drm/i915: Initialize dig_port->aux_ch to NONE to be sure
f442d88c739e drm/i915: Remove AUX CH sanitation
2b5763cc2a9a drm/i915: Remove DDC pin sanitation
74b334609bee drm/i915: Convert HSW/BDW to use VBT driven DDI probe
05bd82d35a00 drm/i915: Try to initialize DDI/ICL+ DSI ports for every VBT child device
1630cb1ef61b drm/i915: Init DDI outputs based on port_mask on skl+
6d30d8662252 drm/i915: Beef up SDVO/HDMI port checks
b7b40aa79450 drm/i915: Assert that the port being initialized is valid
368bdef35fe0 drm/i915: Assert that device info bitmasks have enough bits
ab26d403ccc1 drm/i915: Introduce device info port_mask
772cee2a663b drm/i915: Remove bogus DDI-F from hsw/bdw output init
fa03ed4f20b4 drm/i915: Nuke intel_bios_is_port_dp_dual_mode()
f4b18d93d786 drm/i915: Flip VBT DDC pin maps around
b853bf75c3af drm/i915: Split map_aux_ch() into per-platform arrays
0729a2693eb5 drm/i915: Sanitize child devices later
98dfa3f50253 drm/i915: Check HPD live state during eDP probe
e6c1fffb7337 drm/i915: Introduce intel_hpd_detection()
8d191b653552 drm/i915: Introduce <platoform>_hotplug_mask()
15ac22d35e7a drm/i915: Get rid of the gm45 HPD live state nonsense
8e64c706395d drm/i915: Fix SKL DDI A digital port .connected()
20e77b0b50b9 drm/i915: Populate dig_port->connected() before connector init
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/index.html
[-- Attachment #2: Type: text/html, Size: 13426 bytes --]
^ permalink raw reply [flat|nested] 35+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Init DDI ports in VBT order (rev3)
2023-02-21 23:02 [Intel-gfx] [PATCH v3 00/22] drm/i915: Init DDI ports in VBT order Ville Syrjala
` (23 preceding siblings ...)
2023-02-22 3:04 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2023-02-22 5:11 ` Patchwork
2023-02-22 15:50 ` [Intel-gfx] [PATCH v3 00/22] drm/i915: Init DDI ports in VBT order Ville Syrjälä
2023-05-26 4:48 ` Kai-Heng Feng
26 siblings, 0 replies; 35+ messages in thread
From: Patchwork @ 2023-02-22 5:11 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 39307 bytes --]
== Series Details ==
Series: drm/i915: Init DDI ports in VBT order (rev3)
URL : https://patchwork.freedesktop.org/series/114200/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12768_full -> Patchwork_114200v3_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/index.html
Participating hosts (10 -> 11)
------------------------------
Additional (1): shard-rkl0
Known issues
------------
Here are the changes found in Patchwork_114200v3_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@api_intel_bb@crc32:
- shard-tglu-10: NOTRUN -> [SKIP][1] ([i915#6230])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-10/igt@api_intel_bb@crc32.html
* igt@debugfs_test@basic-hwmon:
- shard-tglu-10: NOTRUN -> [SKIP][2] ([i915#7456])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-10/igt@debugfs_test@basic-hwmon.html
* igt@device_reset@unbind-cold-reset-rebind:
- shard-tglu-9: NOTRUN -> [SKIP][3] ([i915#7701])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-9/igt@device_reset@unbind-cold-reset-rebind.html
* igt@drm_buddy@all-tests:
- shard-tglu-10: NOTRUN -> [SKIP][4] ([i915#6433])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-10/igt@drm_buddy@all-tests.html
* igt@feature_discovery@psr2:
- shard-tglu-9: NOTRUN -> [SKIP][5] ([i915#658])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-9/igt@feature_discovery@psr2.html
* igt@gem_ccs@block-multicopy-compressed:
- shard-tglu-9: NOTRUN -> [SKIP][6] ([i915#5325])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-9/igt@gem_ccs@block-multicopy-compressed.html
* igt@gem_ccs@suspend-resume:
- shard-tglu-10: NOTRUN -> [SKIP][7] ([i915#5325])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-10/igt@gem_ccs@suspend-resume.html
* igt@gem_close_race@multigpu-basic-process:
- shard-tglu-9: NOTRUN -> [SKIP][8] ([i915#7697])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-9/igt@gem_close_race@multigpu-basic-process.html
* igt@gem_ctx_param@set-priority-not-supported:
- shard-tglu-10: NOTRUN -> [SKIP][9] ([fdo#109314])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-10/igt@gem_ctx_param@set-priority-not-supported.html
* igt@gem_ctx_sseu@invalid-args:
- shard-tglu-9: NOTRUN -> [SKIP][10] ([i915#280])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-9/igt@gem_ctx_sseu@invalid-args.html
* igt@gem_exec_fair@basic-none@vecs0:
- shard-glk: [PASS][11] -> [FAIL][12] ([i915#2842])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12768/shard-glk5/igt@gem_exec_fair@basic-none@vecs0.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-glk9/igt@gem_exec_fair@basic-none@vecs0.html
* igt@gem_exec_reloc@basic-scanout@vcs0:
- shard-tglu-9: NOTRUN -> [SKIP][13] ([i915#3639]) +4 similar issues
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-9/igt@gem_exec_reloc@basic-scanout@vcs0.html
* igt@gem_lmem_swapping@parallel-random-verify-ccs:
- shard-tglu-9: NOTRUN -> [SKIP][14] ([i915#4613]) +2 similar issues
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-9/igt@gem_lmem_swapping@parallel-random-verify-ccs.html
* igt@gem_lmem_swapping@random-engines:
- shard-tglu-10: NOTRUN -> [SKIP][15] ([i915#4613]) +2 similar issues
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-10/igt@gem_lmem_swapping@random-engines.html
* igt@gem_pread@exhaustion:
- shard-tglu-9: NOTRUN -> [WARN][16] ([i915#2658])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-9/igt@gem_pread@exhaustion.html
* igt@gem_pwrite@basic-exhaustion:
- shard-tglu-10: NOTRUN -> [WARN][17] ([i915#2658])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-10/igt@gem_pwrite@basic-exhaustion.html
* igt@gem_pxp@display-protected-crc:
- shard-tglu-10: NOTRUN -> [SKIP][18] ([i915#4270]) +1 similar issue
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-10/igt@gem_pxp@display-protected-crc.html
* igt@gem_pxp@reject-modify-context-protection-off-2:
- shard-tglu-9: NOTRUN -> [SKIP][19] ([i915#4270])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-9/igt@gem_pxp@reject-modify-context-protection-off-2.html
* igt@gem_userptr_blits@unsync-unmap-after-close:
- shard-tglu-9: NOTRUN -> [SKIP][20] ([i915#3297]) +1 similar issue
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-9/igt@gem_userptr_blits@unsync-unmap-after-close.html
* igt@gem_userptr_blits@unsync-unmap-cycles:
- shard-tglu-10: NOTRUN -> [SKIP][21] ([i915#3297]) +1 similar issue
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-10/igt@gem_userptr_blits@unsync-unmap-cycles.html
* igt@gen3_mixed_blits:
- shard-tglu-9: NOTRUN -> [SKIP][22] ([fdo#109289])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-9/igt@gen3_mixed_blits.html
* igt@gen7_exec_parse@basic-allocation:
- shard-tglu-10: NOTRUN -> [SKIP][23] ([fdo#109289]) +2 similar issues
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-10/igt@gen7_exec_parse@basic-allocation.html
* igt@gen9_exec_parse@allowed-single:
- shard-apl: [PASS][24] -> [ABORT][25] ([i915#5566])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12768/shard-apl1/igt@gen9_exec_parse@allowed-single.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-apl2/igt@gen9_exec_parse@allowed-single.html
- shard-glk: [PASS][26] -> [ABORT][27] ([i915#5566])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12768/shard-glk4/igt@gen9_exec_parse@allowed-single.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-glk1/igt@gen9_exec_parse@allowed-single.html
* igt@gen9_exec_parse@basic-rejected-ctx-param:
- shard-tglu-10: NOTRUN -> [SKIP][28] ([i915#2527] / [i915#2856])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-10/igt@gen9_exec_parse@basic-rejected-ctx-param.html
* igt@gen9_exec_parse@bb-oversize:
- shard-tglu-9: NOTRUN -> [SKIP][29] ([i915#2527] / [i915#2856]) +1 similar issue
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-9/igt@gen9_exec_parse@bb-oversize.html
* igt@i915_pm_backlight@fade:
- shard-tglu-9: NOTRUN -> [SKIP][30] ([i915#7561]) +1 similar issue
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-9/igt@i915_pm_backlight@fade.html
* igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-hdmi-a:
- shard-tglu-10: NOTRUN -> [FAIL][31] ([i915#3825])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-10/igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-hdmi-a.html
* igt@i915_pm_rc6_residency@rc6-idle@rcs0:
- shard-tglu-9: NOTRUN -> [WARN][32] ([i915#2681]) +1 similar issue
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-9/igt@i915_pm_rc6_residency@rc6-idle@rcs0.html
* igt@i915_pm_rc6_residency@rc6-idle@vecs0:
- shard-tglu-9: NOTRUN -> [FAIL][33] ([i915#2681] / [i915#3591]) +1 similar issue
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-9/igt@i915_pm_rc6_residency@rc6-idle@vecs0.html
* igt@i915_pm_sseu@full-enable:
- shard-tglu-9: NOTRUN -> [SKIP][34] ([i915#4387])
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-9/igt@i915_pm_sseu@full-enable.html
* igt@i915_suspend@basic-s3-without-i915:
- shard-tglu-10: NOTRUN -> [INCOMPLETE][35] ([i915#7443])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-10/igt@i915_suspend@basic-s3-without-i915.html
* igt@kms_big_fb@4-tiled-64bpp-rotate-180:
- shard-tglu-10: NOTRUN -> [SKIP][36] ([i915#5286]) +3 similar issues
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-10/igt@kms_big_fb@4-tiled-64bpp-rotate-180.html
* igt@kms_big_fb@x-tiled-32bpp-rotate-90:
- shard-tglu-10: NOTRUN -> [SKIP][37] ([fdo#111614]) +1 similar issue
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-10/igt@kms_big_fb@x-tiled-32bpp-rotate-90.html
* igt@kms_big_fb@x-tiled-addfb:
- shard-tglu-9: NOTRUN -> [SKIP][38] ([i915#1845] / [i915#7651]) +43 similar issues
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-9/igt@kms_big_fb@x-tiled-addfb.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
- shard-tglu-10: NOTRUN -> [SKIP][39] ([fdo#111615]) +3 similar issues
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-10/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html
* igt@kms_ccs@pipe-b-bad-rotation-90-4_tiled_dg2_rc_ccs_cc:
- shard-tglu-10: NOTRUN -> [SKIP][40] ([i915#6095]) +1 similar issue
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-10/igt@kms_ccs@pipe-b-bad-rotation-90-4_tiled_dg2_rc_ccs_cc.html
* igt@kms_ccs@pipe-b-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc:
- shard-apl: NOTRUN -> [SKIP][41] ([fdo#109271] / [i915#3886]) +1 similar issue
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-apl4/igt@kms_ccs@pipe-b-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-c-ccs-on-another-bo-yf_tiled_ccs:
- shard-tglu-9: NOTRUN -> [SKIP][42] ([fdo#111615] / [i915#1845] / [i915#7651]) +5 similar issues
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-9/igt@kms_ccs@pipe-c-ccs-on-another-bo-yf_tiled_ccs.html
* igt@kms_ccs@pipe-c-crc-sprite-planes-basic-4_tiled_dg2_rc_ccs_cc:
- shard-tglu-10: NOTRUN -> [SKIP][43] ([i915#3689] / [i915#6095]) +1 similar issue
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-10/igt@kms_ccs@pipe-c-crc-sprite-planes-basic-4_tiled_dg2_rc_ccs_cc.html
* igt@kms_ccs@pipe-c-random-ccs-data-yf_tiled_ccs:
- shard-tglu-10: NOTRUN -> [SKIP][44] ([fdo#111615] / [i915#3689]) +2 similar issues
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-10/igt@kms_ccs@pipe-c-random-ccs-data-yf_tiled_ccs.html
* igt@kms_ccs@pipe-d-bad-rotation-90-4_tiled_dg2_rc_ccs_cc:
- shard-tglu-10: NOTRUN -> [SKIP][45] ([i915#3689]) +6 similar issues
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-10/igt@kms_ccs@pipe-d-bad-rotation-90-4_tiled_dg2_rc_ccs_cc.html
* igt@kms_cdclk@plane-scaling:
- shard-tglu-10: NOTRUN -> [SKIP][46] ([i915#3742])
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-10/igt@kms_cdclk@plane-scaling.html
* igt@kms_chamelium_color@ctm-max:
- shard-tglu-9: NOTRUN -> [SKIP][47] ([fdo#111827])
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-9/igt@kms_chamelium_color@ctm-max.html
* igt@kms_chamelium_color@degamma:
- shard-tglu-10: NOTRUN -> [SKIP][48] ([fdo#111827])
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-10/igt@kms_chamelium_color@degamma.html
* igt@kms_chamelium_frames@vga-frame-dump:
- shard-tglu-9: NOTRUN -> [SKIP][49] ([i915#7828]) +3 similar issues
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-9/igt@kms_chamelium_frames@vga-frame-dump.html
* igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode:
- shard-tglu-10: NOTRUN -> [SKIP][50] ([i915#7828]) +2 similar issues
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-10/igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode.html
* igt@kms_color@gamma:
- shard-tglu-9: NOTRUN -> [SKIP][51] ([i915#3546])
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-9/igt@kms_color@gamma.html
* igt@kms_content_protection@dp-mst-lic-type-1:
- shard-tglu-10: NOTRUN -> [SKIP][52] ([i915#3116] / [i915#3299])
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-10/igt@kms_content_protection@dp-mst-lic-type-1.html
* igt@kms_content_protection@mei_interface:
- shard-tglu-10: NOTRUN -> [SKIP][53] ([i915#6944] / [i915#7116] / [i915#7118])
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-10/igt@kms_content_protection@mei_interface.html
* igt@kms_cursor_crc@cursor-offscreen-256x256:
- shard-tglu-9: NOTRUN -> [SKIP][54] ([i915#1845]) +6 similar issues
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-9/igt@kms_cursor_crc@cursor-offscreen-256x256.html
* igt@kms_cursor_crc@cursor-rapid-movement-512x512:
- shard-tglu-10: NOTRUN -> [SKIP][55] ([i915#3359])
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-10/igt@kms_cursor_crc@cursor-rapid-movement-512x512.html
* igt@kms_cursor_legacy@2x-cursor-vs-flip-atomic:
- shard-tglu-10: NOTRUN -> [SKIP][56] ([fdo#109274])
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-10/igt@kms_cursor_legacy@2x-cursor-vs-flip-atomic.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor:
- shard-tglu-10: NOTRUN -> [SKIP][57] ([i915#4103])
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-10/igt@kms_cursor_legacy@short-busy-flip-before-cursor.html
* igt@kms_dsc@dsc-with-bpc:
- shard-tglu-10: NOTRUN -> [SKIP][58] ([i915#3840])
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-10/igt@kms_dsc@dsc-with-bpc.html
* igt@kms_fbcon_fbt@psr:
- shard-tglu-10: NOTRUN -> [SKIP][59] ([i915#3469])
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-10/igt@kms_fbcon_fbt@psr.html
* igt@kms_flip@2x-dpms-vs-vblank-race:
- shard-tglu-10: NOTRUN -> [SKIP][60] ([fdo#109274] / [i915#3637])
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-10/igt@kms_flip@2x-dpms-vs-vblank-race.html
* igt@kms_flip@2x-nonexisting-fb:
- shard-snb: NOTRUN -> [SKIP][61] ([fdo#109271]) +32 similar issues
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-snb5/igt@kms_flip@2x-nonexisting-fb.html
* igt@kms_flip@2x-nonexisting-fb-interruptible:
- shard-tglu-9: NOTRUN -> [SKIP][62] ([fdo#109274] / [i915#3637]) +6 similar issues
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-9/igt@kms_flip@2x-nonexisting-fb-interruptible.html
* igt@kms_flip@flip-vs-expired-vblank@a-hdmi-a1:
- shard-snb: NOTRUN -> [FAIL][63] ([i915#79])
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-snb1/igt@kms_flip@flip-vs-expired-vblank@a-hdmi-a1.html
* igt@kms_flip@plain-flip-ts-check:
- shard-tglu-9: NOTRUN -> [SKIP][64] ([i915#3637]) +2 similar issues
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-9/igt@kms_flip@plain-flip-ts-check.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling@pipe-a-valid-mode:
- shard-tglu-10: NOTRUN -> [SKIP][65] ([i915#2587] / [i915#2672])
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-10/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling@pipe-a-valid-mode.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-onoff:
- shard-tglu-10: NOTRUN -> [SKIP][66] ([fdo#109280]) +21 similar issues
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-10/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-onoff.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc:
- shard-tglu-9: NOTRUN -> [SKIP][67] ([i915#1849]) +35 similar issues
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-9/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-mmap-cpu:
- shard-apl: NOTRUN -> [SKIP][68] ([fdo#109271]) +25 similar issues
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-apl4/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@fbcpsr-tiling-4:
- shard-tglu-10: NOTRUN -> [SKIP][69] ([i915#5439])
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-10/igt@kms_frontbuffer_tracking@fbcpsr-tiling-4.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-mmap-wc:
- shard-tglu-10: NOTRUN -> [SKIP][70] ([fdo#110189]) +15 similar issues
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-10/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
- shard-tglu-10: NOTRUN -> [SKIP][71] ([i915#1839])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-10/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
* igt@kms_plane@plane-position-hole-dpms@pipe-a-planes:
- shard-tglu-9: NOTRUN -> [SKIP][72] ([i915#1849] / [i915#3558]) +1 similar issue
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-9/igt@kms_plane@plane-position-hole-dpms@pipe-a-planes.html
* igt@kms_plane_lowres@tiling-4:
- shard-tglu-10: NOTRUN -> [SKIP][73] ([fdo#112054] / [i915#5288])
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-10/igt@kms_plane_lowres@tiling-4.html
* igt@kms_plane_scaling@plane-downscale-with-modifiers-factor-0-25:
- shard-tglu-9: NOTRUN -> [SKIP][74] ([i915#3555]) +8 similar issues
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-9/igt@kms_plane_scaling@plane-downscale-with-modifiers-factor-0-25.html
* igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf:
- shard-tglu-10: NOTRUN -> [SKIP][75] ([i915#658])
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-10/igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf.html
* igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area:
- shard-tglu-9: NOTRUN -> [SKIP][76] ([fdo#111068] / [i915#658]) +1 similar issue
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-9/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area.html
* igt@kms_psr@psr2_primary_page_flip:
- shard-tglu-9: NOTRUN -> [SKIP][77] ([fdo#110189]) +3 similar issues
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-9/igt@kms_psr@psr2_primary_page_flip.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0:
- shard-tglu-9: NOTRUN -> [SKIP][78] ([fdo#111615] / [i915#1845])
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-9/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180:
- shard-tglu-10: NOTRUN -> [SKIP][79] ([fdo#111615] / [i915#5289])
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-10/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html
* igt@kms_setmode@basic@pipe-a-vga-1:
- shard-snb: NOTRUN -> [FAIL][80] ([i915#5465]) +1 similar issue
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-snb7/igt@kms_setmode@basic@pipe-a-vga-1.html
* igt@kms_universal_plane@universal-plane-pageflip-windowed-pipe-a:
- shard-tglu-9: NOTRUN -> [SKIP][81] ([fdo#109274]) +3 similar issues
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-9/igt@kms_universal_plane@universal-plane-pageflip-windowed-pipe-a.html
* igt@kms_vrr@negative-basic:
- shard-tglu-10: NOTRUN -> [SKIP][82] ([i915#3555]) +1 similar issue
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-10/igt@kms_vrr@negative-basic.html
* igt@kms_writeback@writeback-check-output:
- shard-tglu-9: NOTRUN -> [SKIP][83] ([i915#2437])
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-9/igt@kms_writeback@writeback-check-output.html
* igt@kms_writeback@writeback-invalid-parameters:
- shard-tglu-10: NOTRUN -> [SKIP][84] ([i915#2437])
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-10/igt@kms_writeback@writeback-invalid-parameters.html
* igt@prime_udl:
- shard-tglu-10: NOTRUN -> [SKIP][85] ([fdo#109291])
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-10/igt@prime_udl.html
* igt@prime_vgem@fence-read-hang:
- shard-tglu-9: NOTRUN -> [SKIP][86] ([fdo#109295])
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-9/igt@prime_vgem@fence-read-hang.html
* igt@v3d/v3d_get_bo_offset@create-get-offsets:
- shard-tglu-9: NOTRUN -> [SKIP][87] ([fdo#109315] / [i915#2575]) +2 similar issues
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-9/igt@v3d/v3d_get_bo_offset@create-get-offsets.html
* igt@v3d/v3d_get_param@get-bad-flags:
- shard-tglu-10: NOTRUN -> [SKIP][88] ([fdo#109315] / [i915#2575]) +1 similar issue
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-10/igt@v3d/v3d_get_param@get-bad-flags.html
* igt@vc4/vc4_lookup_fail@bad-color-write:
- shard-tglu-10: NOTRUN -> [SKIP][89] ([i915#2575]) +6 similar issues
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-10/igt@vc4/vc4_lookup_fail@bad-color-write.html
* igt@vc4/vc4_purgeable_bo@mark-unpurgeable-purged:
- shard-tglu-9: NOTRUN -> [SKIP][90] ([i915#2575]) +3 similar issues
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-tglu-9/igt@vc4/vc4_purgeable_bo@mark-unpurgeable-purged.html
#### Possible fixes ####
* {igt@gem_barrier_race@remote-request@rcs0}:
- {shard-dg1}: [DMESG-WARN][91] -> [PASS][92]
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12768/shard-dg1-18/igt@gem_barrier_race@remote-request@rcs0.html
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-dg1-15/igt@gem_barrier_race@remote-request@rcs0.html
* igt@gem_exec_fair@basic-none-share@rcs0:
- shard-glk: [FAIL][93] ([i915#2842]) -> [PASS][94]
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12768/shard-glk4/igt@gem_exec_fair@basic-none-share@rcs0.html
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-glk5/igt@gem_exec_fair@basic-none-share@rcs0.html
* igt@gem_exec_fair@basic-none@vcs0:
- {shard-rkl}: [FAIL][95] ([i915#2842]) -> [PASS][96] +2 similar issues
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12768/shard-rkl-3/igt@gem_exec_fair@basic-none@vcs0.html
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-rkl-5/igt@gem_exec_fair@basic-none@vcs0.html
* igt@gem_exec_reloc@basic-write-read-noreloc:
- {shard-rkl}: [SKIP][97] ([i915#3281]) -> [PASS][98] +9 similar issues
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12768/shard-rkl-2/igt@gem_exec_reloc@basic-write-read-noreloc.html
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-rkl-5/igt@gem_exec_reloc@basic-write-read-noreloc.html
* igt@gem_exec_schedule@semaphore-power:
- {shard-rkl}: [SKIP][99] ([i915#7276]) -> [PASS][100]
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12768/shard-rkl-2/igt@gem_exec_schedule@semaphore-power.html
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-rkl-5/igt@gem_exec_schedule@semaphore-power.html
* igt@gem_exec_suspend@basic-s0@smem:
- {shard-rkl}: [FAIL][101] ([fdo#103375]) -> [PASS][102] +1 similar issue
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12768/shard-rkl-3/igt@gem_exec_suspend@basic-s0@smem.html
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-rkl-5/igt@gem_exec_suspend@basic-s0@smem.html
* igt@gem_partial_pwrite_pread@reads:
- {shard-rkl}: [SKIP][103] ([i915#3282]) -> [PASS][104] +1 similar issue
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12768/shard-rkl-1/igt@gem_partial_pwrite_pread@reads.html
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-rkl-5/igt@gem_partial_pwrite_pread@reads.html
* igt@gen9_exec_parse@bb-start-param:
- {shard-rkl}: [SKIP][105] ([i915#2527]) -> [PASS][106] +1 similar issue
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12768/shard-rkl-2/igt@gen9_exec_parse@bb-start-param.html
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-rkl-5/igt@gen9_exec_parse@bb-start-param.html
* igt@i915_pm_rpm@dpms-mode-unset-lpsp:
- {shard-dg1}: [SKIP][107] ([i915#1397]) -> [PASS][108]
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12768/shard-dg1-18/igt@i915_pm_rpm@dpms-mode-unset-lpsp.html
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-dg1-14/igt@i915_pm_rpm@dpms-mode-unset-lpsp.html
* igt@i915_pm_rpm@system-suspend-devices:
- {shard-rkl}: [FAIL][109] ([i915#7052]) -> [PASS][110]
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12768/shard-rkl-3/igt@i915_pm_rpm@system-suspend-devices.html
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-rkl-5/igt@i915_pm_rpm@system-suspend-devices.html
* igt@i915_pm_rps@engine-order:
- shard-apl: [FAIL][111] ([i915#6537]) -> [PASS][112]
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12768/shard-apl6/igt@i915_pm_rps@engine-order.html
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-apl7/igt@i915_pm_rps@engine-order.html
* igt@i915_selftest@live@gt_heartbeat:
- shard-apl: [DMESG-FAIL][113] ([i915#5334]) -> [PASS][114]
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12768/shard-apl1/igt@i915_selftest@live@gt_heartbeat.html
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-apl2/igt@i915_selftest@live@gt_heartbeat.html
* igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions:
- shard-glk: [FAIL][115] ([i915#2346]) -> [PASS][116]
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12768/shard-glk2/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions.html
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-glk6/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-apl: [FAIL][117] ([i915#4767]) -> [PASS][118]
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12768/shard-apl1/igt@kms_fbcon_fbt@fbc-suspend.html
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-apl7/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_flip@flip-vs-suspend-interruptible@c-dp1:
- shard-apl: [ABORT][119] -> [PASS][120]
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12768/shard-apl6/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-apl4/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html
* igt@perf@mi-rpc:
- {shard-rkl}: [SKIP][121] ([i915#2434]) -> [PASS][122]
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12768/shard-rkl-1/igt@perf@mi-rpc.html
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/shard-rkl-5/igt@perf@mi-rpc.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[fdo#109303]: https://bugs.freedesktop.org/show_bug.cgi?id=109303
[fdo#109307]: https://bugs.freedesktop.org/show_bug.cgi?id=109307
[fdo#109314]: https://bugs.freedesktop.org/show_bug.cgi?id=109314
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
[fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[fdo#112054]: https://bugs.freedesktop.org/show_bug.cgi?id=112054
[fdo#112283]: https://bugs.freedesktop.org/show_bug.cgi?id=112283
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#132]: https://gitlab.freedesktop.org/drm/intel/issues/132
[i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
[i915#1769]: https://gitlab.freedesktop.org/drm/intel/issues/1769
[i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
[i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
[i915#2433]: https://gitlab.freedesktop.org/drm/intel/issues/2433
[i915#2434]: https://gitlab.freedesktop.org/drm/intel/issues/2434
[i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
[i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
[i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
[i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
[i915#2658]: https://gitlab.freedesktop.org/drm/intel/issues/2658
[i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
[i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681
[i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705
[i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
[i915#2876]: https://gitlab.freedesktop.org/drm/intel/issues/2876
[i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920
[i915#3116]: https://gitlab.freedesktop.org/drm/intel/issues/3116
[i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
[i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299
[i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
[i915#3318]: https://gitlab.freedesktop.org/drm/intel/issues/3318
[i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
[i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
[i915#3469]: https://gitlab.freedesktop.org/drm/intel/issues/3469
[i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
[i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3558]: https://gitlab.freedesktop.org/drm/intel/issues/3558
[i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
[i915#3639]: https://gitlab.freedesktop.org/drm/intel/issues/3639
[i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#3742]: https://gitlab.freedesktop.org/drm/intel/issues/3742
[i915#3825]: https://gitlab.freedesktop.org/drm/intel/issues/3825
[i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
[i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
[i915#3955]: https://gitlab.freedesktop.org/drm/intel/issues/3955
[i915#3966]: https://gitlab.freedesktop.org/drm/intel/issues/3966
[i915#3989]: https://gitlab.freedesktop.org/drm/intel/issues/3989
[i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#426]: https://gitlab.freedesktop.org/drm/intel/issues/426
[i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
[i915#433]: https://gitlab.freedesktop.org/drm/intel/issues/433
[i915#4387]: https://gitlab.freedesktop.org/drm/intel/issues/4387
[i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
[i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4767]: https://gitlab.freedesktop.org/drm/intel/issues/4767
[i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812
[i915#4833]: https://gitlab.freedesktop.org/drm/intel/issues/4833
[i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
[i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860
[i915#4881]: https://gitlab.freedesktop.org/drm/intel/issues/4881
[i915#5115]: https://gitlab.freedesktop.org/drm/intel/issues/5115
[i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
[i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
[i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
[i915#5288]: https://gitlab.freedesktop.org/drm/intel/issues/5288
[i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
[i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
[i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
[i915#5439]: https://gitlab.freedesktop.org/drm/intel/issues/5439
[i915#5461]: https://gitlab.freedesktop.org/drm/intel/issues/5461
[i915#5465]: https://gitlab.freedesktop.org/drm/intel/issues/5465
[i915#5563]: https://gitlab.freedesktop.org/drm/intel/issues/5563
[i915#5566]: https://gitlab.freedesktop.org/drm/intel/issues/5566
[i915#5723]: https://gitlab.freedesktop.org/drm/intel/issues/5723
[i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
[i915#6230]: https://gitlab.freedesktop.org/drm/intel/issues/6230
[i915#6245]: https://gitlab.freedesktop.org/drm/intel/issues/6245
[i915#6247]: https://gitlab.freedesktop.org/drm/intel/issues/6247
[i915#6248]: https://gitlab.freedesktop.org/drm/intel/issues/6248
[i915#6301]: https://gitlab.freedesktop.org/drm/intel/issues/6301
[i915#6333]: https://gitlab.freedesktop.org/drm/intel/issues/6333
[i915#6334]: https://gitlab.freedesktop.org/drm/intel/issues/6334
[i915#6335]: https://gitlab.freedesktop.org/drm/intel/issues/6335
[i915#6412]: https://gitlab.freedesktop.org/drm/intel/issues/6412
[i915#6433]: https://gitlab.freedesktop.org/drm/intel/issues/6433
[i915#6497]: https://gitlab.freedesktop.org/drm/intel/issues/6497
[i915#6537]: https://gitlab.freedesktop.org/drm/intel/issues/6537
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
[i915#6768]: https://gitlab.freedesktop.org/drm/intel/issues/6768
[i915#6944]: https://gitlab.freedesktop.org/drm/intel/issues/6944
[i915#6953]: https://gitlab.freedesktop.org/drm/intel/issues/6953
[i915#7052]: https://gitlab.freedesktop.org/drm/intel/issues/7052
[i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116
[i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118
[i915#7128]: https://gitlab.freedesktop.org/drm/intel/issues/7128
[i915#7276]: https://gitlab.freedesktop.org/drm/intel/issues/7276
[i915#7294]: https://gitlab.freedesktop.org/drm/intel/issues/7294
[i915#7443]: https://gitlab.freedesktop.org/drm/intel/issues/7443
[i915#7456]: https://gitlab.freedesktop.org/drm/intel/issues/7456
[i915#7561]: https://gitlab.freedesktop.org/drm/intel/issues/7561
[i915#7651]: https://gitlab.freedesktop.org/drm/intel/issues/7651
[i915#7697]: https://gitlab.freedesktop.org/drm/intel/issues/7697
[i915#7701]: https://gitlab.freedesktop.org/drm/intel/issues/7701
[i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711
[i915#7742]: https://gitlab.freedesktop.org/drm/intel/issues/7742
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
[i915#7949]: https://gitlab.freedesktop.org/drm/intel/issues/7949
[i915#7957]: https://gitlab.freedesktop.org/drm/intel/issues/7957
[i915#8018]: https://gitlab.freedesktop.org/drm/intel/issues/8018
[i915#8150]: https://gitlab.freedesktop.org/drm/intel/issues/8150
[i915#8152]: https://gitlab.freedesktop.org/drm/intel/issues/8152
Build changes
-------------
* Linux: CI_DRM_12768 -> Patchwork_114200v3
CI-20190529: 20190529
CI_DRM_12768: d9a0aa492e367314a1681974bf178363a4b5587a @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7168: 165df656261863684067cd53f95c3a301e67fa24 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_114200v3: d9a0aa492e367314a1681974bf178363a4b5587a @ git://anongit.freedesktop.org/gfx-ci/linux
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114200v3/index.html
[-- Attachment #2: Type: text/html, Size: 40670 bytes --]
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [Intel-gfx] [PATCH v3 00/22] drm/i915: Init DDI ports in VBT order
2023-02-21 23:02 [Intel-gfx] [PATCH v3 00/22] drm/i915: Init DDI ports in VBT order Ville Syrjala
` (24 preceding siblings ...)
2023-02-22 5:11 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
@ 2023-02-22 15:50 ` Ville Syrjälä
2023-05-26 4:48 ` Kai-Heng Feng
26 siblings, 0 replies; 35+ messages in thread
From: Ville Syrjälä @ 2023-02-22 15:50 UTC (permalink / raw)
To: intel-gfx
On Wed, Feb 22, 2023 at 01:02:05AM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> I just wanted to init DDI ports in VBT child device order
> without any up front assumptions about which conflicting
> child device defition is valid. That is pretty much what
> we need to do for the ADL laptops with the phantom eDP vs.
> native HDMI on DDI B.
>
> However that approach doesn't work for some of the weird
> SKL boards that have a phantom eDP on DDI A+AUX A and
> and a real DP->VGA converter on DDI E+AUX A. For those
> I had to introduce HPD live status check during eDP init.
>
> One of the remaining concerns I still have is what happens
> when we encounter VBTs with more AUX CH/DDC pin conflicts?
> I think what we might want to do eventually is ignore the
> conflicts as much as possible, and just init everything
> based on VBT, trusting HPD to take care of things in the
> end. That of course does have certain issues wrt. connector
> forcing, but dunno if we can avoid those at all.
>
> Also I think we need to nuke all the platform default AUX
> CH/DDC pin stuff, or at least only try to utilize those
> only once we've consumed the VBT fully.
>
> v2: Fix SKL DDI A HPD live state
> v3: Replace AUX CH/DDC pin sanitation with availability checks
OK, it looks like this is finally doing something
sane on pretty much all machines.
The only slight concern left is on bat-rplp-1:
[drm:intel_dp_aux_ch [i915]] [ENCODER:257:DDI TC2/PHY TC2] Using AUX CH E (platform default)
[drm:intel_power_well_enable [i915]] enabling AUX_USBC2
[drm:intel_power_well_disable [i915]] disabling AUX_USBC2
[drm:intel_power_well_enable [i915]] enabling AUX_USBC2
[drm:intel_tc_port_init_mode [i915]] Port E/TC#2: init mode (legacy)
[drm:intel_hdmi_init_connector [i915]] Adding HDMI connector on [ENCODER:257:DDI TC2/PHY TC2]
[drm:intel_hdmi_init_connector [i915]] [ENCODER:257:DDI TC2/PHY TC2] Using DDC pin 0xa (VBT)
So we're still having to use the platform default AUX CH
for this HDMI TC legacy port. But I guess that should be
relatively risk free as cross-wiring the TC ports in any
way doesn't seem like something that should happen. Might
not even be possible since a lot of the stuff for these
is internal to the chip.
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [Intel-gfx] [PATCH v3 05/22] drm/i915: Introduce intel_hpd_detection()
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 05/22] drm/i915: Introduce intel_hpd_detection() Ville Syrjala
@ 2023-02-28 12:40 ` Jani Nikula
2023-02-28 12:50 ` Ville Syrjälä
0 siblings, 1 reply; 35+ messages in thread
From: Jani Nikula @ 2023-02-28 12:40 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx
On Wed, 22 Feb 2023, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Add a mechanism by which we can toggle the HPD sense for
> individual encoders.
>
> This will be used during eDP probing to figure out if
> anything is actually connected. The normal intel_hpd_irq_setup()
> thing doesn't work since we only do that after probing the
> outputs, and we only enable HPD sense for encoders that were
> successfully probed.
>
> The other idea that crossed my minds was to just turn on
> HPD sense for all pins before output probing and let hpd_irq_setup()
> clean it up afterwards. But that doesn't work for BXT/GLK where
> the HPD invert information comes from the VBT child device.
> So looks like this really needs to be per-encoder.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/i915_irq.c | 132 ++++++++++++++++++++++++++++++++
> drivers/gpu/drm/i915/i915_irq.h | 2 +
> 2 files changed, 134 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index ecfa6dad145a..c5058d834f99 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -2893,8 +2893,17 @@ static void ibx_hpd_detection_setup(struct drm_i915_private *dev_priv)
> ibx_hotplug_mask(dev_priv, HPD_PORT_D),
> intel_hpd_hotplug_enables(dev_priv, ibx_hotplug_enables));
> }
>
> +static void ibx_hpd_detection(struct intel_encoder *encoder, bool enable)
Just quickly skimming through the series...
...and nitpicking, *_detection() should really be a verb.
It isn't obvious to me what intel_hpd_detection() does without looking
at the implementation.
BR,
Jani.
> +{
> + struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> +
> + intel_uncore_rmw(&i915->uncore, PCH_PORT_HOTPLUG,
> + ibx_hotplug_mask(i915, encoder->hpd_pin),
> + enable ? ibx_hotplug_enables(encoder) : 0);
> +}
> +
> static void ibx_hpd_irq_setup(struct drm_i915_private *dev_priv)
> {
> u32 hotplug_irqs, enabled_irqs;
>
> @@ -2963,8 +2972,17 @@ static void icp_ddi_hpd_detection_setup(struct drm_i915_private *dev_priv)
> icp_ddi_hotplug_mask(dev_priv, HPD_PORT_D),
> intel_hpd_hotplug_enables(dev_priv, icp_ddi_hotplug_enables));
> }
>
> +static void icp_ddi_hpd_detection(struct intel_encoder *encoder, bool enable)
> +{
> + struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> +
> + intel_uncore_rmw(&i915->uncore, SHOTPLUG_CTL_DDI,
> + icp_ddi_hotplug_mask(i915, encoder->hpd_pin),
> + enable ? icp_ddi_hotplug_enables(encoder) : 0);
> +}
> +
> static void icp_tc_hpd_detection_setup(struct drm_i915_private *dev_priv)
> {
> intel_uncore_rmw(&dev_priv->uncore, SHOTPLUG_CTL_TC,
> icp_tc_hotplug_mask(dev_priv, HPD_PORT_TC1) |
> @@ -2975,8 +2993,23 @@ static void icp_tc_hpd_detection_setup(struct drm_i915_private *dev_priv)
> icp_tc_hotplug_mask(dev_priv, HPD_PORT_TC6),
> intel_hpd_hotplug_enables(dev_priv, icp_tc_hotplug_enables));
> }
>
> +static void icp_tc_hpd_detection(struct intel_encoder *encoder, bool enable)
> +{
> + struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> +
> + intel_uncore_rmw(&i915->uncore, SHOTPLUG_CTL_TC,
> + icp_tc_hotplug_mask(i915, encoder->hpd_pin),
> + enable ? icp_tc_hotplug_enables(encoder) : 0);
> +}
> +
> +static void icp_hpd_detection(struct intel_encoder *encoder, bool enable)
> +{
> + icp_ddi_hpd_detection(encoder, enable);
> + icp_tc_hpd_detection(encoder, enable);
> +}
> +
> static void icp_hpd_irq_setup(struct drm_i915_private *dev_priv)
> {
> u32 hotplug_irqs, enabled_irqs;
>
> @@ -3025,8 +3058,16 @@ static void dg1_hpd_invert(struct drm_i915_private *i915)
> INVERT_DDID_HPD);
> intel_uncore_rmw(&i915->uncore, SOUTH_CHICKEN1, 0, val);
> }
>
> +static void dg1_hpd_detection(struct intel_encoder *encoder, bool enable)
> +{
> + struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> +
> + dg1_hpd_invert(i915);
> + icp_hpd_detection(encoder, enable);
> +}
> +
> static void dg1_hpd_irq_setup(struct drm_i915_private *dev_priv)
> {
> dg1_hpd_invert(dev_priv);
> icp_hpd_irq_setup(dev_priv);
> @@ -3043,8 +3084,17 @@ static void gen11_tc_hpd_detection_setup(struct drm_i915_private *dev_priv)
> gen11_hotplug_mask(dev_priv, HPD_PORT_TC6),
> intel_hpd_hotplug_enables(dev_priv, gen11_hotplug_enables));
> }
>
> +static void gen11_tc_hpd_detection(struct intel_encoder *encoder, bool enable)
> +{
> + struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> +
> + intel_uncore_rmw(&i915->uncore, GEN11_TC_HOTPLUG_CTL,
> + gen11_hotplug_mask(i915, encoder->hpd_pin),
> + enable ? gen11_hotplug_enables(encoder) : 0);
> +}
> +
> static void gen11_tbt_hpd_detection_setup(struct drm_i915_private *dev_priv)
> {
> intel_uncore_rmw(&dev_priv->uncore, GEN11_TBT_HOTPLUG_CTL,
> gen11_hotplug_mask(dev_priv, HPD_PORT_TC1) |
> @@ -3055,8 +3105,28 @@ static void gen11_tbt_hpd_detection_setup(struct drm_i915_private *dev_priv)
> gen11_hotplug_mask(dev_priv, HPD_PORT_TC6),
> intel_hpd_hotplug_enables(dev_priv, gen11_hotplug_enables));
> }
>
> +static void gen11_tbt_hpd_detection(struct intel_encoder *encoder, bool enable)
> +{
> + struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> +
> + intel_uncore_rmw(&i915->uncore, GEN11_TBT_HOTPLUG_CTL,
> + gen11_hotplug_mask(i915, encoder->hpd_pin),
> + enable ? gen11_hotplug_enables(encoder) : 0);
> +}
> +
> +static void gen11_hpd_detection(struct intel_encoder *encoder, bool enable)
> +{
> + struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> +
> + gen11_tc_hpd_detection(encoder, enable);
> + gen11_tbt_hpd_detection(encoder, enable);
> +
> + if (INTEL_PCH_TYPE(i915) >= PCH_ICP)
> + icp_hpd_detection(encoder, enable);
> +}
> +
> static void gen11_hpd_irq_setup(struct drm_i915_private *dev_priv)
> {
> u32 hotplug_irqs, enabled_irqs;
>
> @@ -3140,8 +3210,28 @@ static void spt_hpd_detection_setup(struct drm_i915_private *dev_priv)
> spt_hotplug2_mask(dev_priv, HPD_PORT_E),
> intel_hpd_hotplug_enables(dev_priv, spt_hotplug2_enables));
> }
>
> +static void spt_hpd_detection(struct intel_encoder *encoder, bool enable)
> +{
> + struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> +
> + /* Display WA #1179 WaHardHangonHotPlug: cnp */
> + if (HAS_PCH_CNP(i915)) {
> + intel_uncore_rmw(&i915->uncore, SOUTH_CHICKEN1,
> + CHASSIS_CLK_REQ_DURATION_MASK,
> + CHASSIS_CLK_REQ_DURATION(0xf));
> + }
> +
> + intel_uncore_rmw(&i915->uncore, PCH_PORT_HOTPLUG,
> + spt_hotplug_mask(i915, encoder->hpd_pin),
> + enable ? spt_hotplug_enables(encoder) : 0);
> +
> + intel_uncore_rmw(&i915->uncore, PCH_PORT_HOTPLUG2,
> + spt_hotplug2_mask(i915, encoder->hpd_pin),
> + enable ? spt_hotplug2_enables(encoder) : 0);
> +}
> +
> static void spt_hpd_irq_setup(struct drm_i915_private *dev_priv)
> {
> u32 hotplug_irqs, enabled_irqs;
>
> @@ -3189,8 +3279,19 @@ static void ilk_hpd_detection_setup(struct drm_i915_private *dev_priv)
> ilk_hotplug_mask(dev_priv, HPD_PORT_A),
> intel_hpd_hotplug_enables(dev_priv, ilk_hotplug_enables));
> }
>
> +static void ilk_hpd_detection(struct intel_encoder *encoder, bool enable)
> +{
> + struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> +
> + intel_uncore_rmw(&i915->uncore, DIGITAL_PORT_HOTPLUG_CNTRL,
> + ilk_hotplug_mask(i915, encoder->hpd_pin),
> + enable ? ilk_hotplug_enables(encoder) : 0);
> +
> + ibx_hpd_detection(encoder, enable);
> +}
> +
> static void ilk_hpd_irq_setup(struct drm_i915_private *dev_priv)
> {
> u32 hotplug_irqs, enabled_irqs;
>
> @@ -3254,8 +3355,17 @@ static void bxt_hpd_detection_setup(struct drm_i915_private *dev_priv)
> bxt_hotplug_mask(dev_priv, HPD_PORT_C),
> intel_hpd_hotplug_enables(dev_priv, bxt_hotplug_enables));
> }
>
> +static void bxt_hpd_detection(struct intel_encoder *encoder, bool enable)
> +{
> + struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> +
> + intel_uncore_rmw(&i915->uncore, PCH_PORT_HOTPLUG,
> + bxt_hotplug_mask(i915, encoder->hpd_pin),
> + enable ? bxt_hotplug_enables(encoder) : 0);
> +}
> +
> static void bxt_hpd_irq_setup(struct drm_i915_private *dev_priv)
> {
> u32 hotplug_irqs, enabled_irqs;
>
> @@ -3885,8 +3995,18 @@ static void i965_irq_postinstall(struct drm_i915_private *dev_priv)
>
> i915_enable_asle_pipestat(dev_priv);
> }
>
> +static void i915_hpd_detection(struct intel_encoder *encoder, bool enable)
> +{
> + struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> + u32 hotplug_en = hpd_mask_i915[encoder->hpd_pin];
> +
> + /* HPD sense and interrupt enable are one and the same */
> + i915_hotplug_interrupt_update(i915, hotplug_en,
> + enable ? hotplug_en : 0);
> +}
> +
> static void i915_hpd_irq_setup(struct drm_i915_private *dev_priv)
> {
> u32 hotplug_en;
>
> @@ -3970,14 +4090,18 @@ static irqreturn_t i965_irq_handler(int irq, void *arg)
> return ret;
> }
>
> struct intel_hotplug_funcs {
> + /* Enable HPD sense and interrupts for all present encoders */
> void (*hpd_irq_setup)(struct drm_i915_private *i915);
> + /* Enable/disable HPD sense for a single encoder */
> + void (*hpd_detection)(struct intel_encoder *encoder, bool enable);
> };
>
> #define HPD_FUNCS(platform) \
> static const struct intel_hotplug_funcs platform##_hpd_funcs = { \
> .hpd_irq_setup = platform##_hpd_irq_setup, \
> + .hpd_detection = platform##_hpd_detection, \
> }
>
> HPD_FUNCS(i915);
> HPD_FUNCS(dg1);
> @@ -3987,8 +4111,16 @@ HPD_FUNCS(icp);
> HPD_FUNCS(spt);
> HPD_FUNCS(ilk);
> #undef HPD_FUNCS
>
> +void intel_hpd_detection(struct intel_encoder *encoder, bool enable)
> +{
> + struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> +
> + if (i915->display.funcs.hotplug)
> + i915->display.funcs.hotplug->hpd_detection(encoder, enable);
> +}
> +
> void intel_hpd_irq_setup(struct drm_i915_private *i915)
> {
> if (i915->display_irqs_enabled && i915->display.funcs.hotplug)
> i915->display.funcs.hotplug->hpd_irq_setup(i915);
> diff --git a/drivers/gpu/drm/i915/i915_irq.h b/drivers/gpu/drm/i915/i915_irq.h
> index 03ee4c8b1ed3..a5eb85ed7537 100644
> --- a/drivers/gpu/drm/i915/i915_irq.h
> +++ b/drivers/gpu/drm/i915/i915_irq.h
> @@ -16,8 +16,9 @@ struct drm_crtc;
> struct drm_device;
> struct drm_display_mode;
> struct drm_i915_private;
> struct intel_crtc;
> +struct intel_encoder;
> struct intel_uncore;
>
> void intel_irq_init(struct drm_i915_private *dev_priv);
> void intel_irq_fini(struct drm_i915_private *dev_priv);
> @@ -36,8 +37,9 @@ i915_disable_pipestat(struct drm_i915_private *dev_priv, enum pipe pipe,
>
> void valleyview_enable_display_irqs(struct drm_i915_private *dev_priv);
> void valleyview_disable_display_irqs(struct drm_i915_private *dev_priv);
>
> +void intel_hpd_detection(struct intel_encoder *encoder, bool enable);
> void intel_hpd_irq_setup(struct drm_i915_private *i915);
> void i915_hotplug_interrupt_update(struct drm_i915_private *dev_priv,
> u32 mask,
> u32 bits);
--
Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [Intel-gfx] [PATCH v3 05/22] drm/i915: Introduce intel_hpd_detection()
2023-02-28 12:40 ` Jani Nikula
@ 2023-02-28 12:50 ` Ville Syrjälä
0 siblings, 0 replies; 35+ messages in thread
From: Ville Syrjälä @ 2023-02-28 12:50 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
On Tue, Feb 28, 2023 at 02:40:20PM +0200, Jani Nikula wrote:
> On Wed, 22 Feb 2023, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Add a mechanism by which we can toggle the HPD sense for
> > individual encoders.
> >
> > This will be used during eDP probing to figure out if
> > anything is actually connected. The normal intel_hpd_irq_setup()
> > thing doesn't work since we only do that after probing the
> > outputs, and we only enable HPD sense for encoders that were
> > successfully probed.
> >
> > The other idea that crossed my minds was to just turn on
> > HPD sense for all pins before output probing and let hpd_irq_setup()
> > clean it up afterwards. But that doesn't work for BXT/GLK where
> > the HPD invert information comes from the VBT child device.
> > So looks like this really needs to be per-encoder.
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> > drivers/gpu/drm/i915/i915_irq.c | 132 ++++++++++++++++++++++++++++++++
> > drivers/gpu/drm/i915/i915_irq.h | 2 +
> > 2 files changed, 134 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> > index ecfa6dad145a..c5058d834f99 100644
> > --- a/drivers/gpu/drm/i915/i915_irq.c
> > +++ b/drivers/gpu/drm/i915/i915_irq.c
> > @@ -2893,8 +2893,17 @@ static void ibx_hpd_detection_setup(struct drm_i915_private *dev_priv)
> > ibx_hotplug_mask(dev_priv, HPD_PORT_D),
> > intel_hpd_hotplug_enables(dev_priv, ibx_hotplug_enables));
> > }
> >
> > +static void ibx_hpd_detection(struct intel_encoder *encoder, bool enable)
>
> Just quickly skimming through the series...
>
> ...and nitpicking, *_detection() should really be a verb.
>
> It isn't obvious to me what intel_hpd_detection() does without looking
> at the implementation.
I was origianlly musing about foo_enable_hpd_detection(), but then
passing in a 'bool enable' for an enable() function seems a bit
crap. I guess it could be foo_set_hpd_detection() or something like
that.
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [Intel-gfx] [PATCH v3 01/22] drm/i915: Populate dig_port->connected() before connector init
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 01/22] drm/i915: Populate dig_port->connected() before connector init Ville Syrjala
@ 2023-02-28 17:58 ` Jani Nikula
0 siblings, 0 replies; 35+ messages in thread
From: Jani Nikula @ 2023-02-28 17:58 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx
On Wed, 22 Feb 2023, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> We'll need dig_port->connected() to be there for a HPD live
> state check during eDP connector probing. Reorder intel_ddi_init()
> accordingly. g4x_dp_init() is already fine.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c | 40 ++++++++++++------------
> 1 file changed, 20 insertions(+), 20 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index e5979427b38b..40b5c93f9223 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -4503,8 +4503,28 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
>
> drm_WARN_ON(&dev_priv->drm, port > PORT_I);
> dig_port->ddi_io_power_domain = intel_display_power_ddi_io_domain(dev_priv, port);
>
> + if (DISPLAY_VER(dev_priv) >= 11) {
> + if (intel_phy_is_tc(dev_priv, phy))
> + dig_port->connected = intel_tc_port_connected;
> + else
> + dig_port->connected = lpt_digital_port_connected;
> + } else if (DISPLAY_VER(dev_priv) >= 8) {
> + if (port == PORT_A || IS_GEMINILAKE(dev_priv) ||
> + IS_BROXTON(dev_priv))
> + dig_port->connected = bdw_digital_port_connected;
> + else
> + dig_port->connected = lpt_digital_port_connected;
> + } else {
> + if (port == PORT_A)
> + dig_port->connected = hsw_digital_port_connected;
> + else
> + dig_port->connected = lpt_digital_port_connected;
> + }
> +
> + intel_infoframe_init(dig_port);
> +
> if (init_dp) {
> if (!intel_ddi_init_dp_connector(dig_port))
> goto err;
>
> @@ -4520,28 +4540,8 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
> if (!intel_ddi_init_hdmi_connector(dig_port))
> goto err;
> }
>
> - if (DISPLAY_VER(dev_priv) >= 11) {
> - if (intel_phy_is_tc(dev_priv, phy))
> - dig_port->connected = intel_tc_port_connected;
> - else
> - dig_port->connected = lpt_digital_port_connected;
> - } else if (DISPLAY_VER(dev_priv) >= 8) {
> - if (port == PORT_A || IS_GEMINILAKE(dev_priv) ||
> - IS_BROXTON(dev_priv))
> - dig_port->connected = bdw_digital_port_connected;
> - else
> - dig_port->connected = lpt_digital_port_connected;
> - } else {
> - if (port == PORT_A)
> - dig_port->connected = hsw_digital_port_connected;
> - else
> - dig_port->connected = lpt_digital_port_connected;
> - }
> -
> - intel_infoframe_init(dig_port);
> -
> return;
>
> err:
> drm_encoder_cleanup(&encoder->base);
--
Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [Intel-gfx] [PATCH v3 02/22] drm/i915: Fix SKL DDI A digital port .connected()
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 02/22] drm/i915: Fix SKL DDI A digital port .connected() Ville Syrjala
@ 2023-02-28 18:18 ` Jani Nikula
0 siblings, 0 replies; 35+ messages in thread
From: Jani Nikula @ 2023-02-28 18:18 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx
On Wed, 22 Feb 2023, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> SKL doesn't have any north DE hotplug stuff. Currently we're
> trying to read DDI A live state from the BDW north DE bit,
> instead of the approproate south DE bit. Fix it.
>
> And for good measure clear the pointer to the north hpd
> pin array, so that we'll actually notice if some other
> place is also using the wrong thing.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Finally found the clue in bspec for skl+, "This field is unused in
projects that have a PCH."
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c | 11 +++++++----
> drivers/gpu/drm/i915/i915_irq.c | 2 ++
> 2 files changed, 9 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 40b5c93f9223..1a042f3658eb 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -4508,15 +4508,18 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
> if (intel_phy_is_tc(dev_priv, phy))
> dig_port->connected = intel_tc_port_connected;
> else
> dig_port->connected = lpt_digital_port_connected;
> - } else if (DISPLAY_VER(dev_priv) >= 8) {
> - if (port == PORT_A || IS_GEMINILAKE(dev_priv) ||
> - IS_BROXTON(dev_priv))
> + } else if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv)) {
> + dig_port->connected = bdw_digital_port_connected;
> + } else if (DISPLAY_VER(dev_priv) == 9) {
> + dig_port->connected = lpt_digital_port_connected;
> + } else if (IS_BROADWELL(dev_priv)) {
> + if (port == PORT_A)
> dig_port->connected = bdw_digital_port_connected;
> else
> dig_port->connected = lpt_digital_port_connected;
> - } else {
> + } else if (IS_HASWELL(dev_priv)) {
> if (port == PORT_A)
> dig_port->connected = hsw_digital_port_connected;
> else
> dig_port->connected = lpt_digital_port_connected;
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index b024a3a7ca19..13ada0916c2a 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -197,8 +197,10 @@ static void intel_hpd_init_pins(struct drm_i915_private *dev_priv)
> if (DISPLAY_VER(dev_priv) >= 11)
> hpd->hpd = hpd_gen11;
> else if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv))
> hpd->hpd = hpd_bxt;
> + else if (DISPLAY_VER(dev_priv) == 9)
> + hpd->hpd = NULL; /* no north HPD on SKL */
> else if (DISPLAY_VER(dev_priv) >= 8)
> hpd->hpd = hpd_bdw;
> else if (DISPLAY_VER(dev_priv) >= 7)
> hpd->hpd = hpd_ivb;
--
Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [Intel-gfx] [PATCH v3 03/22] drm/i915: Get rid of the gm45 HPD live state nonsense
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 03/22] drm/i915: Get rid of the gm45 HPD live state nonsense Ville Syrjala
@ 2023-02-28 18:19 ` Jani Nikula
0 siblings, 0 replies; 35+ messages in thread
From: Jani Nikula @ 2023-02-28 18:19 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx
On Wed, 22 Feb 2023, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> The idea that ctg uses different HPD live state bits is
> total nonsense, at least on my machine (Dell Latitude
> E5400).
>
> The only reason DP-B even works on my ctg is that DP-D
> live state is stuck high, even though there is no physical
> DP-D port. So when the detect checks DP-B live state it
> sees the stuck live state of DP-D instead. If I hack
> the driver to not register DP-D at all, and thus we never
> enabe DP-D HPD, DP-B stops working as well.
>
> Just to put some conclusive evidence into this mess,
> here are the actual hotplug register values for each port:
> Everything disconnected:
> PORT_HOTPLUG_EN (0x00061110): 0x00000000
> PORT_HOTPLUG_STAT (0x00061114): 0x00000000
> PORT_HOTPLUG_EN (0x00061110): 0x08000000
> PORT_HOTPLUG_STAT (0x00061114): 0x08000000
> PORT_HOTPLUG_EN (0x00061110): 0x10000000
> PORT_HOTPLUG_STAT (0x00061114): 0x00000000
> PORT_HOTPLUG_EN (0x00061110): 0x20000000
> PORT_HOTPLUG_STAT (0x00061114): 0x00000000
> Only port B connected:
> PORT_HOTPLUG_EN (0x00061110): 0x00000000
> PORT_HOTPLUG_STAT (0x00061114): 0x00000000
> PORT_HOTPLUG_EN (0x00061110): 0x08000000
> PORT_HOTPLUG_STAT (0x00061114): 0x08000000
> PORT_HOTPLUG_EN (0x00061110): 0x10000000
> PORT_HOTPLUG_STAT (0x00061114): 0x00000000
> PORT_HOTPLUG_EN (0x00061110): 0x20000000
> PORT_HOTPLUG_STAT (0x00061114): 0x20000000
> Only port C connected:
> PORT_HOTPLUG_EN (0x00061110): 0x00000000
> PORT_HOTPLUG_STAT (0x00061114): 0x00000000
> PORT_HOTPLUG_EN (0x00061110): 0x08000000
> PORT_HOTPLUG_STAT (0x00061114): 0x08000000
> PORT_HOTPLUG_EN (0x00061110): 0x10000000
> PORT_HOTPLUG_STAT (0x00061114): 0x10000000
> PORT_HOTPLUG_EN (0x00061110): 0x20000000
> PORT_HOTPLUG_STAT (0x00061114): 0x00000000
>
> So the enable bit and live state bit always match 1:1.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
I'll take your word for it.
Acked-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/display/g4x_dp.c | 28 +--------------------------
> drivers/gpu/drm/i915/i915_reg.h | 13 +------------
> 2 files changed, 2 insertions(+), 39 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c b/drivers/gpu/drm/i915/display/g4x_dp.c
> index a50ad0fff57c..920d570f7594 100644
> --- a/drivers/gpu/drm/i915/display/g4x_dp.c
> +++ b/drivers/gpu/drm/i915/display/g4x_dp.c
> @@ -1196,31 +1196,8 @@ static bool g4x_digital_port_connected(struct intel_encoder *encoder)
>
> return intel_de_read(dev_priv, PORT_HOTPLUG_STAT) & bit;
> }
>
> -static bool gm45_digital_port_connected(struct intel_encoder *encoder)
> -{
> - struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> - u32 bit;
> -
> - switch (encoder->hpd_pin) {
> - case HPD_PORT_B:
> - bit = PORTB_HOTPLUG_LIVE_STATUS_GM45;
> - break;
> - case HPD_PORT_C:
> - bit = PORTC_HOTPLUG_LIVE_STATUS_GM45;
> - break;
> - case HPD_PORT_D:
> - bit = PORTD_HOTPLUG_LIVE_STATUS_GM45;
> - break;
> - default:
> - MISSING_CASE(encoder->hpd_pin);
> - return false;
> - }
> -
> - return intel_de_read(dev_priv, PORT_HOTPLUG_STAT) & bit;
> -}
> -
> static bool ilk_digital_port_connected(struct intel_encoder *encoder)
> {
> struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> u32 bit = dev_priv->display.hotplug.hpd[encoder->hpd_pin];
> @@ -1383,12 +1360,9 @@ bool g4x_dp_init(struct drm_i915_private *dev_priv,
>
> dig_port->hpd_pulse = intel_dp_hpd_pulse;
>
> if (HAS_GMCH(dev_priv)) {
> - if (IS_GM45(dev_priv))
> - dig_port->connected = gm45_digital_port_connected;
> - else
> - dig_port->connected = g4x_digital_port_connected;
> + dig_port->connected = g4x_digital_port_connected;
> } else {
> if (port == PORT_A)
> dig_port->connected = ilk_digital_port_connected;
> else
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index c1efa655fb68..de58695ad1c0 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -2482,20 +2482,9 @@
> #define CRT_HOTPLUG_DETECT_VOLTAGE_325MV (0 << 2)
> #define CRT_HOTPLUG_DETECT_VOLTAGE_475MV (1 << 2)
>
> #define PORT_HOTPLUG_STAT _MMIO(DISPLAY_MMIO_BASE(dev_priv) + 0x61114)
> -/*
> - * HDMI/DP bits are g4x+
> - *
> - * WARNING: Bspec for hpd status bits on gen4 seems to be completely confused.
> - * Please check the detailed lore in the commit message for for experimental
> - * evidence.
> - */
> -/* Bspec says GM45 should match G4X/VLV/CHV, but reality disagrees */
> -#define PORTD_HOTPLUG_LIVE_STATUS_GM45 (1 << 29)
> -#define PORTC_HOTPLUG_LIVE_STATUS_GM45 (1 << 28)
> -#define PORTB_HOTPLUG_LIVE_STATUS_GM45 (1 << 27)
> -/* G4X/VLV/CHV DP/HDMI bits again match Bspec */
> +/* HDMI/DP bits are g4x+ */
> #define PORTD_HOTPLUG_LIVE_STATUS_G4X (1 << 27)
> #define PORTC_HOTPLUG_LIVE_STATUS_G4X (1 << 28)
> #define PORTB_HOTPLUG_LIVE_STATUS_G4X (1 << 29)
> #define PORTD_HOTPLUG_INT_STATUS (3 << 21)
--
Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [Intel-gfx] [PATCH v3 04/22] drm/i915: Introduce <platoform>_hotplug_mask()
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 04/22] drm/i915: Introduce <platoform>_hotplug_mask() Ville Syrjala
@ 2023-02-28 18:36 ` Jani Nikula
2023-02-28 19:52 ` Ville Syrjälä
0 siblings, 1 reply; 35+ messages in thread
From: Jani Nikula @ 2023-02-28 18:36 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx
On Wed, 22 Feb 2023, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Pair each <platform>_hotplug_enables() function with
> a corresponding <platform>_hotplug_mask() function so that
> we can determine right bits to clear on a per hpd_pin basis.
> We'll need this for turning on HPD sense for a specific
> encoder rather than just all of them.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/i915_irq.c | 231 ++++++++++++++++++++++----------
> 1 file changed, 160 insertions(+), 71 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 13ada0916c2a..ecfa6dad145a 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -2835,8 +2835,25 @@ static void cherryview_irq_reset(struct drm_i915_private *dev_priv)
> vlv_display_irq_reset(dev_priv);
> spin_unlock_irq(&dev_priv->irq_lock);
> }
>
> +static u32 ibx_hotplug_mask(struct drm_i915_private *i915,
> + enum hpd_pin hpd_pin)
What's the reason for passing i915 to these functions? I see no use in
this series, am I missing something? Seems like it makes some calls a
bit convoluted.
BR,
Jani.
> +{
> + switch (hpd_pin) {
> + case HPD_PORT_A:
> + return PORTA_HOTPLUG_ENABLE;
> + case HPD_PORT_B:
> + return PORTB_HOTPLUG_ENABLE | PORTB_PULSE_DURATION_MASK;
> + case HPD_PORT_C:
> + return PORTC_HOTPLUG_ENABLE | PORTC_PULSE_DURATION_MASK;
> + case HPD_PORT_D:
> + return PORTD_HOTPLUG_ENABLE | PORTD_PULSE_DURATION_MASK;
> + default:
> + return 0;
> + }
> +}
> +
> static u32 ibx_hotplug_enables(struct intel_encoder *encoder)
> {
> struct drm_i915_private *i915 = to_i915(encoder->base.dev);
>
> @@ -2869,15 +2886,12 @@ static void ibx_hpd_detection_setup(struct drm_i915_private *dev_priv)
> * duration to 2ms (which is the minimum in the Display Port spec).
> * The pulse duration bits are reserved on LPT+.
> */
> intel_uncore_rmw(&dev_priv->uncore, PCH_PORT_HOTPLUG,
> - PORTA_HOTPLUG_ENABLE |
> - PORTB_HOTPLUG_ENABLE |
> - PORTC_HOTPLUG_ENABLE |
> - PORTD_HOTPLUG_ENABLE |
> - PORTB_PULSE_DURATION_MASK |
> - PORTC_PULSE_DURATION_MASK |
> - PORTD_PULSE_DURATION_MASK,
> + ibx_hotplug_mask(dev_priv, HPD_PORT_A) |
> + ibx_hotplug_mask(dev_priv, HPD_PORT_B) |
> + ibx_hotplug_mask(dev_priv, HPD_PORT_C) |
> + ibx_hotplug_mask(dev_priv, HPD_PORT_D),
> intel_hpd_hotplug_enables(dev_priv, ibx_hotplug_enables));
> }
>
> static void ibx_hpd_irq_setup(struct drm_i915_private *dev_priv)
> @@ -2891,55 +2905,75 @@ static void ibx_hpd_irq_setup(struct drm_i915_private *dev_priv)
>
> ibx_hpd_detection_setup(dev_priv);
> }
>
> +static u32 _icp_ddi_hotplug_enables(enum hpd_pin hpd_pin)
> +{
> + switch (hpd_pin) {
> + case HPD_PORT_A:
> + case HPD_PORT_B:
> + case HPD_PORT_C:
> + case HPD_PORT_D:
> + return SHOTPLUG_CTL_DDI_HPD_ENABLE(hpd_pin);
> + default:
> + return 0;
> + }
> +}
> +
> +static u32 icp_ddi_hotplug_mask(struct drm_i915_private *i915, enum hpd_pin hpd_pin)
> +{
> + return _icp_ddi_hotplug_enables(hpd_pin);
> +}
> +
> static u32 icp_ddi_hotplug_enables(struct intel_encoder *encoder)
> {
> - switch (encoder->hpd_pin) {
> - case HPD_PORT_A:
> - case HPD_PORT_B:
> - case HPD_PORT_C:
> - case HPD_PORT_D:
> - return SHOTPLUG_CTL_DDI_HPD_ENABLE(encoder->hpd_pin);
> + return _icp_ddi_hotplug_enables(encoder->hpd_pin);
> +}
> +
> +static u32 _icp_tc_hotplug_enables(enum hpd_pin hpd_pin)
> +{
> + switch (hpd_pin) {
> + case HPD_PORT_TC1:
> + case HPD_PORT_TC2:
> + case HPD_PORT_TC3:
> + case HPD_PORT_TC4:
> + case HPD_PORT_TC5:
> + case HPD_PORT_TC6:
> + return ICP_TC_HPD_ENABLE(hpd_pin);
> default:
> return 0;
> }
> }
>
> +static u32 icp_tc_hotplug_mask(struct drm_i915_private *i915, enum hpd_pin hpd_pin)
> +{
> + return _icp_tc_hotplug_enables(hpd_pin);
> +}
> +
> static u32 icp_tc_hotplug_enables(struct intel_encoder *encoder)
> {
> - switch (encoder->hpd_pin) {
> - case HPD_PORT_TC1:
> - case HPD_PORT_TC2:
> - case HPD_PORT_TC3:
> - case HPD_PORT_TC4:
> - case HPD_PORT_TC5:
> - case HPD_PORT_TC6:
> - return ICP_TC_HPD_ENABLE(encoder->hpd_pin);
> - default:
> - return 0;
> - }
> + return _icp_tc_hotplug_enables(encoder->hpd_pin);
> }
>
> static void icp_ddi_hpd_detection_setup(struct drm_i915_private *dev_priv)
> {
> intel_uncore_rmw(&dev_priv->uncore, SHOTPLUG_CTL_DDI,
> - SHOTPLUG_CTL_DDI_HPD_ENABLE(HPD_PORT_A) |
> - SHOTPLUG_CTL_DDI_HPD_ENABLE(HPD_PORT_B) |
> - SHOTPLUG_CTL_DDI_HPD_ENABLE(HPD_PORT_C) |
> - SHOTPLUG_CTL_DDI_HPD_ENABLE(HPD_PORT_D),
> + icp_ddi_hotplug_mask(dev_priv, HPD_PORT_A) |
> + icp_ddi_hotplug_mask(dev_priv, HPD_PORT_B) |
> + icp_ddi_hotplug_mask(dev_priv, HPD_PORT_C) |
> + icp_ddi_hotplug_mask(dev_priv, HPD_PORT_D),
> intel_hpd_hotplug_enables(dev_priv, icp_ddi_hotplug_enables));
> }
>
> static void icp_tc_hpd_detection_setup(struct drm_i915_private *dev_priv)
> {
> intel_uncore_rmw(&dev_priv->uncore, SHOTPLUG_CTL_TC,
> - ICP_TC_HPD_ENABLE(HPD_PORT_TC1) |
> - ICP_TC_HPD_ENABLE(HPD_PORT_TC2) |
> - ICP_TC_HPD_ENABLE(HPD_PORT_TC3) |
> - ICP_TC_HPD_ENABLE(HPD_PORT_TC4) |
> - ICP_TC_HPD_ENABLE(HPD_PORT_TC5) |
> - ICP_TC_HPD_ENABLE(HPD_PORT_TC6),
> + icp_tc_hotplug_mask(dev_priv, HPD_PORT_TC1) |
> + icp_tc_hotplug_mask(dev_priv, HPD_PORT_TC2) |
> + icp_tc_hotplug_mask(dev_priv, HPD_PORT_TC3) |
> + icp_tc_hotplug_mask(dev_priv, HPD_PORT_TC4) |
> + icp_tc_hotplug_mask(dev_priv, HPD_PORT_TC5) |
> + icp_tc_hotplug_mask(dev_priv, HPD_PORT_TC6),
> intel_hpd_hotplug_enables(dev_priv, icp_tc_hotplug_enables));
> }
>
> static void icp_hpd_irq_setup(struct drm_i915_private *dev_priv)
> @@ -2957,21 +2991,31 @@ static void icp_hpd_irq_setup(struct drm_i915_private *dev_priv)
> icp_ddi_hpd_detection_setup(dev_priv);
> icp_tc_hpd_detection_setup(dev_priv);
> }
>
> +static u32 _gen11_hotplug_enables(enum hpd_pin hpd_pin)
> +{
> + switch (hpd_pin) {
> + case HPD_PORT_TC1:
> + case HPD_PORT_TC2:
> + case HPD_PORT_TC3:
> + case HPD_PORT_TC4:
> + case HPD_PORT_TC5:
> + case HPD_PORT_TC6:
> + return GEN11_HOTPLUG_CTL_ENABLE(hpd_pin);
> + default:
> + return 0;
> + }
> +}
> +
> +static u32 gen11_hotplug_mask(struct drm_i915_private *i915, enum hpd_pin hpd_pin)
> +{
> + return _gen11_hotplug_enables(hpd_pin);
> +}
> +
> static u32 gen11_hotplug_enables(struct intel_encoder *encoder)
> {
> - switch (encoder->hpd_pin) {
> - case HPD_PORT_TC1:
> - case HPD_PORT_TC2:
> - case HPD_PORT_TC3:
> - case HPD_PORT_TC4:
> - case HPD_PORT_TC5:
> - case HPD_PORT_TC6:
> - return GEN11_HOTPLUG_CTL_ENABLE(encoder->hpd_pin);
> - default:
> - return 0;
> - }
> + return _gen11_hotplug_enables(encoder->hpd_pin);
> }
>
> static void dg1_hpd_invert(struct drm_i915_private *i915)
> {
> @@ -2990,26 +3034,26 @@ static void dg1_hpd_irq_setup(struct drm_i915_private *dev_priv)
>
> static void gen11_tc_hpd_detection_setup(struct drm_i915_private *dev_priv)
> {
> intel_uncore_rmw(&dev_priv->uncore, GEN11_TC_HOTPLUG_CTL,
> - GEN11_HOTPLUG_CTL_ENABLE(HPD_PORT_TC1) |
> - GEN11_HOTPLUG_CTL_ENABLE(HPD_PORT_TC2) |
> - GEN11_HOTPLUG_CTL_ENABLE(HPD_PORT_TC3) |
> - GEN11_HOTPLUG_CTL_ENABLE(HPD_PORT_TC4) |
> - GEN11_HOTPLUG_CTL_ENABLE(HPD_PORT_TC5) |
> - GEN11_HOTPLUG_CTL_ENABLE(HPD_PORT_TC6),
> + gen11_hotplug_mask(dev_priv, HPD_PORT_TC1) |
> + gen11_hotplug_mask(dev_priv, HPD_PORT_TC2) |
> + gen11_hotplug_mask(dev_priv, HPD_PORT_TC3) |
> + gen11_hotplug_mask(dev_priv, HPD_PORT_TC4) |
> + gen11_hotplug_mask(dev_priv, HPD_PORT_TC5) |
> + gen11_hotplug_mask(dev_priv, HPD_PORT_TC6),
> intel_hpd_hotplug_enables(dev_priv, gen11_hotplug_enables));
> }
>
> static void gen11_tbt_hpd_detection_setup(struct drm_i915_private *dev_priv)
> {
> intel_uncore_rmw(&dev_priv->uncore, GEN11_TBT_HOTPLUG_CTL,
> - GEN11_HOTPLUG_CTL_ENABLE(HPD_PORT_TC1) |
> - GEN11_HOTPLUG_CTL_ENABLE(HPD_PORT_TC2) |
> - GEN11_HOTPLUG_CTL_ENABLE(HPD_PORT_TC3) |
> - GEN11_HOTPLUG_CTL_ENABLE(HPD_PORT_TC4) |
> - GEN11_HOTPLUG_CTL_ENABLE(HPD_PORT_TC5) |
> - GEN11_HOTPLUG_CTL_ENABLE(HPD_PORT_TC6),
> + gen11_hotplug_mask(dev_priv, HPD_PORT_TC1) |
> + gen11_hotplug_mask(dev_priv, HPD_PORT_TC2) |
> + gen11_hotplug_mask(dev_priv, HPD_PORT_TC3) |
> + gen11_hotplug_mask(dev_priv, HPD_PORT_TC4) |
> + gen11_hotplug_mask(dev_priv, HPD_PORT_TC5) |
> + gen11_hotplug_mask(dev_priv, HPD_PORT_TC6),
> intel_hpd_hotplug_enables(dev_priv, gen11_hotplug_enables));
> }
>
> static void gen11_hpd_irq_setup(struct drm_i915_private *dev_priv)
> @@ -3029,11 +3073,11 @@ static void gen11_hpd_irq_setup(struct drm_i915_private *dev_priv)
> if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP)
> icp_hpd_irq_setup(dev_priv);
> }
>
> -static u32 spt_hotplug_enables(struct intel_encoder *encoder)
> +static u32 _spt_hotplug_enables(enum hpd_pin hpd_pin)
> {
> - switch (encoder->hpd_pin) {
> + switch (hpd_pin) {
> case HPD_PORT_A:
> return PORTA_HOTPLUG_ENABLE;
> case HPD_PORT_B:
> return PORTB_HOTPLUG_ENABLE;
> @@ -3045,18 +3089,38 @@ static u32 spt_hotplug_enables(struct intel_encoder *encoder)
> return 0;
> }
> }
>
> -static u32 spt_hotplug2_enables(struct intel_encoder *encoder)
> +static u32 spt_hotplug_mask(struct drm_i915_private *i915, enum hpd_pin hpd_pin)
> {
> - switch (encoder->hpd_pin) {
> + return _spt_hotplug_enables(hpd_pin);
> +}
> +
> +static u32 spt_hotplug_enables(struct intel_encoder *encoder)
> +{
> + return _spt_hotplug_enables(encoder->hpd_pin);
> +}
> +
> +static u32 _spt_hotplug2_enables(enum hpd_pin hpd_pin)
> +{
> + switch (hpd_pin) {
> case HPD_PORT_E:
> return PORTE_HOTPLUG_ENABLE;
> default:
> return 0;
> }
> }
>
> +static u32 spt_hotplug2_mask(struct drm_i915_private *i915, enum hpd_pin hpd_pin)
> +{
> + return _spt_hotplug2_enables(hpd_pin);
> +}
> +
> +static u32 spt_hotplug2_enables(struct intel_encoder *encoder)
> +{
> + return _spt_hotplug2_enables(encoder->hpd_pin);
> +}
> +
> static void spt_hpd_detection_setup(struct drm_i915_private *dev_priv)
> {
> /* Display WA #1179 WaHardHangonHotPlug: cnp */
> if (HAS_PCH_CNP(dev_priv)) {
> @@ -3065,15 +3129,16 @@ static void spt_hpd_detection_setup(struct drm_i915_private *dev_priv)
> }
>
> /* Enable digital hotplug on the PCH */
> intel_uncore_rmw(&dev_priv->uncore, PCH_PORT_HOTPLUG,
> - PORTA_HOTPLUG_ENABLE |
> - PORTB_HOTPLUG_ENABLE |
> - PORTC_HOTPLUG_ENABLE |
> - PORTD_HOTPLUG_ENABLE,
> + spt_hotplug_mask(dev_priv, HPD_PORT_A) |
> + spt_hotplug_mask(dev_priv, HPD_PORT_B) |
> + spt_hotplug_mask(dev_priv, HPD_PORT_C) |
> + spt_hotplug_mask(dev_priv, HPD_PORT_D),
> intel_hpd_hotplug_enables(dev_priv, spt_hotplug_enables));
>
> - intel_uncore_rmw(&dev_priv->uncore, PCH_PORT_HOTPLUG2, PORTE_HOTPLUG_ENABLE,
> + intel_uncore_rmw(&dev_priv->uncore, PCH_PORT_HOTPLUG2,
> + spt_hotplug2_mask(dev_priv, HPD_PORT_E),
> intel_hpd_hotplug_enables(dev_priv, spt_hotplug2_enables));
> }
>
> static void spt_hpd_irq_setup(struct drm_i915_private *dev_priv)
> @@ -3090,8 +3155,19 @@ static void spt_hpd_irq_setup(struct drm_i915_private *dev_priv)
>
> spt_hpd_detection_setup(dev_priv);
> }
>
> +static u32 ilk_hotplug_mask(struct drm_i915_private *i915, enum hpd_pin hpd_pin)
> +{
> + switch (hpd_pin) {
> + case HPD_PORT_A:
> + return DIGITAL_PORTA_HOTPLUG_ENABLE |
> + DIGITAL_PORTA_PULSE_DURATION_MASK;
> + default:
> + return 0;
> + }
> +}
> +
> static u32 ilk_hotplug_enables(struct intel_encoder *encoder)
> {
> switch (encoder->hpd_pin) {
> case HPD_PORT_A:
> @@ -3109,9 +3185,9 @@ static void ilk_hpd_detection_setup(struct drm_i915_private *dev_priv)
> * duration to 2ms (which is the minimum in the Display Port spec)
> * The pulse duration bits are reserved on HSW+.
> */
> intel_uncore_rmw(&dev_priv->uncore, DIGITAL_PORT_HOTPLUG_CNTRL,
> - DIGITAL_PORTA_HOTPLUG_ENABLE | DIGITAL_PORTA_PULSE_DURATION_MASK,
> + ilk_hotplug_mask(dev_priv, HPD_PORT_A),
> intel_hpd_hotplug_enables(dev_priv, ilk_hotplug_enables));
> }
>
> static void ilk_hpd_irq_setup(struct drm_i915_private *dev_priv)
> @@ -3130,8 +3206,22 @@ static void ilk_hpd_irq_setup(struct drm_i915_private *dev_priv)
>
> ibx_hpd_irq_setup(dev_priv);
> }
>
> +static u32 bxt_hotplug_mask(struct drm_i915_private *i915, enum hpd_pin hpd_pin)
> +{
> + switch (hpd_pin) {
> + case HPD_PORT_A:
> + return PORTA_HOTPLUG_ENABLE | BXT_DDIA_HPD_INVERT;
> + case HPD_PORT_B:
> + return PORTB_HOTPLUG_ENABLE | BXT_DDIB_HPD_INVERT;
> + case HPD_PORT_C:
> + return PORTC_HOTPLUG_ENABLE | BXT_DDIC_HPD_INVERT;
> + default:
> + return 0;
> + }
> +}
> +
> static u32 bxt_hotplug_enables(struct intel_encoder *encoder)
> {
> u32 hotplug;
>
> @@ -3158,12 +3248,11 @@ static u32 bxt_hotplug_enables(struct intel_encoder *encoder)
>
> static void bxt_hpd_detection_setup(struct drm_i915_private *dev_priv)
> {
> intel_uncore_rmw(&dev_priv->uncore, PCH_PORT_HOTPLUG,
> - PORTA_HOTPLUG_ENABLE |
> - PORTB_HOTPLUG_ENABLE |
> - PORTC_HOTPLUG_ENABLE |
> - BXT_DDI_HPD_INVERT_MASK,
> + bxt_hotplug_mask(dev_priv, HPD_PORT_A) |
> + bxt_hotplug_mask(dev_priv, HPD_PORT_B) |
> + bxt_hotplug_mask(dev_priv, HPD_PORT_C),
> intel_hpd_hotplug_enables(dev_priv, bxt_hotplug_enables));
> }
>
> static void bxt_hpd_irq_setup(struct drm_i915_private *dev_priv)
--
Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [Intel-gfx] [PATCH v3 04/22] drm/i915: Introduce <platoform>_hotplug_mask()
2023-02-28 18:36 ` Jani Nikula
@ 2023-02-28 19:52 ` Ville Syrjälä
0 siblings, 0 replies; 35+ messages in thread
From: Ville Syrjälä @ 2023-02-28 19:52 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
On Tue, Feb 28, 2023 at 08:36:16PM +0200, Jani Nikula wrote:
> On Wed, 22 Feb 2023, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Pair each <platform>_hotplug_enables() function with
> > a corresponding <platform>_hotplug_mask() function so that
> > we can determine right bits to clear on a per hpd_pin basis.
> > We'll need this for turning on HPD sense for a specific
> > encoder rather than just all of them.
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> > drivers/gpu/drm/i915/i915_irq.c | 231 ++++++++++++++++++++++----------
> > 1 file changed, 160 insertions(+), 71 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> > index 13ada0916c2a..ecfa6dad145a 100644
> > --- a/drivers/gpu/drm/i915/i915_irq.c
> > +++ b/drivers/gpu/drm/i915/i915_irq.c
> > @@ -2835,8 +2835,25 @@ static void cherryview_irq_reset(struct drm_i915_private *dev_priv)
> > vlv_display_irq_reset(dev_priv);
> > spin_unlock_irq(&dev_priv->irq_lock);
> > }
> >
> > +static u32 ibx_hotplug_mask(struct drm_i915_private *i915,
> > + enum hpd_pin hpd_pin)
>
>
> What's the reason for passing i915 to these functions? I see no use in
> this series, am I missing something? Seems like it makes some calls a
> bit convoluted.
>
> BR,
> Jani.
>
> > +{
> > + switch (hpd_pin) {
> > + case HPD_PORT_A:
I think I initially copied over the LPT-LP check from
ibx_hotplug_enables(), which is what needed i915. But
apparently I got rid of it later, and so looks like
i915 can go too.
> > + return PORTA_HOTPLUG_ENABLE;
> > + case HPD_PORT_B:
> > + return PORTB_HOTPLUG_ENABLE | PORTB_PULSE_DURATION_MASK;
> > + case HPD_PORT_C:
> > + return PORTC_HOTPLUG_ENABLE | PORTC_PULSE_DURATION_MASK;
> > + case HPD_PORT_D:
> > + return PORTD_HOTPLUG_ENABLE | PORTD_PULSE_DURATION_MASK;
> > + default:
> > + return 0;
> > + }
> > +}
> > +
> > static u32 ibx_hotplug_enables(struct intel_encoder *encoder)
> > {
> > struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> >
> > @@ -2869,15 +2886,12 @@ static void ibx_hpd_detection_setup(struct drm_i915_private *dev_priv)
> > * duration to 2ms (which is the minimum in the Display Port spec).
> > * The pulse duration bits are reserved on LPT+.
> > */
> > intel_uncore_rmw(&dev_priv->uncore, PCH_PORT_HOTPLUG,
> > - PORTA_HOTPLUG_ENABLE |
No LPT-LP check here either, so presumably clearing the bit
unconditionally is fine... Yeah, doesn't look like there was
anything else there, ever.
> > - PORTB_HOTPLUG_ENABLE |
> > - PORTC_HOTPLUG_ENABLE |
> > - PORTD_HOTPLUG_ENABLE |
> > - PORTB_PULSE_DURATION_MASK |
> > - PORTC_PULSE_DURATION_MASK |
> > - PORTD_PULSE_DURATION_MASK,
> > + ibx_hotplug_mask(dev_priv, HPD_PORT_A) |
> > + ibx_hotplug_mask(dev_priv, HPD_PORT_B) |
> > + ibx_hotplug_mask(dev_priv, HPD_PORT_C) |
> > + ibx_hotplug_mask(dev_priv, HPD_PORT_D),
> > intel_hpd_hotplug_enables(dev_priv, ibx_hotplug_enables));
> > }
> >
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [Intel-gfx] [PATCH v3 00/22] drm/i915: Init DDI ports in VBT order
2023-02-21 23:02 [Intel-gfx] [PATCH v3 00/22] drm/i915: Init DDI ports in VBT order Ville Syrjala
` (25 preceding siblings ...)
2023-02-22 15:50 ` [Intel-gfx] [PATCH v3 00/22] drm/i915: Init DDI ports in VBT order Ville Syrjälä
@ 2023-05-26 4:48 ` Kai-Heng Feng
26 siblings, 0 replies; 35+ messages in thread
From: Kai-Heng Feng @ 2023-05-26 4:48 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
On Wed, Feb 22, 2023 at 7:02 AM Ville Syrjala
<ville.syrjala@linux.intel.com> wrote:
>
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> I just wanted to init DDI ports in VBT child device order
> without any up front assumptions about which conflicting
> child device defition is valid. That is pretty much what
> we need to do for the ADL laptops with the phantom eDP vs.
> native HDMI on DDI B.
>
> However that approach doesn't work for some of the weird
> SKL boards that have a phantom eDP on DDI A+AUX A and
> and a real DP->VGA converter on DDI E+AUX A. For those
> I had to introduce HPD live status check during eDP init.
>
> One of the remaining concerns I still have is what happens
> when we encounter VBTs with more AUX CH/DDC pin conflicts?
> I think what we might want to do eventually is ignore the
> conflicts as much as possible, and just init everything
> based on VBT, trusting HPD to take care of things in the
> end. That of course does have certain issues wrt. connector
> forcing, but dunno if we can avoid those at all.
>
> Also I think we need to nuke all the platform default AUX
> CH/DDC pin stuff, or at least only try to utilize those
> only once we've consumed the VBT fully.
>
> v2: Fix SKL DDI A HPD live state
> v3: Replace AUX CH/DDC pin sanitation with availability checks
The series can solve HDMI detection issue on an ADL laptop.
The caveat is that it can't be cleanly applied to current drm-tip, so
the test was conducted on older drm tag.
Tested-by: Kai-Heng Feng <kai.heng.feng@canonical.com>
> Ville Syrjälä (22):
> drm/i915: Populate dig_port->connected() before connector init
> drm/i915: Fix SKL DDI A digital port .connected()
> drm/i915: Get rid of the gm45 HPD live state nonsense
> drm/i915: Introduce <platoform>_hotplug_mask()
> drm/i915: Introduce intel_hpd_detection()
> drm/i915: Check HPD live state during eDP probe
> drm/i915: Sanitize child devices later
> drm/i915: Split map_aux_ch() into per-platform arrays
> drm/i915: Flip VBT DDC pin maps around
> drm/i915: Nuke intel_bios_is_port_dp_dual_mode()
> drm/i915: Remove bogus DDI-F from hsw/bdw output init
> drm/i915: Introduce device info port_mask
> drm/i915: Assert that device info bitmasks have enough bits
> drm/i915: Assert that the port being initialized is valid
> drm/i915: Beef up SDVO/HDMI port checks
> drm/i915: Init DDI outputs based on port_mask on skl+
> drm/i915: Try to initialize DDI/ICL+ DSI ports for every VBT child
> device
> drm/i915: Convert HSW/BDW to use VBT driven DDI probe
> drm/i915: Remove DDC pin sanitation
> drm/i915: Remove AUX CH sanitation
> drm/i915: Initialize dig_port->aux_ch to NONE to be sure
> drm/i915: Only populate aux_ch is really needed
>
> drivers/gpu/drm/i915/display/g4x_dp.c | 39 +-
> drivers/gpu/drm/i915/display/g4x_hdmi.c | 26 +-
> drivers/gpu/drm/i915/display/icl_dsi.c | 11 +-
> drivers/gpu/drm/i915/display/icl_dsi.h | 6 +-
> drivers/gpu/drm/i915/display/intel_bios.c | 422 +++++++-----------
> drivers/gpu/drm/i915/display/intel_bios.h | 12 +-
> drivers/gpu/drm/i915/display/intel_crt.c | 2 +
> drivers/gpu/drm/i915/display/intel_ddi.c | 148 ++++--
> drivers/gpu/drm/i915/display/intel_ddi.h | 5 +-
> drivers/gpu/drm/i915/display/intel_display.c | 89 +---
> drivers/gpu/drm/i915/display/intel_display.h | 2 +
> .../gpu/drm/i915/display/intel_display_core.h | 2 -
> drivers/gpu/drm/i915/display/intel_dp.c | 28 ++
> drivers/gpu/drm/i915/display/intel_dp_aux.c | 51 ++-
> drivers/gpu/drm/i915/display/intel_dvo.c | 2 +
> drivers/gpu/drm/i915/display/intel_hdmi.c | 78 +++-
> drivers/gpu/drm/i915/display/intel_sdvo.c | 20 +-
> drivers/gpu/drm/i915/i915_irq.c | 365 ++++++++++++---
> drivers/gpu/drm/i915/i915_irq.h | 2 +
> drivers/gpu/drm/i915/i915_pci.c | 31 ++
> drivers/gpu/drm/i915/i915_reg.h | 13 +-
> drivers/gpu/drm/i915/intel_device_info.c | 9 +
> drivers/gpu/drm/i915/intel_device_info.h | 1 +
> 23 files changed, 843 insertions(+), 521 deletions(-)
>
> --
> 2.39.2
>
>
^ permalink raw reply [flat|nested] 35+ messages in thread
end of thread, other threads:[~2023-05-26 4:54 UTC | newest]
Thread overview: 35+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2023-02-21 23:02 [Intel-gfx] [PATCH v3 00/22] drm/i915: Init DDI ports in VBT order Ville Syrjala
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 01/22] drm/i915: Populate dig_port->connected() before connector init Ville Syrjala
2023-02-28 17:58 ` Jani Nikula
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 02/22] drm/i915: Fix SKL DDI A digital port .connected() Ville Syrjala
2023-02-28 18:18 ` Jani Nikula
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 03/22] drm/i915: Get rid of the gm45 HPD live state nonsense Ville Syrjala
2023-02-28 18:19 ` Jani Nikula
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 04/22] drm/i915: Introduce <platoform>_hotplug_mask() Ville Syrjala
2023-02-28 18:36 ` Jani Nikula
2023-02-28 19:52 ` Ville Syrjälä
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 05/22] drm/i915: Introduce intel_hpd_detection() Ville Syrjala
2023-02-28 12:40 ` Jani Nikula
2023-02-28 12:50 ` Ville Syrjälä
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 06/22] drm/i915: Check HPD live state during eDP probe Ville Syrjala
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 07/22] drm/i915: Sanitize child devices later Ville Syrjala
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 08/22] drm/i915: Split map_aux_ch() into per-platform arrays Ville Syrjala
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 09/22] drm/i915: Flip VBT DDC pin maps around Ville Syrjala
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 10/22] drm/i915: Nuke intel_bios_is_port_dp_dual_mode() Ville Syrjala
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 11/22] drm/i915: Remove bogus DDI-F from hsw/bdw output init Ville Syrjala
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 12/22] drm/i915: Introduce device info port_mask Ville Syrjala
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 13/22] drm/i915: Assert that device info bitmasks have enough bits Ville Syrjala
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 14/22] drm/i915: Assert that the port being initialized is valid Ville Syrjala
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 15/22] drm/i915: Beef up SDVO/HDMI port checks Ville Syrjala
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 16/22] drm/i915: Init DDI outputs based on port_mask on skl+ Ville Syrjala
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 17/22] drm/i915: Try to initialize DDI/ICL+ DSI ports for every VBT child device Ville Syrjala
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 18/22] drm/i915: Convert HSW/BDW to use VBT driven DDI probe Ville Syrjala
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 19/22] drm/i915: Remove DDC pin sanitation Ville Syrjala
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 20/22] drm/i915: Remove AUX CH sanitation Ville Syrjala
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 21/22] drm/i915: Initialize dig_port->aux_ch to NONE to be sure Ville Syrjala
2023-02-21 23:02 ` [Intel-gfx] [PATCH v3 22/22] drm/i915: Only populate aux_ch is really needed Ville Syrjala
2023-02-21 23:35 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Init DDI ports in VBT order (rev3) Patchwork
2023-02-22 3:04 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-02-22 5:11 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2023-02-22 15:50 ` [Intel-gfx] [PATCH v3 00/22] drm/i915: Init DDI ports in VBT order Ville Syrjälä
2023-05-26 4:48 ` Kai-Heng Feng
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