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From: Jani Nikula <jani.nikula@linux.intel.com>
To: Manasi Navare <manasi.d.navare@intel.com>,
	intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Cc: Manasi Navare <manasi.d.navare@intel.com>,
	Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Subject: Re: [PATCH 1/3] drm/dp: DRM DP helper for reading Ignore MSA from DPCD
Date: Thu, 19 Mar 2020 11:59:38 +0200	[thread overview]
Message-ID: <871rpoekc5.fsf@intel.com> (raw)
In-Reply-To: <20200318063517.3844-1-manasi.d.navare@intel.com>

On Tue, 17 Mar 2020, Manasi Navare <manasi.d.navare@intel.com> wrote:
> DP sink device sets the Ignore MSA bit in its
> DP_DOWNSTREAM_PORT_COUNT register to indicate its ability to
> ignore the MSA video timing paramaters and its ability to support
> seamless video timing change over a range of timing exposed by
> DisplayID and EDID.
> This is required for the sink to indicate that it is Adaptive sync
> capable.
>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Harry Wentland <harry.wentland@amd.com>
> Cc: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
> ---
>  include/drm/drm_dp_helper.h | 8 ++++++++
>  1 file changed, 8 insertions(+)
>
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index c6119e4c169a..ccd6e2e988b9 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -1315,6 +1315,14 @@ drm_dp_alternate_scrambler_reset_cap(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
>  			DP_ALTERNATE_SCRAMBLER_RESET_CAP;
>  }
>  
> +/* Ignore MSA timing for Adaptive Sync support on DP 1.4 */
> +static inline bool
> +drm_dp_sink_is_capable_without_timing_msa(const u8 dpcd[DP_RECEIVER_CAP_SIZE])

From the department of nitpicks, if you read the name of the function
aloud, what does it actually mean?

Is sink capable of *what*?

BR,
Jani.


> +{
> +	return dpcd[DP_DOWN_STREAM_PORT_COUNT] &
> +		DP_MSA_TIMING_PAR_IGNORED;
> +}
> +
>  /*
>   * DisplayPort AUX channel
>   */

-- 
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

WARNING: multiple messages have this Message-ID (diff)
From: Jani Nikula <jani.nikula@linux.intel.com>
To: Manasi Navare <manasi.d.navare@intel.com>,
	intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Cc: Harry Wentland <harry.wentland@amd.com>,
	Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Subject: Re: [Intel-gfx] [PATCH 1/3] drm/dp: DRM DP helper for reading Ignore MSA from DPCD
Date: Thu, 19 Mar 2020 11:59:38 +0200	[thread overview]
Message-ID: <871rpoekc5.fsf@intel.com> (raw)
In-Reply-To: <20200318063517.3844-1-manasi.d.navare@intel.com>

On Tue, 17 Mar 2020, Manasi Navare <manasi.d.navare@intel.com> wrote:
> DP sink device sets the Ignore MSA bit in its
> DP_DOWNSTREAM_PORT_COUNT register to indicate its ability to
> ignore the MSA video timing paramaters and its ability to support
> seamless video timing change over a range of timing exposed by
> DisplayID and EDID.
> This is required for the sink to indicate that it is Adaptive sync
> capable.
>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Harry Wentland <harry.wentland@amd.com>
> Cc: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
> ---
>  include/drm/drm_dp_helper.h | 8 ++++++++
>  1 file changed, 8 insertions(+)
>
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index c6119e4c169a..ccd6e2e988b9 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -1315,6 +1315,14 @@ drm_dp_alternate_scrambler_reset_cap(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
>  			DP_ALTERNATE_SCRAMBLER_RESET_CAP;
>  }
>  
> +/* Ignore MSA timing for Adaptive Sync support on DP 1.4 */
> +static inline bool
> +drm_dp_sink_is_capable_without_timing_msa(const u8 dpcd[DP_RECEIVER_CAP_SIZE])

From the department of nitpicks, if you read the name of the function
aloud, what does it actually mean?

Is sink capable of *what*?

BR,
Jani.


> +{
> +	return dpcd[DP_DOWN_STREAM_PORT_COUNT] &
> +		DP_MSA_TIMING_PAR_IGNORED;
> +}
> +
>  /*
>   * DisplayPort AUX channel
>   */

-- 
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2020-03-19  9:59 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-18  6:35 [PATCH 1/3] drm/dp: DRM DP helper for reading Ignore MSA from DPCD Manasi Navare
2020-03-18  6:35 ` [Intel-gfx] " Manasi Navare
2020-03-18  6:35 ` [PATCH 2/3] drm: Create a drm_connector_helper_funcs hook for Adaptive Sync support Manasi Navare
2020-03-18  6:35   ` [Intel-gfx] " Manasi Navare
2020-03-18 13:42   ` Harry Wentland
2020-03-18 13:42     ` [Intel-gfx] " Harry Wentland
2020-03-19 10:07   ` Jani Nikula
2020-03-19 10:07     ` [Intel-gfx] " Jani Nikula
2020-03-19 22:39     ` Manasi Navare
2020-03-19 22:39       ` [Intel-gfx] " Manasi Navare
2020-03-18  6:35 ` [PATCH 3/3] drm/i915/dp: intel_dp connector hook for VRR support Manasi Navare
2020-03-18  6:35   ` [Intel-gfx] " Manasi Navare
2020-03-19 10:14   ` Jani Nikula
2020-03-19 10:14     ` [Intel-gfx] " Jani Nikula
2020-03-19 22:35     ` Manasi Navare
2020-03-19 22:35       ` [Intel-gfx] " Manasi Navare
2020-03-18  7:07 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/dp: DRM DP helper for reading Ignore MSA from DPCD Patchwork
2020-03-18  7:32 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-03-18 10:00 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-03-19  9:59 ` Jani Nikula [this message]
2020-03-19  9:59   ` [Intel-gfx] [PATCH 1/3] " Jani Nikula
2020-03-19 22:46   ` Manasi Navare
2020-03-19 22:46     ` [Intel-gfx] " Manasi Navare

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