why "mov %0, %0" after "rd %%tick, %0"?

[Ed L Cashin <ecashin@uga.edu>]

Hi.  In arch/sparc64/kernel/time.c, there are some routines that use
the %tick register.  It seems analogous to the Pentium's TSC.  I'm
planning to use that register in userland via inline asm.  (Thanks for
making sure that non-privileged access is allowed, BTW!)

One thing I don't get is why there's a mov %0, %0 instruction after
reading the tick register.  Is this because of the delay slot?

static unsigned long tick_get_tick(void)
{
	unsigned long ret;

	__asm__ __volatile__("rd	%%tick, %0\n\t"
			     "mov	%0, %0"
			     : "=r" (ret));

	return ret & ~TICK_PRIV_BIT;
}


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