From: "Alex Bennée" <alex.bennee@linaro.org>
To: "Corvin Köhne" <corvin.koehne@gmail.com>
Cc: qemu-devel@nongnu.org,
"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Alistair Francis" <alistair@alistair23.me>,
qemu-arm@nongnu.org, "Peter Maydell" <peter.maydell@linaro.org>,
"Kevin Wolf" <kwolf@redhat.com>,
qemu-block@nongnu.org, "Corvin Köhne" <c.koehne@beckhoff.com>,
"Hanna Reitz" <hreitz@redhat.com>,
"Yannick Voßen" <y.vossen@beckhoff.com>
Subject: Re: [PATCH v5 15/15] docs/system/arm: Add support for Beckhoff CX7200
Date: Thu, 15 Jan 2026 11:36:00 +0000 [thread overview]
Message-ID: <873447jefz.fsf@draig.linaro.org> (raw)
In-Reply-To: <20251204093502.50582-16-corvin.koehne@gmail.com> ("Corvin Köhne"'s message of "Thu, 4 Dec 2025 10:35:02 +0100")
Corvin Köhne <corvin.koehne@gmail.com> writes:
> From: YannickV <Y.Vossen@beckhoff.com>
>
> This commit offers some documentation on the Beckhoff CX7200
> qemu emulation.
>
> Signed-off-by: YannickV <Y.Vossen@beckhoff.com>
> ---
> docs/system/arm/beckhoff-cx7200.rst | 57 +++++++++++++++++++++++++++++
> docs/system/target-arm.rst | 1 +
> 2 files changed, 58 insertions(+)
> create mode 100644 docs/system/arm/beckhoff-cx7200.rst
>
> diff --git a/docs/system/arm/beckhoff-cx7200.rst b/docs/system/arm/beckhoff-cx7200.rst
> new file mode 100644
> index 0000000000..f060319b0f
> --- /dev/null
> +++ b/docs/system/arm/beckhoff-cx7200.rst
> @@ -0,0 +1,57 @@
> +Beckhoff CX7200 (``beckhoff-cx7200``)
> +======================================
> +The Beckhoff CX7200 is based on the same architecture as the Xilinx Zynq A9.
> +The Zynq 7000 family is based on the AMD SoC architecture. These products
> +integrate a feature-rich dual or single-core Arm Cortex-A9 MPCore based
> +processing system (PS) and AMD programmable logic (PL) in a single device.
> +The Beckhoff Communication Controller (CCAT) can be found in the PL of Zynq.
> +
> +More details here:
> +https://docs.amd.com/r/en-US/ug585-zynq-7000-SoC-TRM/Zynq-7000-SoC-Technical-Reference-Manual
> +https://www.beckhoff.com/de-de/produkte/ipc/embedded-pcs/cx7000-arm-r-cortex-r/cx7293.html
> +
> +The CX7200 supports following devices:
> + - A9 MPCORE
> + - cortex-a9
> + - GIC v1
> + - Generic timer
> + - wdt
> + - OCM 256KB
> + - SMC SRAM@0xe2000000 64MB
> + - Zynq SLCR
> + - SPI x2
> + - QSPI
> + - UART
> + - TTC x2
> + - Gigabit Ethernet Controller
> + - SD Controller
> + - XADC
> + - Arm PrimeCell DMA Controller
> + - DDR Memory
> + - DDR Controller
> + - Beckhoff Communication Controller (CCAT)
> + - EEPROM Interface
> + - DMA Controller
> +
> +Following devices are not supported:
> + - I2C
> +
> +Running
> +"""""""
> +Directly loading an ELF file to the CPU of the CX7200 to run f.e. TC/RTOS (based on FreeRTOS):
> +
> +.. code-block:: bash
> +
> + $ qemu-system-arm -M beckhoff-cx7200 \
> + -device loader,file=CX7200_Zynq_Fsbl.elf \
> + -display none \
> + -icount shift=auto \
> +
Is icount actually required for running? Or does it just affect the
fidelity of performance counters?
> +
> +For setting the EEPROM content of the CCAT provide the following on the command line:
> +
> +.. code-block:: bash
> +
> + -drive file=eeprom.bin,format=raw,id=ccat-eeprom
> +
> +The size of eeprom.bin must be aligned to a power of 2 and bigger than 256 bytes.
> diff --git a/docs/system/target-arm.rst b/docs/system/target-arm.rst
> index a96d1867df..e634872b97 100644
> --- a/docs/system/target-arm.rst
> +++ b/docs/system/target-arm.rst
> @@ -82,6 +82,7 @@ Board-specific documentation
> arm/aspeed
> arm/bananapi_m2u.rst
> arm/b-l475e-iot01a.rst
> + arm/beckhoff-cx7200
> arm/sabrelite
> arm/highbank
> arm/digic
Otherwise:
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
next prev parent reply other threads:[~2026-01-15 11:36 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-04 9:34 [PATCH v5 00/15] hw/arm: add Beckhoff CX7200 board Corvin Köhne
2025-12-04 9:34 ` [PATCH v5 01/15] hw/timer: Make frequency configurable Corvin Köhne
2026-01-15 11:16 ` Peter Maydell
2025-12-04 9:34 ` [PATCH v5 02/15] hw/timer: Make PERIPHCLK divider configurable Corvin Köhne
2025-12-04 9:34 ` [PATCH v5 03/15] hw/dma/zynq-devcfg: Handle bitstream loading via DMA to 0xffffffff Corvin Köhne
2025-12-04 9:34 ` [PATCH v5 04/15] hw/arm/zynq-devcfg: Prevent unintended unlock during initialization Corvin Köhne
2025-12-04 9:34 ` [PATCH v5 05/15] hw/dma/zynq: Ensure PCFG_DONE bit remains set to indicate PL is in user mode Corvin Köhne
2025-12-04 9:34 ` [PATCH v5 06/15] hw/dma/zynq-devcfg: Simulate dummy PL reset Corvin Köhne
2025-12-04 9:34 ` [PATCH v5 07/15] hw/dma/zynq-devcfg: Indicate power-up status of PL Corvin Köhne
2025-12-04 9:34 ` [PATCH v5 08/15] hw/misc: Add dummy ZYNQ DDR controller Corvin Köhne
2026-01-15 11:40 ` Peter Maydell
2025-12-04 9:34 ` [PATCH v5 09/15] hw/misc/zynq_slcr: Add logic for DCI configuration Corvin Köhne
2025-12-04 9:34 ` [PATCH v5 10/15] hw/misc: Add Beckhoff CCAT device Corvin Köhne
2025-12-04 9:34 ` [PATCH v5 11/15] hw/block/m25p80: Add HAS_SR_TB flag for is25lp016d Corvin Köhne
2026-01-15 14:43 ` Peter Maydell
2025-12-04 9:34 ` [PATCH v5 12/15] hw/arm/xilinx_zynq: Split xilinx_zynq into header and implementation files Corvin Köhne
2026-01-15 14:44 ` Peter Maydell
2025-12-04 9:35 ` [PATCH v5 13/15] hw/arm/xilinx_zynq: Add flash-type property Corvin Köhne
2026-01-15 14:57 ` Peter Maydell
2025-12-04 9:35 ` [PATCH v5 14/15] hw/arm: Add new machine based on xilinx-zynq-a9 for Beckhoff CX7200 Corvin Köhne
2026-01-15 14:59 ` Peter Maydell
2025-12-04 9:35 ` [PATCH v5 15/15] docs/system/arm: Add support " Corvin Köhne
2026-01-15 11:36 ` Alex Bennée [this message]
2026-01-15 11:57 ` Peter Maydell
2026-01-15 14:30 ` Peter Maydell
2025-12-04 10:47 ` [PATCH v5 00/15] hw/arm: add Beckhoff CX7200 board Thomas Huth
2026-01-15 11:42 ` Alex Bennée
2026-05-18 7:39 ` Corvin Köhne
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