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From: "Alex Bennée" <alex.bennee@linaro.org>
To: "Corvin Köhne" <corvin.koehne@gmail.com>
Cc: qemu-devel@nongnu.org,
	"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Alistair Francis" <alistair@alistair23.me>,
	qemu-arm@nongnu.org, "Peter Maydell" <peter.maydell@linaro.org>,
	"Kevin Wolf" <kwolf@redhat.com>,
	qemu-block@nongnu.org, "Corvin Köhne" <c.koehne@beckhoff.com>,
	"Hanna Reitz" <hreitz@redhat.com>,
	"Yannick Voßen" <y.vossen@beckhoff.com>
Subject: Re: [PATCH v5 00/15] hw/arm: add Beckhoff CX7200 board
Date: Thu, 15 Jan 2026 11:42:44 +0000	[thread overview]
Message-ID: <87wm1jhzkb.fsf@draig.linaro.org> (raw)
In-Reply-To: <20251204093502.50582-1-corvin.koehne@gmail.com> ("Corvin Köhne"'s message of "Thu, 4 Dec 2025 10:34:47 +0100")

Corvin Köhne <corvin.koehne@gmail.com> writes:

> From: Corvin Köhne <c.koehne@beckhoff.com>
>
> Hi,
>
> Beckhoff has build a board, called CX7200, based on the Xilinx Zynq A9
> platform. This commit series adds the Beckhoff CX7200 as new board variant to
> QEMU.
>
> The emulation is able to successfully boot an CX7200 image. The image includes
> some self tests executed on every boot. Only the cache self test fails due to
> QEMU emulating the cache as always being coherent. The self tests include f.e.:
>
> * Network
> * Flash
> * CCAT DMA + EEPROM [1]
> * TwinCAT (Beckhoff's automation control software [2])
>
> [1] https://github.com/beckhoff/ccat
> [2] https://www.beckhoff.com/en-us/products/automation/

Is it possible to host a binary build somewhere so there can be a
functional test?

>
> YannickV (15):
>   hw/timer: Make frequency configurable
>   hw/timer: Make PERIPHCLK divider configurable
>   hw/dma/zynq-devcfg: Handle bitstream loading via DMA to 0xffffffff
>   hw/arm/zynq-devcfg: Prevent unintended unlock during initialization
>   hw/dma/zynq: Ensure PCFG_DONE bit remains set to indicate PL is in
>     user mode
>   hw/dma/zynq-devcfg: Simulate dummy PL reset
>   hw/dma/zynq-devcfg: Indicate power-up status of PL
>   hw/misc: Add dummy ZYNQ DDR controller
>   hw/misc/zynq_slcr: Add logic for DCI configuration
>   hw/misc: Add Beckhoff CCAT device
>   hw/block/m25p80: Add HAS_SR_TB flag for is25lp016d
>   hw/arm/xilinx_zynq: Split xilinx_zynq into header and implementation
>     files
>   hw/arm/xilinx_zynq: Add flash-type property
>   hw/arm: Add new machine based on xilinx-zynq-a9 for Beckhoff CX7200
>   docs/system/arm: Add support for Beckhoff CX7200
>
>  docs/system/arm/beckhoff-cx7200.rst |  57 ++++
>  docs/system/target-arm.rst          |   1 +
>  hw/arm/Kconfig                      |   7 +
>  hw/arm/beckhoff_CX7200.c            | 104 +++++++
>  hw/arm/meson.build                  |   1 +
>  hw/arm/xilinx_zynq.c                |  54 ++--
>  hw/block/m25p80.c                   |   3 +-
>  hw/dma/xlnx-zynq-devcfg.c           |  27 +-
>  hw/misc/Kconfig                     |   6 +
>  hw/misc/beckhoff_ccat.c             | 339 +++++++++++++++++++++++
>  hw/misc/meson.build                 |   2 +
>  hw/misc/xlnx-zynq-ddrc.c            | 413 ++++++++++++++++++++++++++++
>  hw/misc/zynq_slcr.c                 |  31 +++
>  hw/timer/a9gtimer.c                 |  26 +-
>  hw/timer/arm_mptimer.c              |  32 ++-
>  include/hw/arm/xilinx_zynq.h        |  37 +++
>  include/hw/misc/xlnx-zynq-ddrc.h    | 148 ++++++++++
>  include/hw/timer/a9gtimer.h         |   2 +
>  include/hw/timer/arm_mptimer.h      |   4 +
>  19 files changed, 1263 insertions(+), 31 deletions(-)
>  create mode 100644 docs/system/arm/beckhoff-cx7200.rst
>  create mode 100644 hw/arm/beckhoff_CX7200.c
>  create mode 100644 hw/misc/beckhoff_ccat.c
>  create mode 100644 hw/misc/xlnx-zynq-ddrc.c
>  create mode 100644 include/hw/arm/xilinx_zynq.h
>  create mode 100644 include/hw/misc/xlnx-zynq-ddrc.h

-- 
Alex Bennée
Virtualisation Tech Lead @ Linaro


  parent reply	other threads:[~2026-01-15 11:43 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-04  9:34 [PATCH v5 00/15] hw/arm: add Beckhoff CX7200 board Corvin Köhne
2025-12-04  9:34 ` [PATCH v5 01/15] hw/timer: Make frequency configurable Corvin Köhne
2026-01-15 11:16   ` Peter Maydell
2025-12-04  9:34 ` [PATCH v5 02/15] hw/timer: Make PERIPHCLK divider configurable Corvin Köhne
2025-12-04  9:34 ` [PATCH v5 03/15] hw/dma/zynq-devcfg: Handle bitstream loading via DMA to 0xffffffff Corvin Köhne
2025-12-04  9:34 ` [PATCH v5 04/15] hw/arm/zynq-devcfg: Prevent unintended unlock during initialization Corvin Köhne
2025-12-04  9:34 ` [PATCH v5 05/15] hw/dma/zynq: Ensure PCFG_DONE bit remains set to indicate PL is in user mode Corvin Köhne
2025-12-04  9:34 ` [PATCH v5 06/15] hw/dma/zynq-devcfg: Simulate dummy PL reset Corvin Köhne
2025-12-04  9:34 ` [PATCH v5 07/15] hw/dma/zynq-devcfg: Indicate power-up status of PL Corvin Köhne
2025-12-04  9:34 ` [PATCH v5 08/15] hw/misc: Add dummy ZYNQ DDR controller Corvin Köhne
2026-01-15 11:40   ` Peter Maydell
2025-12-04  9:34 ` [PATCH v5 09/15] hw/misc/zynq_slcr: Add logic for DCI configuration Corvin Köhne
2025-12-04  9:34 ` [PATCH v5 10/15] hw/misc: Add Beckhoff CCAT device Corvin Köhne
2025-12-04  9:34 ` [PATCH v5 11/15] hw/block/m25p80: Add HAS_SR_TB flag for is25lp016d Corvin Köhne
2026-01-15 14:43   ` Peter Maydell
2025-12-04  9:34 ` [PATCH v5 12/15] hw/arm/xilinx_zynq: Split xilinx_zynq into header and implementation files Corvin Köhne
2026-01-15 14:44   ` Peter Maydell
2025-12-04  9:35 ` [PATCH v5 13/15] hw/arm/xilinx_zynq: Add flash-type property Corvin Köhne
2026-01-15 14:57   ` Peter Maydell
2025-12-04  9:35 ` [PATCH v5 14/15] hw/arm: Add new machine based on xilinx-zynq-a9 for Beckhoff CX7200 Corvin Köhne
2026-01-15 14:59   ` Peter Maydell
2025-12-04  9:35 ` [PATCH v5 15/15] docs/system/arm: Add support " Corvin Köhne
2026-01-15 11:36   ` Alex Bennée
2026-01-15 11:57   ` Peter Maydell
2026-01-15 14:30     ` Peter Maydell
2025-12-04 10:47 ` [PATCH v5 00/15] hw/arm: add Beckhoff CX7200 board Thomas Huth
2026-01-15 11:42 ` Alex Bennée [this message]
2026-05-18  7:39   ` Corvin Köhne

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