* [PATCH 1/4] include/hw/ppc: Split pnv_chip.h off pnv.h
2022-12-10 11:21 [PATCH 0/4] hw/ppc: Clean up includes Markus Armbruster
@ 2022-12-10 11:21 ` Markus Armbruster
2022-12-10 11:41 ` Cédric Le Goater
2022-12-10 11:21 ` [PATCH 2/4] include/hw/ppc: Supply a few missing includes Markus Armbruster
` (3 subsequent siblings)
4 siblings, 1 reply; 12+ messages in thread
From: Markus Armbruster @ 2022-12-10 11:21 UTC (permalink / raw)
To: qemu-devel; +Cc: clg, qemu-ppc
PnvChipClass, PnvChip, Pnv8Chip, Pnv9Chip, and Pnv10Chip are defined
in pnv.h. Many users of the header don't actually need them. One
instance is this inclusion loop: hw/ppc/pnv_homer.h includes
hw/ppc/pnv.h for typedef PnvChip, and vice versa for struct PnvHomer.
Similar structs live in their own headers: PnvHomerClass and PnvHomer
in pnv_homer.h, PnvLpcClass and PnvLpcController in pci_lpc.h,
PnvPsiClass, PnvPsi, Pnv8Psi, Pnv9Psi, Pnv10Psi in pnv_psi.h, ...
Move PnvChipClass, PnvChip, Pnv8Chip, Pnv9Chip, and Pnv10Chip to new
pnv_chip.h, and adjust include directives. This breaks the inclusion
loop mentioned above.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
---
include/hw/ppc/pnv.h | 143 +-----------------------------------
include/hw/ppc/pnv_chip.h | 147 +++++++++++++++++++++++++++++++++++++
hw/intc/pnv_xive.c | 1 +
hw/intc/pnv_xive2.c | 1 +
hw/pci-host/pnv_phb3.c | 1 +
hw/pci-host/pnv_phb4_pec.c | 1 +
hw/ppc/pnv.c | 3 +
hw/ppc/pnv_core.c | 1 +
hw/ppc/pnv_homer.c | 1 +
hw/ppc/pnv_lpc.c | 1 +
hw/ppc/pnv_xscom.c | 1 +
11 files changed, 160 insertions(+), 141 deletions(-)
create mode 100644 include/hw/ppc/pnv_chip.h
diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
index 9ef7e2d0dc..ca49e4281d 100644
--- a/include/hw/ppc/pnv.h
+++ b/include/hw/ppc/pnv.h
@@ -20,158 +20,19 @@
#ifndef PPC_PNV_H
#define PPC_PNV_H
+#include "cpu.h"
#include "hw/boards.h"
#include "hw/sysbus.h"
#include "hw/ipmi/ipmi.h"
-#include "hw/ppc/pnv_lpc.h"
#include "hw/ppc/pnv_pnor.h"
-#include "hw/ppc/pnv_psi.h"
-#include "hw/ppc/pnv_occ.h"
-#include "hw/ppc/pnv_sbe.h"
-#include "hw/ppc/pnv_homer.h"
-#include "hw/ppc/pnv_xive.h"
-#include "hw/ppc/pnv_core.h"
-#include "hw/pci-host/pnv_phb3.h"
-#include "hw/pci-host/pnv_phb4.h"
#include "hw/pci-host/pnv_phb.h"
-#include "qom/object.h"
#define TYPE_PNV_CHIP "pnv-chip"
-OBJECT_DECLARE_TYPE(PnvChip, PnvChipClass,
- PNV_CHIP)
-struct PnvChip {
- /*< private >*/
- SysBusDevice parent_obj;
-
- /*< public >*/
- uint32_t chip_id;
- uint64_t ram_start;
- uint64_t ram_size;
-
- uint32_t nr_cores;
- uint32_t nr_threads;
- uint64_t cores_mask;
- PnvCore **cores;
-
- uint32_t num_pecs;
-
- MemoryRegion xscom_mmio;
- MemoryRegion xscom;
- AddressSpace xscom_as;
-
- MemoryRegion *fw_mr;
- gchar *dt_isa_nodename;
-};
-
-#define TYPE_PNV8_CHIP "pnv8-chip"
+typedef struct PnvChip PnvChip;
typedef struct Pnv8Chip Pnv8Chip;
-DECLARE_INSTANCE_CHECKER(Pnv8Chip, PNV8_CHIP,
- TYPE_PNV8_CHIP)
-
-struct Pnv8Chip {
- /*< private >*/
- PnvChip parent_obj;
-
- /*< public >*/
- MemoryRegion icp_mmio;
-
- PnvLpcController lpc;
- Pnv8Psi psi;
- PnvOCC occ;
- PnvHomer homer;
-
-#define PNV8_CHIP_PHB3_MAX 4
- /*
- * The array is used to allow quick access to the phbs by
- * pnv_ics_get_child() and pnv_ics_resend_child().
- */
- PnvPHB *phbs[PNV8_CHIP_PHB3_MAX];
- uint32_t num_phbs;
-
- XICSFabric *xics;
-};
-
-#define TYPE_PNV9_CHIP "pnv9-chip"
typedef struct Pnv9Chip Pnv9Chip;
-DECLARE_INSTANCE_CHECKER(Pnv9Chip, PNV9_CHIP,
- TYPE_PNV9_CHIP)
-
-struct Pnv9Chip {
- /*< private >*/
- PnvChip parent_obj;
-
- /*< public >*/
- PnvXive xive;
- Pnv9Psi psi;
- PnvLpcController lpc;
- PnvOCC occ;
- PnvSBE sbe;
- PnvHomer homer;
-
- uint32_t nr_quads;
- PnvQuad *quads;
-
-#define PNV9_CHIP_MAX_PEC 3
- PnvPhb4PecState pecs[PNV9_CHIP_MAX_PEC];
-};
-
-/*
- * A SMT8 fused core is a pair of SMT4 cores.
- */
-#define PNV9_PIR2FUSEDCORE(pir) (((pir) >> 3) & 0xf)
-#define PNV9_PIR2CHIP(pir) (((pir) >> 8) & 0x7f)
-
-#define TYPE_PNV10_CHIP "pnv10-chip"
typedef struct Pnv10Chip Pnv10Chip;
-DECLARE_INSTANCE_CHECKER(Pnv10Chip, PNV10_CHIP,
- TYPE_PNV10_CHIP)
-
-struct Pnv10Chip {
- /*< private >*/
- PnvChip parent_obj;
-
- /*< public >*/
- PnvXive2 xive;
- Pnv9Psi psi;
- PnvLpcController lpc;
- PnvOCC occ;
- PnvSBE sbe;
- PnvHomer homer;
-
- uint32_t nr_quads;
- PnvQuad *quads;
-
-#define PNV10_CHIP_MAX_PEC 2
- PnvPhb4PecState pecs[PNV10_CHIP_MAX_PEC];
-};
-
-#define PNV10_PIR2FUSEDCORE(pir) (((pir) >> 3) & 0xf)
-#define PNV10_PIR2CHIP(pir) (((pir) >> 8) & 0x7f)
-
-struct PnvChipClass {
- /*< private >*/
- SysBusDeviceClass parent_class;
-
- /*< public >*/
- uint64_t chip_cfam_id;
- uint64_t cores_mask;
- uint32_t num_pecs;
- uint32_t num_phbs;
-
- DeviceRealize parent_realize;
-
- uint32_t (*core_pir)(PnvChip *chip, uint32_t core_id);
- void (*intc_create)(PnvChip *chip, PowerPCCPU *cpu, Error **errp);
- void (*intc_reset)(PnvChip *chip, PowerPCCPU *cpu);
- void (*intc_destroy)(PnvChip *chip, PowerPCCPU *cpu);
- void (*intc_print_info)(PnvChip *chip, PowerPCCPU *cpu, Monitor *mon);
- ISABus *(*isa_create)(PnvChip *chip, Error **errp);
- void (*dt_populate)(PnvChip *chip, void *fdt);
- void (*pic_print_info)(PnvChip *chip, Monitor *mon);
- uint64_t (*xscom_core_base)(PnvChip *chip, uint32_t core_id);
- uint32_t (*xscom_pcba)(PnvChip *chip, uint64_t addr);
-};
#define PNV_CHIP_TYPE_SUFFIX "-" TYPE_PNV_CHIP
#define PNV_CHIP_TYPE_NAME(cpu_model) cpu_model PNV_CHIP_TYPE_SUFFIX
diff --git a/include/hw/ppc/pnv_chip.h b/include/hw/ppc/pnv_chip.h
new file mode 100644
index 0000000000..53e1d921d7
--- /dev/null
+++ b/include/hw/ppc/pnv_chip.h
@@ -0,0 +1,147 @@
+#ifndef PPC_PNV_CHIP_H
+#define PPC_PNV_CHIP_H
+
+#include "hw/pci-host/pnv_phb4.h"
+#include "hw/ppc/pnv_core.h"
+#include "hw/ppc/pnv_homer.h"
+#include "hw/ppc/pnv_lpc.h"
+#include "hw/ppc/pnv_occ.h"
+#include "hw/ppc/pnv_psi.h"
+#include "hw/ppc/pnv_sbe.h"
+#include "hw/ppc/pnv_xive.h"
+#include "hw/sysbus.h"
+
+OBJECT_DECLARE_TYPE(PnvChip, PnvChipClass,
+ PNV_CHIP)
+
+struct PnvChip {
+ /*< private >*/
+ SysBusDevice parent_obj;
+
+ /*< public >*/
+ uint32_t chip_id;
+ uint64_t ram_start;
+ uint64_t ram_size;
+
+ uint32_t nr_cores;
+ uint32_t nr_threads;
+ uint64_t cores_mask;
+ PnvCore **cores;
+
+ uint32_t num_pecs;
+
+ MemoryRegion xscom_mmio;
+ MemoryRegion xscom;
+ AddressSpace xscom_as;
+
+ MemoryRegion *fw_mr;
+ gchar *dt_isa_nodename;
+};
+
+#define TYPE_PNV8_CHIP "pnv8-chip"
+DECLARE_INSTANCE_CHECKER(Pnv8Chip, PNV8_CHIP,
+ TYPE_PNV8_CHIP)
+
+struct Pnv8Chip {
+ /*< private >*/
+ PnvChip parent_obj;
+
+ /*< public >*/
+ MemoryRegion icp_mmio;
+
+ PnvLpcController lpc;
+ Pnv8Psi psi;
+ PnvOCC occ;
+ PnvHomer homer;
+
+#define PNV8_CHIP_PHB3_MAX 4
+ /*
+ * The array is used to allow quick access to the phbs by
+ * pnv_ics_get_child() and pnv_ics_resend_child().
+ */
+ PnvPHB *phbs[PNV8_CHIP_PHB3_MAX];
+ uint32_t num_phbs;
+
+ XICSFabric *xics;
+};
+
+#define TYPE_PNV9_CHIP "pnv9-chip"
+DECLARE_INSTANCE_CHECKER(Pnv9Chip, PNV9_CHIP,
+ TYPE_PNV9_CHIP)
+
+struct Pnv9Chip {
+ /*< private >*/
+ PnvChip parent_obj;
+
+ /*< public >*/
+ PnvXive xive;
+ Pnv9Psi psi;
+ PnvLpcController lpc;
+ PnvOCC occ;
+ PnvSBE sbe;
+ PnvHomer homer;
+
+ uint32_t nr_quads;
+ PnvQuad *quads;
+
+#define PNV9_CHIP_MAX_PEC 3
+ PnvPhb4PecState pecs[PNV9_CHIP_MAX_PEC];
+};
+
+/*
+ * A SMT8 fused core is a pair of SMT4 cores.
+ */
+#define PNV9_PIR2FUSEDCORE(pir) (((pir) >> 3) & 0xf)
+#define PNV9_PIR2CHIP(pir) (((pir) >> 8) & 0x7f)
+
+#define TYPE_PNV10_CHIP "pnv10-chip"
+DECLARE_INSTANCE_CHECKER(Pnv10Chip, PNV10_CHIP,
+ TYPE_PNV10_CHIP)
+
+struct Pnv10Chip {
+ /*< private >*/
+ PnvChip parent_obj;
+
+ /*< public >*/
+ PnvXive2 xive;
+ Pnv9Psi psi;
+ PnvLpcController lpc;
+ PnvOCC occ;
+ PnvSBE sbe;
+ PnvHomer homer;
+
+ uint32_t nr_quads;
+ PnvQuad *quads;
+
+#define PNV10_CHIP_MAX_PEC 2
+ PnvPhb4PecState pecs[PNV10_CHIP_MAX_PEC];
+};
+
+#define PNV10_PIR2FUSEDCORE(pir) (((pir) >> 3) & 0xf)
+#define PNV10_PIR2CHIP(pir) (((pir) >> 8) & 0x7f)
+
+struct PnvChipClass {
+ /*< private >*/
+ SysBusDeviceClass parent_class;
+
+ /*< public >*/
+ uint64_t chip_cfam_id;
+ uint64_t cores_mask;
+ uint32_t num_pecs;
+ uint32_t num_phbs;
+
+ DeviceRealize parent_realize;
+
+ uint32_t (*core_pir)(PnvChip *chip, uint32_t core_id);
+ void (*intc_create)(PnvChip *chip, PowerPCCPU *cpu, Error **errp);
+ void (*intc_reset)(PnvChip *chip, PowerPCCPU *cpu);
+ void (*intc_destroy)(PnvChip *chip, PowerPCCPU *cpu);
+ void (*intc_print_info)(PnvChip *chip, PowerPCCPU *cpu, Monitor *mon);
+ ISABus *(*isa_create)(PnvChip *chip, Error **errp);
+ void (*dt_populate)(PnvChip *chip, void *fdt);
+ void (*pic_print_info)(PnvChip *chip, Monitor *mon);
+ uint64_t (*xscom_core_base)(PnvChip *chip, uint32_t core_id);
+ uint32_t (*xscom_pcba)(PnvChip *chip, uint64_t addr);
+};
+
+#endif
diff --git a/hw/intc/pnv_xive.c b/hw/intc/pnv_xive.c
index c7b75ed12e..622f9d28b7 100644
--- a/hw/intc/pnv_xive.c
+++ b/hw/intc/pnv_xive.c
@@ -18,6 +18,7 @@
#include "monitor/monitor.h"
#include "hw/ppc/fdt.h"
#include "hw/ppc/pnv.h"
+#include "hw/ppc/pnv_chip.h"
#include "hw/ppc/pnv_core.h"
#include "hw/ppc/pnv_xscom.h"
#include "hw/ppc/pnv_xive.h"
diff --git a/hw/intc/pnv_xive2.c b/hw/intc/pnv_xive2.c
index f22ce5ca59..7176d70234 100644
--- a/hw/intc/pnv_xive2.c
+++ b/hw/intc/pnv_xive2.c
@@ -16,6 +16,7 @@
#include "monitor/monitor.h"
#include "hw/ppc/fdt.h"
#include "hw/ppc/pnv.h"
+#include "hw/ppc/pnv_chip.h"
#include "hw/ppc/pnv_core.h"
#include "hw/ppc/pnv_xscom.h"
#include "hw/ppc/xive2.h"
diff --git a/hw/pci-host/pnv_phb3.c b/hw/pci-host/pnv_phb3.c
index 9054c393a2..7a21497cf8 100644
--- a/hw/pci-host/pnv_phb3.c
+++ b/hw/pci-host/pnv_phb3.c
@@ -16,6 +16,7 @@
#include "hw/pci/pcie_host.h"
#include "hw/pci/pcie_port.h"
#include "hw/ppc/pnv.h"
+#include "hw/ppc/pnv_chip.h"
#include "hw/irq.h"
#include "hw/qdev-properties.h"
#include "qom/object.h"
diff --git a/hw/pci-host/pnv_phb4_pec.c b/hw/pci-host/pnv_phb4_pec.c
index 9871f462cd..43267a428f 100644
--- a/hw/pci-host/pnv_phb4_pec.c
+++ b/hw/pci-host/pnv_phb4_pec.c
@@ -17,6 +17,7 @@
#include "hw/pci/pci_bridge.h"
#include "hw/pci/pci_bus.h"
#include "hw/ppc/pnv.h"
+#include "hw/ppc/pnv_chip.h"
#include "hw/qdev-properties.h"
#include "sysemu/sysemu.h"
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 3d01e26f84..44b1fbbc93 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -44,9 +44,12 @@
#include "target/ppc/mmu-hash64.h"
#include "hw/pci/msi.h"
#include "hw/pci-host/pnv_phb.h"
+#include "hw/pci-host/pnv_phb3.h"
+#include "hw/pci-host/pnv_phb4.h"
#include "hw/ppc/xics.h"
#include "hw/qdev-properties.h"
+#include "hw/ppc/pnv_chip.h"
#include "hw/ppc/pnv_xscom.h"
#include "hw/ppc/pnv_pnor.h"
diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c
index 9ee79192dd..410f31bdf8 100644
--- a/hw/ppc/pnv_core.c
+++ b/hw/ppc/pnv_core.c
@@ -25,6 +25,7 @@
#include "target/ppc/cpu.h"
#include "hw/ppc/ppc.h"
#include "hw/ppc/pnv.h"
+#include "hw/ppc/pnv_chip.h"
#include "hw/ppc/pnv_core.h"
#include "hw/ppc/pnv_xscom.h"
#include "hw/ppc/xics.h"
diff --git a/hw/ppc/pnv_homer.c b/hw/ppc/pnv_homer.c
index ea73919e54..f9a203d11d 100644
--- a/hw/ppc/pnv_homer.c
+++ b/hw/ppc/pnv_homer.c
@@ -25,6 +25,7 @@
#include "hw/qdev-core.h"
#include "hw/qdev-properties.h"
#include "hw/ppc/pnv.h"
+#include "hw/ppc/pnv_chip.h"
#include "hw/ppc/pnv_homer.h"
#include "hw/ppc/pnv_xscom.h"
diff --git a/hw/ppc/pnv_lpc.c b/hw/ppc/pnv_lpc.c
index ee890e7ab4..71143b7692 100644
--- a/hw/ppc/pnv_lpc.c
+++ b/hw/ppc/pnv_lpc.c
@@ -26,6 +26,7 @@
#include "hw/isa/isa.h"
#include "hw/qdev-properties.h"
#include "hw/ppc/pnv.h"
+#include "hw/ppc/pnv_chip.h"
#include "hw/ppc/pnv_lpc.h"
#include "hw/ppc/pnv_xscom.h"
#include "hw/ppc/fdt.h"
diff --git a/hw/ppc/pnv_xscom.c b/hw/ppc/pnv_xscom.c
index 79f10de57f..d820e05e40 100644
--- a/hw/ppc/pnv_xscom.c
+++ b/hw/ppc/pnv_xscom.c
@@ -26,6 +26,7 @@
#include "hw/ppc/fdt.h"
#include "hw/ppc/pnv.h"
+#include "hw/ppc/pnv_chip.h"
#include "hw/ppc/pnv_xscom.h"
#include <libfdt.h>
--
2.37.3
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH 1/4] include/hw/ppc: Split pnv_chip.h off pnv.h
2022-12-10 11:21 ` [PATCH 1/4] include/hw/ppc: Split pnv_chip.h off pnv.h Markus Armbruster
@ 2022-12-10 11:41 ` Cédric Le Goater
0 siblings, 0 replies; 12+ messages in thread
From: Cédric Le Goater @ 2022-12-10 11:41 UTC (permalink / raw)
To: Markus Armbruster, qemu-devel; +Cc: qemu-ppc
On 12/10/22 12:21, Markus Armbruster wrote:
> PnvChipClass, PnvChip, Pnv8Chip, Pnv9Chip, and Pnv10Chip are defined
> in pnv.h. Many users of the header don't actually need them. One
> instance is this inclusion loop: hw/ppc/pnv_homer.h includes
> hw/ppc/pnv.h for typedef PnvChip, and vice versa for struct PnvHomer.
>
> Similar structs live in their own headers: PnvHomerClass and PnvHomer
> in pnv_homer.h, PnvLpcClass and PnvLpcController in pci_lpc.h,
> PnvPsiClass, PnvPsi, Pnv8Psi, Pnv9Psi, Pnv10Psi in pnv_psi.h, ...
>
> Move PnvChipClass, PnvChip, Pnv8Chip, Pnv9Chip, and Pnv10Chip to new
> pnv_chip.h, and adjust include directives. This breaks the inclusion
> loop mentioned above.
>
> Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Thanks,
C.
> ---
> include/hw/ppc/pnv.h | 143 +-----------------------------------
> include/hw/ppc/pnv_chip.h | 147 +++++++++++++++++++++++++++++++++++++
> hw/intc/pnv_xive.c | 1 +
> hw/intc/pnv_xive2.c | 1 +
> hw/pci-host/pnv_phb3.c | 1 +
> hw/pci-host/pnv_phb4_pec.c | 1 +
> hw/ppc/pnv.c | 3 +
> hw/ppc/pnv_core.c | 1 +
> hw/ppc/pnv_homer.c | 1 +
> hw/ppc/pnv_lpc.c | 1 +
> hw/ppc/pnv_xscom.c | 1 +
> 11 files changed, 160 insertions(+), 141 deletions(-)
> create mode 100644 include/hw/ppc/pnv_chip.h
>
> diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
> index 9ef7e2d0dc..ca49e4281d 100644
> --- a/include/hw/ppc/pnv.h
> +++ b/include/hw/ppc/pnv.h
> @@ -20,158 +20,19 @@
> #ifndef PPC_PNV_H
> #define PPC_PNV_H
>
> +#include "cpu.h"
> #include "hw/boards.h"
> #include "hw/sysbus.h"
> #include "hw/ipmi/ipmi.h"
> -#include "hw/ppc/pnv_lpc.h"
> #include "hw/ppc/pnv_pnor.h"
> -#include "hw/ppc/pnv_psi.h"
> -#include "hw/ppc/pnv_occ.h"
> -#include "hw/ppc/pnv_sbe.h"
> -#include "hw/ppc/pnv_homer.h"
> -#include "hw/ppc/pnv_xive.h"
> -#include "hw/ppc/pnv_core.h"
> -#include "hw/pci-host/pnv_phb3.h"
> -#include "hw/pci-host/pnv_phb4.h"
> #include "hw/pci-host/pnv_phb.h"
> -#include "qom/object.h"
>
> #define TYPE_PNV_CHIP "pnv-chip"
> -OBJECT_DECLARE_TYPE(PnvChip, PnvChipClass,
> - PNV_CHIP)
>
> -struct PnvChip {
> - /*< private >*/
> - SysBusDevice parent_obj;
> -
> - /*< public >*/
> - uint32_t chip_id;
> - uint64_t ram_start;
> - uint64_t ram_size;
> -
> - uint32_t nr_cores;
> - uint32_t nr_threads;
> - uint64_t cores_mask;
> - PnvCore **cores;
> -
> - uint32_t num_pecs;
> -
> - MemoryRegion xscom_mmio;
> - MemoryRegion xscom;
> - AddressSpace xscom_as;
> -
> - MemoryRegion *fw_mr;
> - gchar *dt_isa_nodename;
> -};
> -
> -#define TYPE_PNV8_CHIP "pnv8-chip"
> +typedef struct PnvChip PnvChip;
> typedef struct Pnv8Chip Pnv8Chip;
> -DECLARE_INSTANCE_CHECKER(Pnv8Chip, PNV8_CHIP,
> - TYPE_PNV8_CHIP)
> -
> -struct Pnv8Chip {
> - /*< private >*/
> - PnvChip parent_obj;
> -
> - /*< public >*/
> - MemoryRegion icp_mmio;
> -
> - PnvLpcController lpc;
> - Pnv8Psi psi;
> - PnvOCC occ;
> - PnvHomer homer;
> -
> -#define PNV8_CHIP_PHB3_MAX 4
> - /*
> - * The array is used to allow quick access to the phbs by
> - * pnv_ics_get_child() and pnv_ics_resend_child().
> - */
> - PnvPHB *phbs[PNV8_CHIP_PHB3_MAX];
> - uint32_t num_phbs;
> -
> - XICSFabric *xics;
> -};
> -
> -#define TYPE_PNV9_CHIP "pnv9-chip"
> typedef struct Pnv9Chip Pnv9Chip;
> -DECLARE_INSTANCE_CHECKER(Pnv9Chip, PNV9_CHIP,
> - TYPE_PNV9_CHIP)
> -
> -struct Pnv9Chip {
> - /*< private >*/
> - PnvChip parent_obj;
> -
> - /*< public >*/
> - PnvXive xive;
> - Pnv9Psi psi;
> - PnvLpcController lpc;
> - PnvOCC occ;
> - PnvSBE sbe;
> - PnvHomer homer;
> -
> - uint32_t nr_quads;
> - PnvQuad *quads;
> -
> -#define PNV9_CHIP_MAX_PEC 3
> - PnvPhb4PecState pecs[PNV9_CHIP_MAX_PEC];
> -};
> -
> -/*
> - * A SMT8 fused core is a pair of SMT4 cores.
> - */
> -#define PNV9_PIR2FUSEDCORE(pir) (((pir) >> 3) & 0xf)
> -#define PNV9_PIR2CHIP(pir) (((pir) >> 8) & 0x7f)
> -
> -#define TYPE_PNV10_CHIP "pnv10-chip"
> typedef struct Pnv10Chip Pnv10Chip;
> -DECLARE_INSTANCE_CHECKER(Pnv10Chip, PNV10_CHIP,
> - TYPE_PNV10_CHIP)
> -
> -struct Pnv10Chip {
> - /*< private >*/
> - PnvChip parent_obj;
> -
> - /*< public >*/
> - PnvXive2 xive;
> - Pnv9Psi psi;
> - PnvLpcController lpc;
> - PnvOCC occ;
> - PnvSBE sbe;
> - PnvHomer homer;
> -
> - uint32_t nr_quads;
> - PnvQuad *quads;
> -
> -#define PNV10_CHIP_MAX_PEC 2
> - PnvPhb4PecState pecs[PNV10_CHIP_MAX_PEC];
> -};
> -
> -#define PNV10_PIR2FUSEDCORE(pir) (((pir) >> 3) & 0xf)
> -#define PNV10_PIR2CHIP(pir) (((pir) >> 8) & 0x7f)
> -
> -struct PnvChipClass {
> - /*< private >*/
> - SysBusDeviceClass parent_class;
> -
> - /*< public >*/
> - uint64_t chip_cfam_id;
> - uint64_t cores_mask;
> - uint32_t num_pecs;
> - uint32_t num_phbs;
> -
> - DeviceRealize parent_realize;
> -
> - uint32_t (*core_pir)(PnvChip *chip, uint32_t core_id);
> - void (*intc_create)(PnvChip *chip, PowerPCCPU *cpu, Error **errp);
> - void (*intc_reset)(PnvChip *chip, PowerPCCPU *cpu);
> - void (*intc_destroy)(PnvChip *chip, PowerPCCPU *cpu);
> - void (*intc_print_info)(PnvChip *chip, PowerPCCPU *cpu, Monitor *mon);
> - ISABus *(*isa_create)(PnvChip *chip, Error **errp);
> - void (*dt_populate)(PnvChip *chip, void *fdt);
> - void (*pic_print_info)(PnvChip *chip, Monitor *mon);
> - uint64_t (*xscom_core_base)(PnvChip *chip, uint32_t core_id);
> - uint32_t (*xscom_pcba)(PnvChip *chip, uint64_t addr);
> -};
>
> #define PNV_CHIP_TYPE_SUFFIX "-" TYPE_PNV_CHIP
> #define PNV_CHIP_TYPE_NAME(cpu_model) cpu_model PNV_CHIP_TYPE_SUFFIX
> diff --git a/include/hw/ppc/pnv_chip.h b/include/hw/ppc/pnv_chip.h
> new file mode 100644
> index 0000000000..53e1d921d7
> --- /dev/null
> +++ b/include/hw/ppc/pnv_chip.h
> @@ -0,0 +1,147 @@
> +#ifndef PPC_PNV_CHIP_H
> +#define PPC_PNV_CHIP_H
> +
> +#include "hw/pci-host/pnv_phb4.h"
> +#include "hw/ppc/pnv_core.h"
> +#include "hw/ppc/pnv_homer.h"
> +#include "hw/ppc/pnv_lpc.h"
> +#include "hw/ppc/pnv_occ.h"
> +#include "hw/ppc/pnv_psi.h"
> +#include "hw/ppc/pnv_sbe.h"
> +#include "hw/ppc/pnv_xive.h"
> +#include "hw/sysbus.h"
> +
> +OBJECT_DECLARE_TYPE(PnvChip, PnvChipClass,
> + PNV_CHIP)
> +
> +struct PnvChip {
> + /*< private >*/
> + SysBusDevice parent_obj;
> +
> + /*< public >*/
> + uint32_t chip_id;
> + uint64_t ram_start;
> + uint64_t ram_size;
> +
> + uint32_t nr_cores;
> + uint32_t nr_threads;
> + uint64_t cores_mask;
> + PnvCore **cores;
> +
> + uint32_t num_pecs;
> +
> + MemoryRegion xscom_mmio;
> + MemoryRegion xscom;
> + AddressSpace xscom_as;
> +
> + MemoryRegion *fw_mr;
> + gchar *dt_isa_nodename;
> +};
> +
> +#define TYPE_PNV8_CHIP "pnv8-chip"
> +DECLARE_INSTANCE_CHECKER(Pnv8Chip, PNV8_CHIP,
> + TYPE_PNV8_CHIP)
> +
> +struct Pnv8Chip {
> + /*< private >*/
> + PnvChip parent_obj;
> +
> + /*< public >*/
> + MemoryRegion icp_mmio;
> +
> + PnvLpcController lpc;
> + Pnv8Psi psi;
> + PnvOCC occ;
> + PnvHomer homer;
> +
> +#define PNV8_CHIP_PHB3_MAX 4
> + /*
> + * The array is used to allow quick access to the phbs by
> + * pnv_ics_get_child() and pnv_ics_resend_child().
> + */
> + PnvPHB *phbs[PNV8_CHIP_PHB3_MAX];
> + uint32_t num_phbs;
> +
> + XICSFabric *xics;
> +};
> +
> +#define TYPE_PNV9_CHIP "pnv9-chip"
> +DECLARE_INSTANCE_CHECKER(Pnv9Chip, PNV9_CHIP,
> + TYPE_PNV9_CHIP)
> +
> +struct Pnv9Chip {
> + /*< private >*/
> + PnvChip parent_obj;
> +
> + /*< public >*/
> + PnvXive xive;
> + Pnv9Psi psi;
> + PnvLpcController lpc;
> + PnvOCC occ;
> + PnvSBE sbe;
> + PnvHomer homer;
> +
> + uint32_t nr_quads;
> + PnvQuad *quads;
> +
> +#define PNV9_CHIP_MAX_PEC 3
> + PnvPhb4PecState pecs[PNV9_CHIP_MAX_PEC];
> +};
> +
> +/*
> + * A SMT8 fused core is a pair of SMT4 cores.
> + */
> +#define PNV9_PIR2FUSEDCORE(pir) (((pir) >> 3) & 0xf)
> +#define PNV9_PIR2CHIP(pir) (((pir) >> 8) & 0x7f)
> +
> +#define TYPE_PNV10_CHIP "pnv10-chip"
> +DECLARE_INSTANCE_CHECKER(Pnv10Chip, PNV10_CHIP,
> + TYPE_PNV10_CHIP)
> +
> +struct Pnv10Chip {
> + /*< private >*/
> + PnvChip parent_obj;
> +
> + /*< public >*/
> + PnvXive2 xive;
> + Pnv9Psi psi;
> + PnvLpcController lpc;
> + PnvOCC occ;
> + PnvSBE sbe;
> + PnvHomer homer;
> +
> + uint32_t nr_quads;
> + PnvQuad *quads;
> +
> +#define PNV10_CHIP_MAX_PEC 2
> + PnvPhb4PecState pecs[PNV10_CHIP_MAX_PEC];
> +};
> +
> +#define PNV10_PIR2FUSEDCORE(pir) (((pir) >> 3) & 0xf)
> +#define PNV10_PIR2CHIP(pir) (((pir) >> 8) & 0x7f)
> +
> +struct PnvChipClass {
> + /*< private >*/
> + SysBusDeviceClass parent_class;
> +
> + /*< public >*/
> + uint64_t chip_cfam_id;
> + uint64_t cores_mask;
> + uint32_t num_pecs;
> + uint32_t num_phbs;
> +
> + DeviceRealize parent_realize;
> +
> + uint32_t (*core_pir)(PnvChip *chip, uint32_t core_id);
> + void (*intc_create)(PnvChip *chip, PowerPCCPU *cpu, Error **errp);
> + void (*intc_reset)(PnvChip *chip, PowerPCCPU *cpu);
> + void (*intc_destroy)(PnvChip *chip, PowerPCCPU *cpu);
> + void (*intc_print_info)(PnvChip *chip, PowerPCCPU *cpu, Monitor *mon);
> + ISABus *(*isa_create)(PnvChip *chip, Error **errp);
> + void (*dt_populate)(PnvChip *chip, void *fdt);
> + void (*pic_print_info)(PnvChip *chip, Monitor *mon);
> + uint64_t (*xscom_core_base)(PnvChip *chip, uint32_t core_id);
> + uint32_t (*xscom_pcba)(PnvChip *chip, uint64_t addr);
> +};
> +
> +#endif
> diff --git a/hw/intc/pnv_xive.c b/hw/intc/pnv_xive.c
> index c7b75ed12e..622f9d28b7 100644
> --- a/hw/intc/pnv_xive.c
> +++ b/hw/intc/pnv_xive.c
> @@ -18,6 +18,7 @@
> #include "monitor/monitor.h"
> #include "hw/ppc/fdt.h"
> #include "hw/ppc/pnv.h"
> +#include "hw/ppc/pnv_chip.h"
> #include "hw/ppc/pnv_core.h"
> #include "hw/ppc/pnv_xscom.h"
> #include "hw/ppc/pnv_xive.h"
> diff --git a/hw/intc/pnv_xive2.c b/hw/intc/pnv_xive2.c
> index f22ce5ca59..7176d70234 100644
> --- a/hw/intc/pnv_xive2.c
> +++ b/hw/intc/pnv_xive2.c
> @@ -16,6 +16,7 @@
> #include "monitor/monitor.h"
> #include "hw/ppc/fdt.h"
> #include "hw/ppc/pnv.h"
> +#include "hw/ppc/pnv_chip.h"
> #include "hw/ppc/pnv_core.h"
> #include "hw/ppc/pnv_xscom.h"
> #include "hw/ppc/xive2.h"
> diff --git a/hw/pci-host/pnv_phb3.c b/hw/pci-host/pnv_phb3.c
> index 9054c393a2..7a21497cf8 100644
> --- a/hw/pci-host/pnv_phb3.c
> +++ b/hw/pci-host/pnv_phb3.c
> @@ -16,6 +16,7 @@
> #include "hw/pci/pcie_host.h"
> #include "hw/pci/pcie_port.h"
> #include "hw/ppc/pnv.h"
> +#include "hw/ppc/pnv_chip.h"
> #include "hw/irq.h"
> #include "hw/qdev-properties.h"
> #include "qom/object.h"
> diff --git a/hw/pci-host/pnv_phb4_pec.c b/hw/pci-host/pnv_phb4_pec.c
> index 9871f462cd..43267a428f 100644
> --- a/hw/pci-host/pnv_phb4_pec.c
> +++ b/hw/pci-host/pnv_phb4_pec.c
> @@ -17,6 +17,7 @@
> #include "hw/pci/pci_bridge.h"
> #include "hw/pci/pci_bus.h"
> #include "hw/ppc/pnv.h"
> +#include "hw/ppc/pnv_chip.h"
> #include "hw/qdev-properties.h"
> #include "sysemu/sysemu.h"
>
> diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
> index 3d01e26f84..44b1fbbc93 100644
> --- a/hw/ppc/pnv.c
> +++ b/hw/ppc/pnv.c
> @@ -44,9 +44,12 @@
> #include "target/ppc/mmu-hash64.h"
> #include "hw/pci/msi.h"
> #include "hw/pci-host/pnv_phb.h"
> +#include "hw/pci-host/pnv_phb3.h"
> +#include "hw/pci-host/pnv_phb4.h"
>
> #include "hw/ppc/xics.h"
> #include "hw/qdev-properties.h"
> +#include "hw/ppc/pnv_chip.h"
> #include "hw/ppc/pnv_xscom.h"
> #include "hw/ppc/pnv_pnor.h"
>
> diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c
> index 9ee79192dd..410f31bdf8 100644
> --- a/hw/ppc/pnv_core.c
> +++ b/hw/ppc/pnv_core.c
> @@ -25,6 +25,7 @@
> #include "target/ppc/cpu.h"
> #include "hw/ppc/ppc.h"
> #include "hw/ppc/pnv.h"
> +#include "hw/ppc/pnv_chip.h"
> #include "hw/ppc/pnv_core.h"
> #include "hw/ppc/pnv_xscom.h"
> #include "hw/ppc/xics.h"
> diff --git a/hw/ppc/pnv_homer.c b/hw/ppc/pnv_homer.c
> index ea73919e54..f9a203d11d 100644
> --- a/hw/ppc/pnv_homer.c
> +++ b/hw/ppc/pnv_homer.c
> @@ -25,6 +25,7 @@
> #include "hw/qdev-core.h"
> #include "hw/qdev-properties.h"
> #include "hw/ppc/pnv.h"
> +#include "hw/ppc/pnv_chip.h"
> #include "hw/ppc/pnv_homer.h"
> #include "hw/ppc/pnv_xscom.h"
>
> diff --git a/hw/ppc/pnv_lpc.c b/hw/ppc/pnv_lpc.c
> index ee890e7ab4..71143b7692 100644
> --- a/hw/ppc/pnv_lpc.c
> +++ b/hw/ppc/pnv_lpc.c
> @@ -26,6 +26,7 @@
> #include "hw/isa/isa.h"
> #include "hw/qdev-properties.h"
> #include "hw/ppc/pnv.h"
> +#include "hw/ppc/pnv_chip.h"
> #include "hw/ppc/pnv_lpc.h"
> #include "hw/ppc/pnv_xscom.h"
> #include "hw/ppc/fdt.h"
> diff --git a/hw/ppc/pnv_xscom.c b/hw/ppc/pnv_xscom.c
> index 79f10de57f..d820e05e40 100644
> --- a/hw/ppc/pnv_xscom.c
> +++ b/hw/ppc/pnv_xscom.c
> @@ -26,6 +26,7 @@
>
> #include "hw/ppc/fdt.h"
> #include "hw/ppc/pnv.h"
> +#include "hw/ppc/pnv_chip.h"
> #include "hw/ppc/pnv_xscom.h"
>
> #include <libfdt.h>
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 2/4] include/hw/ppc: Supply a few missing includes
2022-12-10 11:21 [PATCH 0/4] hw/ppc: Clean up includes Markus Armbruster
2022-12-10 11:21 ` [PATCH 1/4] include/hw/ppc: Split pnv_chip.h off pnv.h Markus Armbruster
@ 2022-12-10 11:21 ` Markus Armbruster
2022-12-10 11:42 ` Cédric Le Goater
2022-12-10 11:21 ` [PATCH 3/4] include/hw/ppc: Don't include hw/pci-host/pnv_phb.h from pnv.h Markus Armbruster
` (2 subsequent siblings)
4 siblings, 1 reply; 12+ messages in thread
From: Markus Armbruster @ 2022-12-10 11:21 UTC (permalink / raw)
To: qemu-devel; +Cc: clg, qemu-ppc
A few headers neglect to include headers they need. They compile only
if something else includes the required header(s) first. Fix that.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
---
include/hw/ppc/pnv_lpc.h | 3 ++-
include/hw/ppc/pnv_occ.h | 3 ++-
include/hw/ppc/pnv_pnor.h | 2 +-
include/hw/ppc/pnv_sbe.h | 3 ++-
include/hw/ppc/pnv_xscom.h | 3 ++-
include/hw/ppc/xive2.h | 2 ++
include/hw/ppc/xive2_regs.h | 2 ++
7 files changed, 13 insertions(+), 5 deletions(-)
diff --git a/include/hw/ppc/pnv_lpc.h b/include/hw/ppc/pnv_lpc.h
index 8a8d1a3d42..001eee27d7 100644
--- a/include/hw/ppc/pnv_lpc.h
+++ b/include/hw/ppc/pnv_lpc.h
@@ -20,7 +20,8 @@
#ifndef PPC_PNV_LPC_H
#define PPC_PNV_LPC_H
-#include "qom/object.h"
+#include "exec/memory.h"
+#include "hw/qdev-core.h"
#define TYPE_PNV_LPC "pnv-lpc"
typedef struct PnvLpcClass PnvLpcClass;
diff --git a/include/hw/ppc/pnv_occ.h b/include/hw/ppc/pnv_occ.h
index 90a81dae2b..df321244e3 100644
--- a/include/hw/ppc/pnv_occ.h
+++ b/include/hw/ppc/pnv_occ.h
@@ -20,7 +20,8 @@
#ifndef PPC_PNV_OCC_H
#define PPC_PNV_OCC_H
-#include "qom/object.h"
+#include "exec/memory.h"
+#include "hw/qdev-core.h"
#define TYPE_PNV_OCC "pnv-occ"
OBJECT_DECLARE_TYPE(PnvOCC, PnvOCCClass,
diff --git a/include/hw/ppc/pnv_pnor.h b/include/hw/ppc/pnv_pnor.h
index bab2f79844..2e37ac88bf 100644
--- a/include/hw/ppc/pnv_pnor.h
+++ b/include/hw/ppc/pnv_pnor.h
@@ -10,7 +10,7 @@
#ifndef PPC_PNV_PNOR_H
#define PPC_PNV_PNOR_H
-#include "qom/object.h"
+#include "hw/sysbus.h"
/*
* PNOR offset on the LPC FW address space
diff --git a/include/hw/ppc/pnv_sbe.h b/include/hw/ppc/pnv_sbe.h
index f54a3ae9ba..b6b378ad14 100644
--- a/include/hw/ppc/pnv_sbe.h
+++ b/include/hw/ppc/pnv_sbe.h
@@ -20,7 +20,8 @@
#ifndef PPC_PNV_SBE_H
#define PPC_PNV_SBE_H
-#include "qom/object.h"
+#include "exec/memory.h"
+#include "hw/qdev-core.h"
#define TYPE_PNV_SBE "pnv-sbe"
OBJECT_DECLARE_TYPE(PnvSBE, PnvSBEClass, PNV_SBE)
diff --git a/include/hw/ppc/pnv_xscom.h b/include/hw/ppc/pnv_xscom.h
index c6e9ef8dd2..cbe848d27b 100644
--- a/include/hw/ppc/pnv_xscom.h
+++ b/include/hw/ppc/pnv_xscom.h
@@ -20,7 +20,8 @@
#ifndef PPC_PNV_XSCOM_H
#define PPC_PNV_XSCOM_H
-#include "qom/object.h"
+#include "exec/memory.h"
+#include "hw/ppc/pnv.h"
typedef struct PnvXScomInterface PnvXScomInterface;
diff --git a/include/hw/ppc/xive2.h b/include/hw/ppc/xive2.h
index e9e3ea135e..ab68f8d157 100644
--- a/include/hw/ppc/xive2.h
+++ b/include/hw/ppc/xive2.h
@@ -11,7 +11,9 @@
#ifndef PPC_XIVE2_H
#define PPC_XIVE2_H
+#include "hw/ppc/xive.h"
#include "hw/ppc/xive2_regs.h"
+#include "hw/sysbus.h"
/*
* XIVE2 Router (POWER10)
diff --git a/include/hw/ppc/xive2_regs.h b/include/hw/ppc/xive2_regs.h
index 14605bd458..b7adbdb7b9 100644
--- a/include/hw/ppc/xive2_regs.h
+++ b/include/hw/ppc/xive2_regs.h
@@ -10,6 +10,8 @@
#ifndef PPC_XIVE2_REGS_H
#define PPC_XIVE2_REGS_H
+#include "cpu.h"
+
/*
* Thread Interrupt Management Area (TIMA)
*
--
2.37.3
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH 2/4] include/hw/ppc: Supply a few missing includes
2022-12-10 11:21 ` [PATCH 2/4] include/hw/ppc: Supply a few missing includes Markus Armbruster
@ 2022-12-10 11:42 ` Cédric Le Goater
0 siblings, 0 replies; 12+ messages in thread
From: Cédric Le Goater @ 2022-12-10 11:42 UTC (permalink / raw)
To: Markus Armbruster, qemu-devel; +Cc: qemu-ppc
On 12/10/22 12:21, Markus Armbruster wrote:
> A few headers neglect to include headers they need. They compile only
> if something else includes the required header(s) first. Fix that.
>
> Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Thanks,
C.
> ---
> include/hw/ppc/pnv_lpc.h | 3 ++-
> include/hw/ppc/pnv_occ.h | 3 ++-
> include/hw/ppc/pnv_pnor.h | 2 +-
> include/hw/ppc/pnv_sbe.h | 3 ++-
> include/hw/ppc/pnv_xscom.h | 3 ++-
> include/hw/ppc/xive2.h | 2 ++
> include/hw/ppc/xive2_regs.h | 2 ++
> 7 files changed, 13 insertions(+), 5 deletions(-)
>
> diff --git a/include/hw/ppc/pnv_lpc.h b/include/hw/ppc/pnv_lpc.h
> index 8a8d1a3d42..001eee27d7 100644
> --- a/include/hw/ppc/pnv_lpc.h
> +++ b/include/hw/ppc/pnv_lpc.h
> @@ -20,7 +20,8 @@
> #ifndef PPC_PNV_LPC_H
> #define PPC_PNV_LPC_H
>
> -#include "qom/object.h"
> +#include "exec/memory.h"
> +#include "hw/qdev-core.h"
>
> #define TYPE_PNV_LPC "pnv-lpc"
> typedef struct PnvLpcClass PnvLpcClass;
> diff --git a/include/hw/ppc/pnv_occ.h b/include/hw/ppc/pnv_occ.h
> index 90a81dae2b..df321244e3 100644
> --- a/include/hw/ppc/pnv_occ.h
> +++ b/include/hw/ppc/pnv_occ.h
> @@ -20,7 +20,8 @@
> #ifndef PPC_PNV_OCC_H
> #define PPC_PNV_OCC_H
>
> -#include "qom/object.h"
> +#include "exec/memory.h"
> +#include "hw/qdev-core.h"
>
> #define TYPE_PNV_OCC "pnv-occ"
> OBJECT_DECLARE_TYPE(PnvOCC, PnvOCCClass,
> diff --git a/include/hw/ppc/pnv_pnor.h b/include/hw/ppc/pnv_pnor.h
> index bab2f79844..2e37ac88bf 100644
> --- a/include/hw/ppc/pnv_pnor.h
> +++ b/include/hw/ppc/pnv_pnor.h
> @@ -10,7 +10,7 @@
> #ifndef PPC_PNV_PNOR_H
> #define PPC_PNV_PNOR_H
>
> -#include "qom/object.h"
> +#include "hw/sysbus.h"
>
> /*
> * PNOR offset on the LPC FW address space
> diff --git a/include/hw/ppc/pnv_sbe.h b/include/hw/ppc/pnv_sbe.h
> index f54a3ae9ba..b6b378ad14 100644
> --- a/include/hw/ppc/pnv_sbe.h
> +++ b/include/hw/ppc/pnv_sbe.h
> @@ -20,7 +20,8 @@
> #ifndef PPC_PNV_SBE_H
> #define PPC_PNV_SBE_H
>
> -#include "qom/object.h"
> +#include "exec/memory.h"
> +#include "hw/qdev-core.h"
>
> #define TYPE_PNV_SBE "pnv-sbe"
> OBJECT_DECLARE_TYPE(PnvSBE, PnvSBEClass, PNV_SBE)
> diff --git a/include/hw/ppc/pnv_xscom.h b/include/hw/ppc/pnv_xscom.h
> index c6e9ef8dd2..cbe848d27b 100644
> --- a/include/hw/ppc/pnv_xscom.h
> +++ b/include/hw/ppc/pnv_xscom.h
> @@ -20,7 +20,8 @@
> #ifndef PPC_PNV_XSCOM_H
> #define PPC_PNV_XSCOM_H
>
> -#include "qom/object.h"
> +#include "exec/memory.h"
> +#include "hw/ppc/pnv.h"
>
> typedef struct PnvXScomInterface PnvXScomInterface;
>
> diff --git a/include/hw/ppc/xive2.h b/include/hw/ppc/xive2.h
> index e9e3ea135e..ab68f8d157 100644
> --- a/include/hw/ppc/xive2.h
> +++ b/include/hw/ppc/xive2.h
> @@ -11,7 +11,9 @@
> #ifndef PPC_XIVE2_H
> #define PPC_XIVE2_H
>
> +#include "hw/ppc/xive.h"
> #include "hw/ppc/xive2_regs.h"
> +#include "hw/sysbus.h"
>
> /*
> * XIVE2 Router (POWER10)
> diff --git a/include/hw/ppc/xive2_regs.h b/include/hw/ppc/xive2_regs.h
> index 14605bd458..b7adbdb7b9 100644
> --- a/include/hw/ppc/xive2_regs.h
> +++ b/include/hw/ppc/xive2_regs.h
> @@ -10,6 +10,8 @@
> #ifndef PPC_XIVE2_REGS_H
> #define PPC_XIVE2_REGS_H
>
> +#include "cpu.h"
> +
> /*
> * Thread Interrupt Management Area (TIMA)
> *
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 3/4] include/hw/ppc: Don't include hw/pci-host/pnv_phb.h from pnv.h
2022-12-10 11:21 [PATCH 0/4] hw/ppc: Clean up includes Markus Armbruster
2022-12-10 11:21 ` [PATCH 1/4] include/hw/ppc: Split pnv_chip.h off pnv.h Markus Armbruster
2022-12-10 11:21 ` [PATCH 2/4] include/hw/ppc: Supply a few missing includes Markus Armbruster
@ 2022-12-10 11:21 ` Markus Armbruster
2022-12-11 7:54 ` Cédric Le Goater
2022-12-10 11:21 ` [PATCH 4/4] include/hw/ppc include/hw/pci-host: Drop extra typedefs Markus Armbruster
2022-12-16 18:47 ` [PATCH 0/4] hw/ppc: Clean up includes Daniel Henrique Barboza
4 siblings, 1 reply; 12+ messages in thread
From: Markus Armbruster @ 2022-12-10 11:21 UTC (permalink / raw)
To: qemu-devel; +Cc: clg, qemu-ppc
The next commit needs to include hw/ppc/pnv.h from
hw/pci-host/pnv_phb.h. Avoid an inclusion loop.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
---
hw/pci-host/pnv_phb.h | 1 +
include/hw/pci-host/pnv_phb4.h | 3 ++-
include/hw/ppc/pnv.h | 3 ++-
hw/ppc/pnv_psi.c | 1 +
4 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/hw/pci-host/pnv_phb.h b/hw/pci-host/pnv_phb.h
index 58ebd6dd0f..202de8796c 100644
--- a/hw/pci-host/pnv_phb.h
+++ b/hw/pci-host/pnv_phb.h
@@ -12,6 +12,7 @@
#include "hw/pci/pcie_host.h"
#include "hw/pci/pcie_port.h"
+#include "hw/ppc/pnv.h"
#include "qom/object.h"
typedef struct PnvChip PnvChip;
diff --git a/include/hw/pci-host/pnv_phb4.h b/include/hw/pci-host/pnv_phb4.h
index d9cea3f952..b4f2b29fb5 100644
--- a/include/hw/pci-host/pnv_phb4.h
+++ b/include/hw/pci-host/pnv_phb4.h
@@ -10,14 +10,15 @@
#ifndef PCI_HOST_PNV_PHB4_H
#define PCI_HOST_PNV_PHB4_H
+#include "hw/pci-host/pnv_phb.h"
#include "hw/pci/pci_bus.h"
+#include "hw/ppc/pnv.h"
#include "hw/ppc/xive.h"
#include "qom/object.h"
typedef struct PnvPhb4PecState PnvPhb4PecState;
typedef struct PnvPhb4PecStack PnvPhb4PecStack;
typedef struct PnvPHB4 PnvPHB4;
-typedef struct PnvPHB PnvPHB;
typedef struct PnvChip PnvChip;
/*
diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
index ca49e4281d..96fb850419 100644
--- a/include/hw/ppc/pnv.h
+++ b/include/hw/ppc/pnv.h
@@ -25,7 +25,6 @@
#include "hw/sysbus.h"
#include "hw/ipmi/ipmi.h"
#include "hw/ppc/pnv_pnor.h"
-#include "hw/pci-host/pnv_phb.h"
#define TYPE_PNV_CHIP "pnv-chip"
@@ -59,6 +58,8 @@ DECLARE_INSTANCE_CHECKER(PnvChip, PNV_CHIP_POWER10,
PowerPCCPU *pnv_chip_find_cpu(PnvChip *chip, uint32_t pir);
+typedef struct PnvPHB PnvPHB;
+
#define TYPE_PNV_MACHINE MACHINE_TYPE_NAME("powernv")
typedef struct PnvMachineClass PnvMachineClass;
typedef struct PnvMachineState PnvMachineState;
diff --git a/hw/ppc/pnv_psi.c b/hw/ppc/pnv_psi.c
index 98045ed3d2..8aa09ab26b 100644
--- a/hw/ppc/pnv_psi.c
+++ b/hw/ppc/pnv_psi.c
@@ -18,6 +18,7 @@
*/
#include "qemu/osdep.h"
+#include "exec/address-spaces.h"
#include "hw/irq.h"
#include "target/ppc/cpu.h"
#include "qemu/log.h"
--
2.37.3
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH 3/4] include/hw/ppc: Don't include hw/pci-host/pnv_phb.h from pnv.h
2022-12-10 11:21 ` [PATCH 3/4] include/hw/ppc: Don't include hw/pci-host/pnv_phb.h from pnv.h Markus Armbruster
@ 2022-12-11 7:54 ` Cédric Le Goater
2022-12-12 7:28 ` Markus Armbruster
0 siblings, 1 reply; 12+ messages in thread
From: Cédric Le Goater @ 2022-12-11 7:54 UTC (permalink / raw)
To: Markus Armbruster, qemu-devel; +Cc: qemu-ppc
On 12/10/22 12:21, Markus Armbruster wrote:
> The next commit needs to include hw/ppc/pnv.h from
> hw/pci-host/pnv_phb.h. Avoid an inclusion loop.
>
> Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Thanks,
C.
(one comment below)
> ---
> hw/pci-host/pnv_phb.h | 1 +
> include/hw/pci-host/pnv_phb4.h | 3 ++-
> include/hw/ppc/pnv.h | 3 ++-
> hw/ppc/pnv_psi.c | 1 +
> 4 files changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/hw/pci-host/pnv_phb.h b/hw/pci-host/pnv_phb.h
> index 58ebd6dd0f..202de8796c 100644
> --- a/hw/pci-host/pnv_phb.h
> +++ b/hw/pci-host/pnv_phb.h
> @@ -12,6 +12,7 @@
>
> #include "hw/pci/pcie_host.h"
> #include "hw/pci/pcie_port.h"
> +#include "hw/ppc/pnv.h"
Now that the chip definitions have been extrated in pnv_chip.h, I find
it curious that we need to include pnv.h since it should only contain
machine definitions. No big deal, I will take a look later. You did
the hard part and thanks for that.
> #include "qom/object.h"
>
> typedef struct PnvChip PnvChip;
> diff --git a/include/hw/pci-host/pnv_phb4.h b/include/hw/pci-host/pnv_phb4.h
> index d9cea3f952..b4f2b29fb5 100644
> --- a/include/hw/pci-host/pnv_phb4.h
> +++ b/include/hw/pci-host/pnv_phb4.h
> @@ -10,14 +10,15 @@
> #ifndef PCI_HOST_PNV_PHB4_H
> #define PCI_HOST_PNV_PHB4_H
>
> +#include "hw/pci-host/pnv_phb.h"
> #include "hw/pci/pci_bus.h"
> +#include "hw/ppc/pnv.h"
> #include "hw/ppc/xive.h"
> #include "qom/object.h"
>
> typedef struct PnvPhb4PecState PnvPhb4PecState;
> typedef struct PnvPhb4PecStack PnvPhb4PecStack;
> typedef struct PnvPHB4 PnvPHB4;
> -typedef struct PnvPHB PnvPHB;
> typedef struct PnvChip PnvChip;
>
> /*
> diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
> index ca49e4281d..96fb850419 100644
> --- a/include/hw/ppc/pnv.h
> +++ b/include/hw/ppc/pnv.h
> @@ -25,7 +25,6 @@
> #include "hw/sysbus.h"
> #include "hw/ipmi/ipmi.h"
> #include "hw/ppc/pnv_pnor.h"
> -#include "hw/pci-host/pnv_phb.h"
>
> #define TYPE_PNV_CHIP "pnv-chip"
>
> @@ -59,6 +58,8 @@ DECLARE_INSTANCE_CHECKER(PnvChip, PNV_CHIP_POWER10,
>
> PowerPCCPU *pnv_chip_find_cpu(PnvChip *chip, uint32_t pir);
>
> +typedef struct PnvPHB PnvPHB;
> +
> #define TYPE_PNV_MACHINE MACHINE_TYPE_NAME("powernv")
> typedef struct PnvMachineClass PnvMachineClass;
> typedef struct PnvMachineState PnvMachineState;
> diff --git a/hw/ppc/pnv_psi.c b/hw/ppc/pnv_psi.c
> index 98045ed3d2..8aa09ab26b 100644
> --- a/hw/ppc/pnv_psi.c
> +++ b/hw/ppc/pnv_psi.c
> @@ -18,6 +18,7 @@
> */
>
> #include "qemu/osdep.h"
> +#include "exec/address-spaces.h"
> #include "hw/irq.h"
> #include "target/ppc/cpu.h"
> #include "qemu/log.h"
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH 3/4] include/hw/ppc: Don't include hw/pci-host/pnv_phb.h from pnv.h
2022-12-11 7:54 ` Cédric Le Goater
@ 2022-12-12 7:28 ` Markus Armbruster
0 siblings, 0 replies; 12+ messages in thread
From: Markus Armbruster @ 2022-12-12 7:28 UTC (permalink / raw)
To: Cédric Le Goater; +Cc: qemu-devel, qemu-ppc
Cédric Le Goater <clg@kaod.org> writes:
> On 12/10/22 12:21, Markus Armbruster wrote:
>> The next commit needs to include hw/ppc/pnv.h from
>> hw/pci-host/pnv_phb.h. Avoid an inclusion loop.
>> Signed-off-by: Markus Armbruster <armbru@redhat.com>
>
>
> Reviewed-by: Cédric Le Goater <clg@kaod.org>
>
> Thanks,
>
> C.
>
> (one comment below)
>
>> ---
>> hw/pci-host/pnv_phb.h | 1 +
>> include/hw/pci-host/pnv_phb4.h | 3 ++-
>> include/hw/ppc/pnv.h | 3 ++-
>> hw/ppc/pnv_psi.c | 1 +
>> 4 files changed, 6 insertions(+), 2 deletions(-)
>> diff --git a/hw/pci-host/pnv_phb.h b/hw/pci-host/pnv_phb.h
>> index 58ebd6dd0f..202de8796c 100644
>> --- a/hw/pci-host/pnv_phb.h
>> +++ b/hw/pci-host/pnv_phb.h
>> @@ -12,6 +12,7 @@
>> #include "hw/pci/pcie_host.h"
>> #include "hw/pci/pcie_port.h"
>> +#include "hw/ppc/pnv.h"
>
> Now that the chip definitions have been extrated in pnv_chip.h, I find
> it curious that we need to include pnv.h since it should only contain
> machine definitions. No big deal, I will take a look later. You did
> the hard part and thanks for that.
I checked again, and it looks like an accident. I figure I put it
there, then improved an earlier patch, which made it unneccessary. I'll
take it out. Thanks!
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 4/4] include/hw/ppc include/hw/pci-host: Drop extra typedefs
2022-12-10 11:21 [PATCH 0/4] hw/ppc: Clean up includes Markus Armbruster
` (2 preceding siblings ...)
2022-12-10 11:21 ` [PATCH 3/4] include/hw/ppc: Don't include hw/pci-host/pnv_phb.h from pnv.h Markus Armbruster
@ 2022-12-10 11:21 ` Markus Armbruster
2022-12-10 12:47 ` Philippe Mathieu-Daudé
2022-12-11 7:55 ` Cédric Le Goater
2022-12-16 18:47 ` [PATCH 0/4] hw/ppc: Clean up includes Daniel Henrique Barboza
4 siblings, 2 replies; 12+ messages in thread
From: Markus Armbruster @ 2022-12-10 11:21 UTC (permalink / raw)
To: qemu-devel; +Cc: clg, qemu-ppc
PnvChip is typedef'ed in five places, and PnvPhb4PecState in two.
Keep one, drop the others.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
---
hw/pci-host/pnv_phb.h | 1 -
include/hw/pci-host/pnv_phb3.h | 1 -
include/hw/pci-host/pnv_phb4.h | 2 --
include/hw/ppc/pnv_core.h | 3 +--
include/hw/ppc/pnv_homer.h | 2 +-
include/hw/ppc/pnv_lpc.h | 8 ++------
include/hw/ppc/pnv_xive.h | 7 +++----
7 files changed, 7 insertions(+), 17 deletions(-)
diff --git a/hw/pci-host/pnv_phb.h b/hw/pci-host/pnv_phb.h
index 202de8796c..eb429d529f 100644
--- a/hw/pci-host/pnv_phb.h
+++ b/hw/pci-host/pnv_phb.h
@@ -15,7 +15,6 @@
#include "hw/ppc/pnv.h"
#include "qom/object.h"
-typedef struct PnvChip PnvChip;
typedef struct PnvPhb4PecState PnvPhb4PecState;
struct PnvPHB {
diff --git a/include/hw/pci-host/pnv_phb3.h b/include/hw/pci-host/pnv_phb3.h
index f791ebda9b..d62b3091ac 100644
--- a/include/hw/pci-host/pnv_phb3.h
+++ b/include/hw/pci-host/pnv_phb3.h
@@ -15,7 +15,6 @@
#include "hw/pci-host/pnv_phb.h"
typedef struct PnvPHB3 PnvPHB3;
-typedef struct PnvChip PnvChip;
/*
* PHB3 XICS Source for MSIs
diff --git a/include/hw/pci-host/pnv_phb4.h b/include/hw/pci-host/pnv_phb4.h
index b4f2b29fb5..1f3237c9d5 100644
--- a/include/hw/pci-host/pnv_phb4.h
+++ b/include/hw/pci-host/pnv_phb4.h
@@ -16,10 +16,8 @@
#include "hw/ppc/xive.h"
#include "qom/object.h"
-typedef struct PnvPhb4PecState PnvPhb4PecState;
typedef struct PnvPhb4PecStack PnvPhb4PecStack;
typedef struct PnvPHB4 PnvPHB4;
-typedef struct PnvChip PnvChip;
/*
* We have one such address space wrapper per possible device under
diff --git a/include/hw/ppc/pnv_core.h b/include/hw/ppc/pnv_core.h
index c22eab2e1f..3d75706e95 100644
--- a/include/hw/ppc/pnv_core.h
+++ b/include/hw/ppc/pnv_core.h
@@ -22,14 +22,13 @@
#include "hw/cpu/core.h"
#include "target/ppc/cpu.h"
+#include "hw/ppc/pnv.h"
#include "qom/object.h"
#define TYPE_PNV_CORE "powernv-cpu-core"
OBJECT_DECLARE_TYPE(PnvCore, PnvCoreClass,
PNV_CORE)
-typedef struct PnvChip PnvChip;
-
struct PnvCore {
/*< private >*/
CPUCore parent_obj;
diff --git a/include/hw/ppc/pnv_homer.h b/include/hw/ppc/pnv_homer.h
index 07e8b19311..b1c5d498dc 100644
--- a/include/hw/ppc/pnv_homer.h
+++ b/include/hw/ppc/pnv_homer.h
@@ -39,7 +39,7 @@ DECLARE_INSTANCE_CHECKER(PnvHomer, PNV10_HOMER,
struct PnvHomer {
DeviceState parent;
- struct PnvChip *chip;
+ PnvChip *chip;
MemoryRegion pba_regs;
MemoryRegion regs;
};
diff --git a/include/hw/ppc/pnv_lpc.h b/include/hw/ppc/pnv_lpc.h
index 001eee27d7..5d22c45570 100644
--- a/include/hw/ppc/pnv_lpc.h
+++ b/include/hw/ppc/pnv_lpc.h
@@ -21,6 +21,7 @@
#define PPC_PNV_LPC_H
#include "exec/memory.h"
+#include "hw/ppc/pnv.h"
#include "hw/qdev-core.h"
#define TYPE_PNV_LPC "pnv-lpc"
@@ -93,13 +94,8 @@ struct PnvLpcClass {
DeviceRealize parent_realize;
};
-/*
- * Old compilers error on typdef forward declarations. Keep them happy.
- */
-struct PnvChip;
-
ISABus *pnv_lpc_isa_create(PnvLpcController *lpc, bool use_cpld, Error **errp);
-int pnv_dt_lpc(struct PnvChip *chip, void *fdt, int root_offset,
+int pnv_dt_lpc(PnvChip *chip, void *fdt, int root_offset,
uint64_t lpcm_addr, uint64_t lpcm_size);
#endif /* PPC_PNV_LPC_H */
diff --git a/include/hw/ppc/pnv_xive.h b/include/hw/ppc/pnv_xive.h
index b5d91505e5..9c48430ee4 100644
--- a/include/hw/ppc/pnv_xive.h
+++ b/include/hw/ppc/pnv_xive.h
@@ -10,12 +10,11 @@
#ifndef PPC_PNV_XIVE_H
#define PPC_PNV_XIVE_H
+#include "hw/ppc/pnv.h"
#include "hw/ppc/xive.h"
#include "qom/object.h"
#include "hw/ppc/xive2.h"
-struct PnvChip;
-
#define TYPE_PNV_XIVE "pnv-xive"
OBJECT_DECLARE_TYPE(PnvXive, PnvXiveClass,
PNV_XIVE)
@@ -31,7 +30,7 @@ struct PnvXive {
XiveRouter parent_obj;
/* Owning chip */
- struct PnvChip *chip;
+ PnvChip *chip;
/* XSCOM addresses giving access to the controller registers */
MemoryRegion xscom_regs;
@@ -106,7 +105,7 @@ typedef struct PnvXive2 {
Xive2Router parent_obj;
/* Owning chip */
- struct PnvChip *chip;
+ PnvChip *chip;
/* XSCOM addresses giving access to the controller registers */
MemoryRegion xscom_regs;
--
2.37.3
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH 4/4] include/hw/ppc include/hw/pci-host: Drop extra typedefs
2022-12-10 11:21 ` [PATCH 4/4] include/hw/ppc include/hw/pci-host: Drop extra typedefs Markus Armbruster
@ 2022-12-10 12:47 ` Philippe Mathieu-Daudé
2022-12-11 7:55 ` Cédric Le Goater
1 sibling, 0 replies; 12+ messages in thread
From: Philippe Mathieu-Daudé @ 2022-12-10 12:47 UTC (permalink / raw)
To: Markus Armbruster, qemu-devel; +Cc: clg, qemu-ppc
On 10/12/22 12:21, Markus Armbruster wrote:
> PnvChip is typedef'ed in five places, and PnvPhb4PecState in two.
> Keep one, drop the others.
>
> Signed-off-by: Markus Armbruster <armbru@redhat.com>
> ---
> hw/pci-host/pnv_phb.h | 1 -
> include/hw/pci-host/pnv_phb3.h | 1 -
> include/hw/pci-host/pnv_phb4.h | 2 --
> include/hw/ppc/pnv_core.h | 3 +--
> include/hw/ppc/pnv_homer.h | 2 +-
> include/hw/ppc/pnv_lpc.h | 8 ++------
> include/hw/ppc/pnv_xive.h | 7 +++----
> 7 files changed, 7 insertions(+), 17 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 4/4] include/hw/ppc include/hw/pci-host: Drop extra typedefs
2022-12-10 11:21 ` [PATCH 4/4] include/hw/ppc include/hw/pci-host: Drop extra typedefs Markus Armbruster
2022-12-10 12:47 ` Philippe Mathieu-Daudé
@ 2022-12-11 7:55 ` Cédric Le Goater
1 sibling, 0 replies; 12+ messages in thread
From: Cédric Le Goater @ 2022-12-11 7:55 UTC (permalink / raw)
To: Markus Armbruster, qemu-devel; +Cc: qemu-ppc
On 12/10/22 12:21, Markus Armbruster wrote:
> PnvChip is typedef'ed in five places, and PnvPhb4PecState in two.
> Keep one, drop the others.
>
> Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Thanks,
C.
> ---
> hw/pci-host/pnv_phb.h | 1 -
> include/hw/pci-host/pnv_phb3.h | 1 -
> include/hw/pci-host/pnv_phb4.h | 2 --
> include/hw/ppc/pnv_core.h | 3 +--
> include/hw/ppc/pnv_homer.h | 2 +-
> include/hw/ppc/pnv_lpc.h | 8 ++------
> include/hw/ppc/pnv_xive.h | 7 +++----
> 7 files changed, 7 insertions(+), 17 deletions(-)
>
> diff --git a/hw/pci-host/pnv_phb.h b/hw/pci-host/pnv_phb.h
> index 202de8796c..eb429d529f 100644
> --- a/hw/pci-host/pnv_phb.h
> +++ b/hw/pci-host/pnv_phb.h
> @@ -15,7 +15,6 @@
> #include "hw/ppc/pnv.h"
> #include "qom/object.h"
>
> -typedef struct PnvChip PnvChip;
> typedef struct PnvPhb4PecState PnvPhb4PecState;
>
> struct PnvPHB {
> diff --git a/include/hw/pci-host/pnv_phb3.h b/include/hw/pci-host/pnv_phb3.h
> index f791ebda9b..d62b3091ac 100644
> --- a/include/hw/pci-host/pnv_phb3.h
> +++ b/include/hw/pci-host/pnv_phb3.h
> @@ -15,7 +15,6 @@
> #include "hw/pci-host/pnv_phb.h"
>
> typedef struct PnvPHB3 PnvPHB3;
> -typedef struct PnvChip PnvChip;
>
> /*
> * PHB3 XICS Source for MSIs
> diff --git a/include/hw/pci-host/pnv_phb4.h b/include/hw/pci-host/pnv_phb4.h
> index b4f2b29fb5..1f3237c9d5 100644
> --- a/include/hw/pci-host/pnv_phb4.h
> +++ b/include/hw/pci-host/pnv_phb4.h
> @@ -16,10 +16,8 @@
> #include "hw/ppc/xive.h"
> #include "qom/object.h"
>
> -typedef struct PnvPhb4PecState PnvPhb4PecState;
> typedef struct PnvPhb4PecStack PnvPhb4PecStack;
> typedef struct PnvPHB4 PnvPHB4;
> -typedef struct PnvChip PnvChip;
>
> /*
> * We have one such address space wrapper per possible device under
> diff --git a/include/hw/ppc/pnv_core.h b/include/hw/ppc/pnv_core.h
> index c22eab2e1f..3d75706e95 100644
> --- a/include/hw/ppc/pnv_core.h
> +++ b/include/hw/ppc/pnv_core.h
> @@ -22,14 +22,13 @@
>
> #include "hw/cpu/core.h"
> #include "target/ppc/cpu.h"
> +#include "hw/ppc/pnv.h"
> #include "qom/object.h"
>
> #define TYPE_PNV_CORE "powernv-cpu-core"
> OBJECT_DECLARE_TYPE(PnvCore, PnvCoreClass,
> PNV_CORE)
>
> -typedef struct PnvChip PnvChip;
> -
> struct PnvCore {
> /*< private >*/
> CPUCore parent_obj;
> diff --git a/include/hw/ppc/pnv_homer.h b/include/hw/ppc/pnv_homer.h
> index 07e8b19311..b1c5d498dc 100644
> --- a/include/hw/ppc/pnv_homer.h
> +++ b/include/hw/ppc/pnv_homer.h
> @@ -39,7 +39,7 @@ DECLARE_INSTANCE_CHECKER(PnvHomer, PNV10_HOMER,
> struct PnvHomer {
> DeviceState parent;
>
> - struct PnvChip *chip;
> + PnvChip *chip;
> MemoryRegion pba_regs;
> MemoryRegion regs;
> };
> diff --git a/include/hw/ppc/pnv_lpc.h b/include/hw/ppc/pnv_lpc.h
> index 001eee27d7..5d22c45570 100644
> --- a/include/hw/ppc/pnv_lpc.h
> +++ b/include/hw/ppc/pnv_lpc.h
> @@ -21,6 +21,7 @@
> #define PPC_PNV_LPC_H
>
> #include "exec/memory.h"
> +#include "hw/ppc/pnv.h"
> #include "hw/qdev-core.h"
>
> #define TYPE_PNV_LPC "pnv-lpc"
> @@ -93,13 +94,8 @@ struct PnvLpcClass {
> DeviceRealize parent_realize;
> };
>
> -/*
> - * Old compilers error on typdef forward declarations. Keep them happy.
> - */
> -struct PnvChip;
> -
> ISABus *pnv_lpc_isa_create(PnvLpcController *lpc, bool use_cpld, Error **errp);
> -int pnv_dt_lpc(struct PnvChip *chip, void *fdt, int root_offset,
> +int pnv_dt_lpc(PnvChip *chip, void *fdt, int root_offset,
> uint64_t lpcm_addr, uint64_t lpcm_size);
>
> #endif /* PPC_PNV_LPC_H */
> diff --git a/include/hw/ppc/pnv_xive.h b/include/hw/ppc/pnv_xive.h
> index b5d91505e5..9c48430ee4 100644
> --- a/include/hw/ppc/pnv_xive.h
> +++ b/include/hw/ppc/pnv_xive.h
> @@ -10,12 +10,11 @@
> #ifndef PPC_PNV_XIVE_H
> #define PPC_PNV_XIVE_H
>
> +#include "hw/ppc/pnv.h"
> #include "hw/ppc/xive.h"
> #include "qom/object.h"
> #include "hw/ppc/xive2.h"
>
> -struct PnvChip;
> -
> #define TYPE_PNV_XIVE "pnv-xive"
> OBJECT_DECLARE_TYPE(PnvXive, PnvXiveClass,
> PNV_XIVE)
> @@ -31,7 +30,7 @@ struct PnvXive {
> XiveRouter parent_obj;
>
> /* Owning chip */
> - struct PnvChip *chip;
> + PnvChip *chip;
>
> /* XSCOM addresses giving access to the controller registers */
> MemoryRegion xscom_regs;
> @@ -106,7 +105,7 @@ typedef struct PnvXive2 {
> Xive2Router parent_obj;
>
> /* Owning chip */
> - struct PnvChip *chip;
> + PnvChip *chip;
>
> /* XSCOM addresses giving access to the controller registers */
> MemoryRegion xscom_regs;
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 0/4] hw/ppc: Clean up includes
2022-12-10 11:21 [PATCH 0/4] hw/ppc: Clean up includes Markus Armbruster
` (3 preceding siblings ...)
2022-12-10 11:21 ` [PATCH 4/4] include/hw/ppc include/hw/pci-host: Drop extra typedefs Markus Armbruster
@ 2022-12-16 18:47 ` Daniel Henrique Barboza
4 siblings, 0 replies; 12+ messages in thread
From: Daniel Henrique Barboza @ 2022-12-16 18:47 UTC (permalink / raw)
To: Markus Armbruster, qemu-devel; +Cc: clg, qemu-ppc
On 12/10/22 08:21, Markus Armbruster wrote:
> Back in 2016, we discussed[1] rules for headers, and these were
> generally liked:
>
> 1. Have a carefully curated header that's included everywhere first. We
> got that already thanks to Peter: osdep.h.
>
> 2. Headers should normally include everything they need beyond osdep.h.
> If exceptions are needed for some reason, they must be documented in
> the header. If all that's needed from a header is typedefs, put
> those into qemu/typedefs.h instead of including the header.
>
> 3. Cyclic inclusion is forbidden.
>
> After this series, include/hw/ppc and include/hw/pci-host/pnv* conform
> to these rules.
>
> It is based on
>
> [PATCH 0/5] include/hw/pci include/hw/cxl: Clean up includes
> [PATCH 0/3] block: Clean up includes
> [PATCH 0/4] coroutine: Clean up includes
>
> [1] Message-ID: <87h9g8j57d.fsf@blackfin.pond.sub.org>
> https://lists.nongnu.org/archive/html/qemu-devel/2016-03/msg03345.html
>
> Based-on: <20221209134802.3642942-1-armbru@redhat.com>
>
> Markus Armbruster (4):
> include/hw/ppc: Split pnv_chip.h off pnv.h
> include/hw/ppc: Supply a few missing includes
> include/hw/ppc: Don't include hw/pci-host/pnv_phb.h from pnv.h
> include/hw/ppc include/hw/pci-host: Drop extra typedefs
Series:
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
I see this is based on "[PATCH 0/5] include/hw/pci include/hw/cxl: Clean
up includes". Feel free to queue this up in the same queue.
Thanks,
Daniel
>
> hw/pci-host/pnv_phb.h | 2 +-
> include/hw/pci-host/pnv_phb3.h | 1 -
> include/hw/pci-host/pnv_phb4.h | 5 +-
> include/hw/ppc/pnv.h | 146 +-------------------------------
> include/hw/ppc/pnv_chip.h | 147 +++++++++++++++++++++++++++++++++
> include/hw/ppc/pnv_core.h | 3 +-
> include/hw/ppc/pnv_homer.h | 2 +-
> include/hw/ppc/pnv_lpc.h | 11 +--
> include/hw/ppc/pnv_occ.h | 3 +-
> include/hw/ppc/pnv_pnor.h | 2 +-
> include/hw/ppc/pnv_sbe.h | 3 +-
> include/hw/ppc/pnv_xive.h | 7 +-
> include/hw/ppc/pnv_xscom.h | 3 +-
> include/hw/ppc/xive2.h | 2 +
> include/hw/ppc/xive2_regs.h | 2 +
> hw/intc/pnv_xive.c | 1 +
> hw/intc/pnv_xive2.c | 1 +
> hw/pci-host/pnv_phb3.c | 1 +
> hw/pci-host/pnv_phb4_pec.c | 1 +
> hw/ppc/pnv.c | 3 +
> hw/ppc/pnv_core.c | 1 +
> hw/ppc/pnv_homer.c | 1 +
> hw/ppc/pnv_lpc.c | 1 +
> hw/ppc/pnv_psi.c | 1 +
> hw/ppc/pnv_xscom.c | 1 +
> 25 files changed, 186 insertions(+), 165 deletions(-)
> create mode 100644 include/hw/ppc/pnv_chip.h
>
^ permalink raw reply [flat|nested] 12+ messages in thread