From: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
To: Paul Mackerras <paulus@samba.org>
Cc: linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH -V3 09/11] arch/powerpc: Use 50 bits of VSID in slbmte
Date: Mon, 23 Jul 2012 13:51:49 +0530 [thread overview]
Message-ID: <87394ij3aa.fsf@skywalker.in.ibm.com> (raw)
In-Reply-To: <20120723000658.GH17790@bloggs.ozlabs.ibm.com>
Paul Mackerras <paulus@samba.org> writes:
> On Mon, Jul 09, 2012 at 06:43:39PM +0530, Aneesh Kumar K.V wrote:
>> From: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
>>
>> Increase the number of valid VSID bits in slbmte instruction.
>> We will use the new bits when we increase valid VSID bits.
>>
>> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
>> ---
>> arch/powerpc/mm/slb_low.S | 4 ++--
>> 1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/powerpc/mm/slb_low.S b/arch/powerpc/mm/slb_low.S
>> index c355af6..c1fc81c 100644
>> --- a/arch/powerpc/mm/slb_low.S
>> +++ b/arch/powerpc/mm/slb_low.S
>> @@ -226,7 +226,7 @@ _GLOBAL(slb_allocate_user)
>> */
>> slb_finish_load:
>> ASM_VSID_SCRAMBLE(r10,r9,256M)
>> - rldimi r11,r10,SLB_VSID_SHIFT,16 /* combine VSID and flags */
>> + rldimi r11,r10,SLB_VSID_SHIFT,2 /* combine VSID and flags */
>
> You can't do that without either changing ASM_VSID_SCRAMBLE or masking
> the VSID it generates to 36 bits, since the logic in ASM_VSID_SCRAMBLE
> can leave non-zero bits in the high 28 bits of the result. Similarly
> for the 1T case.
>
How about change ASM_VSID_SCRAMBLE to clear the high bits ? That would
also make it close to vsid_scramble()
diff --git a/arch/powerpc/include/asm/mmu-hash64.h b/arch/powerpc/include/asm/mmu-hash64.h
index d24d484..173bb34 100644
--- a/arch/powerpc/include/asm/mmu-hash64.h
+++ b/arch/powerpc/include/asm/mmu-hash64.h
@@ -420,7 +420,8 @@ extern void slb_set_size(u16 size);
* cases the answer is the low 36 bits of (r3 + ((r3+1) >> 36))*/\
addi rx,rt,1; \
srdi rx,rx,VSID_BITS_##size; /* extract 2^VSID_BITS bit */ \
- add rt,rt,rx
+ add rt,rt,rx; \
+ clrldi rt,rt,(64 - VSID_BITS_##size);
/* 4 bits per slice and we have one slice per 1TB */
#if 0 /* We can't directly include pgtable.h hence this hack */
next prev parent reply other threads:[~2012-07-23 8:21 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-07-09 13:13 [PATCH -V3 0/11] arch/powerpc: Add 64TB support to ppc64 Aneesh Kumar K.V
2012-07-09 13:13 ` [PATCH -V3 01/11] arch/powerpc: Use hpt_va to compute virtual address Aneesh Kumar K.V
2012-07-22 23:17 ` Paul Mackerras
2012-07-09 13:13 ` [PATCH -V3 02/11] arch/powerpc: Simplify hpte_decode Aneesh Kumar K.V
2012-07-22 23:26 ` Paul Mackerras
2012-07-23 5:41 ` Aneesh Kumar K.V
2012-07-09 13:13 ` [PATCH -V3 03/11] arch/powerpc: Convert virtual address to vpn Aneesh Kumar K.V
2012-07-09 22:41 ` Stephen Rothwell
2012-07-10 6:12 ` Aneesh Kumar K.V
2012-07-09 23:06 ` Stephen Rothwell
2012-07-10 6:15 ` Aneesh Kumar K.V
2012-07-22 23:42 ` Paul Mackerras
2012-07-23 5:54 ` Aneesh Kumar K.V
2012-07-09 13:13 ` [PATCH -V3 04/11] arch/powerpc: Rename va " Aneesh Kumar K.V
2012-07-22 23:46 ` Paul Mackerras
2012-07-23 6:14 ` Aneesh Kumar K.V
2012-07-09 13:13 ` [PATCH -V3 05/11] arch/powerpc: remove masking top 16 bit of va in tlb invalidate Aneesh Kumar K.V
2012-07-22 23:56 ` Paul Mackerras
2012-07-23 1:22 ` Benjamin Herrenschmidt
2012-07-23 3:49 ` Paul Mackerras
2012-07-23 6:44 ` Aneesh Kumar K.V
2012-07-23 6:48 ` Benjamin Herrenschmidt
2012-07-09 13:13 ` [PATCH -V3 06/11] arch/powerpc: Make KERN_VIRT_SIZE not dependend on PGTABLE_RANGE Aneesh Kumar K.V
2012-07-22 23:57 ` Paul Mackerras
2012-07-09 13:13 ` [PATCH -V3 07/11] arch/powerpc: Increase the slice range to 64TB Aneesh Kumar K.V
2012-07-23 0:00 ` Paul Mackerras
2012-07-23 7:13 ` Aneesh Kumar K.V
2012-07-09 13:13 ` [PATCH -V3 08/11] arch/powerpc: Make some of the PGTABLE_RANGE dependency explicit Aneesh Kumar K.V
2012-07-23 0:20 ` Paul Mackerras
2012-07-23 7:29 ` Aneesh Kumar K.V
2012-07-09 13:13 ` [PATCH -V3 09/11] arch/powerpc: Use 50 bits of VSID in slbmte Aneesh Kumar K.V
2012-07-23 0:06 ` Paul Mackerras
2012-07-23 8:21 ` Aneesh Kumar K.V [this message]
2012-07-23 9:36 ` Paul Mackerras
2012-07-23 10:22 ` Aneesh Kumar K.V
2012-07-09 13:13 ` [PATCH -V3 10/11] arch/powerpc: Use 32bit array for slb cache Aneesh Kumar K.V
2012-07-23 0:27 ` Paul Mackerras
2012-07-23 8:25 ` Aneesh Kumar K.V
2012-07-09 13:13 ` [PATCH -V3 11/11] arch/powerpc: Add 64TB support Aneesh Kumar K.V
2012-07-23 0:15 ` Paul Mackerras
2012-07-23 8:49 ` Aneesh Kumar K.V
2012-07-23 9:39 ` Paul Mackerras
2012-07-23 10:22 ` Aneesh Kumar K.V
2012-07-23 11:06 ` Paul Mackerras
2012-07-24 8:37 ` Aneesh Kumar K.V
2012-07-24 9:14 ` Aneesh Kumar K.V
2012-07-24 19:50 ` Aneesh Kumar K.V
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