* [PATCH 0/3] drm/xe: Update Wa_14026539277
@ 2026-07-21 19:10 Gustavo Sousa
2026-07-21 19:10 ` [PATCH 1/3] drm/xe: Extract override_has_cached_pt() Gustavo Sousa
` (5 more replies)
0 siblings, 6 replies; 8+ messages in thread
From: Gustavo Sousa @ 2026-07-21 19:10 UTC (permalink / raw)
To: intel-xe; +Cc: Gustavo Sousa
The definition of Wa_14026539277 has been updated in the workaround
database and requires a different implementation. Let's revert the
existing one and then add the up-to-date implementation.
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
Gustavo Sousa (3):
drm/xe: Extract override_has_cached_pt()
Revert "drm/xe/nvlp: Implement Wa_14026539277"
drm/xe: Add up-to-date implementation for Wa_14026539277
drivers/gpu/drm/xe/regs/xe_gt_regs.h | 4 ---
drivers/gpu/drm/xe/xe_pat.h | 10 +++++++
drivers/gpu/drm/xe/xe_device.c | 27 ++++++++++++------
drivers/gpu/drm/xe/xe_gt.c | 39 -------------------------
drivers/gpu/drm/xe/xe_pat.c | 55 ++++++++++++++++++++++++++++++++----
drivers/gpu/drm/xe/xe_vm.c | 5 ++++
6 files changed, 83 insertions(+), 57 deletions(-)
---
base-commit: 3df5500bae7f8b1be2877ab60b924be7cb88d722
change-id: 20260701-wa_14026539277-9d39ae09ab75
Best regards,
--
Gustavo Sousa <gustavo.sousa@intel.com>
^ permalink raw reply [flat|nested] 8+ messages in thread* [PATCH 1/3] drm/xe: Extract override_has_cached_pt() 2026-07-21 19:10 [PATCH 0/3] drm/xe: Update Wa_14026539277 Gustavo Sousa @ 2026-07-21 19:10 ` Gustavo Sousa 2026-07-21 19:10 ` [PATCH 2/3] Revert "drm/xe/nvlp: Implement Wa_14026539277" Gustavo Sousa ` (4 subsequent siblings) 5 siblings, 0 replies; 8+ messages in thread From: Gustavo Sousa @ 2026-07-21 19:10 UTC (permalink / raw) To: intel-xe; +Cc: Gustavo Sousa Some platforms support cached page tables, but some workarounds might require disabling the cached access on the CPU side. One such example is Wa_16029380221, but there could be others as well. Extract the code responsible for overriding xe->info.has_cached_pt into a new function called override_has_cached_pt(), so that we have a common place to add the necessary runtime checks specific for has_cached_pt. Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com> --- drivers/gpu/drm/xe/xe_device.c | 24 ++++++++++++++++-------- 1 file changed, 16 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c index 4eed9a251e65..5189419a0593 100644 --- a/drivers/gpu/drm/xe/xe_device.c +++ b/drivers/gpu/drm/xe/xe_device.c @@ -831,6 +831,21 @@ int xe_device_probe_early(struct xe_device *xe) } ALLOW_ERROR_INJECTION(xe_device_probe_early, ERRNO); /* See xe_pci_probe() */ +static void override_has_cached_pt(struct xe_device *xe) +{ + struct xe_gt *gt; + u8 id; + + /* + * Wa_16029380221: The affected GT will always use non-coherent + * access to page tables, so we must do uncached writes from the + * CPU. + */ + for_each_gt(gt, xe, id) + if (XE_GT_WA(gt, 16029380221)) + xe->info.has_cached_pt = false; +} + static int probe_has_flat_ccs(struct xe_device *xe) { struct xe_gt *gt; @@ -950,14 +965,7 @@ int xe_device_probe(struct xe_device *xe) return err; } - /* - * Wa_16029380221: The affected GT will always use non-coherent - * access to page tables, so we must do uncached writes from the - * CPU. - */ - for_each_gt(gt, xe, id) - if (XE_GT_WA(gt, 16029380221)) - xe->info.has_cached_pt = false; + override_has_cached_pt(xe); for_each_tile(tile, xe, id) { err = xe_ggtt_init_early(tile->mem.ggtt); -- 2.55.0 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 2/3] Revert "drm/xe/nvlp: Implement Wa_14026539277" 2026-07-21 19:10 [PATCH 0/3] drm/xe: Update Wa_14026539277 Gustavo Sousa 2026-07-21 19:10 ` [PATCH 1/3] drm/xe: Extract override_has_cached_pt() Gustavo Sousa @ 2026-07-21 19:10 ` Gustavo Sousa 2026-07-21 19:10 ` [PATCH 3/3] drm/xe: Add up-to-date implementation for Wa_14026539277 Gustavo Sousa ` (3 subsequent siblings) 5 siblings, 0 replies; 8+ messages in thread From: Gustavo Sousa @ 2026-07-21 19:10 UTC (permalink / raw) To: intel-xe; +Cc: Gustavo Sousa This reverts commit 0919b266456d81e71277c5963d4e806e85b65232. The definition of Wa_14026539277 has been updated in the workaround database and requires a different implementation. So let's revert the current implementation; a follow-up change will add the proper handling for this workaround. Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com> --- drivers/gpu/drm/xe/regs/xe_gt_regs.h | 4 ---- drivers/gpu/drm/xe/xe_gt.c | 39 ------------------------------- drivers/gpu/drm/xe/xe_device_wa_oob.rules | 1 - 3 files changed, 44 deletions(-) diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h index 08251c7a1a4b..155cc19f097e 100644 --- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h +++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h @@ -456,10 +456,6 @@ #define XEHPC_L3CLOS_MASK(i) XE_REG_MCR(0xb194 + (i) * 8) -#define L2COMPUTESIDECTRL XE_REG_MCR(0xb1c0) -#define CECTRL REG_GENMASK(2, 1) -#define CECTRL_CENODATA_ALWAYS REG_FIELD_PREP(CECTRL, 0x0) - #define XE2_GLOBAL_INVAL XE_REG(0xb404) #define XE2LPM_L3SQCREG2 XE_REG_MCR(0xb604) diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c index dfdacc0f6de9..2f14795e61f4 100644 --- a/drivers/gpu/drm/xe/xe_gt.c +++ b/drivers/gpu/drm/xe/xe_gt.c @@ -12,7 +12,6 @@ #include <drm/drm_managed.h> #include <uapi/drm/xe_drm.h> -#include <generated/xe_device_wa_oob.h> #include <generated/xe_wa_oob.h> #include "instructions/xe_alu_commands.h" @@ -455,35 +454,6 @@ int xe_gt_record_default_lrcs(struct xe_gt *gt) return err; } -static void wa_14026539277(struct xe_gt *gt) -{ - struct xe_device *xe = gt_to_xe(gt); - u32 val; - - /* - * FIXME: We currently can't use FUNC(xe_rtp_match_not_sriov_vf) in the - * rules for Wa_14026539277 due to xe_wa_process_device_oob() being - * called before xe_sriov_probe_early(); and we can't move the call to - * the former to happen after the latter because MMIO read functions - * already depend on a device OOB workaround. This needs to be fixed by - * allowing workaround checks to happen at different stages of driver - * initialization. - */ - if (IS_SRIOV_VF(xe)) - return; - - if (!XE_DEVICE_WA(xe, 14026539277)) - return; - - if (!xe_gt_is_main_type(gt)) - return; - - val = xe_gt_mcr_unicast_read_any(gt, L2COMPUTESIDECTRL); - val &= ~CECTRL; - val |= CECTRL_CENODATA_ALWAYS; - xe_gt_mcr_multicast_write(gt, L2COMPUTESIDECTRL, val); -} - int xe_gt_init_early(struct xe_gt *gt) { int err; @@ -609,15 +579,6 @@ static int gt_init_with_gt_forcewake(struct xe_gt *gt) */ gt->info.gmdid = xe_mmio_read32(>->mmio, GMD_ID); - /* - * Wa_14026539277 can't be implemented as a regular GT workaround (i.e. - * as an entry in gt_was[]) for two reasons: it is actually a device - * workaround that happens to involve programming a GT register; and it - * needs to be applied early to avoid getting the hardware in a bad - * state before we have a chance to do the necessary programming. - */ - wa_14026539277(gt); - return 0; } diff --git a/drivers/gpu/drm/xe/xe_device_wa_oob.rules b/drivers/gpu/drm/xe/xe_device_wa_oob.rules index d8dc41851425..356b4707dafe 100644 --- a/drivers/gpu/drm/xe/xe_device_wa_oob.rules +++ b/drivers/gpu/drm/xe/xe_device_wa_oob.rules @@ -3,7 +3,6 @@ PLATFORM(PANTHERLAKE) 22019338487_display PLATFORM(LUNARLAKE) 14022085890 SUBPLATFORM(BATTLEMAGE, G21) -14026539277 PLATFORM(NOVALAKE_P), PLATFORM_STEP(A0, B0) 14026633728 PLATFORM(CRESCENTISLAND) 14026746987 PLATFORM(CRESCENTISLAND) 14026779378 PLATFORM(CRESCENTISLAND) -- 2.55.0 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 3/3] drm/xe: Add up-to-date implementation for Wa_14026539277 2026-07-21 19:10 [PATCH 0/3] drm/xe: Update Wa_14026539277 Gustavo Sousa 2026-07-21 19:10 ` [PATCH 1/3] drm/xe: Extract override_has_cached_pt() Gustavo Sousa 2026-07-21 19:10 ` [PATCH 2/3] Revert "drm/xe/nvlp: Implement Wa_14026539277" Gustavo Sousa @ 2026-07-21 19:10 ` Gustavo Sousa 2026-07-22 0:00 ` Gustavo Sousa 2026-07-21 19:16 ` ✗ CI.checkpatch: warning for drm/xe: Update Wa_14026539277 Patchwork ` (2 subsequent siblings) 5 siblings, 1 reply; 8+ messages in thread From: Gustavo Sousa @ 2026-07-21 19:10 UTC (permalink / raw) To: intel-xe; +Cc: Gustavo Sousa Wa_14026539277 is a temporary workaround that targets only A* steppings of NVL-P (the platform, not the graphics IP) and requires that we avoid using 2-way coherency for device-cacheable memory accesses. For driver-internal usage, we convert those configurations to be device-uncached and 1-way-coherent; on the UAPI side, we reject VM_BIND calls that are 2-way-coherent and leave it up to userspace to select the alternative option that is most appropriate to their usage. Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com> --- drivers/gpu/drm/xe/xe_pat.h | 10 ++++++ drivers/gpu/drm/xe/xe_device.c | 3 ++ drivers/gpu/drm/xe/xe_pat.c | 55 +++++++++++++++++++++++++++---- drivers/gpu/drm/xe/xe_vm.c | 5 +++ drivers/gpu/drm/xe/xe_device_wa_oob.rules | 1 + 5 files changed, 68 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_pat.h b/drivers/gpu/drm/xe/xe_pat.h index 7060f66e1d63..10374022f1d2 100644 --- a/drivers/gpu/drm/xe/xe_pat.h +++ b/drivers/gpu/drm/xe/xe_pat.h @@ -82,6 +82,16 @@ bool xe_pat_index_get_comp_en(struct xe_device *xe, u16 pat_index); */ u16 xe_pat_index_get_l3_policy(struct xe_device *xe, u16 pat_index); +/** + * xe_pat_wa_14026539277_reserved - Is this PAT index reserved from + * use due to Wa_14026539277? + * @xe: xe device + * @pat_index: The pat_index to query + * + * Return: a boolean indicating whether the PAT index is reserved or not. + */ +bool xe_pat_wa_14026539277_reserved(struct xe_device *xe, u16 pat_index); + #define xe_cache_pat_idx(xe, cache_mode) ({ \ const struct xe_device *__xedev = (xe); \ enum xe_cache_level __mode = (cache_mode); \ diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c index 5189419a0593..140dbd97466e 100644 --- a/drivers/gpu/drm/xe/xe_device.c +++ b/drivers/gpu/drm/xe/xe_device.c @@ -836,6 +836,9 @@ static void override_has_cached_pt(struct xe_device *xe) struct xe_gt *gt; u8 id; + if (XE_DEVICE_WA(xe, 14026539277)) + xe->info.has_cached_pt = false; + /* * Wa_16029380221: The affected GT will always use non-coherent * access to page tables, so we must do uncached writes from the diff --git a/drivers/gpu/drm/xe/xe_pat.c b/drivers/gpu/drm/xe/xe_pat.c index a5fe1beec652..334f6ef7e9e8 100644 --- a/drivers/gpu/drm/xe/xe_pat.c +++ b/drivers/gpu/drm/xe/xe_pat.c @@ -7,6 +7,7 @@ #include <uapi/drm/xe_drm.h> +#include <generated/xe_device_wa_oob.h> #include <generated/xe_wa_oob.h> #include "regs/xe_gt_regs.h" @@ -313,6 +314,30 @@ u16 xe_pat_index_get_l3_policy(struct xe_device *xe, u16 pat_index) return REG_FIELD_GET(XE2_L3_POLICY, xe->pat.table[pat_index].value); } +bool xe_pat_wa_14026539277_reserved(struct xe_device *xe, u16 pat_index) +{ + if (!XE_DEVICE_WA(xe, 14026539277)) + return false; + + return xe_pat_index_get_l3_policy(xe, pat_index) != XE_L3_POLICY_UC && + xe_pat_index_get_coh_mode(xe, pat_index) == XE_COH_2WAY; +} + +static u32 wa_14026539277_fixup_pat_value(struct xe_gt *gt, u32 value) +{ + struct xe_device *xe = gt_to_xe(gt); + + if (XE_DEVICE_WA(xe, 14026539277) && xe_gt_is_main_type(gt)) { + if (REG_FIELD_GET(XE2_L3_POLICY, value) != XE_L3_POLICY_UC && + REG_FIELD_GET(XE2_COH_MODE, value) == XE_COH_2WAY) { + value &= ~XE2_COH_MODE; + value |= REG_FIELD_PREP(XE2_COH_MODE, XE_COH_1WAY); + } + } + + return value; +} + static const struct xe_pat_table_entry *gt_pta_entry(struct xe_gt *gt) { struct xe_device *xe = gt_to_xe(gt); @@ -373,18 +398,22 @@ static void program_pat_mcr(struct xe_gt *gt, const struct xe_pat_table_entry ta for (int i = 0; i < n_entries; i++) { struct xe_reg_mcr reg_mcr = XE_REG_MCR(_PAT_INDEX(i)); + u32 pat = wa_14026539277_fixup_pat_value(gt, table[i].value); - xe_gt_mcr_multicast_write(gt, reg_mcr, table[i].value); + xe_gt_mcr_multicast_write(gt, reg_mcr, pat); } if (xe->pat.pat_ats) - xe_gt_mcr_multicast_write(gt, XE_REG_MCR(_PAT_ATS), xe->pat.pat_ats->value); + xe_gt_mcr_multicast_write(gt, XE_REG_MCR(_PAT_ATS), + wa_14026539277_fixup_pat_value(gt, xe->pat.pat_ats->value)); if (pta_entry) - xe_gt_mcr_multicast_write(gt, XE_REG_MCR(_PAT_PTA), pta_entry->value); + xe_gt_mcr_multicast_write(gt, XE_REG_MCR(_PAT_PTA), + wa_14026539277_fixup_pat_value(gt, pta_entry->value)); if (tr_pta_entry) - xe_gt_mcr_multicast_write(gt, XE_REG_MCR(_PAT_TR_PTA), tr_pta_entry->value); + xe_gt_mcr_multicast_write(gt, XE_REG_MCR(_PAT_TR_PTA), + wa_14026539277_fixup_pat_value(gt, tr_pta_entry->value)); } static int xelp_dump(struct xe_gt *gt, struct drm_printer *p) @@ -534,13 +563,16 @@ static int xe2_dump(struct xe_gt *gt, struct drm_printer *p) drm_printf(p, "PAT table: (* = reserved entry)\n"); for (i = 0; i < xe->pat.n_entries; i++) { + bool rsvd = !xe->pat.table[i].valid || + xe_pat_wa_14026539277_reserved(xe, i); + if (xe_gt_is_media_type(gt)) pat = xe_mmio_read32(>->mmio, XE_REG(_PAT_INDEX(i))); else pat = xe_gt_mcr_unicast_read_any(gt, XE_REG_MCR(_PAT_INDEX(i))); xe_pat_index_label(label, sizeof(label), i); - xe->pat.ops->entry_dump(p, label, pat, !xe->pat.table[i].valid); + xe->pat.ops->entry_dump(p, label, pat, rsvd); } /* @@ -747,9 +779,14 @@ int xe_pat_dump_sw_config(struct xe_gt *gt, struct drm_printer *p) for (u32 i = 0; i < xe->pat.n_entries; i++) { u32 pat = xe->pat.table[i].value; + pat = wa_14026539277_fixup_pat_value(gt, pat); + if (GRAPHICS_VER(xe) >= 20) { + bool rsvd = !xe->pat.table[i].valid || + xe_pat_wa_14026539277_reserved(xe, i); + xe_pat_index_label(label, sizeof(label), i); - xe->pat.ops->entry_dump(p, label, pat, !xe->pat.table[i].valid); + xe->pat.ops->entry_dump(p, label, pat, rsvd); } else if (xe->info.platform == XE_METEORLAKE) { xelpg_pat_entry_dump(p, i, pat); } else if (xe->info.platform == XE_PVC) { @@ -764,6 +801,8 @@ int xe_pat_dump_sw_config(struct xe_gt *gt, struct drm_printer *p) if (pta_entry) { u32 pat = pta_entry->value; + pat = wa_14026539277_fixup_pat_value(gt, pat); + drm_printf(p, "Page Table Access:\n"); xe->pat.ops->entry_dump(p, "PTA_MODE", pat, false); } @@ -771,6 +810,8 @@ int xe_pat_dump_sw_config(struct xe_gt *gt, struct drm_printer *p) if (tr_pta_entry) { u32 pat = tr_pta_entry->value; + pat = wa_14026539277_fixup_pat_value(gt, pat); + drm_printf(p, "TRTT Page Table Access:\n"); xe->pat.ops->entry_dump(p, "TR_PTA_MODE", pat, false); } @@ -778,6 +819,8 @@ int xe_pat_dump_sw_config(struct xe_gt *gt, struct drm_printer *p) if (xe->pat.pat_ats) { u32 pat = xe->pat.pat_ats->value; + pat = wa_14026539277_fixup_pat_value(gt, pat); + drm_printf(p, "PCIe ATS/PASID:\n"); xe->pat.ops->entry_dump(p, "PAT_ATS ", pat, false); } diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c index 57bcf0660eb8..16b937d0e3af 100644 --- a/drivers/gpu/drm/xe/xe_vm.c +++ b/drivers/gpu/drm/xe/xe_vm.c @@ -3699,6 +3699,11 @@ static int vm_bind_ioctl_check_args(struct xe_device *xe, struct xe_vm *vm, goto free_bind_ops; } + if (XE_IOCTL_DBG(xe, xe_pat_wa_14026539277_reserved(xe, pat_index))) { + err = -EINVAL; + goto free_bind_ops; + } + if (XE_IOCTL_DBG(xe, op > DRM_XE_VM_BIND_OP_PREFETCH) || XE_IOCTL_DBG(xe, flags & ~SUPPORTED_FLAGS) || XE_IOCTL_DBG(xe, obj && (is_null || is_cpu_addr_mirror)) || diff --git a/drivers/gpu/drm/xe/xe_device_wa_oob.rules b/drivers/gpu/drm/xe/xe_device_wa_oob.rules index 356b4707dafe..d8dc41851425 100644 --- a/drivers/gpu/drm/xe/xe_device_wa_oob.rules +++ b/drivers/gpu/drm/xe/xe_device_wa_oob.rules @@ -3,6 +3,7 @@ PLATFORM(PANTHERLAKE) 22019338487_display PLATFORM(LUNARLAKE) 14022085890 SUBPLATFORM(BATTLEMAGE, G21) +14026539277 PLATFORM(NOVALAKE_P), PLATFORM_STEP(A0, B0) 14026633728 PLATFORM(CRESCENTISLAND) 14026746987 PLATFORM(CRESCENTISLAND) 14026779378 PLATFORM(CRESCENTISLAND) -- 2.55.0 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH 3/3] drm/xe: Add up-to-date implementation for Wa_14026539277 2026-07-21 19:10 ` [PATCH 3/3] drm/xe: Add up-to-date implementation for Wa_14026539277 Gustavo Sousa @ 2026-07-22 0:00 ` Gustavo Sousa 0 siblings, 0 replies; 8+ messages in thread From: Gustavo Sousa @ 2026-07-22 0:00 UTC (permalink / raw) To: intel-xe Gustavo Sousa <gustavo.sousa@intel.com> writes: > Wa_14026539277 is a temporary workaround that targets only A* > steppings of NVL-P (the platform, not the graphics IP) and requires > that we avoid using 2-way coherency for device-cacheable memory > accesses. For driver-internal usage, we convert those configurations > to be device-uncached and 1-way-coherent; on the UAPI side, we reject > VM_BIND calls that are 2-way-coherent and leave it up to userspace to > select the alternative option that is most appropriate to their usage. > > Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com> > --- > drivers/gpu/drm/xe/xe_pat.h | 10 ++++++ > drivers/gpu/drm/xe/xe_device.c | 3 ++ > drivers/gpu/drm/xe/xe_pat.c | 55 +++++++++++++++++++++++++++---- > drivers/gpu/drm/xe/xe_vm.c | 5 +++ > drivers/gpu/drm/xe/xe_device_wa_oob.rules | 1 + > 5 files changed, 68 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/xe/xe_pat.h b/drivers/gpu/drm/xe/xe_pat.h > index 7060f66e1d63..10374022f1d2 100644 > --- a/drivers/gpu/drm/xe/xe_pat.h > +++ b/drivers/gpu/drm/xe/xe_pat.h > @@ -82,6 +82,16 @@ bool xe_pat_index_get_comp_en(struct xe_device *xe, u16 pat_index); > */ > u16 xe_pat_index_get_l3_policy(struct xe_device *xe, u16 pat_index); > > +/** > + * xe_pat_wa_14026539277_reserved - Is this PAT index reserved from > + * use due to Wa_14026539277? > + * @xe: xe device > + * @pat_index: The pat_index to query > + * > + * Return: a boolean indicating whether the PAT index is reserved or not. > + */ > +bool xe_pat_wa_14026539277_reserved(struct xe_device *xe, u16 pat_index); > + > #define xe_cache_pat_idx(xe, cache_mode) ({ \ > const struct xe_device *__xedev = (xe); \ > enum xe_cache_level __mode = (cache_mode); \ > diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c > index 5189419a0593..140dbd97466e 100644 > --- a/drivers/gpu/drm/xe/xe_device.c > +++ b/drivers/gpu/drm/xe/xe_device.c > @@ -836,6 +836,9 @@ static void override_has_cached_pt(struct xe_device *xe) > struct xe_gt *gt; > u8 id; > > + if (XE_DEVICE_WA(xe, 14026539277)) > + xe->info.has_cached_pt = false; > + > /* > * Wa_16029380221: The affected GT will always use non-coherent > * access to page tables, so we must do uncached writes from the > diff --git a/drivers/gpu/drm/xe/xe_pat.c b/drivers/gpu/drm/xe/xe_pat.c > index a5fe1beec652..334f6ef7e9e8 100644 > --- a/drivers/gpu/drm/xe/xe_pat.c > +++ b/drivers/gpu/drm/xe/xe_pat.c > @@ -7,6 +7,7 @@ > > #include <uapi/drm/xe_drm.h> > > +#include <generated/xe_device_wa_oob.h> > #include <generated/xe_wa_oob.h> > > #include "regs/xe_gt_regs.h" > @@ -313,6 +314,30 @@ u16 xe_pat_index_get_l3_policy(struct xe_device *xe, u16 pat_index) > return REG_FIELD_GET(XE2_L3_POLICY, xe->pat.table[pat_index].value); > } > > +bool xe_pat_wa_14026539277_reserved(struct xe_device *xe, u16 pat_index) > +{ > + if (!XE_DEVICE_WA(xe, 14026539277)) > + return false; > + > + return xe_pat_index_get_l3_policy(xe, pat_index) != XE_L3_POLICY_UC && > + xe_pat_index_get_coh_mode(xe, pat_index) == XE_COH_2WAY; > +} > + > +static u32 wa_14026539277_fixup_pat_value(struct xe_gt *gt, u32 value) > +{ > + struct xe_device *xe = gt_to_xe(gt); > + > + if (XE_DEVICE_WA(xe, 14026539277) && xe_gt_is_main_type(gt)) { > + if (REG_FIELD_GET(XE2_L3_POLICY, value) != XE_L3_POLICY_UC && > + REG_FIELD_GET(XE2_COH_MODE, value) == XE_COH_2WAY) { > + value &= ~XE2_COH_MODE; > + value |= REG_FIELD_PREP(XE2_COH_MODE, XE_COH_1WAY); Oops, good catch by Sashiko[1]: The commit message states that driver-internal configurations will be converted to be "device-uncached and 1-way-coherent". However, the code here only modifies the coherency mode to 1-way, leaving the L3 policy unmodified. Does this need an additional bitwise update to set XE2_L3_POLICY to XE_L3_POLICY_UC to match the commit message? [1] https://sashiko.dev/#/patchset/20260721-wa_14026539277-v1-0-09fa102f3084%40intel.com -- Gustavo Sousa > + } > + } > + > + return value; > +} > + > static const struct xe_pat_table_entry *gt_pta_entry(struct xe_gt *gt) > { > struct xe_device *xe = gt_to_xe(gt); > @@ -373,18 +398,22 @@ static void program_pat_mcr(struct xe_gt *gt, const struct xe_pat_table_entry ta > > for (int i = 0; i < n_entries; i++) { > struct xe_reg_mcr reg_mcr = XE_REG_MCR(_PAT_INDEX(i)); > + u32 pat = wa_14026539277_fixup_pat_value(gt, table[i].value); > > - xe_gt_mcr_multicast_write(gt, reg_mcr, table[i].value); > + xe_gt_mcr_multicast_write(gt, reg_mcr, pat); > } > > if (xe->pat.pat_ats) > - xe_gt_mcr_multicast_write(gt, XE_REG_MCR(_PAT_ATS), xe->pat.pat_ats->value); > + xe_gt_mcr_multicast_write(gt, XE_REG_MCR(_PAT_ATS), > + wa_14026539277_fixup_pat_value(gt, xe->pat.pat_ats->value)); > > if (pta_entry) > - xe_gt_mcr_multicast_write(gt, XE_REG_MCR(_PAT_PTA), pta_entry->value); > + xe_gt_mcr_multicast_write(gt, XE_REG_MCR(_PAT_PTA), > + wa_14026539277_fixup_pat_value(gt, pta_entry->value)); > > if (tr_pta_entry) > - xe_gt_mcr_multicast_write(gt, XE_REG_MCR(_PAT_TR_PTA), tr_pta_entry->value); > + xe_gt_mcr_multicast_write(gt, XE_REG_MCR(_PAT_TR_PTA), > + wa_14026539277_fixup_pat_value(gt, tr_pta_entry->value)); > } > > static int xelp_dump(struct xe_gt *gt, struct drm_printer *p) > @@ -534,13 +563,16 @@ static int xe2_dump(struct xe_gt *gt, struct drm_printer *p) > drm_printf(p, "PAT table: (* = reserved entry)\n"); > > for (i = 0; i < xe->pat.n_entries; i++) { > + bool rsvd = !xe->pat.table[i].valid || > + xe_pat_wa_14026539277_reserved(xe, i); > + > if (xe_gt_is_media_type(gt)) > pat = xe_mmio_read32(>->mmio, XE_REG(_PAT_INDEX(i))); > else > pat = xe_gt_mcr_unicast_read_any(gt, XE_REG_MCR(_PAT_INDEX(i))); > > xe_pat_index_label(label, sizeof(label), i); > - xe->pat.ops->entry_dump(p, label, pat, !xe->pat.table[i].valid); > + xe->pat.ops->entry_dump(p, label, pat, rsvd); > } > > /* > @@ -747,9 +779,14 @@ int xe_pat_dump_sw_config(struct xe_gt *gt, struct drm_printer *p) > for (u32 i = 0; i < xe->pat.n_entries; i++) { > u32 pat = xe->pat.table[i].value; > > + pat = wa_14026539277_fixup_pat_value(gt, pat); > + > if (GRAPHICS_VER(xe) >= 20) { > + bool rsvd = !xe->pat.table[i].valid || > + xe_pat_wa_14026539277_reserved(xe, i); > + > xe_pat_index_label(label, sizeof(label), i); > - xe->pat.ops->entry_dump(p, label, pat, !xe->pat.table[i].valid); > + xe->pat.ops->entry_dump(p, label, pat, rsvd); > } else if (xe->info.platform == XE_METEORLAKE) { > xelpg_pat_entry_dump(p, i, pat); > } else if (xe->info.platform == XE_PVC) { > @@ -764,6 +801,8 @@ int xe_pat_dump_sw_config(struct xe_gt *gt, struct drm_printer *p) > if (pta_entry) { > u32 pat = pta_entry->value; > > + pat = wa_14026539277_fixup_pat_value(gt, pat); > + > drm_printf(p, "Page Table Access:\n"); > xe->pat.ops->entry_dump(p, "PTA_MODE", pat, false); > } > @@ -771,6 +810,8 @@ int xe_pat_dump_sw_config(struct xe_gt *gt, struct drm_printer *p) > if (tr_pta_entry) { > u32 pat = tr_pta_entry->value; > > + pat = wa_14026539277_fixup_pat_value(gt, pat); > + > drm_printf(p, "TRTT Page Table Access:\n"); > xe->pat.ops->entry_dump(p, "TR_PTA_MODE", pat, false); > } > @@ -778,6 +819,8 @@ int xe_pat_dump_sw_config(struct xe_gt *gt, struct drm_printer *p) > if (xe->pat.pat_ats) { > u32 pat = xe->pat.pat_ats->value; > > + pat = wa_14026539277_fixup_pat_value(gt, pat); > + > drm_printf(p, "PCIe ATS/PASID:\n"); > xe->pat.ops->entry_dump(p, "PAT_ATS ", pat, false); > } > diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c > index 57bcf0660eb8..16b937d0e3af 100644 > --- a/drivers/gpu/drm/xe/xe_vm.c > +++ b/drivers/gpu/drm/xe/xe_vm.c > @@ -3699,6 +3699,11 @@ static int vm_bind_ioctl_check_args(struct xe_device *xe, struct xe_vm *vm, > goto free_bind_ops; > } > > + if (XE_IOCTL_DBG(xe, xe_pat_wa_14026539277_reserved(xe, pat_index))) { > + err = -EINVAL; > + goto free_bind_ops; > + } > + > if (XE_IOCTL_DBG(xe, op > DRM_XE_VM_BIND_OP_PREFETCH) || > XE_IOCTL_DBG(xe, flags & ~SUPPORTED_FLAGS) || > XE_IOCTL_DBG(xe, obj && (is_null || is_cpu_addr_mirror)) || > diff --git a/drivers/gpu/drm/xe/xe_device_wa_oob.rules b/drivers/gpu/drm/xe/xe_device_wa_oob.rules > index 356b4707dafe..d8dc41851425 100644 > --- a/drivers/gpu/drm/xe/xe_device_wa_oob.rules > +++ b/drivers/gpu/drm/xe/xe_device_wa_oob.rules > @@ -3,6 +3,7 @@ > PLATFORM(PANTHERLAKE) > 22019338487_display PLATFORM(LUNARLAKE) > 14022085890 SUBPLATFORM(BATTLEMAGE, G21) > +14026539277 PLATFORM(NOVALAKE_P), PLATFORM_STEP(A0, B0) > 14026633728 PLATFORM(CRESCENTISLAND) > 14026746987 PLATFORM(CRESCENTISLAND) > 14026779378 PLATFORM(CRESCENTISLAND) > > -- > 2.55.0 ^ permalink raw reply [flat|nested] 8+ messages in thread
* ✗ CI.checkpatch: warning for drm/xe: Update Wa_14026539277 2026-07-21 19:10 [PATCH 0/3] drm/xe: Update Wa_14026539277 Gustavo Sousa ` (2 preceding siblings ...) 2026-07-21 19:10 ` [PATCH 3/3] drm/xe: Add up-to-date implementation for Wa_14026539277 Gustavo Sousa @ 2026-07-21 19:16 ` Patchwork 2026-07-21 19:17 ` ✓ CI.KUnit: success " Patchwork 2026-07-21 20:04 ` ✓ Xe.CI.BAT: " Patchwork 5 siblings, 0 replies; 8+ messages in thread From: Patchwork @ 2026-07-21 19:16 UTC (permalink / raw) To: Gustavo Sousa; +Cc: intel-xe == Series Details == Series: drm/xe: Update Wa_14026539277 URL : https://patchwork.freedesktop.org/series/170845/ State : warning == Summary == + KERNEL=/kernel + git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt Cloning into 'mt'... warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/ + git -C mt rev-list -n1 origin/master 061140b9bc586ae7f40abc1249c97e1cc72d1b9d + cd /kernel + git config --global --add safe.directory /kernel + git log -n1 commit 151011197419c6a5b61d0fb63fc4b608ea6c589e Author: Gustavo Sousa <gustavo.sousa@intel.com> Date: Tue Jul 21 16:10:21 2026 -0300 drm/xe: Add up-to-date implementation for Wa_14026539277 Wa_14026539277 is a temporary workaround that targets only A* steppings of NVL-P (the platform, not the graphics IP) and requires that we avoid using 2-way coherency for device-cacheable memory accesses. For driver-internal usage, we convert those configurations to be device-uncached and 1-way-coherent; on the UAPI side, we reject VM_BIND calls that are 2-way-coherent and leave it up to userspace to select the alternative option that is most appropriate to their usage. Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com> + /mt/dim checkpatch 80b509f6e34a01edfccc01a05e3e7062a934bcf9 drm-intel 07b5fe5d69cb drm/xe: Extract override_has_cached_pt() 70614ed5046f Revert "drm/xe/nvlp: Implement Wa_14026539277" 151011197419 drm/xe: Add up-to-date implementation for Wa_14026539277 -:98: WARNING:LONG_LINE: line length of 102 exceeds 100 columns #98: FILE: drivers/gpu/drm/xe/xe_pat.c:408: + wa_14026539277_fixup_pat_value(gt, xe->pat.pat_ats->value)); total: 0 errors, 1 warnings, 0 checks, 162 lines checked ^ permalink raw reply [flat|nested] 8+ messages in thread
* ✓ CI.KUnit: success for drm/xe: Update Wa_14026539277 2026-07-21 19:10 [PATCH 0/3] drm/xe: Update Wa_14026539277 Gustavo Sousa ` (3 preceding siblings ...) 2026-07-21 19:16 ` ✗ CI.checkpatch: warning for drm/xe: Update Wa_14026539277 Patchwork @ 2026-07-21 19:17 ` Patchwork 2026-07-21 20:04 ` ✓ Xe.CI.BAT: " Patchwork 5 siblings, 0 replies; 8+ messages in thread From: Patchwork @ 2026-07-21 19:17 UTC (permalink / raw) To: Gustavo Sousa; +Cc: intel-xe == Series Details == Series: drm/xe: Update Wa_14026539277 URL : https://patchwork.freedesktop.org/series/170845/ State : success == Summary == + trap cleanup EXIT + /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig [19:16:09] Configuring KUnit Kernel ... Generating .config ... Populating config with: $ make ARCH=um O=.kunit olddefconfig [19:16:13] Building KUnit Kernel ... Populating config with: $ make ARCH=um O=.kunit olddefconfig Building with: $ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48 [19:16:45] Starting KUnit Kernel (1/1)... [19:16:45] ============================================================ Running tests with: $ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt [19:16:45] ================== guc_buf (11 subtests) =================== [19:16:45] [PASSED] test_smallest [19:16:45] [PASSED] test_largest [19:16:45] [PASSED] test_granular [19:16:45] [PASSED] test_unique [19:16:45] [PASSED] test_overlap [19:16:45] [PASSED] test_reusable [19:16:45] [PASSED] test_too_big [19:16:45] [PASSED] test_flush [19:16:45] [PASSED] test_lookup [19:16:45] [PASSED] test_data [19:16:45] [PASSED] test_class [19:16:45] ===================== [PASSED] guc_buf ===================== [19:16:45] =================== guc_dbm (7 subtests) =================== [19:16:45] [PASSED] test_empty [19:16:45] [PASSED] test_default [19:16:45] ======================== test_size ======================== [19:16:45] [PASSED] 4 [19:16:45] [PASSED] 8 [19:16:45] [PASSED] 32 [19:16:45] [PASSED] 256 [19:16:45] ==================== [PASSED] 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xe_drops_guc2vf_if_not_ready [19:16:45] [PASSED] xe_rejects_send_if_not_ready [19:16:45] ==================== [PASSED] no_relay ===================== [19:16:45] ================== pf_relay (14 subtests) ================== [19:16:45] [PASSED] pf_rejects_guc2pf_too_short [19:16:45] [PASSED] pf_rejects_guc2pf_too_long [19:16:45] [PASSED] pf_rejects_guc2pf_no_payload [19:16:45] [PASSED] pf_fails_no_payload [19:16:45] [PASSED] pf_fails_bad_origin [19:16:45] [PASSED] pf_fails_bad_type [19:16:45] [PASSED] pf_txn_reports_error [19:16:45] [PASSED] pf_txn_sends_pf2guc [19:16:45] [PASSED] pf_sends_pf2guc [19:16:45] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV) [19:16:45] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV) [19:16:45] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV) [19:16:45] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV) [19:16:45] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV) [19:16:45] ==================== [PASSED] pf_relay ===================== [19:16:45] ================== vf_relay (3 subtests) =================== [19:16:45] [PASSED] vf_rejects_guc2vf_too_short [19:16:45] [PASSED] vf_rejects_guc2vf_too_long [19:16:45] [PASSED] vf_rejects_guc2vf_no_payload [19:16:45] ==================== [PASSED] vf_relay ===================== [19:16:45] ================ pf_gt_config (9 subtests) ================= [19:16:45] [PASSED] fair_contexts_1vf [19:16:45] [PASSED] fair_doorbells_1vf [19:16:45] [PASSED] fair_ggtt_1vf [19:16:45] ====================== fair_vram_1vf ====================== [19:16:45] [PASSED] 3.50 GiB [19:16:45] [PASSED] 11.5 GiB [19:16:45] [PASSED] 15.5 GiB [19:16:45] [PASSED] 31.5 GiB [19:16:45] [PASSED] 63.5 GiB [19:16:45] [PASSED] 1.91 GiB [19:16:45] ================== [PASSED] fair_vram_1vf ================== [19:16:45] ================ fair_vram_1vf_admin_only ================= [19:16:45] [PASSED] 3.50 GiB [19:16:45] [PASSED] 11.5 GiB [19:16:45] [PASSED] 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================== [19:16:45] ===================== fair_doorbells ====================== [19:16:45] [PASSED] 1 VF [19:16:45] [PASSED] 2 VFs [19:16:45] [PASSED] 3 VFs [19:16:45] [PASSED] 4 VFs [19:16:45] [PASSED] 5 VFs [19:16:45] [PASSED] 6 VFs [19:16:45] [PASSED] 7 VFs [19:16:45] [PASSED] 8 VFs [19:16:45] [PASSED] 9 VFs [19:16:45] [PASSED] 10 VFs [19:16:45] [PASSED] 11 VFs [19:16:45] [PASSED] 12 VFs [19:16:45] [PASSED] 13 VFs [19:16:45] [PASSED] 14 VFs [19:16:45] [PASSED] 15 VFs [19:16:45] [PASSED] 16 VFs [19:16:45] [PASSED] 17 VFs [19:16:45] [PASSED] 18 VFs [19:16:45] [PASSED] 19 VFs [19:16:45] [PASSED] 20 VFs [19:16:45] [PASSED] 21 VFs [19:16:45] [PASSED] 22 VFs [19:16:45] [PASSED] 23 VFs [19:16:45] [PASSED] 24 VFs [19:16:45] [PASSED] 25 VFs [19:16:45] [PASSED] 26 VFs [19:16:45] [PASSED] 27 VFs [19:16:45] [PASSED] 28 VFs [19:16:45] [PASSED] 29 VFs [19:16:45] [PASSED] 30 VFs [19:16:45] [PASSED] 31 VFs [19:16:45] [PASSED] 32 VFs [19:16:45] [PASSED] 33 VFs [19:16:45] [PASSED] 34 VFs [19:16:45] [PASSED] 35 VFs [19:16:45] [PASSED] 36 VFs [19:16:45] [PASSED] 37 VFs [19:16:45] [PASSED] 38 VFs [19:16:45] [PASSED] 39 VFs [19:16:45] [PASSED] 40 VFs [19:16:45] [PASSED] 41 VFs [19:16:45] [PASSED] 42 VFs [19:16:45] [PASSED] 43 VFs [19:16:45] [PASSED] 44 VFs [19:16:45] [PASSED] 45 VFs [19:16:45] [PASSED] 46 VFs [19:16:45] [PASSED] 47 VFs [19:16:45] [PASSED] 48 VFs [19:16:45] [PASSED] 49 VFs [19:16:45] [PASSED] 50 VFs [19:16:45] [PASSED] 51 VFs [19:16:45] [PASSED] 52 VFs [19:16:45] [PASSED] 53 VFs [19:16:45] [PASSED] 54 VFs [19:16:45] [PASSED] 55 VFs [19:16:45] [PASSED] 56 VFs [19:16:45] [PASSED] 57 VFs [19:16:45] [PASSED] 58 VFs [19:16:45] [PASSED] 59 VFs [19:16:45] [PASSED] 60 VFs [19:16:45] [PASSED] 61 VFs [19:16:45] [PASSED] 62 VFs [19:16:45] [PASSED] 63 VFs [19:16:45] ================= [PASSED] fair_doorbells ================== [19:16:45] ======================== fair_ggtt ======================== [19:16:45] [PASSED] 1 VF [19:16:45] [PASSED] 2 VFs [19:16:45] [PASSED] 3 VFs [19:16:45] [PASSED] 4 VFs [19:16:45] [PASSED] 5 VFs [19:16:45] [PASSED] 6 VFs [19:16:45] [PASSED] 7 VFs [19:16:45] [PASSED] 8 VFs [19:16:45] [PASSED] 9 VFs [19:16:45] [PASSED] 10 VFs [19:16:45] [PASSED] 11 VFs [19:16:45] [PASSED] 12 VFs [19:16:45] [PASSED] 13 VFs [19:16:45] [PASSED] 14 VFs [19:16:45] [PASSED] 15 VFs [19:16:45] [PASSED] 16 VFs [19:16:45] [PASSED] 17 VFs [19:16:45] [PASSED] 18 VFs [19:16:45] [PASSED] 19 VFs [19:16:45] [PASSED] 20 VFs [19:16:45] [PASSED] 21 VFs [19:16:45] [PASSED] 22 VFs [19:16:45] [PASSED] 23 VFs [19:16:45] [PASSED] 24 VFs [19:16:45] [PASSED] 25 VFs [19:16:45] [PASSED] 26 VFs [19:16:45] [PASSED] 27 VFs [19:16:45] [PASSED] 28 VFs [19:16:45] [PASSED] 29 VFs [19:16:45] [PASSED] 30 VFs [19:16:45] [PASSED] 31 VFs [19:16:45] [PASSED] 32 VFs [19:16:45] [PASSED] 33 VFs [19:16:45] [PASSED] 34 VFs [19:16:45] [PASSED] 35 VFs [19:16:45] [PASSED] 36 VFs [19:16:45] [PASSED] 37 VFs [19:16:45] [PASSED] 38 VFs [19:16:45] [PASSED] 39 VFs [19:16:45] [PASSED] 40 VFs [19:16:45] [PASSED] 41 VFs [19:16:45] [PASSED] 42 VFs [19:16:45] [PASSED] 43 VFs [19:16:45] [PASSED] 44 VFs [19:16:45] [PASSED] 45 VFs [19:16:45] [PASSED] 46 VFs [19:16:45] [PASSED] 47 VFs [19:16:45] [PASSED] 48 VFs [19:16:45] [PASSED] 49 VFs [19:16:45] [PASSED] 50 VFs [19:16:45] [PASSED] 51 VFs [19:16:45] [PASSED] 52 VFs [19:16:45] [PASSED] 53 VFs [19:16:45] [PASSED] 54 VFs [19:16:45] [PASSED] 55 VFs [19:16:45] [PASSED] 56 VFs [19:16:45] [PASSED] 57 VFs [19:16:45] [PASSED] 58 VFs [19:16:45] [PASSED] 59 VFs [19:16:45] [PASSED] 60 VFs [19:16:45] [PASSED] 61 VFs [19:16:45] [PASSED] 62 VFs [19:16:45] [PASSED] 63 VFs [19:16:45] ==================== [PASSED] fair_ggtt ==================== [19:16:45] ======================== fair_vram ======================== [19:16:45] [PASSED] 1 VF [19:16:45] [PASSED] 2 VFs [19:16:45] [PASSED] 3 VFs [19:16:45] [PASSED] 4 VFs [19:16:45] [PASSED] 5 VFs [19:16:45] [PASSED] 6 VFs [19:16:45] [PASSED] 7 VFs [19:16:45] [PASSED] 8 VFs [19:16:45] [PASSED] 9 VFs [19:16:45] [PASSED] 10 VFs [19:16:45] [PASSED] 11 VFs [19:16:45] [PASSED] 12 VFs [19:16:45] [PASSED] 13 VFs [19:16:45] [PASSED] 14 VFs [19:16:45] [PASSED] 15 VFs [19:16:45] [PASSED] 16 VFs [19:16:45] [PASSED] 17 VFs [19:16:45] [PASSED] 18 VFs [19:16:45] [PASSED] 19 VFs [19:16:45] [PASSED] 20 VFs [19:16:45] [PASSED] 21 VFs [19:16:45] [PASSED] 22 VFs [19:16:45] [PASSED] 23 VFs [19:16:45] [PASSED] 24 VFs [19:16:45] [PASSED] 25 VFs [19:16:45] [PASSED] 26 VFs [19:16:45] [PASSED] 27 VFs [19:16:45] [PASSED] 28 VFs [19:16:45] [PASSED] 29 VFs [19:16:45] [PASSED] 30 VFs [19:16:45] [PASSED] 31 VFs [19:16:45] [PASSED] 32 VFs [19:16:45] [PASSED] 33 VFs [19:16:45] [PASSED] 34 VFs [19:16:45] [PASSED] 35 VFs [19:16:45] [PASSED] 36 VFs [19:16:45] [PASSED] 37 VFs [19:16:45] [PASSED] 38 VFs [19:16:45] [PASSED] 39 VFs [19:16:45] [PASSED] 40 VFs [19:16:45] [PASSED] 41 VFs [19:16:45] [PASSED] 42 VFs [19:16:45] [PASSED] 43 VFs [19:16:45] [PASSED] 44 VFs [19:16:45] [PASSED] 45 VFs [19:16:45] [PASSED] 46 VFs [19:16:45] [PASSED] 47 VFs [19:16:45] [PASSED] 48 VFs [19:16:45] [PASSED] 49 VFs [19:16:45] [PASSED] 50 VFs [19:16:45] [PASSED] 51 VFs [19:16:45] [PASSED] 52 VFs [19:16:45] [PASSED] 53 VFs [19:16:45] [PASSED] 54 VFs [19:16:45] [PASSED] 55 VFs [19:16:45] [PASSED] 56 VFs [19:16:45] [PASSED] 57 VFs [19:16:45] [PASSED] 58 VFs [19:16:45] [PASSED] 59 VFs [19:16:45] [PASSED] 60 VFs [19:16:45] [PASSED] 61 VFs [19:16:45] [PASSED] 62 VFs [19:16:45] [PASSED] 63 VFs [19:16:45] ==================== [PASSED] fair_vram ==================== [19:16:45] ================== [PASSED] pf_gt_config =================== [19:16:45] ===================== lmtt (1 subtest) ===================== [19:16:45] ======================== test_ops ========================= [19:16:45] [PASSED] 2-level [19:16:45] [PASSED] multi-level [19:16:45] ==================== [PASSED] test_ops ===================== [19:16:45] ====================== [PASSED] lmtt ======================= [19:16:45] ================= sriov_packet (1 subtest) ================= [19:16:45] [PASSED] test_descriptor_init [19:16:45] ================== [PASSED] sriov_packet =================== [19:16:45] ================= pf_service (11 subtests) ================= [19:16:45] [PASSED] pf_negotiate_any [19:16:45] [PASSED] pf_negotiate_base_match [19:16:45] [PASSED] pf_negotiate_base_newer [19:16:45] [PASSED] pf_negotiate_base_next [19:16:45] [SKIPPED] pf_negotiate_base_older (no older minor) [19:16:45] [PASSED] pf_negotiate_base_prev [19:16:45] [PASSED] pf_negotiate_latest_match [19:16:45] [PASSED] pf_negotiate_latest_newer [19:16:45] [PASSED] pf_negotiate_latest_next [19:16:45] [SKIPPED] pf_negotiate_latest_older (no older minor) [19:16:45] [SKIPPED] pf_negotiate_latest_prev (no prev major) [19:16:45] =================== [PASSED] pf_service ==================== [19:16:45] ================= xe_guc_g2g (2 subtests) ================== [19:16:45] ============== xe_live_guc_g2g_kunit_default ============== [19:16:45] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ========== [19:16:45] ============== xe_live_guc_g2g_kunit_allmem =============== [19:16:45] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ========== [19:16:45] =================== [SKIPPED] xe_guc_g2g =================== [19:16:45] =================== xe_mocs (2 subtests) =================== [19:16:45] ================ xe_live_mocs_kernel_kunit ================ [19:16:45] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============ [19:16:45] ================ xe_live_mocs_reset_kunit ================= [19:16:45] ============ [SKIPPED] xe_live_mocs_reset_kunit ============ [19:16:45] ==================== [SKIPPED] xe_mocs ===================== [19:16:45] ================= xe_migrate (2 subtests) ================== [19:16:45] ================= xe_migrate_sanity_kunit ================= [19:16:45] ============ [SKIPPED] xe_migrate_sanity_kunit ============= [19:16:45] ================== xe_validate_ccs_kunit ================== [19:16:45] ============= [SKIPPED] xe_validate_ccs_kunit ============== [19:16:45] =================== [SKIPPED] xe_migrate =================== [19:16:45] ================== xe_dma_buf (1 subtest) ================== [19:16:45] ==================== xe_dma_buf_kunit ===================== [19:16:45] ================ [SKIPPED] xe_dma_buf_kunit ================ [19:16:45] =================== [SKIPPED] xe_dma_buf =================== [19:16:45] ================= xe_bo_shrink (1 subtest) ================= [19:16:45] =================== xe_bo_shrink_kunit ==================== [19:16:45] =============== [SKIPPED] xe_bo_shrink_kunit =============== [19:16:45] ================== [SKIPPED] xe_bo_shrink ================== [19:16:45] ==================== xe_bo (2 subtests) ==================== [19:16:45] ================== xe_ccs_migrate_kunit =================== [19:16:45] ============== [SKIPPED] xe_ccs_migrate_kunit ============== [19:16:45] ==================== xe_bo_evict_kunit ==================== [19:16:45] =============== [SKIPPED] xe_bo_evict_kunit ================ [19:16:45] ===================== [SKIPPED] xe_bo ====================== [19:16:45] ==================== args (13 subtests) ==================== [19:16:45] [PASSED] count_args_test [19:16:45] [PASSED] call_args_example [19:16:45] [PASSED] call_args_test [19:16:45] [PASSED] drop_first_arg_example [19:16:45] [PASSED] drop_first_arg_test [19:16:45] [PASSED] first_arg_example [19:16:45] [PASSED] first_arg_test [19:16:45] [PASSED] last_arg_example [19:16:45] [PASSED] last_arg_test [19:16:45] [PASSED] pick_arg_example [19:16:45] [PASSED] if_args_example [19:16:45] [PASSED] if_args_test [19:16:45] [PASSED] sep_comma_example [19:16:45] ====================== [PASSED] args ======================= [19:16:45] =================== xe_pci (3 subtests) ==================== [19:16:45] ==================== check_graphics_ip ==================== [19:16:45] [PASSED] 12.00 Xe_LP [19:16:45] [PASSED] 12.10 Xe_LP+ [19:16:45] [PASSED] 12.55 Xe_HPG [19:16:45] [PASSED] 12.60 Xe_HPC [19:16:45] [PASSED] 12.70 Xe_LPG [19:16:45] [PASSED] 12.71 Xe_LPG [19:16:45] [PASSED] 12.74 Xe_LPG+ [19:16:45] [PASSED] 20.01 Xe2_HPG [19:16:45] [PASSED] 20.02 Xe2_HPG [19:16:45] [PASSED] 20.04 Xe2_LPG [19:16:45] [PASSED] 30.00 Xe3_LPG [19:16:45] [PASSED] 30.01 Xe3_LPG [19:16:45] [PASSED] 30.03 Xe3_LPG [19:16:45] [PASSED] 30.04 Xe3_LPG [19:16:45] [PASSED] 30.05 Xe3_LPG [19:16:45] [PASSED] 35.10 Xe3p_LPG [19:16:45] [PASSED] 35.11 Xe3p_XPC [19:16:45] ================ [PASSED] check_graphics_ip ================ [19:16:45] ===================== check_media_ip ====================== [19:16:45] [PASSED] 12.00 Xe_M [19:16:45] [PASSED] 12.55 Xe_HPM [19:16:45] [PASSED] 13.00 Xe_LPM+ [19:16:45] [PASSED] 13.01 Xe2_HPM [19:16:45] [PASSED] 20.00 Xe2_LPM [19:16:45] [PASSED] 30.00 Xe3_LPM [19:16:45] [PASSED] 30.02 Xe3_LPM [19:16:45] [PASSED] 35.00 Xe3p_LPM [19:16:45] [PASSED] 35.03 Xe3p_HPM [19:16:45] ================= [PASSED] check_media_ip ================== [19:16:45] =================== check_platform_desc =================== [19:16:45] [PASSED] 0x9A60 (TIGERLAKE) [19:16:45] [PASSED] 0x9A68 (TIGERLAKE) [19:16:45] [PASSED] 0x9A70 (TIGERLAKE) [19:16:45] [PASSED] 0x9A40 (TIGERLAKE) [19:16:45] [PASSED] 0x9A49 (TIGERLAKE) [19:16:45] [PASSED] 0x9A59 (TIGERLAKE) [19:16:45] [PASSED] 0x9A78 (TIGERLAKE) [19:16:45] [PASSED] 0x9AC0 (TIGERLAKE) [19:16:45] [PASSED] 0x9AC9 (TIGERLAKE) [19:16:45] [PASSED] 0x9AD9 (TIGERLAKE) [19:16:45] [PASSED] 0x9AF8 (TIGERLAKE) [19:16:45] [PASSED] 0x4C80 (ROCKETLAKE) [19:16:45] [PASSED] 0x4C8A (ROCKETLAKE) [19:16:45] [PASSED] 0x4C8B (ROCKETLAKE) [19:16:45] [PASSED] 0x4C8C (ROCKETLAKE) [19:16:45] [PASSED] 0x4C90 (ROCKETLAKE) [19:16:45] [PASSED] 0x4C9A (ROCKETLAKE) [19:16:45] [PASSED] 0x4680 (ALDERLAKE_S) [19:16:45] [PASSED] 0x4682 (ALDERLAKE_S) [19:16:45] [PASSED] 0x4688 (ALDERLAKE_S) [19:16:45] [PASSED] 0x468A (ALDERLAKE_S) [19:16:45] [PASSED] 0x468B (ALDERLAKE_S) [19:16:45] [PASSED] 0x4690 (ALDERLAKE_S) [19:16:45] [PASSED] 0x4692 (ALDERLAKE_S) [19:16:45] [PASSED] 0x4693 (ALDERLAKE_S) [19:16:45] [PASSED] 0x46A0 (ALDERLAKE_P) [19:16:45] [PASSED] 0x46A1 (ALDERLAKE_P) [19:16:45] [PASSED] 0x46A2 (ALDERLAKE_P) [19:16:45] [PASSED] 0x46A3 (ALDERLAKE_P) [19:16:45] [PASSED] 0x46A6 (ALDERLAKE_P) [19:16:45] [PASSED] 0x46A8 (ALDERLAKE_P) [19:16:45] [PASSED] 0x46AA (ALDERLAKE_P) [19:16:45] [PASSED] 0x462A (ALDERLAKE_P) [19:16:45] [PASSED] 0x4626 (ALDERLAKE_P) [19:16:45] [PASSED] 0x4628 (ALDERLAKE_P) [19:16:45] [PASSED] 0x46B0 (ALDERLAKE_P) [19:16:45] [PASSED] 0x46B1 (ALDERLAKE_P) [19:16:45] [PASSED] 0x46B2 (ALDERLAKE_P) [19:16:45] [PASSED] 0x46B3 (ALDERLAKE_P) [19:16:45] [PASSED] 0x46C0 (ALDERLAKE_P) [19:16:45] [PASSED] 0x46C1 (ALDERLAKE_P) [19:16:45] [PASSED] 0x46C2 (ALDERLAKE_P) [19:16:45] [PASSED] 0x46C3 (ALDERLAKE_P) [19:16:45] [PASSED] 0x46D0 (ALDERLAKE_N) [19:16:45] [PASSED] 0x46D1 (ALDERLAKE_N) [19:16:45] [PASSED] 0x46D2 (ALDERLAKE_N) [19:16:45] [PASSED] 0x46D3 (ALDERLAKE_N) [19:16:45] [PASSED] 0x46D4 (ALDERLAKE_N) [19:16:45] [PASSED] 0xA721 (ALDERLAKE_P) [19:16:45] [PASSED] 0xA7A1 (ALDERLAKE_P) [19:16:45] [PASSED] 0xA7A9 (ALDERLAKE_P) [19:16:45] [PASSED] 0xA7AC (ALDERLAKE_P) [19:16:45] [PASSED] 0xA7AD (ALDERLAKE_P) [19:16:45] [PASSED] 0xA720 (ALDERLAKE_P) [19:16:45] [PASSED] 0xA7A0 (ALDERLAKE_P) [19:16:45] [PASSED] 0xA7A8 (ALDERLAKE_P) [19:16:45] [PASSED] 0xA7AA (ALDERLAKE_P) [19:16:45] [PASSED] 0xA7AB (ALDERLAKE_P) [19:16:45] [PASSED] 0xA780 (ALDERLAKE_S) [19:16:45] [PASSED] 0xA781 (ALDERLAKE_S) [19:16:45] [PASSED] 0xA782 (ALDERLAKE_S) [19:16:45] [PASSED] 0xA783 (ALDERLAKE_S) [19:16:45] [PASSED] 0xA788 (ALDERLAKE_S) [19:16:45] [PASSED] 0xA789 (ALDERLAKE_S) [19:16:45] [PASSED] 0xA78A (ALDERLAKE_S) [19:16:45] [PASSED] 0xA78B (ALDERLAKE_S) [19:16:45] [PASSED] 0x4905 (DG1) [19:16:45] [PASSED] 0x4906 (DG1) [19:16:45] [PASSED] 0x4907 (DG1) [19:16:45] [PASSED] 0x4908 (DG1) [19:16:45] [PASSED] 0x4909 (DG1) [19:16:45] [PASSED] 0x56C0 (DG2) [19:16:45] [PASSED] 0x56C2 (DG2) [19:16:45] [PASSED] 0x56C1 (DG2) [19:16:45] [PASSED] 0x7D51 (METEORLAKE) [19:16:45] [PASSED] 0x7DD1 (METEORLAKE) [19:16:45] [PASSED] 0x7D41 (METEORLAKE) [19:16:45] [PASSED] 0x7D67 (METEORLAKE) [19:16:45] [PASSED] 0xB640 (METEORLAKE) [19:16:45] [PASSED] 0x56A0 (DG2) [19:16:45] [PASSED] 0x56A1 (DG2) [19:16:45] [PASSED] 0x56A2 (DG2) [19:16:45] [PASSED] 0x56BE (DG2) [19:16:45] [PASSED] 0x56BF (DG2) [19:16:45] [PASSED] 0x5690 (DG2) [19:16:45] [PASSED] 0x5691 (DG2) [19:16:45] [PASSED] 0x5692 (DG2) [19:16:45] [PASSED] 0x56A5 (DG2) [19:16:45] [PASSED] 0x56A6 (DG2) [19:16:45] [PASSED] 0x56B0 (DG2) [19:16:45] [PASSED] 0x56B1 (DG2) [19:16:45] [PASSED] 0x56BA (DG2) [19:16:45] [PASSED] 0x56BB (DG2) [19:16:45] [PASSED] 0x56BC (DG2) [19:16:45] [PASSED] 0x56BD (DG2) [19:16:45] [PASSED] 0x5693 (DG2) [19:16:45] [PASSED] 0x5694 (DG2) [19:16:45] [PASSED] 0x5695 (DG2) [19:16:45] [PASSED] 0x56A3 (DG2) [19:16:45] [PASSED] 0x56A4 (DG2) [19:16:45] [PASSED] 0x56B2 (DG2) [19:16:45] [PASSED] 0x56B3 (DG2) [19:16:45] [PASSED] 0x5696 (DG2) [19:16:45] [PASSED] 0x5697 (DG2) [19:16:45] [PASSED] 0xB69 (PVC) [19:16:45] [PASSED] 0xB6E (PVC) [19:16:45] [PASSED] 0xBD4 (PVC) [19:16:45] [PASSED] 0xBD5 (PVC) [19:16:45] [PASSED] 0xBD6 (PVC) [19:16:45] [PASSED] 0xBD7 (PVC) [19:16:45] [PASSED] 0xBD8 (PVC) [19:16:45] [PASSED] 0xBD9 (PVC) [19:16:45] [PASSED] 0xBDA (PVC) [19:16:45] [PASSED] 0xBDB (PVC) [19:16:45] [PASSED] 0xBE0 (PVC) [19:16:45] [PASSED] 0xBE1 (PVC) [19:16:45] [PASSED] 0xBE5 (PVC) [19:16:45] [PASSED] 0x7D40 (METEORLAKE) [19:16:45] [PASSED] 0x7D45 (METEORLAKE) [19:16:45] [PASSED] 0x7D55 (METEORLAKE) [19:16:45] [PASSED] 0x7D60 (METEORLAKE) [19:16:45] [PASSED] 0x7DD5 (METEORLAKE) [19:16:45] [PASSED] 0x6420 (LUNARLAKE) [19:16:45] [PASSED] 0x64A0 (LUNARLAKE) [19:16:45] [PASSED] 0x64B0 (LUNARLAKE) [19:16:45] [PASSED] 0xE202 (BATTLEMAGE) [19:16:45] [PASSED] 0xE209 (BATTLEMAGE) [19:16:45] [PASSED] 0xE20B (BATTLEMAGE) [19:16:45] [PASSED] 0xE20C (BATTLEMAGE) [19:16:45] [PASSED] 0xE20D (BATTLEMAGE) [19:16:45] [PASSED] 0xE210 (BATTLEMAGE) [19:16:45] [PASSED] 0xE211 (BATTLEMAGE) [19:16:45] [PASSED] 0xE212 (BATTLEMAGE) [19:16:45] [PASSED] 0xE216 (BATTLEMAGE) [19:16:45] [PASSED] 0xE220 (BATTLEMAGE) [19:16:45] [PASSED] 0xE221 (BATTLEMAGE) [19:16:45] [PASSED] 0xE222 (BATTLEMAGE) [19:16:45] [PASSED] 0xE223 (BATTLEMAGE) [19:16:45] [PASSED] 0xB080 (PANTHERLAKE) [19:16:45] [PASSED] 0xB081 (PANTHERLAKE) [19:16:45] [PASSED] 0xB082 (PANTHERLAKE) [19:16:45] [PASSED] 0xB083 (PANTHERLAKE) [19:16:45] [PASSED] 0xB084 (PANTHERLAKE) [19:16:45] [PASSED] 0xB085 (PANTHERLAKE) [19:16:45] [PASSED] 0xB086 (PANTHERLAKE) [19:16:45] [PASSED] 0xB087 (PANTHERLAKE) [19:16:45] [PASSED] 0xB08F (PANTHERLAKE) [19:16:45] [PASSED] 0xB090 (PANTHERLAKE) [19:16:45] [PASSED] 0xB0A0 (PANTHERLAKE) [19:16:45] [PASSED] 0xB0B0 (PANTHERLAKE) [19:16:45] [PASSED] 0xFD80 (PANTHERLAKE) [19:16:45] [PASSED] 0xFD81 (PANTHERLAKE) [19:16:45] [PASSED] 0xD740 (NOVALAKE_S) [19:16:45] [PASSED] 0xD741 (NOVALAKE_S) [19:16:45] [PASSED] 0xD742 (NOVALAKE_S) [19:16:45] [PASSED] 0xD743 (NOVALAKE_S) [19:16:45] [PASSED] 0xD745 (NOVALAKE_S) [19:16:45] [PASSED] 0xD74A (NOVALAKE_S) [19:16:45] [PASSED] 0xD74B (NOVALAKE_S) [19:16:45] [PASSED] 0x674C (CRESCENTISLAND) [19:16:45] [PASSED] 0x674D (CRESCENTISLAND) [19:16:45] [PASSED] 0x674E (CRESCENTISLAND) [19:16:45] [PASSED] 0x674F (CRESCENTISLAND) [19:16:45] [PASSED] 0x6750 (CRESCENTISLAND) [19:16:45] [PASSED] 0xD750 (NOVALAKE_P) [19:16:45] [PASSED] 0xD751 (NOVALAKE_P) [19:16:45] [PASSED] 0xD752 (NOVALAKE_P) [19:16:45] [PASSED] 0xD753 (NOVALAKE_P) [19:16:45] [PASSED] 0xD754 (NOVALAKE_P) [19:16:45] [PASSED] 0xD755 (NOVALAKE_P) [19:16:45] [PASSED] 0xD756 (NOVALAKE_P) [19:16:45] [PASSED] 0xD757 (NOVALAKE_P) [19:16:45] [PASSED] 0xD75F (NOVALAKE_P) [19:16:45] =============== [PASSED] check_platform_desc =============== [19:16:45] ===================== [PASSED] xe_pci ====================== [19:16:45] ============= xe_rtp_tables_test (5 subtests) ============== [19:16:45] ================== xe_rtp_table_gt_test =================== [19:16:45] [PASSED] gt_was/14011060649 [19:16:45] [PASSED] gt_was/14011059788 [19:16:45] [PASSED] gt_was/14015795083 [19:16:45] [PASSED] gt_was/16021867713 [19:16:45] [PASSED] gt_was/14019449301 [19:16:45] [PASSED] gt_was/16028005424 [19:16:45] [PASSED] gt_was/14026578760 [19:16:45] [PASSED] gt_was/1409420604 [19:16:45] [PASSED] gt_was/1408615072 [19:16:45] [PASSED] gt_was/22010523718 [19:16:45] [PASSED] gt_was/14011006942 [19:16:45] [PASSED] gt_was/14014830051 [19:16:45] [PASSED] gt_was/18018781329 [19:16:45] [PASSED] gt_was/1509235366 [19:16:45] [PASSED] gt_was/18018781329 [19:16:45] [PASSED] gt_was/16016694945 [19:16:45] [PASSED] gt_was/14018575942 [19:16:45] [PASSED] gt_was/22016670082 [19:16:45] [PASSED] gt_was/22016670082 [19:16:45] [PASSED] gt_was/14017421178 [19:16:45] [PASSED] gt_was/16025250150 [19:16:45] [PASSED] gt_was/14021871409 [19:16:45] [PASSED] gt_was/16021865536 [19:16:45] [PASSED] gt_was/14021486841 [19:16:45] [PASSED] gt_was/14025160223 [19:16:45] [PASSED] gt_was/14026144927, 16029437861, 14026127056 [19:16:45] [PASSED] gt_was/14025635424 [19:16:45] [PASSED] gt_was/16028005424 [19:16:45] ============== [PASSED] xe_rtp_table_gt_test =============== [19:16:45] ================== xe_rtp_table_gt_test =================== [19:16:45] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable [19:16:45] [PASSED] gt_tunings/Tuning: 32B Access Enable [19:16:45] [PASSED] gt_tunings/Tuning: L3 cache [19:16:45] [PASSED] gt_tunings/Tuning: L3 cache - media [19:16:45] [PASSED] gt_tunings/Tuning: Compression Overfetch [19:16:45] [PASSED] gt_tunings/Tuning: Compression Overfetch - media [19:16:45] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 [19:16:45] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media [19:16:45] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only [19:16:45] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media [19:16:45] [PASSED] gt_tunings/Tuning: Stateless compression control [19:16:45] [PASSED] gt_tunings/Tuning: Stateless compression control - media [19:16:45] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache [19:16:45] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media [19:16:45] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB [19:16:45] ============== [PASSED] xe_rtp_table_gt_test =============== [19:16:45] ================== xe_rtp_table_oob_test ================== [19:16:45] [PASSED] oob_was/1607983814 [19:16:45] [PASSED] oob_was/16010904313 [19:16:45] [PASSED] oob_was/18022495364 [19:16:45] [PASSED] oob_was/22012773006 [19:16:45] [PASSED] oob_was/14014475959 [19:16:45] [PASSED] oob_was/22011391025 [19:16:45] [PASSED] oob_was/22012727170 [19:16:45] [PASSED] oob_was/22012727685 [19:16:45] [PASSED] oob_was/22016596838 [19:16:45] [PASSED] oob_was/18020744125 [19:16:45] [PASSED] oob_was/1409600907 [19:16:45] [PASSED] oob_was/22014953428 [19:16:45] [PASSED] oob_was/16017236439 [19:16:45] [PASSED] oob_was/14019821291 [19:16:45] [PASSED] oob_was/14015076503 [19:16:45] [PASSED] oob_was/14018913170 [19:16:45] [PASSED] oob_was/14018094691 [19:16:45] [PASSED] oob_was/18024947630 [19:16:45] [PASSED] oob_was/16022287689 [19:16:45] [PASSED] oob_was/13011645652 [19:16:45] [PASSED] oob_was/14022293748 [19:16:45] [PASSED] oob_was/22019794406 [19:16:45] [PASSED] oob_was/22019338487 [19:16:45] [PASSED] oob_was/16023588340 [19:16:45] [PASSED] oob_was/14019789679 [19:16:45] [PASSED] oob_was/14022866841 [19:16:45] [PASSED] oob_was/16021333562 [19:16:45] [PASSED] oob_was/14016712196 [19:16:45] [PASSED] oob_was/14015568240 [19:16:45] [PASSED] oob_was/18013179988 [19:16:45] [PASSED] oob_was/1508761755 [19:16:45] [PASSED] oob_was/16023105232 [19:16:45] [PASSED] oob_was/16026508708 [19:16:45] [PASSED] oob_was/14020001231 [19:16:45] [PASSED] oob_was/16023683509 [19:16:45] [PASSED] oob_was/14025515070 [19:16:45] [PASSED] oob_was/15015404425_disable [19:16:45] [PASSED] oob_was/16026007364 [19:16:45] [PASSED] oob_was/14020316580 [19:16:45] [PASSED] oob_was/14025883347 [19:16:45] [PASSED] oob_was/16029380221 [19:16:45] [PASSED] oob_was/22022079272 [19:16:45] [PASSED] oob_was/16029897822 [19:16:45] ============== [PASSED] xe_rtp_table_oob_test ============== [19:16:45] ================ xe_rtp_table_dev_oob_test ================ [19:16:45] [PASSED] device_oob_was/22010954014 [19:16:45] [PASSED] device_oob_was/15015404425 [19:16:45] [PASSED] device_oob_was/22019338487_display [19:16:45] [PASSED] device_oob_was/14022085890 [19:16:45] [PASSED] device_oob_was/14026539277 [19:16:45] [PASSED] device_oob_was/14026633728 [19:16:45] [PASSED] device_oob_was/14026746987 [19:16:45] [PASSED] device_oob_was/14026779378 [19:16:45] ============ [PASSED] xe_rtp_table_dev_oob_test ============ [19:16:45] ========== xe_rtp_table_missing_upper_bound_test ========== [19:16:45] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865 [19:16:45] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037 [19:16:45] [PASSED] register_whitelist/1806527549 [19:16:45] [PASSED] register_whitelist/allow_read_ctx_timestamp [19:16:45] [PASSED] register_whitelist/allow_read_queue_timestamp [19:16:45] [PASSED] register_whitelist/16014440446 [19:16:45] [PASSED] register_whitelist/16017236439 [19:16:45] [PASSED] register_whitelist/16020183090 [19:16:45] [PASSED] register_whitelist/14024997852 [19:16:45] [PASSED] register_whitelist/14024997852 [19:16:45] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ====== [19:16:45] =============== [PASSED] xe_rtp_tables_test ================ [19:16:45] =================== xe_rtp (3 subtests) ==================== [19:16:45] =================== xe_rtp_rules_tests ==================== [19:16:45] [PASSED] no [19:16:45] [PASSED] yes [19:16:45] [PASSED] no-and-no [19:16:45] [PASSED] no-and-yes [19:16:45] [PASSED] yes-and-no [19:16:45] [PASSED] yes-and-yes [19:16:45] [PASSED] no-or-no [19:16:45] [PASSED] no-or-yes [19:16:45] [PASSED] yes-or-no [19:16:45] [PASSED] yes-or-yes [19:16:45] [PASSED] no-yes-or-yes-no [19:16:45] [PASSED] no-yes-or-yes-yes [19:16:45] [PASSED] yes-yes-or-no-yes [19:16:45] [PASSED] yes-yes-or-yes-yes [19:16:45] [PASSED] no-no-or-yes-or-no [19:16:45] [PASSED] or [19:16:45] [PASSED] or-yes [19:16:45] [PASSED] or-no [19:16:45] [PASSED] yes-or [19:16:45] [PASSED] no-or [19:16:45] [PASSED] no-or-or-yes [19:16:45] [PASSED] yes-or-or-no [19:16:45] [PASSED] no-or-or-no [19:16:45] [PASSED] missing-context-engine-class [19:16:45] [PASSED] missing-context-engine-class-or-yes [19:16:45] [PASSED] missing-context-engine-class-or-or-yes [19:16:45] =============== [PASSED] xe_rtp_rules_tests ================ [19:16:45] =============== xe_rtp_process_to_sr_tests ================ [19:16:45] [PASSED] coalesce-same-reg [19:16:45] [PASSED] coalesce-same-reg-literal-and-func [19:16:45] [PASSED] no-match-no-add [19:16:45] [PASSED] two-regs-two-entries [19:16:45] [PASSED] clr-one-set-other [19:16:45] [PASSED] set-field [19:16:45] [PASSED] conflict-duplicate [19:16:45] [PASSED] conflict-not-disjoint [19:16:45] [PASSED] conflict-not-disjoint-literal-and-func [19:16:45] [PASSED] conflict-reg-type [19:16:45] [PASSED] bad-mcr-reg-forced-to-regular [19:16:45] [PASSED] bad-regular-reg-forced-to-mcr [19:16:45] =========== [PASSED] xe_rtp_process_to_sr_tests ============ [19:16:45] ================== xe_rtp_process_tests =================== [19:16:45] [PASSED] active1 [19:16:45] [PASSED] active2 [19:16:45] [PASSED] active-inactive [19:16:45] [PASSED] inactive-active [19:16:45] [PASSED] inactive-active-inactive [19:16:45] [PASSED] inactive-inactive-inactive [19:16:45] ============== [PASSED] xe_rtp_process_tests =============== [19:16:45] ===================== [PASSED] xe_rtp ====================== [19:16:45] ==================== xe_wa (1 subtest) ===================== [19:16:45] ======================== xe_wa_gt ========================= [19:16:45] [PASSED] TIGERLAKE B0 [19:16:45] [PASSED] DG1 A0 [19:16:45] [PASSED] DG1 B0 [19:16:45] [PASSED] ALDERLAKE_S A0 [19:16:45] [PASSED] ALDERLAKE_S B0 [19:16:45] [PASSED] ALDERLAKE_S C0 [19:16:45] [PASSED] ALDERLAKE_S D0 [19:16:45] [PASSED] ALDERLAKE_P A0 [19:16:45] [PASSED] ALDERLAKE_P B0 [19:16:45] [PASSED] ALDERLAKE_P C0 [19:16:45] [PASSED] ALDERLAKE_S RPLS D0 [19:16:45] [PASSED] ALDERLAKE_P RPLU E0 [19:16:45] [PASSED] DG2 G10 C0 [19:16:45] [PASSED] DG2 G11 B1 [19:16:45] [PASSED] DG2 G12 A1 [19:16:45] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0 [19:16:45] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0 [19:16:45] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0 [19:16:45] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0 [19:16:45] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0 [19:16:45] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1 [19:16:45] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0 [19:16:45] ==================== [PASSED] xe_wa_gt ===================== [19:16:45] ====================== [PASSED] xe_wa ====================== [19:16:45] ============================================================ [19:16:45] Testing complete. Ran 741 tests: passed: 723, skipped: 18 [19:16:45] Elapsed time: 36.439s total, 4.325s configuring, 31.447s building, 0.632s running + /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig [19:16:46] Configuring KUnit Kernel ... Regenerating .config ... Populating config with: $ make ARCH=um O=.kunit olddefconfig [19:16:47] Building KUnit Kernel ... Populating config with: $ make ARCH=um O=.kunit olddefconfig Building with: $ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48 [19:17:12] Starting KUnit Kernel (1/1)... [19:17:12] ============================================================ Running tests with: $ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt [19:17:12] ============ drm_test_pick_cmdline (2 subtests) ============ [19:17:12] [PASSED] drm_test_pick_cmdline_res_1920_1080_60 [19:17:12] =============== drm_test_pick_cmdline_named =============== [19:17:12] [PASSED] NTSC [19:17:12] [PASSED] NTSC-J [19:17:12] [PASSED] PAL [19:17:12] [PASSED] PAL-M [19:17:12] =========== [PASSED] drm_test_pick_cmdline_named =========== [19:17:12] ============== [PASSED] drm_test_pick_cmdline ============== [19:17:12] == drm_test_atomic_get_connector_for_encoder (1 subtest) === [19:17:12] [PASSED] drm_test_drm_atomic_get_connector_for_encoder [19:17:12] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ==== [19:17:12] =========== drm_validate_clone_mode (2 subtests) =========== [19:17:12] ============== drm_test_check_in_clone_mode =============== [19:17:12] [PASSED] in_clone_mode [19:17:12] [PASSED] not_in_clone_mode [19:17:12] ========== [PASSED] drm_test_check_in_clone_mode =========== [19:17:12] =============== drm_test_check_valid_clones =============== [19:17:12] [PASSED] not_in_clone_mode [19:17:12] [PASSED] valid_clone [19:17:12] [PASSED] invalid_clone [19:17:12] =========== [PASSED] drm_test_check_valid_clones =========== [19:17:12] ============= [PASSED] drm_validate_clone_mode ============= [19:17:12] ============= drm_validate_modeset (1 subtest) ============= [19:17:12] [PASSED] drm_test_check_connector_changed_modeset [19:17:12] ============== [PASSED] drm_validate_modeset =============== [19:17:12] ====== drm_test_bridge_get_current_state (1 subtest) ======= [19:17:12] [PASSED] drm_test_drm_bridge_get_current_state_atomic [19:17:12] ======== [PASSED] drm_test_bridge_get_current_state ======== [19:17:12] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ====== [19:17:12] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic [19:17:12] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled [19:17:12] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts [19:17:12] ======== [PASSED] drm_test_bridge_helper_reset_crtc ======== [19:17:12] ============== drm_bridge_alloc (2 subtests) =============== [19:17:12] [PASSED] drm_test_drm_bridge_alloc_basic [19:17:12] [PASSED] drm_test_drm_bridge_alloc_get_put [19:17:12] ================ [PASSED] drm_bridge_alloc ================= [19:17:12] ============= drm_bridge_bus_fmt (5 subtests) ============== [19:17:12] [PASSED] drm_test_bridge_rgb_yuv_rgb [19:17:12] [PASSED] drm_test_bridge_must_convert_to_yuv444 [19:17:12] [PASSED] drm_test_bridge_hdmi_auto_rgb [19:17:12] [PASSED] drm_test_bridge_auto_first [19:17:12] [PASSED] drm_test_bridge_rgb_yuv_no_path [19:17:12] =============== [PASSED] drm_bridge_bus_fmt ================ [19:17:12] ============= drm_cmdline_parser (40 subtests) ============= [19:17:12] [PASSED] drm_test_cmdline_force_d_only [19:17:12] [PASSED] drm_test_cmdline_force_D_only_dvi [19:17:12] [PASSED] drm_test_cmdline_force_D_only_hdmi [19:17:12] [PASSED] drm_test_cmdline_force_D_only_not_digital [19:17:12] [PASSED] drm_test_cmdline_force_e_only [19:17:12] [PASSED] drm_test_cmdline_res [19:17:12] [PASSED] drm_test_cmdline_res_vesa [19:17:12] [PASSED] drm_test_cmdline_res_vesa_rblank [19:17:12] [PASSED] drm_test_cmdline_res_rblank [19:17:12] [PASSED] drm_test_cmdline_res_bpp [19:17:12] [PASSED] drm_test_cmdline_res_refresh [19:17:12] [PASSED] drm_test_cmdline_res_bpp_refresh [19:17:12] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced [19:17:12] [PASSED] drm_test_cmdline_res_bpp_refresh_margins [19:17:12] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off [19:17:12] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on [19:17:12] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog [19:17:12] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital [19:17:12] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on [19:17:12] [PASSED] drm_test_cmdline_res_margins_force_on [19:17:12] [PASSED] drm_test_cmdline_res_vesa_margins [19:17:12] [PASSED] drm_test_cmdline_name [19:17:12] [PASSED] drm_test_cmdline_name_bpp [19:17:12] [PASSED] drm_test_cmdline_name_option [19:17:12] [PASSED] drm_test_cmdline_name_bpp_option [19:17:12] [PASSED] drm_test_cmdline_rotate_0 [19:17:12] [PASSED] drm_test_cmdline_rotate_90 [19:17:12] [PASSED] drm_test_cmdline_rotate_180 [19:17:12] [PASSED] drm_test_cmdline_rotate_270 [19:17:12] [PASSED] drm_test_cmdline_hmirror [19:17:12] [PASSED] drm_test_cmdline_vmirror [19:17:12] [PASSED] drm_test_cmdline_margin_options [19:17:12] [PASSED] drm_test_cmdline_multiple_options [19:17:12] [PASSED] drm_test_cmdline_bpp_extra_and_option [19:17:12] [PASSED] drm_test_cmdline_extra_and_option [19:17:12] [PASSED] drm_test_cmdline_freestanding_options [19:17:12] [PASSED] drm_test_cmdline_freestanding_force_e_and_options [19:17:12] [PASSED] drm_test_cmdline_panel_orientation [19:17:12] ================ drm_test_cmdline_invalid ================= [19:17:12] [PASSED] margin_only [19:17:12] [PASSED] interlace_only [19:17:12] [PASSED] res_missing_x [19:17:12] [PASSED] res_missing_y [19:17:12] [PASSED] res_bad_y [19:17:12] [PASSED] res_missing_y_bpp [19:17:12] [PASSED] res_bad_bpp [19:17:12] [PASSED] res_bad_refresh [19:17:12] [PASSED] res_bpp_refresh_force_on_off [19:17:12] [PASSED] res_invalid_mode [19:17:12] [PASSED] res_bpp_wrong_place_mode [19:17:12] [PASSED] name_bpp_refresh [19:17:12] [PASSED] name_refresh [19:17:12] [PASSED] name_refresh_wrong_mode [19:17:12] [PASSED] name_refresh_invalid_mode [19:17:12] [PASSED] rotate_multiple [19:17:12] [PASSED] rotate_invalid_val [19:17:12] [PASSED] rotate_truncated [19:17:12] [PASSED] invalid_option [19:17:12] [PASSED] invalid_tv_option [19:17:12] [PASSED] truncated_tv_option [19:17:12] ============ [PASSED] drm_test_cmdline_invalid ============= [19:17:12] =============== drm_test_cmdline_tv_options =============== [19:17:12] [PASSED] NTSC [19:17:12] [PASSED] NTSC_443 [19:17:12] [PASSED] NTSC_J [19:17:12] [PASSED] PAL [19:17:12] [PASSED] PAL_M [19:17:12] [PASSED] PAL_N [19:17:12] [PASSED] SECAM [19:17:12] [PASSED] MONO_525 [19:17:12] [PASSED] MONO_625 [19:17:12] =========== [PASSED] drm_test_cmdline_tv_options =========== [19:17:12] =============== [PASSED] drm_cmdline_parser ================ [19:17:12] ========== drmm_connector_hdmi_init (20 subtests) ========== [19:17:12] [PASSED] drm_test_connector_hdmi_init_valid [19:17:12] [PASSED] drm_test_connector_hdmi_init_bpc_8 [19:17:12] [PASSED] drm_test_connector_hdmi_init_bpc_10 [19:17:12] [PASSED] drm_test_connector_hdmi_init_bpc_12 [19:17:12] [PASSED] drm_test_connector_hdmi_init_bpc_invalid [19:17:12] [PASSED] drm_test_connector_hdmi_init_bpc_null [19:17:12] [PASSED] drm_test_connector_hdmi_init_formats_empty [19:17:12] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb [19:17:12] === drm_test_connector_hdmi_init_formats_yuv420_allowed === [19:17:12] [PASSED] supported_formats=0x9 yuv420_allowed=1 [19:17:12] [PASSED] supported_formats=0x9 yuv420_allowed=0 [19:17:12] [PASSED] supported_formats=0x5 yuv420_allowed=1 [19:17:12] [PASSED] supported_formats=0x5 yuv420_allowed=0 [19:17:12] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed === [19:17:12] [PASSED] drm_test_connector_hdmi_init_null_ddc [19:17:12] [PASSED] drm_test_connector_hdmi_init_null_product [19:17:12] [PASSED] drm_test_connector_hdmi_init_null_vendor [19:17:12] [PASSED] drm_test_connector_hdmi_init_product_length_exact [19:17:12] [PASSED] drm_test_connector_hdmi_init_product_length_too_long [19:17:12] [PASSED] drm_test_connector_hdmi_init_product_valid [19:17:12] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact [19:17:12] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long [19:17:12] [PASSED] drm_test_connector_hdmi_init_vendor_valid [19:17:12] ========= drm_test_connector_hdmi_init_type_valid ========= [19:17:12] [PASSED] HDMI-A [19:17:12] [PASSED] HDMI-B [19:17:12] ===== [PASSED] drm_test_connector_hdmi_init_type_valid ===== [19:17:12] ======== drm_test_connector_hdmi_init_type_invalid ======== [19:17:12] [PASSED] Unknown [19:17:12] [PASSED] VGA [19:17:12] [PASSED] DVI-I [19:17:12] [PASSED] DVI-D [19:17:12] [PASSED] DVI-A [19:17:12] [PASSED] Composite [19:17:12] [PASSED] SVIDEO [19:17:12] [PASSED] LVDS [19:17:12] [PASSED] Component [19:17:12] [PASSED] DIN [19:17:12] [PASSED] DP [19:17:12] [PASSED] TV [19:17:12] [PASSED] eDP [19:17:12] [PASSED] Virtual [19:17:12] [PASSED] DSI [19:17:12] [PASSED] DPI [19:17:12] [PASSED] Writeback [19:17:12] [PASSED] SPI [19:17:12] [PASSED] USB [19:17:12] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ==== [19:17:12] ============ [PASSED] drmm_connector_hdmi_init ============= [19:17:12] ============= drmm_connector_init (3 subtests) ============= [19:17:12] [PASSED] drm_test_drmm_connector_init [19:17:12] [PASSED] drm_test_drmm_connector_init_null_ddc [19:17:12] ========= drm_test_drmm_connector_init_type_valid ========= [19:17:12] [PASSED] Unknown [19:17:12] [PASSED] VGA [19:17:12] [PASSED] DVI-I [19:17:12] [PASSED] DVI-D [19:17:12] [PASSED] DVI-A [19:17:12] [PASSED] Composite [19:17:12] [PASSED] SVIDEO [19:17:12] [PASSED] LVDS [19:17:12] [PASSED] Component [19:17:12] [PASSED] DIN [19:17:12] [PASSED] DP [19:17:12] [PASSED] HDMI-A [19:17:12] [PASSED] HDMI-B [19:17:12] [PASSED] TV [19:17:12] [PASSED] eDP [19:17:12] [PASSED] Virtual [19:17:12] [PASSED] DSI [19:17:12] [PASSED] DPI [19:17:12] [PASSED] Writeback [19:17:12] [PASSED] SPI [19:17:12] [PASSED] USB [19:17:12] ===== [PASSED] drm_test_drmm_connector_init_type_valid ===== [19:17:12] =============== [PASSED] drmm_connector_init =============== [19:17:12] ========= drm_connector_dynamic_init (6 subtests) ========== [19:17:12] [PASSED] drm_test_drm_connector_dynamic_init [19:17:12] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc [19:17:12] [PASSED] drm_test_drm_connector_dynamic_init_not_added [19:17:12] [PASSED] drm_test_drm_connector_dynamic_init_properties [19:17:12] ===== drm_test_drm_connector_dynamic_init_type_valid ====== [19:17:12] [PASSED] Unknown [19:17:12] [PASSED] VGA [19:17:12] [PASSED] DVI-I [19:17:12] [PASSED] DVI-D [19:17:12] [PASSED] DVI-A [19:17:12] [PASSED] Composite [19:17:12] [PASSED] SVIDEO [19:17:12] [PASSED] LVDS [19:17:12] [PASSED] Component [19:17:12] [PASSED] DIN [19:17:12] [PASSED] DP [19:17:12] [PASSED] HDMI-A [19:17:12] [PASSED] HDMI-B [19:17:12] [PASSED] TV [19:17:12] [PASSED] eDP [19:17:12] [PASSED] Virtual [19:17:12] [PASSED] DSI [19:17:12] [PASSED] DPI [19:17:12] [PASSED] Writeback [19:17:12] [PASSED] SPI [19:17:12] [PASSED] USB [19:17:12] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid == [19:17:12] ======== drm_test_drm_connector_dynamic_init_name ========= [19:17:12] [PASSED] Unknown [19:17:12] [PASSED] VGA [19:17:12] [PASSED] DVI-I [19:17:12] [PASSED] DVI-D [19:17:12] [PASSED] DVI-A [19:17:12] [PASSED] Composite [19:17:12] [PASSED] SVIDEO [19:17:12] [PASSED] LVDS [19:17:12] [PASSED] Component [19:17:12] [PASSED] DIN [19:17:12] [PASSED] DP [19:17:12] [PASSED] HDMI-A [19:17:12] [PASSED] HDMI-B [19:17:12] [PASSED] TV [19:17:12] [PASSED] eDP [19:17:12] [PASSED] Virtual [19:17:12] [PASSED] DSI [19:17:12] [PASSED] DPI [19:17:12] [PASSED] Writeback [19:17:12] [PASSED] SPI [19:17:12] [PASSED] USB [19:17:12] ==== [PASSED] drm_test_drm_connector_dynamic_init_name ===== [19:17:12] =========== [PASSED] drm_connector_dynamic_init ============ [19:17:12] ==== drm_connector_dynamic_register_early (4 subtests) ===== [19:17:12] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list [19:17:12] [PASSED] drm_test_drm_connector_dynamic_register_early_defer [19:17:12] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init [19:17:12] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object [19:17:12] ====== [PASSED] drm_connector_dynamic_register_early ======= [19:17:12] ======= drm_connector_dynamic_register (7 subtests) ======== [19:17:12] [PASSED] drm_test_drm_connector_dynamic_register_on_list [19:17:12] [PASSED] drm_test_drm_connector_dynamic_register_no_defer [19:17:12] [PASSED] drm_test_drm_connector_dynamic_register_no_init [19:17:12] [PASSED] drm_test_drm_connector_dynamic_register_mode_object [19:17:12] [PASSED] drm_test_drm_connector_dynamic_register_sysfs [19:17:12] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name [19:17:12] [PASSED] drm_test_drm_connector_dynamic_register_debugfs [19:17:12] ========= [PASSED] drm_connector_dynamic_register ========== [19:17:12] = drm_connector_attach_broadcast_rgb_property (2 subtests) = [19:17:12] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property [19:17:12] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector [19:17:12] === [PASSED] drm_connector_attach_broadcast_rgb_property === [19:17:12] ========== drm_get_tv_mode_from_name (2 subtests) ========== [19:17:12] ========== drm_test_get_tv_mode_from_name_valid =========== [19:17:12] [PASSED] NTSC [19:17:12] [PASSED] NTSC-443 [19:17:12] [PASSED] NTSC-J [19:17:12] [PASSED] PAL [19:17:12] [PASSED] PAL-M [19:17:12] [PASSED] PAL-N [19:17:12] [PASSED] SECAM [19:17:12] [PASSED] Mono [19:17:12] ====== [PASSED] drm_test_get_tv_mode_from_name_valid ======= [19:17:12] [PASSED] drm_test_get_tv_mode_from_name_truncated [19:17:12] ============ [PASSED] drm_get_tv_mode_from_name ============ [19:17:12] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) = [19:17:12] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb [19:17:12] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc [19:17:12] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1 [19:17:12] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc [19:17:12] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1 [19:17:12] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double [19:17:12] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid = [19:17:12] [PASSED] VIC 96 [19:17:12] [PASSED] VIC 97 [19:17:12] [PASSED] VIC 101 [19:17:12] [PASSED] VIC 102 [19:17:12] [PASSED] VIC 106 [19:17:12] [PASSED] VIC 107 [19:17:12] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid === [19:17:12] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc [19:17:12] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc [19:17:12] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc [19:17:12] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc [19:17:12] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc [19:17:12] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ==== [19:17:12] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) == [19:17:12] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ==== [19:17:12] [PASSED] Automatic [19:17:12] [PASSED] Full [19:17:12] [PASSED] Limited 16:235 [19:17:12] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name === [19:17:12] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid [19:17:12] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ==== [19:17:12] == drm_hdmi_connector_get_output_format_name (2 subtests) == [19:17:12] === drm_test_drm_hdmi_connector_get_output_format_name ==== [19:17:12] [PASSED] RGB [19:17:12] [PASSED] YUV 4:2:0 [19:17:12] [PASSED] YUV 4:2:2 [19:17:12] [PASSED] YUV 4:4:4 [19:17:12] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name === [19:17:12] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid [19:17:12] ==== [PASSED] drm_hdmi_connector_get_output_format_name ==== [19:17:12] ============= drm_damage_helper (21 subtests) ============== [19:17:12] [PASSED] drm_test_damage_iter_no_damage [19:17:12] [PASSED] drm_test_damage_iter_no_damage_fractional_src [19:17:12] [PASSED] drm_test_damage_iter_no_damage_src_moved [19:17:12] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved [19:17:12] [PASSED] drm_test_damage_iter_no_damage_not_visible [19:17:12] [PASSED] drm_test_damage_iter_no_damage_no_crtc [19:17:12] [PASSED] drm_test_damage_iter_no_damage_no_fb [19:17:12] [PASSED] drm_test_damage_iter_simple_damage [19:17:12] [PASSED] drm_test_damage_iter_single_damage [19:17:12] [PASSED] drm_test_damage_iter_single_damage_intersect_src [19:17:12] [PASSED] drm_test_damage_iter_single_damage_outside_src [19:17:12] [PASSED] drm_test_damage_iter_single_damage_fractional_src [19:17:12] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src [19:17:12] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src [19:17:12] [PASSED] drm_test_damage_iter_single_damage_src_moved [19:17:12] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved [19:17:12] [PASSED] drm_test_damage_iter_damage [19:17:12] [PASSED] drm_test_damage_iter_damage_one_intersect [19:17:12] [PASSED] drm_test_damage_iter_damage_one_outside [19:17:12] [PASSED] drm_test_damage_iter_damage_src_moved [19:17:12] [PASSED] drm_test_damage_iter_damage_not_visible [19:17:12] ================ [PASSED] drm_damage_helper ================ [19:17:12] ============== drm_dp_mst_helper (3 subtests) ============== [19:17:12] ============== drm_test_dp_mst_calc_pbn_mode ============== [19:17:12] [PASSED] Clock 154000 BPP 30 DSC disabled [19:17:12] [PASSED] Clock 234000 BPP 30 DSC disabled [19:17:12] [PASSED] Clock 297000 BPP 24 DSC disabled [19:17:12] [PASSED] Clock 332880 BPP 24 DSC enabled [19:17:12] [PASSED] Clock 324540 BPP 24 DSC enabled [19:17:12] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ========== [19:17:12] ============== drm_test_dp_mst_calc_pbn_div =============== [19:17:12] [PASSED] Link rate 2000000 lane count 4 [19:17:12] [PASSED] Link rate 2000000 lane count 2 [19:17:12] [PASSED] Link rate 2000000 lane count 1 [19:17:12] [PASSED] Link rate 1350000 lane count 4 [19:17:12] [PASSED] Link rate 1350000 lane count 2 [19:17:12] [PASSED] Link rate 1350000 lane count 1 [19:17:12] [PASSED] Link rate 1000000 lane count 4 [19:17:12] [PASSED] Link rate 1000000 lane count 2 [19:17:12] [PASSED] Link rate 1000000 lane count 1 [19:17:12] [PASSED] Link rate 810000 lane count 4 [19:17:12] [PASSED] Link rate 810000 lane count 2 [19:17:12] [PASSED] Link rate 810000 lane count 1 [19:17:12] [PASSED] Link rate 540000 lane count 4 [19:17:12] [PASSED] Link rate 540000 lane count 2 [19:17:12] [PASSED] Link rate 540000 lane count 1 [19:17:12] [PASSED] Link rate 270000 lane count 4 [19:17:12] [PASSED] Link rate 270000 lane count 2 [19:17:12] [PASSED] Link rate 270000 lane count 1 [19:17:12] [PASSED] Link rate 162000 lane count 4 [19:17:12] [PASSED] Link rate 162000 lane count 2 [19:17:12] [PASSED] Link rate 162000 lane count 1 [19:17:12] ========== [PASSED] drm_test_dp_mst_calc_pbn_div =========== [19:17:12] ========= drm_test_dp_mst_sideband_msg_req_decode ========= [19:17:12] [PASSED] DP_ENUM_PATH_RESOURCES with port number [19:17:12] [PASSED] DP_POWER_UP_PHY with port number [19:17:12] [PASSED] DP_POWER_DOWN_PHY with port number [19:17:12] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks [19:17:12] [PASSED] DP_ALLOCATE_PAYLOAD with port number [19:17:12] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI [19:17:12] [PASSED] DP_ALLOCATE_PAYLOAD with PBN [19:17:12] [PASSED] DP_QUERY_PAYLOAD with port number [19:17:12] [PASSED] DP_QUERY_PAYLOAD with VCPI [19:17:12] [PASSED] DP_REMOTE_DPCD_READ with port number [19:17:12] [PASSED] DP_REMOTE_DPCD_READ with DPCD address [19:17:12] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes [19:17:12] [PASSED] DP_REMOTE_DPCD_WRITE with port number [19:17:12] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address [19:17:12] [PASSED] DP_REMOTE_DPCD_WRITE with data array [19:17:12] [PASSED] DP_REMOTE_I2C_READ with port number [19:17:12] [PASSED] DP_REMOTE_I2C_READ with I2C device ID [19:17:12] [PASSED] DP_REMOTE_I2C_READ with transactions array [19:17:12] [PASSED] DP_REMOTE_I2C_WRITE with port number [19:17:12] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID [19:17:12] [PASSED] DP_REMOTE_I2C_WRITE with data array [19:17:12] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID [19:17:12] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID [19:17:12] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event [19:17:12] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event [19:17:12] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior [19:17:12] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior [19:17:12] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode ===== [19:17:12] ================ [PASSED] drm_dp_mst_helper ================ [19:17:12] ================== drm_exec (7 subtests) =================== [19:17:12] [PASSED] sanitycheck [19:17:12] [PASSED] test_lock [19:17:12] [PASSED] test_lock_unlock [19:17:12] [PASSED] test_duplicates [19:17:12] [PASSED] test_prepare [19:17:12] [PASSED] test_prepare_array [19:17:12] [PASSED] test_multiple_loops [19:17:12] ==================== [PASSED] drm_exec ===================== [19:17:12] =========== drm_format_helper_test (17 subtests) =========== [19:17:12] ============== drm_test_fb_xrgb8888_to_gray8 ============== [19:17:12] [PASSED] single_pixel_source_buffer [19:17:12] [PASSED] single_pixel_clip_rectangle [19:17:12] [PASSED] well_known_colors [19:17:12] [PASSED] destination_pitch [19:17:12] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ========== [19:17:12] ============= drm_test_fb_xrgb8888_to_rgb332 ============== [19:17:12] [PASSED] single_pixel_source_buffer [19:17:12] [PASSED] single_pixel_clip_rectangle [19:17:12] [PASSED] well_known_colors [19:17:12] [PASSED] destination_pitch [19:17:12] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ========== [19:17:12] ============= drm_test_fb_xrgb8888_to_rgb565 ============== [19:17:12] [PASSED] single_pixel_source_buffer [19:17:12] [PASSED] single_pixel_clip_rectangle [19:17:12] [PASSED] well_known_colors [19:17:12] [PASSED] destination_pitch [19:17:12] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ========== [19:17:12] ============ drm_test_fb_xrgb8888_to_xrgb1555 ============= [19:17:12] [PASSED] single_pixel_source_buffer [19:17:12] [PASSED] single_pixel_clip_rectangle [19:17:12] [PASSED] well_known_colors [19:17:12] [PASSED] destination_pitch [19:17:12] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 ========= [19:17:12] ============ drm_test_fb_xrgb8888_to_argb1555 ============= [19:17:12] [PASSED] single_pixel_source_buffer [19:17:12] [PASSED] single_pixel_clip_rectangle [19:17:12] [PASSED] well_known_colors [19:17:12] [PASSED] destination_pitch [19:17:12] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 ========= [19:17:12] ============ drm_test_fb_xrgb8888_to_rgba5551 ============= [19:17:12] [PASSED] single_pixel_source_buffer [19:17:12] [PASSED] single_pixel_clip_rectangle [19:17:12] [PASSED] well_known_colors [19:17:12] [PASSED] destination_pitch [19:17:12] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 ========= [19:17:12] ============= drm_test_fb_xrgb8888_to_rgb888 ============== [19:17:12] [PASSED] single_pixel_source_buffer [19:17:12] [PASSED] single_pixel_clip_rectangle [19:17:12] [PASSED] well_known_colors [19:17:12] [PASSED] destination_pitch [19:17:12] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ========== [19:17:12] ============= drm_test_fb_xrgb8888_to_bgr888 ============== [19:17:12] [PASSED] single_pixel_source_buffer [19:17:12] [PASSED] single_pixel_clip_rectangle [19:17:12] [PASSED] well_known_colors [19:17:12] [PASSED] destination_pitch [19:17:12] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ========== [19:17:12] ============ drm_test_fb_xrgb8888_to_argb8888 ============= [19:17:12] [PASSED] single_pixel_source_buffer [19:17:12] [PASSED] single_pixel_clip_rectangle [19:17:12] [PASSED] well_known_colors [19:17:12] [PASSED] destination_pitch [19:17:12] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 ========= [19:17:12] =========== drm_test_fb_xrgb8888_to_xrgb2101010 =========== [19:17:12] [PASSED] single_pixel_source_buffer [19:17:12] [PASSED] single_pixel_clip_rectangle [19:17:12] [PASSED] well_known_colors [19:17:12] [PASSED] destination_pitch [19:17:12] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 ======= [19:17:12] =========== drm_test_fb_xrgb8888_to_argb2101010 =========== [19:17:12] [PASSED] single_pixel_source_buffer [19:17:12] [PASSED] single_pixel_clip_rectangle [19:17:12] [PASSED] well_known_colors [19:17:12] [PASSED] destination_pitch [19:17:12] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 ======= [19:17:12] ============== drm_test_fb_xrgb8888_to_mono =============== [19:17:12] [PASSED] single_pixel_source_buffer [19:17:12] [PASSED] single_pixel_clip_rectangle [19:17:12] [PASSED] well_known_colors [19:17:12] [PASSED] destination_pitch [19:17:12] ========== [PASSED] drm_test_fb_xrgb8888_to_mono =========== [19:17:12] ==================== drm_test_fb_swab ===================== [19:17:12] [PASSED] single_pixel_source_buffer [19:17:12] [PASSED] single_pixel_clip_rectangle [19:17:12] [PASSED] well_known_colors [19:17:12] [PASSED] destination_pitch [19:17:12] ================ [PASSED] drm_test_fb_swab ================= [19:17:12] ============ drm_test_fb_xrgb8888_to_xbgr8888 ============= [19:17:12] [PASSED] single_pixel_source_buffer [19:17:12] [PASSED] single_pixel_clip_rectangle [19:17:12] [PASSED] well_known_colors [19:17:12] [PASSED] destination_pitch [19:17:12] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 ========= [19:17:12] ============ drm_test_fb_xrgb8888_to_abgr8888 ============= [19:17:12] [PASSED] single_pixel_source_buffer [19:17:12] [PASSED] single_pixel_clip_rectangle [19:17:12] [PASSED] well_known_colors [19:17:12] [PASSED] destination_pitch [19:17:12] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 ========= [19:17:12] ================= drm_test_fb_clip_offset ================= [19:17:12] [PASSED] pass through [19:17:12] [PASSED] horizontal offset [19:17:12] [PASSED] vertical offset [19:17:12] [PASSED] horizontal and vertical offset [19:17:12] [PASSED] horizontal offset (custom pitch) [19:17:12] [PASSED] vertical offset (custom pitch) [19:17:12] [PASSED] horizontal and vertical offset (custom pitch) [19:17:12] ============= [PASSED] drm_test_fb_clip_offset ============= [19:17:12] =================== drm_test_fb_memcpy ==================== [19:17:12] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258) [19:17:12] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258) [19:17:12] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559) [19:17:12] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258) [19:17:12] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258) [19:17:12] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559) [19:17:12] [PASSED] well_known_colors: XB24 little-endian (0x34324258) [19:17:12] [PASSED] well_known_colors: XRA8 little-endian (0x38415258) [19:17:12] [PASSED] well_known_colors: YU24 little-endian (0x34325559) [19:17:12] [PASSED] destination_pitch: XB24 little-endian (0x34324258) [19:17:12] [PASSED] destination_pitch: XRA8 little-endian (0x38415258) [19:17:12] [PASSED] destination_pitch: YU24 little-endian (0x34325559) [19:17:12] =============== [PASSED] drm_test_fb_memcpy ================ [19:17:12] ============= [PASSED] drm_format_helper_test ============== [19:17:12] ================= drm_format (18 subtests) ================= [19:17:12] [PASSED] drm_test_format_block_width_invalid [19:17:12] [PASSED] drm_test_format_block_width_one_plane [19:17:12] [PASSED] drm_test_format_block_width_two_plane [19:17:12] [PASSED] drm_test_format_block_width_three_plane [19:17:12] [PASSED] drm_test_format_block_width_tiled [19:17:12] [PASSED] drm_test_format_block_height_invalid [19:17:12] [PASSED] drm_test_format_block_height_one_plane [19:17:12] [PASSED] drm_test_format_block_height_two_plane [19:17:12] [PASSED] drm_test_format_block_height_three_plane [19:17:12] [PASSED] drm_test_format_block_height_tiled [19:17:12] [PASSED] drm_test_format_min_pitch_invalid [19:17:12] [PASSED] drm_test_format_min_pitch_one_plane_8bpp [19:17:12] [PASSED] drm_test_format_min_pitch_one_plane_16bpp [19:17:12] [PASSED] drm_test_format_min_pitch_one_plane_24bpp [19:17:12] [PASSED] drm_test_format_min_pitch_one_plane_32bpp [19:17:12] [PASSED] drm_test_format_min_pitch_two_plane [19:17:12] [PASSED] drm_test_format_min_pitch_three_plane_8bpp [19:17:12] [PASSED] drm_test_format_min_pitch_tiled [19:17:12] =================== [PASSED] drm_format ==================== [19:17:12] ============== drm_framebuffer (10 subtests) =============== [19:17:12] ========== drm_test_framebuffer_check_src_coords ========== [19:17:12] [PASSED] Success: source fits into fb [19:17:12] [PASSED] Fail: overflowing fb with x-axis coordinate [19:17:12] [PASSED] Fail: overflowing fb with y-axis coordinate [19:17:12] [PASSED] Fail: overflowing fb with source width [19:17:12] [PASSED] Fail: overflowing fb with source height [19:17:12] ====== [PASSED] drm_test_framebuffer_check_src_coords ====== [19:17:12] [PASSED] drm_test_framebuffer_cleanup [19:17:12] =============== drm_test_framebuffer_create =============== [19:17:12] [PASSED] ABGR8888 normal sizes [19:17:12] [PASSED] ABGR8888 max sizes [19:17:12] [PASSED] ABGR8888 pitch greater than min required [19:17:12] [PASSED] ABGR8888 pitch less than min required [19:17:12] [PASSED] ABGR8888 Invalid width [19:17:12] [PASSED] ABGR8888 Invalid buffer handle [19:17:12] [PASSED] No pixel format [19:17:12] [PASSED] ABGR8888 Width 0 [19:17:12] [PASSED] ABGR8888 Height 0 [19:17:12] [PASSED] ABGR8888 Out of bound height * pitch combination [19:17:12] [PASSED] ABGR8888 Large buffer offset [19:17:12] [PASSED] ABGR8888 Buffer offset for inexistent plane [19:17:12] [PASSED] ABGR8888 Invalid flag [19:17:12] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers [19:17:12] [PASSED] ABGR8888 Valid buffer modifier [19:17:12] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE) [19:17:12] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS [19:17:12] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS [19:17:12] [PASSED] NV12 Normal sizes [19:17:12] [PASSED] NV12 Max sizes [19:17:12] [PASSED] NV12 Invalid pitch [19:17:12] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag [19:17:12] [PASSED] NV12 different modifier per-plane [19:17:12] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE [19:17:12] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS [19:17:12] [PASSED] NV12 Modifier for inexistent plane [19:17:12] [PASSED] NV12 Handle for inexistent plane [19:17:12] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS [19:17:12] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier [19:17:12] [PASSED] YVU420 Normal sizes [19:17:12] [PASSED] YVU420 Max sizes [19:17:12] [PASSED] YVU420 Invalid pitch [19:17:12] [PASSED] YVU420 Different pitches [19:17:12] [PASSED] YVU420 Different buffer offsets/pitches [19:17:12] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS [19:17:12] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS [19:17:12] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS [19:17:12] [PASSED] YVU420 Valid modifier [19:17:12] [PASSED] YVU420 Different modifiers per plane [19:17:12] [PASSED] YVU420 Modifier for inexistent plane [19:17:12] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR) [19:17:12] [PASSED] X0L2 Normal sizes [19:17:12] [PASSED] X0L2 Max sizes [19:17:12] [PASSED] X0L2 Invalid pitch [19:17:12] [PASSED] X0L2 Pitch greater than minimum required [19:17:12] [PASSED] X0L2 Handle for inexistent plane [19:17:12] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set [19:17:12] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set [19:17:12] [PASSED] X0L2 Valid modifier [19:17:12] [PASSED] X0L2 Modifier for inexistent plane [19:17:12] =========== [PASSED] drm_test_framebuffer_create =========== [19:17:12] [PASSED] drm_test_framebuffer_free [19:17:12] [PASSED] drm_test_framebuffer_init [19:17:12] [PASSED] drm_test_framebuffer_init_bad_format [19:17:12] [PASSED] drm_test_framebuffer_init_dev_mismatch [19:17:12] [PASSED] drm_test_framebuffer_lookup [19:17:12] [PASSED] drm_test_framebuffer_lookup_inexistent [19:17:12] [PASSED] drm_test_framebuffer_modifiers_not_supported [19:17:12] ================= [PASSED] drm_framebuffer ================= [19:17:12] ================ drm_gem_shmem (8 subtests) ================ [19:17:12] [PASSED] drm_gem_shmem_test_obj_create [19:17:12] [PASSED] drm_gem_shmem_test_obj_create_private [19:17:12] [PASSED] drm_gem_shmem_test_pin_pages [19:17:12] [PASSED] drm_gem_shmem_test_vmap [19:17:12] [PASSED] drm_gem_shmem_test_get_sg_table [19:17:12] [PASSED] drm_gem_shmem_test_get_pages_sgt [19:17:12] [PASSED] drm_gem_shmem_test_madvise [19:17:12] [PASSED] drm_gem_shmem_test_purge [19:17:12] ================== [PASSED] drm_gem_shmem ================== [19:17:12] === drm_atomic_helper_connector_hdmi_check (29 subtests) === [19:17:12] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode [19:17:12] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1 [19:17:12] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode [19:17:12] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1 [19:17:12] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode [19:17:12] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1 [19:17:12] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 ======= [19:17:12] [PASSED] Automatic [19:17:12] [PASSED] Full [19:17:12] [PASSED] Limited 16:235 [19:17:12] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 === [19:17:12] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed [19:17:12] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed [19:17:12] [PASSED] drm_test_check_disable_connector [19:17:12] [PASSED] drm_test_check_hdmi_funcs_reject_rate [19:17:12] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb [19:17:12] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420 [19:17:12] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422 [19:17:12] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420 [19:17:12] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420 [19:17:12] [PASSED] drm_test_check_output_bpc_crtc_mode_changed [19:17:12] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed [19:17:12] [PASSED] drm_test_check_output_bpc_dvi [19:17:12] [PASSED] drm_test_check_output_bpc_format_vic_1 [19:17:12] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only [19:17:12] [PASSED] drm_test_check_output_bpc_format_display_rgb_only [19:17:12] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only [19:17:12] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only [19:17:12] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc [19:17:12] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc [19:17:12] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc [19:17:12] ============ drm_test_check_hdmi_color_format ============= [19:17:12] [PASSED] AUTO -> RGB [19:17:12] [PASSED] YCBCR422 -> YUV422 [19:17:12] [PASSED] YCBCR420 -> YUV420 [19:17:12] [PASSED] YCBCR444 -> YUV444 [19:17:12] [PASSED] RGB -> RGB [19:17:12] ======== [PASSED] drm_test_check_hdmi_color_format ========= [19:17:12] ======== drm_test_check_hdmi_color_format_420_only ======== [19:17:12] [PASSED] RGB should fail [19:17:12] [PASSED] YUV444 should fail [19:17:12] [PASSED] YUV422 should fail [19:17:12] [PASSED] YUV420 should work [19:17:12] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ==== [19:17:12] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ====== [19:17:12] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ==== [19:17:12] [PASSED] drm_test_check_broadcast_rgb_value [19:17:12] [PASSED] drm_test_check_bpc_8_value [19:17:12] [PASSED] drm_test_check_bpc_10_value [19:17:12] [PASSED] drm_test_check_bpc_12_value [19:17:12] [PASSED] drm_test_check_format_value [19:17:12] [PASSED] drm_test_check_tmds_char_value [19:17:12] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ====== [19:17:12] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) = [19:17:12] [PASSED] drm_test_check_mode_valid [19:17:12] [PASSED] drm_test_check_mode_valid_reject [19:17:12] [PASSED] drm_test_check_mode_valid_reject_rate [19:17:12] [PASSED] drm_test_check_mode_valid_reject_max_clock [19:17:12] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock [19:17:12] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector [19:17:12] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb [19:17:12] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid === [19:17:12] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) = [19:17:12] [PASSED] drm_test_check_infoframes [19:17:12] [PASSED] drm_test_check_reject_avi_infoframe [19:17:12] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8 [19:17:12] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10 [19:17:12] [PASSED] drm_test_check_reject_audio_infoframe [19:17:12] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes === [19:17:12] ================= drm_managed (2 subtests) ================= [19:17:12] [PASSED] drm_test_managed_release_action [19:17:12] [PASSED] drm_test_managed_run_action [19:17:12] =================== [PASSED] drm_managed =================== [19:17:12] =================== drm_mm (6 subtests) ==================== [19:17:12] [PASSED] drm_test_mm_init [19:17:12] [PASSED] drm_test_mm_debug [19:17:12] [PASSED] drm_test_mm_align32 [19:17:12] [PASSED] drm_test_mm_align64 [19:17:12] [PASSED] drm_test_mm_lowest [19:17:12] [PASSED] drm_test_mm_highest [19:17:12] ===================== [PASSED] drm_mm ====================== [19:17:12] ============= drm_modes_analog_tv (5 subtests) ============= [19:17:12] [PASSED] drm_test_modes_analog_tv_mono_576i [19:17:12] [PASSED] drm_test_modes_analog_tv_ntsc_480i [19:17:12] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined [19:17:12] [PASSED] drm_test_modes_analog_tv_pal_576i [19:17:12] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined [19:17:12] =============== [PASSED] drm_modes_analog_tv =============== [19:17:12] ============== drm_plane_helper (2 subtests) =============== [19:17:12] =============== drm_test_check_plane_state ================ [19:17:12] [PASSED] clipping_simple [19:17:12] [PASSED] clipping_rotate_reflect [19:17:12] [PASSED] positioning_simple [19:17:12] [PASSED] upscaling [19:17:12] [PASSED] downscaling [19:17:12] [PASSED] rounding1 [19:17:12] [PASSED] rounding2 [19:17:12] [PASSED] rounding3 [19:17:12] [PASSED] rounding4 [19:17:12] =========== [PASSED] drm_test_check_plane_state ============ [19:17:12] =========== drm_test_check_invalid_plane_state ============ [19:17:12] [PASSED] positioning_invalid [19:17:12] [PASSED] upscaling_invalid [19:17:12] [PASSED] downscaling_invalid [19:17:12] ======= [PASSED] drm_test_check_invalid_plane_state ======== [19:17:12] ================ [PASSED] drm_plane_helper ================= [19:17:12] ====== drm_connector_helper_tv_get_modes (1 subtest) ======= [19:17:12] ====== drm_test_connector_helper_tv_get_modes_check ======= [19:17:12] [PASSED] None [19:17:12] [PASSED] PAL [19:17:12] [PASSED] NTSC [19:17:12] [PASSED] Both, NTSC Default [19:17:12] [PASSED] Both, PAL Default [19:17:12] [PASSED] Both, NTSC Default, with PAL on command-line [19:17:12] [PASSED] Both, PAL Default, with NTSC on command-line [19:17:12] == [PASSED] drm_test_connector_helper_tv_get_modes_check === [19:17:12] ======== [PASSED] drm_connector_helper_tv_get_modes ======== [19:17:12] ================== drm_rect (9 subtests) =================== [19:17:12] [PASSED] drm_test_rect_clip_scaled_div_by_zero [19:17:12] [PASSED] drm_test_rect_clip_scaled_not_clipped [19:17:12] [PASSED] drm_test_rect_clip_scaled_clipped [19:17:12] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned [19:17:12] ================= drm_test_rect_intersect ================= [19:17:12] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0 [19:17:12] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1 [19:17:12] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0 [19:17:12] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1 [19:17:12] [PASSED] right x left: 2x1+0+0 x 3x1+1+0 [19:17:12] [PASSED] left x right: 3x1+1+0 x 2x1+0+0 [19:17:12] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1 [19:17:12] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0 [19:17:12] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1 [19:17:12] [PASSED] touching side: 1x1+0+0 x 1x1+1+0 [19:17:12] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0 [19:17:12] [PASSED] inside another: 2x2+0+0 x 1x1+1+1 [19:17:12] [PASSED] far away: 1x1+0+0 x 1x1+3+6 [19:17:12] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10 [19:17:12] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10 [19:17:12] ============= [PASSED] drm_test_rect_intersect ============= [19:17:12] ================ drm_test_rect_calc_hscale ================ [19:17:12] [PASSED] normal use [19:17:12] [PASSED] out of max range [19:17:12] [PASSED] out of min range [19:17:12] [PASSED] zero dst [19:17:12] [PASSED] negative src [19:17:12] [PASSED] negative dst [19:17:12] ============ [PASSED] drm_test_rect_calc_hscale ============ [19:17:12] ================ drm_test_rect_calc_vscale ================ [19:17:12] [PASSED] normal use [19:17:12] [PASSED] out of max range [19:17:12] [PASSED] out of min range [19:17:12] [PASSED] zero dst [19:17:12] [PASSED] negative src [19:17:12] [PASSED] negative dst [19:17:12] ============ [PASSED] drm_test_rect_calc_vscale ============ [19:17:12] ================== drm_test_rect_rotate =================== [19:17:12] [PASSED] reflect-x [19:17:12] [PASSED] reflect-y [19:17:12] [PASSED] rotate-0 [19:17:12] [PASSED] rotate-90 [19:17:12] [PASSED] rotate-180 [19:17:12] [PASSED] rotate-270 [19:17:12] ============== [PASSED] drm_test_rect_rotate =============== [19:17:12] ================ drm_test_rect_rotate_inv ================= [19:17:12] [PASSED] reflect-x [19:17:12] [PASSED] reflect-y [19:17:12] [PASSED] rotate-0 [19:17:12] [PASSED] rotate-90 [19:17:12] [PASSED] rotate-180 [19:17:12] [PASSED] rotate-270 [19:17:12] ============ [PASSED] drm_test_rect_rotate_inv ============= [19:17:12] ==================== [PASSED] drm_rect ===================== [19:17:12] ============ drm_sysfb_modeset_test (1 subtest) ============ [19:17:12] ============ drm_test_sysfb_build_fourcc_list ============= [19:17:12] [PASSED] no native formats [19:17:12] [PASSED] XRGB8888 as native format [19:17:12] [PASSED] remove duplicates [19:17:12] [PASSED] convert alpha formats [19:17:12] [PASSED] random formats [19:17:12] ======== [PASSED] drm_test_sysfb_build_fourcc_list ========= [19:17:12] ============= [PASSED] drm_sysfb_modeset_test ============== [19:17:12] ================== drm_fixp (2 subtests) =================== [19:17:12] [PASSED] drm_test_int2fixp [19:17:12] [PASSED] drm_test_sm2fixp [19:17:12] ==================== [PASSED] drm_fixp ===================== [19:17:12] ============================================================ [19:17:12] Testing complete. Ran 637 tests: passed: 637 [19:17:12] Elapsed time: 26.676s total, 1.775s configuring, 24.735s building, 0.147s running + /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig [19:17:12] Configuring KUnit Kernel ... Regenerating .config ... Populating config with: $ make ARCH=um O=.kunit olddefconfig [19:17:14] Building KUnit Kernel ... Populating config with: $ make ARCH=um O=.kunit olddefconfig Building with: $ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48 [19:17:24] Starting KUnit Kernel (1/1)... [19:17:24] ============================================================ Running tests with: $ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt [19:17:24] ================= ttm_device (5 subtests) ================== [19:17:24] [PASSED] ttm_device_init_basic [19:17:24] [PASSED] ttm_device_init_multiple [19:17:24] [PASSED] ttm_device_fini_basic [19:17:24] [PASSED] ttm_device_init_no_vma_man [19:17:24] ================== ttm_device_init_pools ================== [19:17:24] [PASSED] No DMA allocations, no DMA32 required [19:17:24] [PASSED] DMA allocations, DMA32 required [19:17:24] [PASSED] No DMA allocations, DMA32 required [19:17:24] [PASSED] DMA allocations, no DMA32 required [19:17:24] ============== [PASSED] ttm_device_init_pools ============== [19:17:24] =================== [PASSED] ttm_device ==================== [19:17:24] ================== ttm_pool (8 subtests) =================== [19:17:24] ================== ttm_pool_alloc_basic =================== [19:17:24] [PASSED] One page [19:17:24] [PASSED] More than one page [19:17:24] [PASSED] Above the allocation limit [19:17:24] [PASSED] One page, with coherent DMA mappings enabled [19:17:24] [PASSED] Above the allocation limit, with coherent DMA mappings enabled [19:17:24] ============== [PASSED] ttm_pool_alloc_basic =============== [19:17:24] ============== ttm_pool_alloc_basic_dma_addr ============== [19:17:24] [PASSED] One page [19:17:24] [PASSED] More than one page [19:17:24] [PASSED] Above the allocation limit [19:17:24] [PASSED] One page, with coherent DMA mappings enabled [19:17:24] [PASSED] Above the allocation limit, with coherent DMA mappings enabled [19:17:24] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ========== [19:17:24] [PASSED] ttm_pool_alloc_order_caching_match [19:17:24] [PASSED] ttm_pool_alloc_caching_mismatch [19:17:24] [PASSED] ttm_pool_alloc_order_mismatch [19:17:24] [PASSED] ttm_pool_free_dma_alloc [19:17:24] [PASSED] ttm_pool_free_no_dma_alloc [19:17:24] [PASSED] ttm_pool_fini_basic [19:17:24] ==================== [PASSED] ttm_pool ===================== [19:17:24] ================ ttm_resource (8 subtests) ================= [19:17:24] ================= ttm_resource_init_basic ================= [19:17:24] [PASSED] Init resource in TTM_PL_SYSTEM [19:17:24] [PASSED] Init resource in TTM_PL_VRAM [19:17:24] [PASSED] Init resource in a private placement [19:17:24] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags [19:17:24] ============= [PASSED] ttm_resource_init_basic ============= [19:17:24] [PASSED] ttm_resource_init_pinned [19:17:24] [PASSED] ttm_resource_fini_basic [19:17:24] [PASSED] ttm_resource_manager_init_basic [19:17:24] [PASSED] ttm_resource_manager_usage_basic [19:17:24] [PASSED] ttm_resource_manager_set_used_basic [19:17:24] [PASSED] ttm_sys_man_alloc_basic [19:17:24] [PASSED] ttm_sys_man_free_basic [19:17:24] ================== [PASSED] ttm_resource =================== [19:17:24] =================== ttm_tt (15 subtests) =================== [19:17:24] ==================== ttm_tt_init_basic ==================== [19:17:24] [PASSED] Page-aligned size [19:17:24] [PASSED] Extra pages requested [19:17:24] ================ [PASSED] ttm_tt_init_basic ================ [19:17:24] [PASSED] ttm_tt_init_misaligned [19:17:24] [PASSED] ttm_tt_fini_basic [19:17:24] [PASSED] ttm_tt_fini_sg [19:17:24] [PASSED] ttm_tt_fini_shmem [19:17:24] [PASSED] ttm_tt_create_basic [19:17:24] [PASSED] ttm_tt_create_invalid_bo_type [19:17:24] [PASSED] ttm_tt_create_ttm_exists [19:17:24] [PASSED] ttm_tt_create_failed [19:17:24] [PASSED] ttm_tt_destroy_basic [19:17:24] [PASSED] ttm_tt_populate_null_ttm [19:17:24] [PASSED] ttm_tt_populate_populated_ttm [19:17:24] [PASSED] ttm_tt_unpopulate_basic [19:17:24] [PASSED] ttm_tt_unpopulate_empty_ttm [19:17:24] [PASSED] ttm_tt_swapin_basic [19:17:24] ===================== [PASSED] ttm_tt ====================== [19:17:24] =================== ttm_bo (14 subtests) =================== [19:17:24] =========== ttm_bo_reserve_optimistic_no_ticket =========== [19:17:24] [PASSED] Cannot be interrupted and sleeps [19:17:24] [PASSED] Cannot be interrupted, locks straight away [19:17:24] [PASSED] Can be interrupted, sleeps [19:17:24] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket ======= [19:17:24] [PASSED] ttm_bo_reserve_locked_no_sleep [19:17:24] [PASSED] ttm_bo_reserve_no_wait_ticket [19:17:24] [PASSED] ttm_bo_reserve_double_resv [19:17:24] [PASSED] ttm_bo_reserve_interrupted [19:17:24] [PASSED] ttm_bo_reserve_deadlock [19:17:24] [PASSED] ttm_bo_unreserve_basic [19:17:24] [PASSED] ttm_bo_unreserve_pinned [19:17:24] [PASSED] ttm_bo_unreserve_bulk [19:17:24] [PASSED] ttm_bo_fini_basic [19:17:24] [PASSED] ttm_bo_fini_shared_resv [19:17:24] [PASSED] ttm_bo_pin_basic [19:17:24] [PASSED] ttm_bo_pin_unpin_resource [19:17:24] [PASSED] ttm_bo_multiple_pin_one_unpin [19:17:24] ===================== [PASSED] ttm_bo ====================== [19:17:24] ============== ttm_bo_validate (22 subtests) =============== [19:17:24] ============== ttm_bo_init_reserved_sys_man =============== [19:17:24] [PASSED] Buffer object for userspace [19:17:24] [PASSED] Kernel buffer object [19:17:24] [PASSED] Shared buffer object [19:17:24] ========== [PASSED] ttm_bo_init_reserved_sys_man =========== [19:17:24] ============== ttm_bo_init_reserved_mock_man ============== [19:17:24] [PASSED] Buffer object for userspace [19:17:24] [PASSED] Kernel buffer object [19:17:24] [PASSED] Shared buffer object [19:17:24] ========== [PASSED] ttm_bo_init_reserved_mock_man ========== [19:17:24] [PASSED] ttm_bo_init_reserved_resv [19:17:24] ================== ttm_bo_validate_basic ================== [19:17:24] [PASSED] Buffer object for userspace [19:17:24] [PASSED] Kernel buffer object [19:17:24] [PASSED] Shared buffer object [19:17:24] ============== [PASSED] ttm_bo_validate_basic ============== [19:17:24] [PASSED] ttm_bo_validate_invalid_placement [19:17:24] ============= ttm_bo_validate_same_placement ============== [19:17:24] [PASSED] System manager [19:17:24] [PASSED] VRAM manager [19:17:24] ========= [PASSED] ttm_bo_validate_same_placement ========== [19:17:24] [PASSED] ttm_bo_validate_failed_alloc [19:17:24] [PASSED] ttm_bo_validate_pinned [19:17:24] [PASSED] ttm_bo_validate_busy_placement [19:17:24] ================ ttm_bo_validate_multihop ================= [19:17:24] [PASSED] Buffer object for userspace [19:17:24] [PASSED] Kernel buffer object [19:17:24] [PASSED] Shared buffer object [19:17:24] ============ [PASSED] ttm_bo_validate_multihop ============= [19:17:24] ========== ttm_bo_validate_no_placement_signaled ========== [19:17:24] [PASSED] Buffer object in system domain, no page vector [19:17:24] [PASSED] Buffer object in system domain with an existing page vector [19:17:24] ====== [PASSED] ttm_bo_validate_no_placement_signaled ====== [19:17:24] ======== ttm_bo_validate_no_placement_not_signaled ======== [19:17:24] [PASSED] Buffer object for userspace [19:17:24] [PASSED] Kernel buffer object [19:17:24] [PASSED] Shared buffer object [19:17:24] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ==== [19:17:24] [PASSED] ttm_bo_validate_move_fence_signaled [19:17:24] ========= ttm_bo_validate_move_fence_not_signaled ========= [19:17:24] [PASSED] Waits for GPU [19:17:24] [PASSED] Tries to lock straight away [19:17:24] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled ===== [19:17:24] [PASSED] ttm_bo_validate_swapout [19:17:24] [PASSED] ttm_bo_validate_happy_evict [19:17:24] [PASSED] ttm_bo_validate_all_pinned_evict [19:17:24] [PASSED] ttm_bo_validate_allowed_only_evict [19:17:24] [PASSED] ttm_bo_validate_deleted_evict [19:17:24] [PASSED] ttm_bo_validate_busy_domain_evict [19:17:24] [PASSED] ttm_bo_validate_evict_gutting [19:17:24] [PASSED] ttm_bo_validate_recrusive_evict [19:17:24] ================= [PASSED] ttm_bo_validate ================= [19:17:24] ============================================================ [19:17:24] Testing complete. Ran 102 tests: passed: 102 [19:17:24] Elapsed time: 11.893s total, 1.731s configuring, 9.945s building, 0.176s running + cleanup ++ stat -c %u:%g /kernel + chown -R 1003:1003 /kernel ^ permalink raw reply [flat|nested] 8+ messages in thread
* ✓ Xe.CI.BAT: success for drm/xe: Update Wa_14026539277 2026-07-21 19:10 [PATCH 0/3] drm/xe: Update Wa_14026539277 Gustavo Sousa ` (4 preceding siblings ...) 2026-07-21 19:17 ` ✓ CI.KUnit: success " Patchwork @ 2026-07-21 20:04 ` Patchwork 5 siblings, 0 replies; 8+ messages in thread From: Patchwork @ 2026-07-21 20:04 UTC (permalink / raw) To: Gustavo Sousa; +Cc: intel-xe [-- Attachment #1: Type: text/plain, Size: 845 bytes --] == Series Details == Series: drm/xe: Update Wa_14026539277 URL : https://patchwork.freedesktop.org/series/170845/ State : success == Summary == CI Bug Log - changes from xe-5451-80b509f6e34a01edfccc01a05e3e7062a934bcf9_BAT -> xe-pw-170845v1_BAT ==================================================== Summary ------- **SUCCESS** No regressions found. Participating hosts (13 -> 12) ------------------------------ Missing (1): bat-bmg-2 Changes ------- No changes found Build changes ------------- * Linux: xe-5451-80b509f6e34a01edfccc01a05e3e7062a934bcf9 -> xe-pw-170845v1 IGT_9017: 9017 xe-5451-80b509f6e34a01edfccc01a05e3e7062a934bcf9: 80b509f6e34a01edfccc01a05e3e7062a934bcf9 xe-pw-170845v1: 170845v1 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170845v1/index.html [-- Attachment #2: Type: text/html, Size: 1393 bytes --] ^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2026-07-22 0:00 UTC | newest] Thread overview: 8+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2026-07-21 19:10 [PATCH 0/3] drm/xe: Update Wa_14026539277 Gustavo Sousa 2026-07-21 19:10 ` [PATCH 1/3] drm/xe: Extract override_has_cached_pt() Gustavo Sousa 2026-07-21 19:10 ` [PATCH 2/3] Revert "drm/xe/nvlp: Implement Wa_14026539277" Gustavo Sousa 2026-07-21 19:10 ` [PATCH 3/3] drm/xe: Add up-to-date implementation for Wa_14026539277 Gustavo Sousa 2026-07-22 0:00 ` Gustavo Sousa 2026-07-21 19:16 ` ✗ CI.checkpatch: warning for drm/xe: Update Wa_14026539277 Patchwork 2026-07-21 19:17 ` ✓ CI.KUnit: success " Patchwork 2026-07-21 20:04 ` ✓ Xe.CI.BAT: " Patchwork
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