From: Marc Zyngier <maz@kernel.org>
To: Florian Fainelli <f.fainelli@gmail.com>
Cc: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, "Rafał Miłecki" <zajec5@gmail.com>,
"Will Deacon" <will@kernel.org>,
"Catalin Marinas" <catalin.marinas@arm.com>,
"Mark Rutland" <mark.rutland@arm.com>,
"Ard Biesheuvel" <ardb@kernel.org>,
bcm-kernel-feedback-list@broadcom.com, kernel-team@android.com
Subject: Re: [PATCH 0/5] arm64: Survival kit for SCR_EL3.HCE==0 conditions
Date: Sun, 15 Aug 2021 10:27:28 +0100 [thread overview]
Message-ID: <874kbr12in.wl-maz@kernel.org> (raw)
In-Reply-To: <7ffa35bb-1f2c-19ff-fe4b-33267fba80e8@gmail.com>
On Sun, 15 Aug 2021 08:28:47 +0100,
Florian Fainelli <f.fainelli@gmail.com> wrote:
>
>
>
> On 8/12/2021 9:02 PM, Marc Zyngier wrote:
> > Anyone vaguely familiar with the ARMv8 architecture would quickly
> > understand that entering the kernel at EL2 without enabling the HVC
> > instruction is... living dangerously. But as it turns out [0], there
> > is a whole range of (*cough*) "high quality" (*cough*) Broadcom
> > systems out there configured exactly like that.
>
> Some Broadcom systems, namely the 4908 and all of those using CFE,
> they later switched to u-boot and ATF and got it right.
Do we have a list of the affected systems?
>
> >
> > If you are speechless, I'm right with you.
> >
> > These machines have stopped being able to boot an upstream kernel
> > since 5.12, where we changed the way we switch from nVHE to VHE, as
> > this relies on the HVC instruction being usable... It is also worth
> > noting that these systems have never been able to use KVM. Or kexec.
> >
> > This small series addresses the issue by detecting an UNDEFing HVC in
> > a fairly controlled environment, and in this case pretend that we have
> > booted at EL1. It also documents the requirement for SCR_EL3.HCE to be
> > set to *1* if the kernel is entered at EL2. Turns out that we really
> > have to state the obvious.
> >
> > This has been tested on a FVP model with a hacked-up boot-wrapper.
> >
> > Note that I really don't think any of this is -stable material, except
> > maybe for the documentation. It isn't 5.14 material either. Best case,
> > this is 5.15, or maybe even later. If ever.
>
> While I am very appreciative of the work you have done here to try to
> get the dysfunctional systems to warn and continue to boot, I would
> rather we try to load a minimal shim at EL3 capable of fixing up any
> incorrect EL3 register setting ahead of loading the kernel provided
> this is possible at all on a commercially available system.
That would be the best thing to do, and would make the machine fully
usable. I still think we need to have something in the kernel to at
least let the user know that their system is misconfigured though.
If CFE allows a payload to be loaded at EL3 and executed on all CPUs,
that would be absolutely awesome. It would even allow switching over
to ATF...
Thanks,
M.
> Rafal, is this something that CFE allows you to do (as I could not
> get a straight answer from that team), if so have you tried it?
> --
> Florian
>
--
Without deviation from the norm, progress is not possible.
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linux-arm-kernel@lists.infradead.org
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WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Florian Fainelli <f.fainelli@gmail.com>
Cc: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, "Rafał Miłecki" <zajec5@gmail.com>,
"Will Deacon" <will@kernel.org>,
"Catalin Marinas" <catalin.marinas@arm.com>,
"Mark Rutland" <mark.rutland@arm.com>,
"Ard Biesheuvel" <ardb@kernel.org>,
bcm-kernel-feedback-list@broadcom.com, kernel-team@android.com
Subject: Re: [PATCH 0/5] arm64: Survival kit for SCR_EL3.HCE==0 conditions
Date: Sun, 15 Aug 2021 10:27:28 +0100 [thread overview]
Message-ID: <874kbr12in.wl-maz@kernel.org> (raw)
In-Reply-To: <7ffa35bb-1f2c-19ff-fe4b-33267fba80e8@gmail.com>
On Sun, 15 Aug 2021 08:28:47 +0100,
Florian Fainelli <f.fainelli@gmail.com> wrote:
>
>
>
> On 8/12/2021 9:02 PM, Marc Zyngier wrote:
> > Anyone vaguely familiar with the ARMv8 architecture would quickly
> > understand that entering the kernel at EL2 without enabling the HVC
> > instruction is... living dangerously. But as it turns out [0], there
> > is a whole range of (*cough*) "high quality" (*cough*) Broadcom
> > systems out there configured exactly like that.
>
> Some Broadcom systems, namely the 4908 and all of those using CFE,
> they later switched to u-boot and ATF and got it right.
Do we have a list of the affected systems?
>
> >
> > If you are speechless, I'm right with you.
> >
> > These machines have stopped being able to boot an upstream kernel
> > since 5.12, where we changed the way we switch from nVHE to VHE, as
> > this relies on the HVC instruction being usable... It is also worth
> > noting that these systems have never been able to use KVM. Or kexec.
> >
> > This small series addresses the issue by detecting an UNDEFing HVC in
> > a fairly controlled environment, and in this case pretend that we have
> > booted at EL1. It also documents the requirement for SCR_EL3.HCE to be
> > set to *1* if the kernel is entered at EL2. Turns out that we really
> > have to state the obvious.
> >
> > This has been tested on a FVP model with a hacked-up boot-wrapper.
> >
> > Note that I really don't think any of this is -stable material, except
> > maybe for the documentation. It isn't 5.14 material either. Best case,
> > this is 5.15, or maybe even later. If ever.
>
> While I am very appreciative of the work you have done here to try to
> get the dysfunctional systems to warn and continue to boot, I would
> rather we try to load a minimal shim at EL3 capable of fixing up any
> incorrect EL3 register setting ahead of loading the kernel provided
> this is possible at all on a commercially available system.
That would be the best thing to do, and would make the machine fully
usable. I still think we need to have something in the kernel to at
least let the user know that their system is misconfigured though.
If CFE allows a payload to be loaded at EL3 and executed on all CPUs,
that would be absolutely awesome. It would even allow switching over
to ATF...
Thanks,
M.
> Rafal, is this something that CFE allows you to do (as I could not
> get a straight answer from that team), if so have you tried it?
> --
> Florian
>
--
Without deviation from the norm, progress is not possible.
next prev parent reply other threads:[~2021-08-15 9:29 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-12 19:02 [PATCH 0/5] arm64: Survival kit for SCR_EL3.HCE==0 conditions Marc Zyngier
2021-08-12 19:02 ` Marc Zyngier
2021-08-12 19:02 ` [PATCH 1/5] arm64: Directly expand __init_el2_nvhe_prepare_eret where needed Marc Zyngier
2021-08-12 19:02 ` Marc Zyngier
2021-08-12 19:02 ` [PATCH 2/5] arm64: Handle UNDEF in the EL2 stub vectors Marc Zyngier
2021-08-12 19:02 ` Marc Zyngier
2021-08-13 13:08 ` Robin Murphy
2021-08-13 13:08 ` Robin Murphy
2021-08-13 17:41 ` Marc Zyngier
2021-08-13 17:41 ` Marc Zyngier
2021-08-13 18:17 ` Robin Murphy
2021-08-13 18:17 ` Robin Murphy
2021-08-14 9:38 ` Marc Zyngier
2021-08-14 9:38 ` Marc Zyngier
2021-08-12 19:02 ` [PATCH 3/5] arm64: Detect disabled HVC early Marc Zyngier
2021-08-12 19:02 ` Marc Zyngier
2021-08-12 19:47 ` Rafał Miłecki
2021-08-12 19:47 ` Rafał Miłecki
2021-08-13 9:05 ` Will Deacon
2021-08-13 9:05 ` Will Deacon
2021-08-13 17:33 ` Marc Zyngier
2021-08-13 17:33 ` Marc Zyngier
2021-08-12 19:02 ` [PATCH 4/5] arm64: Warn on booting at EL2 with HVC disabled Marc Zyngier
2021-08-12 19:02 ` Marc Zyngier
2021-08-12 19:58 ` Rafał Miłecki
2021-08-12 19:58 ` Rafał Miłecki
2021-08-12 19:02 ` [PATCH 5/5] arm64: Document the requirement for SCR_EL3.HCE Marc Zyngier
2021-08-12 19:02 ` Marc Zyngier
2021-08-24 10:49 ` Catalin Marinas
2021-08-24 10:49 ` Catalin Marinas
2021-08-24 10:52 ` Mark Rutland
2021-08-24 10:52 ` Mark Rutland
2021-08-15 7:28 ` [PATCH 0/5] arm64: Survival kit for SCR_EL3.HCE==0 conditions Florian Fainelli
2021-08-15 7:28 ` Florian Fainelli
2021-08-15 9:27 ` Marc Zyngier [this message]
2021-08-15 9:27 ` Marc Zyngier
2021-08-22 11:31 ` Florian Fainelli
2021-08-22 11:31 ` Florian Fainelli
2021-08-24 16:19 ` (subset) " Catalin Marinas
2021-08-24 16:19 ` Catalin Marinas
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