From: "Alex Bennée" <alex.bennee@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org, patches@linaro.org,
"Igor Mammedov" <imammedo@redhat.com>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: Re: [PATCH v3 4/6] target/arm: Make 'any' CPU just an alias for 'max'
Date: Fri, 09 Mar 2018 13:45:47 +0000 [thread overview]
Message-ID: <874llpl5v8.fsf@linaro.org> (raw)
In-Reply-To: <20180308130626.12393-5-peter.maydell@linaro.org>
Peter Maydell <peter.maydell@linaro.org> writes:
> Now we have a working '-cpu max', the linux-user-only
> 'any' CPU is pretty much the same thing, so implement it
> that way.
>
> For the moment we don't add any of the extra feature bits
> to the system-emulation "max", because we don't set the
> ID register bits we would need to to advertise those
> features as present.
>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
> ---
> target/arm/cpu.c | 52 +++++++++++++++++++++++++----------------------
> target/arm/cpu64.c | 59 ++++++++++++++++++++++++++----------------------------
> 2 files changed, 56 insertions(+), 55 deletions(-)
>
> diff --git a/target/arm/cpu.c b/target/arm/cpu.c
> index e46ddcc613..6068efb8ff 100644
> --- a/target/arm/cpu.c
> +++ b/target/arm/cpu.c
> @@ -965,9 +965,19 @@ static ObjectClass *arm_cpu_class_by_name(const char *cpu_model)
> ObjectClass *oc;
> char *typename;
> char **cpuname;
> + const char *cpunamestr;
>
> cpuname = g_strsplit(cpu_model, ",", 1);
> - typename = g_strdup_printf(ARM_CPU_TYPE_NAME("%s"), cpuname[0]);
> + cpunamestr = cpuname[0];
> +#ifdef CONFIG_USER_ONLY
> + /* For backwards compatibility usermode emulation allows "-cpu any",
> + * which has the same semantics as "-cpu max".
> + */
> + if (!strcmp(cpunamestr, "any")) {
> + cpunamestr = "max";
> + }
> +#endif
> + typename = g_strdup_printf(ARM_CPU_TYPE_NAME("%s"), cpunamestr);
> oc = object_class_by_name(typename);
> g_strfreev(cpuname);
> g_free(typename);
> @@ -1711,29 +1721,23 @@ static void arm_max_initfn(Object *obj)
> kvm_arm_set_cpu_features_from_host(cpu);
> } else {
> cortex_a15_initfn(obj);
> - /* In future we might add feature bits here even if the
> - * real-world A15 doesn't implement them.
> - */
> - }
> -}
> -#endif
> -
> #ifdef CONFIG_USER_ONLY
> -static void arm_any_initfn(Object *obj)
> -{
> - ARMCPU *cpu = ARM_CPU(obj);
> - set_feature(&cpu->env, ARM_FEATURE_V8);
> - set_feature(&cpu->env, ARM_FEATURE_VFP4);
> - set_feature(&cpu->env, ARM_FEATURE_NEON);
> - set_feature(&cpu->env, ARM_FEATURE_THUMB2EE);
> - set_feature(&cpu->env, ARM_FEATURE_V8_AES);
> - set_feature(&cpu->env, ARM_FEATURE_V8_SHA1);
> - set_feature(&cpu->env, ARM_FEATURE_V8_SHA256);
> - set_feature(&cpu->env, ARM_FEATURE_V8_PMULL);
> - set_feature(&cpu->env, ARM_FEATURE_CRC);
> - set_feature(&cpu->env, ARM_FEATURE_V8_RDM);
> - set_feature(&cpu->env, ARM_FEATURE_V8_FCMA);
> - cpu->midr = 0xffffffff;
> + /* We don't set these in system emulation mode for the moment,
> + * since we don't correctly set the ID registers to advertise them,
> + */
> + set_feature(&cpu->env, ARM_FEATURE_V8);
> + set_feature(&cpu->env, ARM_FEATURE_VFP4);
> + set_feature(&cpu->env, ARM_FEATURE_NEON);
> + set_feature(&cpu->env, ARM_FEATURE_THUMB2EE);
> + set_feature(&cpu->env, ARM_FEATURE_V8_AES);
> + set_feature(&cpu->env, ARM_FEATURE_V8_SHA1);
> + set_feature(&cpu->env, ARM_FEATURE_V8_SHA256);
> + set_feature(&cpu->env, ARM_FEATURE_V8_PMULL);
> + set_feature(&cpu->env, ARM_FEATURE_CRC);
> + set_feature(&cpu->env, ARM_FEATURE_V8_RDM);
> + set_feature(&cpu->env, ARM_FEATURE_V8_FCMA);
> +#endif
> + }
> }
> #endif
>
> @@ -1789,7 +1793,7 @@ static const ARMCPUInfo arm_cpus[] = {
> { .name = "max", .initfn = arm_max_initfn },
> #endif
> #ifdef CONFIG_USER_ONLY
> - { .name = "any", .initfn = arm_any_initfn },
> + { .name = "any", .initfn = arm_max_initfn },
> #endif
> #endif
> { .name = NULL }
> diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
> index 9042d3dfd1..3429875787 100644
> --- a/target/arm/cpu64.c
> +++ b/target/arm/cpu64.c
> @@ -226,38 +226,38 @@ static void aarch64_max_initfn(Object *obj)
> kvm_arm_set_cpu_features_from_host(cpu);
> } else {
> aarch64_a57_initfn(obj);
> - /* In future we might add feature bits here even if the
> - * real-world A57 doesn't implement them.
> +#ifdef CONFIG_USER_ONLY
> + /* We don't set these in system emulation mode for the moment,
> + * since we don't correctly set the ID registers to advertise them,
> + * and in some cases they're only available in AArch64 and not AArch32,
> + * whereas the architecture requires them to be present in both if
> + * present in either.
> */
> + set_feature(&cpu->env, ARM_FEATURE_V8);
> + set_feature(&cpu->env, ARM_FEATURE_VFP4);
> + set_feature(&cpu->env, ARM_FEATURE_NEON);
> + set_feature(&cpu->env, ARM_FEATURE_AARCH64);
> + set_feature(&cpu->env, ARM_FEATURE_V8_AES);
> + set_feature(&cpu->env, ARM_FEATURE_V8_SHA1);
> + set_feature(&cpu->env, ARM_FEATURE_V8_SHA256);
> + set_feature(&cpu->env, ARM_FEATURE_V8_SHA512);
> + set_feature(&cpu->env, ARM_FEATURE_V8_SHA3);
> + set_feature(&cpu->env, ARM_FEATURE_V8_SM3);
> + set_feature(&cpu->env, ARM_FEATURE_V8_SM4);
> + set_feature(&cpu->env, ARM_FEATURE_V8_PMULL);
> + set_feature(&cpu->env, ARM_FEATURE_CRC);
> + set_feature(&cpu->env, ARM_FEATURE_V8_RDM);
> + set_feature(&cpu->env, ARM_FEATURE_V8_FP16);
> + set_feature(&cpu->env, ARM_FEATURE_V8_FCMA);
> + /* For usermode -cpu max we can use a larger and more efficient DCZ
> + * blocksize since we don't have to follow what the hardware does.
> + */
> + cpu->ctr = 0x80038003; /* 32 byte I and D cacheline size, VIPT icache */
> + cpu->dcz_blocksize = 7; /* 512 bytes */
> +#endif
> }
> }
>
> -#ifdef CONFIG_USER_ONLY
> -static void aarch64_any_initfn(Object *obj)
> -{
> - ARMCPU *cpu = ARM_CPU(obj);
> -
> - set_feature(&cpu->env, ARM_FEATURE_V8);
> - set_feature(&cpu->env, ARM_FEATURE_VFP4);
> - set_feature(&cpu->env, ARM_FEATURE_NEON);
> - set_feature(&cpu->env, ARM_FEATURE_AARCH64);
> - set_feature(&cpu->env, ARM_FEATURE_V8_AES);
> - set_feature(&cpu->env, ARM_FEATURE_V8_SHA1);
> - set_feature(&cpu->env, ARM_FEATURE_V8_SHA256);
> - set_feature(&cpu->env, ARM_FEATURE_V8_SHA512);
> - set_feature(&cpu->env, ARM_FEATURE_V8_SHA3);
> - set_feature(&cpu->env, ARM_FEATURE_V8_SM3);
> - set_feature(&cpu->env, ARM_FEATURE_V8_SM4);
> - set_feature(&cpu->env, ARM_FEATURE_V8_PMULL);
> - set_feature(&cpu->env, ARM_FEATURE_CRC);
> - set_feature(&cpu->env, ARM_FEATURE_V8_RDM);
> - set_feature(&cpu->env, ARM_FEATURE_V8_FP16);
> - set_feature(&cpu->env, ARM_FEATURE_V8_FCMA);
> - cpu->ctr = 0x80038003; /* 32 byte I and D cacheline size, VIPT icache */
> - cpu->dcz_blocksize = 7; /* 512 bytes */
> -}
> -#endif
> -
> typedef struct ARMCPUInfo {
> const char *name;
> void (*initfn)(Object *obj);
> @@ -268,9 +268,6 @@ static const ARMCPUInfo aarch64_cpus[] = {
> { .name = "cortex-a57", .initfn = aarch64_a57_initfn },
> { .name = "cortex-a53", .initfn = aarch64_a53_initfn },
> { .name = "max", .initfn = aarch64_max_initfn },
> -#ifdef CONFIG_USER_ONLY
> - { .name = "any", .initfn = aarch64_any_initfn },
> -#endif
> { .name = NULL }
> };
--
Alex Bennée
WARNING: multiple messages have this Message-ID (diff)
From: "Alex Bennée" <alex.bennee@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org, patches@linaro.org,
"Igor Mammedov" <imammedo@redhat.com>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: Re: [Qemu-devel] [PATCH v3 4/6] target/arm: Make 'any' CPU just an alias for 'max'
Date: Fri, 09 Mar 2018 13:45:47 +0000 [thread overview]
Message-ID: <874llpl5v8.fsf@linaro.org> (raw)
In-Reply-To: <20180308130626.12393-5-peter.maydell@linaro.org>
Peter Maydell <peter.maydell@linaro.org> writes:
> Now we have a working '-cpu max', the linux-user-only
> 'any' CPU is pretty much the same thing, so implement it
> that way.
>
> For the moment we don't add any of the extra feature bits
> to the system-emulation "max", because we don't set the
> ID register bits we would need to to advertise those
> features as present.
>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
> ---
> target/arm/cpu.c | 52 +++++++++++++++++++++++++----------------------
> target/arm/cpu64.c | 59 ++++++++++++++++++++++++++----------------------------
> 2 files changed, 56 insertions(+), 55 deletions(-)
>
> diff --git a/target/arm/cpu.c b/target/arm/cpu.c
> index e46ddcc613..6068efb8ff 100644
> --- a/target/arm/cpu.c
> +++ b/target/arm/cpu.c
> @@ -965,9 +965,19 @@ static ObjectClass *arm_cpu_class_by_name(const char *cpu_model)
> ObjectClass *oc;
> char *typename;
> char **cpuname;
> + const char *cpunamestr;
>
> cpuname = g_strsplit(cpu_model, ",", 1);
> - typename = g_strdup_printf(ARM_CPU_TYPE_NAME("%s"), cpuname[0]);
> + cpunamestr = cpuname[0];
> +#ifdef CONFIG_USER_ONLY
> + /* For backwards compatibility usermode emulation allows "-cpu any",
> + * which has the same semantics as "-cpu max".
> + */
> + if (!strcmp(cpunamestr, "any")) {
> + cpunamestr = "max";
> + }
> +#endif
> + typename = g_strdup_printf(ARM_CPU_TYPE_NAME("%s"), cpunamestr);
> oc = object_class_by_name(typename);
> g_strfreev(cpuname);
> g_free(typename);
> @@ -1711,29 +1721,23 @@ static void arm_max_initfn(Object *obj)
> kvm_arm_set_cpu_features_from_host(cpu);
> } else {
> cortex_a15_initfn(obj);
> - /* In future we might add feature bits here even if the
> - * real-world A15 doesn't implement them.
> - */
> - }
> -}
> -#endif
> -
> #ifdef CONFIG_USER_ONLY
> -static void arm_any_initfn(Object *obj)
> -{
> - ARMCPU *cpu = ARM_CPU(obj);
> - set_feature(&cpu->env, ARM_FEATURE_V8);
> - set_feature(&cpu->env, ARM_FEATURE_VFP4);
> - set_feature(&cpu->env, ARM_FEATURE_NEON);
> - set_feature(&cpu->env, ARM_FEATURE_THUMB2EE);
> - set_feature(&cpu->env, ARM_FEATURE_V8_AES);
> - set_feature(&cpu->env, ARM_FEATURE_V8_SHA1);
> - set_feature(&cpu->env, ARM_FEATURE_V8_SHA256);
> - set_feature(&cpu->env, ARM_FEATURE_V8_PMULL);
> - set_feature(&cpu->env, ARM_FEATURE_CRC);
> - set_feature(&cpu->env, ARM_FEATURE_V8_RDM);
> - set_feature(&cpu->env, ARM_FEATURE_V8_FCMA);
> - cpu->midr = 0xffffffff;
> + /* We don't set these in system emulation mode for the moment,
> + * since we don't correctly set the ID registers to advertise them,
> + */
> + set_feature(&cpu->env, ARM_FEATURE_V8);
> + set_feature(&cpu->env, ARM_FEATURE_VFP4);
> + set_feature(&cpu->env, ARM_FEATURE_NEON);
> + set_feature(&cpu->env, ARM_FEATURE_THUMB2EE);
> + set_feature(&cpu->env, ARM_FEATURE_V8_AES);
> + set_feature(&cpu->env, ARM_FEATURE_V8_SHA1);
> + set_feature(&cpu->env, ARM_FEATURE_V8_SHA256);
> + set_feature(&cpu->env, ARM_FEATURE_V8_PMULL);
> + set_feature(&cpu->env, ARM_FEATURE_CRC);
> + set_feature(&cpu->env, ARM_FEATURE_V8_RDM);
> + set_feature(&cpu->env, ARM_FEATURE_V8_FCMA);
> +#endif
> + }
> }
> #endif
>
> @@ -1789,7 +1793,7 @@ static const ARMCPUInfo arm_cpus[] = {
> { .name = "max", .initfn = arm_max_initfn },
> #endif
> #ifdef CONFIG_USER_ONLY
> - { .name = "any", .initfn = arm_any_initfn },
> + { .name = "any", .initfn = arm_max_initfn },
> #endif
> #endif
> { .name = NULL }
> diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
> index 9042d3dfd1..3429875787 100644
> --- a/target/arm/cpu64.c
> +++ b/target/arm/cpu64.c
> @@ -226,38 +226,38 @@ static void aarch64_max_initfn(Object *obj)
> kvm_arm_set_cpu_features_from_host(cpu);
> } else {
> aarch64_a57_initfn(obj);
> - /* In future we might add feature bits here even if the
> - * real-world A57 doesn't implement them.
> +#ifdef CONFIG_USER_ONLY
> + /* We don't set these in system emulation mode for the moment,
> + * since we don't correctly set the ID registers to advertise them,
> + * and in some cases they're only available in AArch64 and not AArch32,
> + * whereas the architecture requires them to be present in both if
> + * present in either.
> */
> + set_feature(&cpu->env, ARM_FEATURE_V8);
> + set_feature(&cpu->env, ARM_FEATURE_VFP4);
> + set_feature(&cpu->env, ARM_FEATURE_NEON);
> + set_feature(&cpu->env, ARM_FEATURE_AARCH64);
> + set_feature(&cpu->env, ARM_FEATURE_V8_AES);
> + set_feature(&cpu->env, ARM_FEATURE_V8_SHA1);
> + set_feature(&cpu->env, ARM_FEATURE_V8_SHA256);
> + set_feature(&cpu->env, ARM_FEATURE_V8_SHA512);
> + set_feature(&cpu->env, ARM_FEATURE_V8_SHA3);
> + set_feature(&cpu->env, ARM_FEATURE_V8_SM3);
> + set_feature(&cpu->env, ARM_FEATURE_V8_SM4);
> + set_feature(&cpu->env, ARM_FEATURE_V8_PMULL);
> + set_feature(&cpu->env, ARM_FEATURE_CRC);
> + set_feature(&cpu->env, ARM_FEATURE_V8_RDM);
> + set_feature(&cpu->env, ARM_FEATURE_V8_FP16);
> + set_feature(&cpu->env, ARM_FEATURE_V8_FCMA);
> + /* For usermode -cpu max we can use a larger and more efficient DCZ
> + * blocksize since we don't have to follow what the hardware does.
> + */
> + cpu->ctr = 0x80038003; /* 32 byte I and D cacheline size, VIPT icache */
> + cpu->dcz_blocksize = 7; /* 512 bytes */
> +#endif
> }
> }
>
> -#ifdef CONFIG_USER_ONLY
> -static void aarch64_any_initfn(Object *obj)
> -{
> - ARMCPU *cpu = ARM_CPU(obj);
> -
> - set_feature(&cpu->env, ARM_FEATURE_V8);
> - set_feature(&cpu->env, ARM_FEATURE_VFP4);
> - set_feature(&cpu->env, ARM_FEATURE_NEON);
> - set_feature(&cpu->env, ARM_FEATURE_AARCH64);
> - set_feature(&cpu->env, ARM_FEATURE_V8_AES);
> - set_feature(&cpu->env, ARM_FEATURE_V8_SHA1);
> - set_feature(&cpu->env, ARM_FEATURE_V8_SHA256);
> - set_feature(&cpu->env, ARM_FEATURE_V8_SHA512);
> - set_feature(&cpu->env, ARM_FEATURE_V8_SHA3);
> - set_feature(&cpu->env, ARM_FEATURE_V8_SM3);
> - set_feature(&cpu->env, ARM_FEATURE_V8_SM4);
> - set_feature(&cpu->env, ARM_FEATURE_V8_PMULL);
> - set_feature(&cpu->env, ARM_FEATURE_CRC);
> - set_feature(&cpu->env, ARM_FEATURE_V8_RDM);
> - set_feature(&cpu->env, ARM_FEATURE_V8_FP16);
> - set_feature(&cpu->env, ARM_FEATURE_V8_FCMA);
> - cpu->ctr = 0x80038003; /* 32 byte I and D cacheline size, VIPT icache */
> - cpu->dcz_blocksize = 7; /* 512 bytes */
> -}
> -#endif
> -
> typedef struct ARMCPUInfo {
> const char *name;
> void (*initfn)(Object *obj);
> @@ -268,9 +268,6 @@ static const ARMCPUInfo aarch64_cpus[] = {
> { .name = "cortex-a57", .initfn = aarch64_a57_initfn },
> { .name = "cortex-a53", .initfn = aarch64_a53_initfn },
> { .name = "max", .initfn = aarch64_max_initfn },
> -#ifdef CONFIG_USER_ONLY
> - { .name = "any", .initfn = aarch64_any_initfn },
> -#endif
> { .name = NULL }
> };
--
Alex Bennée
next prev parent reply other threads:[~2018-03-09 13:45 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-08 13:06 [PATCH v3 0/6] arm: support -cpu max (and gic-version=max) Peter Maydell
2018-03-08 13:06 ` [Qemu-devel] " Peter Maydell
2018-03-08 13:06 ` [PATCH v3 1/6] target/arm: Query host CPU features on-demand at instance init Peter Maydell
2018-03-08 13:06 ` [Qemu-devel] " Peter Maydell
2018-03-08 15:53 ` Alex Bennée
2018-03-08 15:53 ` [Qemu-devel] " Alex Bennée
2018-03-08 13:06 ` [PATCH v3 2/6] target/arm: Move definition of 'host' cpu type into cpu.c Peter Maydell
2018-03-08 13:06 ` [Qemu-devel] " Peter Maydell
2018-03-08 15:55 ` Alex Bennée
2018-03-08 15:55 ` [Qemu-devel] " Alex Bennée
2018-03-08 13:06 ` [PATCH v3 3/6] target/arm: Add "-cpu max" support Peter Maydell
2018-03-08 13:06 ` [Qemu-devel] " Peter Maydell
2018-03-08 18:58 ` Alex Bennée
2018-03-08 18:58 ` [Qemu-devel] " Alex Bennée
2018-03-09 16:07 ` Philippe Mathieu-Daudé
2018-03-09 16:07 ` [Qemu-devel] " Philippe Mathieu-Daudé
2018-03-08 13:06 ` [PATCH v3 4/6] target/arm: Make 'any' CPU just an alias for 'max' Peter Maydell
2018-03-08 13:06 ` [Qemu-devel] " Peter Maydell
2018-03-09 13:45 ` Alex Bennée [this message]
2018-03-09 13:45 ` Alex Bennée
2018-03-09 16:48 ` Philippe Mathieu-Daudé
2018-03-09 16:48 ` [Qemu-devel] " Philippe Mathieu-Daudé
2018-03-08 13:06 ` [PATCH v3 5/6] hw/arm/virt: Add "max" to the list of CPU types "virt" supports Peter Maydell
2018-03-08 13:06 ` [Qemu-devel] " Peter Maydell
2018-03-09 13:46 ` Alex Bennée
2018-03-09 13:46 ` [Qemu-devel] " Alex Bennée
2018-03-09 16:49 ` Philippe Mathieu-Daudé
2018-03-09 16:49 ` [Qemu-devel] " Philippe Mathieu-Daudé
2018-03-08 13:06 ` [PATCH v3 6/6] hw/arm/virt: Support -machine gic-version=max Peter Maydell
2018-03-08 13:06 ` [Qemu-devel] " Peter Maydell
2018-03-09 13:50 ` Alex Bennée
2018-03-09 13:50 ` [Qemu-devel] " Alex Bennée
2018-03-09 13:53 ` Peter Maydell
2018-03-09 13:53 ` [Qemu-devel] " Peter Maydell
2018-03-09 13:52 ` [PATCH v3 0/6] arm: support -cpu max (and gic-version=max) Alex Bennée
2018-03-09 13:52 ` [Qemu-devel] " Alex Bennée
2018-03-09 13:55 ` Peter Maydell
2018-03-09 13:55 ` [Qemu-devel] " Peter Maydell
2018-03-09 16:59 ` Alex Bennée
2018-03-09 16:59 ` [Qemu-devel] " Alex Bennée
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