* [PATCH] drm/xe/oa: Fix sync entry leak on OA config emit failure
@ 2026-07-15 2:33 Linmao Li
2026-07-15 2:40 ` ✓ CI.KUnit: success for " Patchwork
` (5 more replies)
0 siblings, 6 replies; 7+ messages in thread
From: Linmao Li @ 2026-07-15 2:33 UTC (permalink / raw)
To: Ashutosh Dixit, Matthew Brost, Thomas Hellström,
Rodrigo Vivi
Cc: David Airlie, Simona Vetter, José Roberto de Souza,
Umesh Nerlige Ramappa, intel-xe, dri-devel, linux-kernel,
Linmao Li
xe_oa_emit_oa_config() releases the sync entries and the syncs array
only on its success path. When it fails before the point of no return
(fence allocation, config buffer allocation or batch submission), it
returns without touching stream->syncs.
The stream open path handles such failures in the caller, but
xe_oa_config_locked() propagates the error without any cleanup, so the
syncs array and the fence references held by the parsed entries are
leaked. The next config ioctl overwrites stream->syncs, making the
memory unreachable for good.
Clean up the parsed syncs when xe_oa_emit_oa_config() fails, matching
the cleanup done by the stream open error path, and reset the stream
sync state so it does not point at freed entries.
Fixes: 9920c8b88c5c ("drm/xe/oa: Add syncs support to OA config ioctl")
Signed-off-by: Linmao Li <lilinmao@kylinos.cn>
---
drivers/gpu/drm/xe/xe_oa.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
index 2dce6a47202c..b1ce312ea97a 100644
--- a/drivers/gpu/drm/xe/xe_oa.c
+++ b/drivers/gpu/drm/xe/xe_oa.c
@@ -1594,6 +1594,12 @@ static long xe_oa_config_locked(struct xe_oa_stream *stream, u64 arg)
config = xchg(&stream->oa_config, config);
drm_dbg(&stream->oa->xe->drm, "changed to oa config uuid=%s\n",
stream->oa_config->uuid);
+ } else {
+ while (param.num_syncs--)
+ xe_sync_entry_cleanup(¶m.syncs[param.num_syncs]);
+ kfree(param.syncs);
+ stream->num_syncs = 0;
+ stream->syncs = NULL;
}
err_config_put:
--
2.25.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* ✓ CI.KUnit: success for drm/xe/oa: Fix sync entry leak on OA config emit failure
2026-07-15 2:33 [PATCH] drm/xe/oa: Fix sync entry leak on OA config emit failure Linmao Li
@ 2026-07-15 2:40 ` Patchwork
2026-07-15 3:15 ` ✓ Xe.CI.BAT: " Patchwork
` (4 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2026-07-15 2:40 UTC (permalink / raw)
To: Linmao Li; +Cc: intel-xe
== Series Details ==
Series: drm/xe/oa: Fix sync entry leak on OA config emit failure
URL : https://patchwork.freedesktop.org/series/170447/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[02:38:53] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[02:38:58] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[02:39:30] Starting KUnit Kernel (1/1)...
[02:39:30] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[02:39:30] ================== guc_buf (11 subtests) ===================
[02:39:30] [PASSED] test_smallest
[02:39:30] [PASSED] test_largest
[02:39:30] [PASSED] test_granular
[02:39:30] [PASSED] test_unique
[02:39:30] [PASSED] test_overlap
[02:39:30] [PASSED] test_reusable
[02:39:30] [PASSED] test_too_big
[02:39:30] [PASSED] test_flush
[02:39:30] [PASSED] test_lookup
[02:39:30] [PASSED] test_data
[02:39:30] [PASSED] test_class
[02:39:30] ===================== [PASSED] guc_buf =====================
[02:39:30] =================== guc_dbm (7 subtests) ===================
[02:39:30] [PASSED] test_empty
[02:39:30] [PASSED] test_default
[02:39:30] ======================== test_size ========================
[02:39:30] [PASSED] 4
[02:39:30] [PASSED] 8
[02:39:30] [PASSED] 32
[02:39:30] [PASSED] 256
[02:39:30] ==================== [PASSED] test_size ====================
[02:39:30] ======================= test_reuse ========================
[02:39:30] [PASSED] 4
[02:39:30] [PASSED] 8
[02:39:30] [PASSED] 32
[02:39:30] [PASSED] 256
[02:39:30] =================== [PASSED] test_reuse ====================
[02:39:30] =================== test_range_overlap ====================
[02:39:30] [PASSED] 4
[02:39:30] [PASSED] 8
[02:39:30] [PASSED] 32
[02:39:30] [PASSED] 256
[02:39:30] =============== [PASSED] test_range_overlap ================
[02:39:30] =================== test_range_compact ====================
[02:39:30] [PASSED] 4
[02:39:30] [PASSED] 8
[02:39:30] [PASSED] 32
[02:39:30] [PASSED] 256
[02:39:30] =============== [PASSED] test_range_compact ================
[02:39:30] ==================== test_range_spare =====================
[02:39:30] [PASSED] 4
[02:39:30] [PASSED] 8
[02:39:30] [PASSED] 32
[02:39:30] [PASSED] 256
[02:39:30] ================ [PASSED] test_range_spare =================
[02:39:30] ===================== [PASSED] guc_dbm =====================
[02:39:30] =================== guc_idm (6 subtests) ===================
[02:39:30] [PASSED] bad_init
[02:39:30] [PASSED] no_init
[02:39:30] [PASSED] init_fini
[02:39:30] [PASSED] check_used
[02:39:30] [PASSED] check_quota
[02:39:30] [PASSED] check_all
[02:39:30] ===================== [PASSED] guc_idm =====================
[02:39:30] =============== guc_klv_helpers (9 subtests) ===============
[02:39:30] [PASSED] test_count
[02:39:30] [PASSED] test_encode_u32
[02:39:30] [PASSED] test_encode_u64
[02:39:30] [PASSED] test_encode_string
[02:39:30] [PASSED] test_encode_object_raw
[02:39:30] [PASSED] test_encode_object_klv
[02:39:30] [PASSED] test_encode_object_nested
[02:39:30] [PASSED] test_encode_object_basic
[02:39:30] [PASSED] test_print
[02:39:30] ================= [PASSED] guc_klv_helpers =================
[02:39:30] ================== no_relay (3 subtests) ===================
[02:39:30] [PASSED] xe_drops_guc2pf_if_not_ready
[02:39:30] [PASSED] xe_drops_guc2vf_if_not_ready
[02:39:30] [PASSED] xe_rejects_send_if_not_ready
[02:39:30] ==================== [PASSED] no_relay =====================
[02:39:30] ================== pf_relay (14 subtests) ==================
[02:39:30] [PASSED] pf_rejects_guc2pf_too_short
[02:39:30] [PASSED] pf_rejects_guc2pf_too_long
[02:39:30] [PASSED] pf_rejects_guc2pf_no_payload
[02:39:30] [PASSED] pf_fails_no_payload
[02:39:30] [PASSED] pf_fails_bad_origin
[02:39:30] [PASSED] pf_fails_bad_type
[02:39:30] [PASSED] pf_txn_reports_error
[02:39:30] [PASSED] pf_txn_sends_pf2guc
[02:39:30] [PASSED] pf_sends_pf2guc
[02:39:30] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[02:39:30] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[02:39:30] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[02:39:30] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[02:39:30] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[02:39:30] ==================== [PASSED] pf_relay =====================
[02:39:30] ================== vf_relay (3 subtests) ===================
[02:39:30] [PASSED] vf_rejects_guc2vf_too_short
[02:39:30] [PASSED] vf_rejects_guc2vf_too_long
[02:39:30] [PASSED] vf_rejects_guc2vf_no_payload
[02:39:30] ==================== [PASSED] vf_relay =====================
[02:39:30] ================ pf_gt_config (9 subtests) =================
[02:39:30] [PASSED] fair_contexts_1vf
[02:39:30] [PASSED] fair_doorbells_1vf
[02:39:30] [PASSED] fair_ggtt_1vf
[02:39:30] ====================== fair_vram_1vf ======================
[02:39:30] [PASSED] 3.50 GiB
[02:39:30] [PASSED] 11.5 GiB
[02:39:30] [PASSED] 15.5 GiB
[02:39:30] [PASSED] 31.5 GiB
[02:39:30] [PASSED] 63.5 GiB
[02:39:30] [PASSED] 1.91 GiB
[02:39:30] ================== [PASSED] fair_vram_1vf ==================
[02:39:30] ================ fair_vram_1vf_admin_only =================
[02:39:30] [PASSED] 3.50 GiB
[02:39:30] [PASSED] 11.5 GiB
[02:39:30] [PASSED] 15.5 GiB
[02:39:30] [PASSED] 31.5 GiB
[02:39:30] [PASSED] 63.5 GiB
[02:39:30] [PASSED] 1.91 GiB
[02:39:30] ============ [PASSED] fair_vram_1vf_admin_only =============
[02:39:30] ====================== fair_contexts ======================
[02:39:30] [PASSED] 1 VF
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[02:39:30] ================== [PASSED] fair_contexts ==================
[02:39:30] ===================== fair_doorbells ======================
[02:39:30] [PASSED] 1 VF
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[02:39:30] [PASSED] 63 VFs
[02:39:30] ================= [PASSED] fair_doorbells ==================
[02:39:30] ======================== fair_ggtt ========================
[02:39:30] [PASSED] 1 VF
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[02:39:30] ==================== [PASSED] fair_ggtt ====================
[02:39:30] ======================== fair_vram ========================
[02:39:30] [PASSED] 1 VF
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[02:39:30] [PASSED] 63 VFs
[02:39:30] ==================== [PASSED] fair_vram ====================
[02:39:30] ================== [PASSED] pf_gt_config ===================
[02:39:30] ===================== lmtt (1 subtest) =====================
[02:39:30] ======================== test_ops =========================
[02:39:30] [PASSED] 2-level
[02:39:30] [PASSED] multi-level
[02:39:30] ==================== [PASSED] test_ops =====================
[02:39:30] ====================== [PASSED] lmtt =======================
[02:39:30] ================= sriov_packet (1 subtest) =================
[02:39:30] [PASSED] test_descriptor_init
[02:39:30] ================== [PASSED] sriov_packet ===================
[02:39:30] ================= pf_service (11 subtests) =================
[02:39:30] [PASSED] pf_negotiate_any
[02:39:30] [PASSED] pf_negotiate_base_match
[02:39:30] [PASSED] pf_negotiate_base_newer
[02:39:30] [PASSED] pf_negotiate_base_next
[02:39:30] [SKIPPED] pf_negotiate_base_older (no older minor)
[02:39:30] [PASSED] pf_negotiate_base_prev
[02:39:30] [PASSED] pf_negotiate_latest_match
[02:39:30] [PASSED] pf_negotiate_latest_newer
[02:39:30] [PASSED] pf_negotiate_latest_next
[02:39:30] [SKIPPED] pf_negotiate_latest_older (no older minor)
[02:39:30] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[02:39:30] =================== [PASSED] pf_service ====================
[02:39:30] ================= xe_guc_g2g (2 subtests) ==================
[02:39:30] ============== xe_live_guc_g2g_kunit_default ==============
[02:39:30] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[02:39:30] ============== xe_live_guc_g2g_kunit_allmem ===============
[02:39:30] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[02:39:30] =================== [SKIPPED] xe_guc_g2g ===================
[02:39:30] =================== xe_mocs (2 subtests) ===================
[02:39:30] ================ xe_live_mocs_kernel_kunit ================
[02:39:30] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[02:39:30] ================ xe_live_mocs_reset_kunit =================
[02:39:30] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[02:39:30] ==================== [SKIPPED] xe_mocs =====================
[02:39:30] ================= xe_migrate (2 subtests) ==================
[02:39:30] ================= xe_migrate_sanity_kunit =================
[02:39:30] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[02:39:30] ================== xe_validate_ccs_kunit ==================
[02:39:30] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[02:39:30] =================== [SKIPPED] xe_migrate ===================
[02:39:30] ================== xe_dma_buf (1 subtest) ==================
[02:39:30] ==================== xe_dma_buf_kunit =====================
[02:39:30] ================ [SKIPPED] xe_dma_buf_kunit ================
[02:39:30] =================== [SKIPPED] xe_dma_buf ===================
[02:39:30] ================= xe_bo_shrink (1 subtest) =================
[02:39:30] =================== xe_bo_shrink_kunit ====================
[02:39:30] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[02:39:30] ================== [SKIPPED] xe_bo_shrink ==================
[02:39:30] ==================== xe_bo (2 subtests) ====================
[02:39:30] ================== xe_ccs_migrate_kunit ===================
[02:39:30] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[02:39:30] ==================== xe_bo_evict_kunit ====================
[02:39:30] =============== [SKIPPED] xe_bo_evict_kunit ================
[02:39:30] ===================== [SKIPPED] xe_bo ======================
[02:39:30] ==================== args (13 subtests) ====================
[02:39:30] [PASSED] count_args_test
[02:39:30] [PASSED] call_args_example
[02:39:30] [PASSED] call_args_test
[02:39:30] [PASSED] drop_first_arg_example
[02:39:30] [PASSED] drop_first_arg_test
[02:39:30] [PASSED] first_arg_example
[02:39:30] [PASSED] first_arg_test
[02:39:30] [PASSED] last_arg_example
[02:39:30] [PASSED] last_arg_test
[02:39:30] [PASSED] pick_arg_example
[02:39:30] [PASSED] if_args_example
[02:39:30] [PASSED] if_args_test
[02:39:30] [PASSED] sep_comma_example
[02:39:30] ====================== [PASSED] args =======================
[02:39:30] =================== xe_pci (3 subtests) ====================
[02:39:30] ==================== check_graphics_ip ====================
[02:39:30] [PASSED] 12.00 Xe_LP
[02:39:30] [PASSED] 12.10 Xe_LP+
[02:39:30] [PASSED] 12.55 Xe_HPG
[02:39:30] [PASSED] 12.60 Xe_HPC
[02:39:30] [PASSED] 12.70 Xe_LPG
[02:39:30] [PASSED] 12.71 Xe_LPG
[02:39:30] [PASSED] 12.74 Xe_LPG+
[02:39:30] [PASSED] 20.01 Xe2_HPG
[02:39:30] [PASSED] 20.02 Xe2_HPG
[02:39:30] [PASSED] 20.04 Xe2_LPG
[02:39:30] [PASSED] 30.00 Xe3_LPG
[02:39:30] [PASSED] 30.01 Xe3_LPG
[02:39:30] [PASSED] 30.03 Xe3_LPG
[02:39:30] [PASSED] 30.04 Xe3_LPG
[02:39:30] [PASSED] 30.05 Xe3_LPG
[02:39:30] [PASSED] 35.10 Xe3p_LPG
[02:39:30] [PASSED] 35.11 Xe3p_XPC
[02:39:30] ================ [PASSED] check_graphics_ip ================
[02:39:30] ===================== check_media_ip ======================
[02:39:30] [PASSED] 12.00 Xe_M
[02:39:30] [PASSED] 12.55 Xe_HPM
[02:39:30] [PASSED] 13.00 Xe_LPM+
[02:39:30] [PASSED] 13.01 Xe2_HPM
[02:39:30] [PASSED] 20.00 Xe2_LPM
[02:39:30] [PASSED] 30.00 Xe3_LPM
[02:39:30] [PASSED] 30.02 Xe3_LPM
[02:39:30] [PASSED] 35.00 Xe3p_LPM
[02:39:30] [PASSED] 35.03 Xe3p_HPM
[02:39:30] ================= [PASSED] check_media_ip ==================
[02:39:30] =================== check_platform_desc ===================
[02:39:30] [PASSED] 0x9A60 (TIGERLAKE)
[02:39:30] [PASSED] 0x9A68 (TIGERLAKE)
[02:39:30] [PASSED] 0x9A70 (TIGERLAKE)
[02:39:30] [PASSED] 0x9A40 (TIGERLAKE)
[02:39:30] [PASSED] 0x9A49 (TIGERLAKE)
[02:39:30] [PASSED] 0x9A59 (TIGERLAKE)
[02:39:30] [PASSED] 0x9A78 (TIGERLAKE)
[02:39:30] [PASSED] 0x9AC0 (TIGERLAKE)
[02:39:30] [PASSED] 0x9AC9 (TIGERLAKE)
[02:39:30] [PASSED] 0x9AD9 (TIGERLAKE)
[02:39:30] [PASSED] 0x9AF8 (TIGERLAKE)
[02:39:30] [PASSED] 0x4C80 (ROCKETLAKE)
[02:39:30] [PASSED] 0x4C8A (ROCKETLAKE)
[02:39:30] [PASSED] 0x4C8B (ROCKETLAKE)
[02:39:30] [PASSED] 0x4C8C (ROCKETLAKE)
[02:39:30] [PASSED] 0x4C90 (ROCKETLAKE)
[02:39:30] [PASSED] 0x4C9A (ROCKETLAKE)
[02:39:30] [PASSED] 0x4680 (ALDERLAKE_S)
[02:39:30] [PASSED] 0x4682 (ALDERLAKE_S)
[02:39:30] [PASSED] 0x4688 (ALDERLAKE_S)
[02:39:30] [PASSED] 0x468A (ALDERLAKE_S)
[02:39:30] [PASSED] 0x468B (ALDERLAKE_S)
[02:39:30] [PASSED] 0x4690 (ALDERLAKE_S)
[02:39:30] [PASSED] 0x4692 (ALDERLAKE_S)
[02:39:30] [PASSED] 0x4693 (ALDERLAKE_S)
[02:39:30] [PASSED] 0x46A0 (ALDERLAKE_P)
[02:39:30] [PASSED] 0x46A1 (ALDERLAKE_P)
[02:39:30] [PASSED] 0x46A2 (ALDERLAKE_P)
[02:39:30] [PASSED] 0x46A3 (ALDERLAKE_P)
[02:39:30] [PASSED] 0x46A6 (ALDERLAKE_P)
[02:39:30] [PASSED] 0x46A8 (ALDERLAKE_P)
[02:39:30] [PASSED] 0x46AA (ALDERLAKE_P)
[02:39:30] [PASSED] 0x462A (ALDERLAKE_P)
[02:39:30] [PASSED] 0x4626 (ALDERLAKE_P)
[02:39:30] [PASSED] 0x4628 (ALDERLAKE_P)
[02:39:30] [PASSED] 0x46B0 (ALDERLAKE_P)
[02:39:30] [PASSED] 0x46B1 (ALDERLAKE_P)
[02:39:30] [PASSED] 0x46B2 (ALDERLAKE_P)
[02:39:30] [PASSED] 0x46B3 (ALDERLAKE_P)
[02:39:30] [PASSED] 0x46C0 (ALDERLAKE_P)
[02:39:30] [PASSED] 0x46C1 (ALDERLAKE_P)
[02:39:30] [PASSED] 0x46C2 (ALDERLAKE_P)
[02:39:30] [PASSED] 0x46C3 (ALDERLAKE_P)
[02:39:30] [PASSED] 0x46D0 (ALDERLAKE_N)
[02:39:30] [PASSED] 0x46D1 (ALDERLAKE_N)
[02:39:30] [PASSED] 0x46D2 (ALDERLAKE_N)
[02:39:30] [PASSED] 0x46D3 (ALDERLAKE_N)
[02:39:30] [PASSED] 0x46D4 (ALDERLAKE_N)
[02:39:30] [PASSED] 0xA721 (ALDERLAKE_P)
[02:39:30] [PASSED] 0xA7A1 (ALDERLAKE_P)
[02:39:30] [PASSED] 0xA7A9 (ALDERLAKE_P)
[02:39:30] [PASSED] 0xA7AC (ALDERLAKE_P)
[02:39:30] [PASSED] 0xA7AD (ALDERLAKE_P)
[02:39:30] [PASSED] 0xA720 (ALDERLAKE_P)
[02:39:30] [PASSED] 0xA7A0 (ALDERLAKE_P)
[02:39:30] [PASSED] 0xA7A8 (ALDERLAKE_P)
[02:39:30] [PASSED] 0xA7AA (ALDERLAKE_P)
[02:39:30] [PASSED] 0xA7AB (ALDERLAKE_P)
[02:39:30] [PASSED] 0xA780 (ALDERLAKE_S)
[02:39:30] [PASSED] 0xA781 (ALDERLAKE_S)
[02:39:30] [PASSED] 0xA782 (ALDERLAKE_S)
[02:39:30] [PASSED] 0xA783 (ALDERLAKE_S)
[02:39:30] [PASSED] 0xA788 (ALDERLAKE_S)
[02:39:30] [PASSED] 0xA789 (ALDERLAKE_S)
[02:39:30] [PASSED] 0xA78A (ALDERLAKE_S)
[02:39:30] [PASSED] 0xA78B (ALDERLAKE_S)
[02:39:30] [PASSED] 0x4905 (DG1)
[02:39:30] [PASSED] 0x4906 (DG1)
[02:39:30] [PASSED] 0x4907 (DG1)
[02:39:30] [PASSED] 0x4908 (DG1)
[02:39:30] [PASSED] 0x4909 (DG1)
[02:39:30] [PASSED] 0x56C0 (DG2)
[02:39:30] [PASSED] 0x56C2 (DG2)
[02:39:30] [PASSED] 0x56C1 (DG2)
[02:39:30] [PASSED] 0x7D51 (METEORLAKE)
[02:39:30] [PASSED] 0x7DD1 (METEORLAKE)
[02:39:30] [PASSED] 0x7D41 (METEORLAKE)
[02:39:30] [PASSED] 0x7D67 (METEORLAKE)
[02:39:30] [PASSED] 0xB640 (METEORLAKE)
[02:39:30] [PASSED] 0x56A0 (DG2)
[02:39:30] [PASSED] 0x56A1 (DG2)
[02:39:30] [PASSED] 0x56A2 (DG2)
[02:39:30] [PASSED] 0x56BE (DG2)
[02:39:30] [PASSED] 0x56BF (DG2)
[02:39:30] [PASSED] 0x5690 (DG2)
[02:39:30] [PASSED] 0x5691 (DG2)
[02:39:30] [PASSED] 0x5692 (DG2)
[02:39:30] [PASSED] 0x56A5 (DG2)
[02:39:30] [PASSED] 0x56A6 (DG2)
[02:39:30] [PASSED] 0x56B0 (DG2)
[02:39:30] [PASSED] 0x56B1 (DG2)
[02:39:30] [PASSED] 0x56BA (DG2)
[02:39:30] [PASSED] 0x56BB (DG2)
[02:39:30] [PASSED] 0x56BC (DG2)
[02:39:30] [PASSED] 0x56BD (DG2)
[02:39:30] [PASSED] 0x5693 (DG2)
[02:39:30] [PASSED] 0x5694 (DG2)
[02:39:30] [PASSED] 0x5695 (DG2)
[02:39:30] [PASSED] 0x56A3 (DG2)
[02:39:30] [PASSED] 0x56A4 (DG2)
[02:39:30] [PASSED] 0x56B2 (DG2)
[02:39:30] [PASSED] 0x56B3 (DG2)
[02:39:30] [PASSED] 0x5696 (DG2)
[02:39:30] [PASSED] 0x5697 (DG2)
[02:39:30] [PASSED] 0xB69 (PVC)
[02:39:30] [PASSED] 0xB6E (PVC)
[02:39:30] [PASSED] 0xBD4 (PVC)
[02:39:30] [PASSED] 0xBD5 (PVC)
[02:39:30] [PASSED] 0xBD6 (PVC)
[02:39:30] [PASSED] 0xBD7 (PVC)
[02:39:30] [PASSED] 0xBD8 (PVC)
[02:39:30] [PASSED] 0xBD9 (PVC)
[02:39:30] [PASSED] 0xBDA (PVC)
[02:39:30] [PASSED] 0xBDB (PVC)
[02:39:30] [PASSED] 0xBE0 (PVC)
[02:39:30] [PASSED] 0xBE1 (PVC)
[02:39:30] [PASSED] 0xBE5 (PVC)
[02:39:30] [PASSED] 0x7D40 (METEORLAKE)
[02:39:30] [PASSED] 0x7D45 (METEORLAKE)
[02:39:30] [PASSED] 0x7D55 (METEORLAKE)
[02:39:30] [PASSED] 0x7D60 (METEORLAKE)
[02:39:30] [PASSED] 0x7DD5 (METEORLAKE)
[02:39:30] [PASSED] 0x6420 (LUNARLAKE)
[02:39:30] [PASSED] 0x64A0 (LUNARLAKE)
[02:39:30] [PASSED] 0x64B0 (LUNARLAKE)
[02:39:30] [PASSED] 0xE202 (BATTLEMAGE)
[02:39:30] [PASSED] 0xE209 (BATTLEMAGE)
[02:39:30] [PASSED] 0xE20B (BATTLEMAGE)
[02:39:30] [PASSED] 0xE20C (BATTLEMAGE)
[02:39:30] [PASSED] 0xE20D (BATTLEMAGE)
[02:39:30] [PASSED] 0xE210 (BATTLEMAGE)
[02:39:30] [PASSED] 0xE211 (BATTLEMAGE)
[02:39:30] [PASSED] 0xE212 (BATTLEMAGE)
[02:39:30] [PASSED] 0xE216 (BATTLEMAGE)
[02:39:30] [PASSED] 0xE220 (BATTLEMAGE)
[02:39:30] [PASSED] 0xE221 (BATTLEMAGE)
[02:39:30] [PASSED] 0xE222 (BATTLEMAGE)
[02:39:30] [PASSED] 0xE223 (BATTLEMAGE)
[02:39:30] [PASSED] 0xB080 (PANTHERLAKE)
[02:39:30] [PASSED] 0xB081 (PANTHERLAKE)
[02:39:30] [PASSED] 0xB082 (PANTHERLAKE)
[02:39:30] [PASSED] 0xB083 (PANTHERLAKE)
[02:39:30] [PASSED] 0xB084 (PANTHERLAKE)
[02:39:30] [PASSED] 0xB085 (PANTHERLAKE)
[02:39:30] [PASSED] 0xB086 (PANTHERLAKE)
[02:39:30] [PASSED] 0xB087 (PANTHERLAKE)
[02:39:30] [PASSED] 0xB08F (PANTHERLAKE)
[02:39:30] [PASSED] 0xB090 (PANTHERLAKE)
[02:39:30] [PASSED] 0xB0A0 (PANTHERLAKE)
[02:39:30] [PASSED] 0xB0B0 (PANTHERLAKE)
[02:39:30] [PASSED] 0xFD80 (PANTHERLAKE)
[02:39:30] [PASSED] 0xFD81 (PANTHERLAKE)
[02:39:30] [PASSED] 0xD740 (NOVALAKE_S)
[02:39:30] [PASSED] 0xD741 (NOVALAKE_S)
[02:39:30] [PASSED] 0xD742 (NOVALAKE_S)
[02:39:30] [PASSED] 0xD743 (NOVALAKE_S)
[02:39:30] [PASSED] 0xD745 (NOVALAKE_S)
[02:39:30] [PASSED] 0xD74A (NOVALAKE_S)
[02:39:30] [PASSED] 0xD74B (NOVALAKE_S)
[02:39:30] [PASSED] 0x674C (CRESCENTISLAND)
[02:39:30] [PASSED] 0x674D (CRESCENTISLAND)
[02:39:30] [PASSED] 0x674E (CRESCENTISLAND)
[02:39:30] [PASSED] 0x674F (CRESCENTISLAND)
[02:39:30] [PASSED] 0x6750 (CRESCENTISLAND)
[02:39:30] [PASSED] 0xD750 (NOVALAKE_P)
[02:39:30] [PASSED] 0xD751 (NOVALAKE_P)
[02:39:30] [PASSED] 0xD752 (NOVALAKE_P)
[02:39:30] [PASSED] 0xD753 (NOVALAKE_P)
[02:39:30] [PASSED] 0xD754 (NOVALAKE_P)
[02:39:30] [PASSED] 0xD755 (NOVALAKE_P)
[02:39:30] [PASSED] 0xD756 (NOVALAKE_P)
[02:39:30] [PASSED] 0xD757 (NOVALAKE_P)
[02:39:30] [PASSED] 0xD75F (NOVALAKE_P)
[02:39:30] =============== [PASSED] check_platform_desc ===============
[02:39:30] ===================== [PASSED] xe_pci ======================
[02:39:30] ============= xe_rtp_tables_test (5 subtests) ==============
[02:39:30] ================== xe_rtp_table_gt_test ===================
[02:39:30] [PASSED] gt_was/14011060649
[02:39:30] [PASSED] gt_was/14011059788
[02:39:30] [PASSED] gt_was/14015795083
[02:39:30] [PASSED] gt_was/16021867713
[02:39:30] [PASSED] gt_was/14019449301
[02:39:30] [PASSED] gt_was/16028005424
[02:39:30] [PASSED] gt_was/14026578760
[02:39:30] [PASSED] gt_was/1409420604
[02:39:30] [PASSED] gt_was/1408615072
[02:39:30] [PASSED] gt_was/22010523718
[02:39:30] [PASSED] gt_was/14011006942
[02:39:30] [PASSED] gt_was/14014830051
[02:39:30] [PASSED] gt_was/18018781329
[02:39:30] [PASSED] gt_was/1509235366
[02:39:30] [PASSED] gt_was/18018781329
[02:39:30] [PASSED] gt_was/16016694945
[02:39:30] [PASSED] gt_was/14018575942
[02:39:30] [PASSED] gt_was/22016670082
[02:39:30] [PASSED] gt_was/22016670082
[02:39:30] [PASSED] gt_was/14017421178
[02:39:30] [PASSED] gt_was/16025250150
[02:39:30] [PASSED] gt_was/14021871409
[02:39:30] [PASSED] gt_was/16021865536
[02:39:30] [PASSED] gt_was/14021486841
[02:39:30] [PASSED] gt_was/14025160223
[02:39:30] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[02:39:30] [PASSED] gt_was/14025635424
[02:39:30] [PASSED] gt_was/16028005424
[02:39:30] ============== [PASSED] xe_rtp_table_gt_test ===============
[02:39:30] ================== xe_rtp_table_gt_test ===================
[02:39:30] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[02:39:30] [PASSED] gt_tunings/Tuning: 32B Access Enable
[02:39:30] [PASSED] gt_tunings/Tuning: L3 cache
[02:39:30] [PASSED] gt_tunings/Tuning: L3 cache - media
[02:39:30] [PASSED] gt_tunings/Tuning: Compression Overfetch
[02:39:30] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[02:39:30] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[02:39:30] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[02:39:30] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[02:39:30] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[02:39:30] [PASSED] gt_tunings/Tuning: Stateless compression control
[02:39:30] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[02:39:30] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[02:39:30] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[02:39:30] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[02:39:30] ============== [PASSED] xe_rtp_table_gt_test ===============
[02:39:30] ================== xe_rtp_table_oob_test ==================
[02:39:30] [PASSED] oob_was/1607983814
[02:39:30] [PASSED] oob_was/16010904313
[02:39:30] [PASSED] oob_was/18022495364
[02:39:30] [PASSED] oob_was/22012773006
[02:39:30] [PASSED] oob_was/14014475959
[02:39:30] [PASSED] oob_was/22011391025
[02:39:30] [PASSED] oob_was/22012727170
[02:39:30] [PASSED] oob_was/22012727685
[02:39:30] [PASSED] oob_was/22016596838
[02:39:30] [PASSED] oob_was/18020744125
[02:39:30] [PASSED] oob_was/1409600907
[02:39:30] [PASSED] oob_was/22014953428
[02:39:30] [PASSED] oob_was/16017236439
[02:39:30] [PASSED] oob_was/14019821291
[02:39:30] [PASSED] oob_was/14015076503
[02:39:30] [PASSED] oob_was/14018913170
[02:39:30] [PASSED] oob_was/14018094691
[02:39:30] [PASSED] oob_was/18024947630
[02:39:30] [PASSED] oob_was/16022287689
[02:39:30] [PASSED] oob_was/13011645652
[02:39:30] [PASSED] oob_was/14022293748
[02:39:30] [PASSED] oob_was/22019794406
[02:39:30] [PASSED] oob_was/22019338487
[02:39:30] [PASSED] oob_was/16023588340
[02:39:30] [PASSED] oob_was/14019789679
[02:39:30] [PASSED] oob_was/14022866841
[02:39:30] [PASSED] oob_was/16021333562
[02:39:30] [PASSED] oob_was/14016712196
[02:39:30] [PASSED] oob_was/14015568240
[02:39:30] [PASSED] oob_was/18013179988
[02:39:30] [PASSED] oob_was/1508761755
[02:39:30] [PASSED] oob_was/16023105232
[02:39:30] [PASSED] oob_was/16026508708
[02:39:30] [PASSED] oob_was/14020001231
[02:39:30] [PASSED] oob_was/16023683509
[02:39:30] [PASSED] oob_was/14025515070
[02:39:30] [PASSED] oob_was/15015404425_disable
[02:39:30] [PASSED] oob_was/16026007364
[02:39:30] [PASSED] oob_was/14020316580
[02:39:30] [PASSED] oob_was/14025883347
[02:39:30] [PASSED] oob_was/16029380221
[02:39:30] [PASSED] oob_was/22022079272
[02:39:30] [PASSED] oob_was/16029897822
[02:39:30] ============== [PASSED] xe_rtp_table_oob_test ==============
[02:39:30] ================ xe_rtp_table_dev_oob_test ================
[02:39:30] [PASSED] device_oob_was/22010954014
[02:39:30] [PASSED] device_oob_was/15015404425
[02:39:30] [PASSED] device_oob_was/22019338487_display
[02:39:30] [PASSED] device_oob_was/14022085890
[02:39:30] [PASSED] device_oob_was/14026539277
[02:39:30] [PASSED] device_oob_was/14026633728
[02:39:30] [PASSED] device_oob_was/14026746987
[02:39:30] [PASSED] device_oob_was/14026779378
[02:39:30] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[02:39:30] ========== xe_rtp_table_missing_upper_bound_test ==========
[02:39:30] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[02:39:30] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[02:39:30] [PASSED] register_whitelist/1806527549
[02:39:30] [PASSED] register_whitelist/allow_read_ctx_timestamp
[02:39:30] [PASSED] register_whitelist/allow_read_queue_timestamp
[02:39:30] [PASSED] register_whitelist/16014440446
[02:39:30] [PASSED] register_whitelist/16017236439
[02:39:30] [PASSED] register_whitelist/16020183090
[02:39:30] [PASSED] register_whitelist/14024997852
[02:39:30] [PASSED] register_whitelist/14024997852
[02:39:30] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[02:39:30] =============== [PASSED] xe_rtp_tables_test ================
[02:39:30] =================== xe_rtp (3 subtests) ====================
[02:39:30] =================== xe_rtp_rules_tests ====================
[02:39:30] [PASSED] no
[02:39:30] [PASSED] yes
[02:39:30] [PASSED] no-and-no
[02:39:30] [PASSED] no-and-yes
[02:39:30] [PASSED] yes-and-no
[02:39:30] [PASSED] yes-and-yes
[02:39:30] [PASSED] no-or-no
[02:39:30] [PASSED] no-or-yes
[02:39:30] [PASSED] yes-or-no
[02:39:30] [PASSED] yes-or-yes
[02:39:30] [PASSED] no-yes-or-yes-no
[02:39:30] [PASSED] no-yes-or-yes-yes
[02:39:30] [PASSED] yes-yes-or-no-yes
[02:39:30] [PASSED] yes-yes-or-yes-yes
[02:39:30] [PASSED] no-no-or-yes-or-no
[02:39:30] [PASSED] or
[02:39:30] [PASSED] or-yes
[02:39:30] [PASSED] or-no
[02:39:30] [PASSED] yes-or
[02:39:30] [PASSED] no-or
[02:39:30] [PASSED] no-or-or-yes
[02:39:30] [PASSED] yes-or-or-no
[02:39:30] [PASSED] no-or-or-no
[02:39:30] [PASSED] missing-context-engine-class
[02:39:30] [PASSED] missing-context-engine-class-or-yes
[02:39:30] [PASSED] missing-context-engine-class-or-or-yes
[02:39:30] =============== [PASSED] xe_rtp_rules_tests ================
[02:39:30] =============== xe_rtp_process_to_sr_tests ================
[02:39:30] [PASSED] coalesce-same-reg
[02:39:30] [PASSED] coalesce-same-reg-literal-and-func
[02:39:30] [PASSED] no-match-no-add
[02:39:30] [PASSED] two-regs-two-entries
[02:39:30] [PASSED] clr-one-set-other
[02:39:30] [PASSED] set-field
[02:39:30] [PASSED] conflict-duplicate
[02:39:30] [PASSED] conflict-not-disjoint
[02:39:30] [PASSED] conflict-not-disjoint-literal-and-func
[02:39:30] [PASSED] conflict-reg-type
[02:39:30] [PASSED] bad-mcr-reg-forced-to-regular
[02:39:30] [PASSED] bad-regular-reg-forced-to-mcr
[02:39:30] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[02:39:30] ================== xe_rtp_process_tests ===================
[02:39:30] [PASSED] active1
[02:39:30] [PASSED] active2
[02:39:30] [PASSED] active-inactive
[02:39:30] [PASSED] inactive-active
[02:39:30] [PASSED] inactive-active-inactive
[02:39:30] [PASSED] inactive-inactive-inactive
[02:39:30] ============== [PASSED] xe_rtp_process_tests ===============
[02:39:30] ===================== [PASSED] xe_rtp ======================
[02:39:30] ==================== xe_wa (1 subtest) =====================
[02:39:30] ======================== xe_wa_gt =========================
[02:39:30] [PASSED] TIGERLAKE B0
[02:39:30] [PASSED] DG1 A0
[02:39:30] [PASSED] DG1 B0
[02:39:30] [PASSED] ALDERLAKE_S A0
[02:39:30] [PASSED] ALDERLAKE_S B0
[02:39:30] [PASSED] ALDERLAKE_S C0
[02:39:30] [PASSED] ALDERLAKE_S D0
[02:39:30] [PASSED] ALDERLAKE_P A0
[02:39:30] [PASSED] ALDERLAKE_P B0
[02:39:30] [PASSED] ALDERLAKE_P C0
[02:39:30] [PASSED] ALDERLAKE_S RPLS D0
[02:39:30] [PASSED] ALDERLAKE_P RPLU E0
[02:39:30] [PASSED] DG2 G10 C0
[02:39:30] [PASSED] DG2 G11 B1
[02:39:30] [PASSED] DG2 G12 A1
[02:39:30] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[02:39:30] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[02:39:30] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[02:39:30] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[02:39:30] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[02:39:30] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[02:39:30] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[02:39:30] ==================== [PASSED] xe_wa_gt =====================
[02:39:30] ====================== [PASSED] xe_wa ======================
[02:39:30] ============================================================
[02:39:30] Testing complete. Ran 741 tests: passed: 723, skipped: 18
[02:39:30] Elapsed time: 36.835s total, 4.384s configuring, 31.785s building, 0.638s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[02:39:30] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[02:39:32] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[02:39:57] Starting KUnit Kernel (1/1)...
[02:39:57] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[02:39:57] ============ drm_test_pick_cmdline (2 subtests) ============
[02:39:57] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[02:39:57] =============== drm_test_pick_cmdline_named ===============
[02:39:57] [PASSED] NTSC
[02:39:57] [PASSED] NTSC-J
[02:39:57] [PASSED] PAL
[02:39:57] [PASSED] PAL-M
[02:39:57] =========== [PASSED] drm_test_pick_cmdline_named ===========
[02:39:57] ============== [PASSED] drm_test_pick_cmdline ==============
[02:39:57] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[02:39:57] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[02:39:57] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[02:39:57] =========== drm_validate_clone_mode (2 subtests) ===========
[02:39:57] ============== drm_test_check_in_clone_mode ===============
[02:39:57] [PASSED] in_clone_mode
[02:39:57] [PASSED] not_in_clone_mode
[02:39:57] ========== [PASSED] drm_test_check_in_clone_mode ===========
[02:39:57] =============== drm_test_check_valid_clones ===============
[02:39:57] [PASSED] not_in_clone_mode
[02:39:57] [PASSED] valid_clone
[02:39:57] [PASSED] invalid_clone
[02:39:57] =========== [PASSED] drm_test_check_valid_clones ===========
[02:39:57] ============= [PASSED] drm_validate_clone_mode =============
[02:39:57] ============= drm_validate_modeset (1 subtest) =============
[02:39:57] [PASSED] drm_test_check_connector_changed_modeset
[02:39:57] ============== [PASSED] drm_validate_modeset ===============
[02:39:57] ====== drm_test_bridge_get_current_state (2 subtests) ======
[02:39:57] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[02:39:57] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[02:39:57] ======== [PASSED] drm_test_bridge_get_current_state ========
[02:39:57] ====== drm_test_bridge_helper_reset_crtc (4 subtests) ======
[02:39:57] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[02:39:57] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[02:39:57] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[02:39:57] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[02:39:57] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[02:39:57] ============== drm_bridge_alloc (2 subtests) ===============
[02:39:57] [PASSED] drm_test_drm_bridge_alloc_basic
[02:39:57] [PASSED] drm_test_drm_bridge_alloc_get_put
[02:39:57] ================ [PASSED] drm_bridge_alloc =================
[02:39:57] ============= drm_bridge_bus_fmt (5 subtests) ==============
[02:39:57] [PASSED] drm_test_bridge_rgb_yuv_rgb
[02:39:57] [PASSED] drm_test_bridge_must_convert_to_yuv444
[02:39:57] [PASSED] drm_test_bridge_hdmi_auto_rgb
[02:39:57] [PASSED] drm_test_bridge_auto_first
[02:39:57] [PASSED] drm_test_bridge_rgb_yuv_no_path
[02:39:57] =============== [PASSED] drm_bridge_bus_fmt ================
[02:39:57] ============= drm_cmdline_parser (40 subtests) =============
[02:39:57] [PASSED] drm_test_cmdline_force_d_only
[02:39:57] [PASSED] drm_test_cmdline_force_D_only_dvi
[02:39:57] [PASSED] drm_test_cmdline_force_D_only_hdmi
[02:39:57] [PASSED] drm_test_cmdline_force_D_only_not_digital
[02:39:57] [PASSED] drm_test_cmdline_force_e_only
[02:39:57] [PASSED] drm_test_cmdline_res
[02:39:57] [PASSED] drm_test_cmdline_res_vesa
[02:39:57] [PASSED] drm_test_cmdline_res_vesa_rblank
[02:39:57] [PASSED] drm_test_cmdline_res_rblank
[02:39:57] [PASSED] drm_test_cmdline_res_bpp
[02:39:57] [PASSED] drm_test_cmdline_res_refresh
[02:39:57] [PASSED] drm_test_cmdline_res_bpp_refresh
[02:39:57] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[02:39:57] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[02:39:57] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[02:39:57] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[02:39:57] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[02:39:57] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[02:39:57] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[02:39:57] [PASSED] drm_test_cmdline_res_margins_force_on
[02:39:57] [PASSED] drm_test_cmdline_res_vesa_margins
[02:39:57] [PASSED] drm_test_cmdline_name
[02:39:57] [PASSED] drm_test_cmdline_name_bpp
[02:39:57] [PASSED] drm_test_cmdline_name_option
[02:39:57] [PASSED] drm_test_cmdline_name_bpp_option
[02:39:57] [PASSED] drm_test_cmdline_rotate_0
[02:39:57] [PASSED] drm_test_cmdline_rotate_90
[02:39:57] [PASSED] drm_test_cmdline_rotate_180
[02:39:57] [PASSED] drm_test_cmdline_rotate_270
[02:39:57] [PASSED] drm_test_cmdline_hmirror
[02:39:57] [PASSED] drm_test_cmdline_vmirror
[02:39:57] [PASSED] drm_test_cmdline_margin_options
[02:39:57] [PASSED] drm_test_cmdline_multiple_options
[02:39:57] [PASSED] drm_test_cmdline_bpp_extra_and_option
[02:39:57] [PASSED] drm_test_cmdline_extra_and_option
[02:39:57] [PASSED] drm_test_cmdline_freestanding_options
[02:39:57] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[02:39:57] [PASSED] drm_test_cmdline_panel_orientation
[02:39:57] ================ drm_test_cmdline_invalid =================
[02:39:57] [PASSED] margin_only
[02:39:57] [PASSED] interlace_only
[02:39:57] [PASSED] res_missing_x
[02:39:57] [PASSED] res_missing_y
[02:39:57] [PASSED] res_bad_y
[02:39:57] [PASSED] res_missing_y_bpp
[02:39:57] [PASSED] res_bad_bpp
[02:39:57] [PASSED] res_bad_refresh
[02:39:57] [PASSED] res_bpp_refresh_force_on_off
[02:39:57] [PASSED] res_invalid_mode
[02:39:57] [PASSED] res_bpp_wrong_place_mode
[02:39:57] [PASSED] name_bpp_refresh
[02:39:57] [PASSED] name_refresh
[02:39:57] [PASSED] name_refresh_wrong_mode
[02:39:57] [PASSED] name_refresh_invalid_mode
[02:39:57] [PASSED] rotate_multiple
[02:39:57] [PASSED] rotate_invalid_val
[02:39:57] [PASSED] rotate_truncated
[02:39:57] [PASSED] invalid_option
[02:39:57] [PASSED] invalid_tv_option
[02:39:57] [PASSED] truncated_tv_option
[02:39:57] ============ [PASSED] drm_test_cmdline_invalid =============
[02:39:57] =============== drm_test_cmdline_tv_options ===============
[02:39:57] [PASSED] NTSC
[02:39:57] [PASSED] NTSC_443
[02:39:57] [PASSED] NTSC_J
[02:39:57] [PASSED] PAL
[02:39:57] [PASSED] PAL_M
[02:39:57] [PASSED] PAL_N
[02:39:57] [PASSED] SECAM
[02:39:57] [PASSED] MONO_525
[02:39:57] [PASSED] MONO_625
[02:39:57] =========== [PASSED] drm_test_cmdline_tv_options ===========
[02:39:57] =============== [PASSED] drm_cmdline_parser ================
[02:39:57] ========== drmm_connector_hdmi_init (20 subtests) ==========
[02:39:57] [PASSED] drm_test_connector_hdmi_init_valid
[02:39:57] [PASSED] drm_test_connector_hdmi_init_bpc_8
[02:39:57] [PASSED] drm_test_connector_hdmi_init_bpc_10
[02:39:57] [PASSED] drm_test_connector_hdmi_init_bpc_12
[02:39:57] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[02:39:57] [PASSED] drm_test_connector_hdmi_init_bpc_null
[02:39:57] [PASSED] drm_test_connector_hdmi_init_formats_empty
[02:39:57] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[02:39:57] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[02:39:57] [PASSED] supported_formats=0x9 yuv420_allowed=1
[02:39:57] [PASSED] supported_formats=0x9 yuv420_allowed=0
[02:39:57] [PASSED] supported_formats=0x5 yuv420_allowed=1
[02:39:57] [PASSED] supported_formats=0x5 yuv420_allowed=0
[02:39:57] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[02:39:57] [PASSED] drm_test_connector_hdmi_init_null_ddc
[02:39:57] [PASSED] drm_test_connector_hdmi_init_null_product
[02:39:57] [PASSED] drm_test_connector_hdmi_init_null_vendor
[02:39:57] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[02:39:57] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[02:39:57] [PASSED] drm_test_connector_hdmi_init_product_valid
[02:39:57] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[02:39:57] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[02:39:57] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[02:39:57] ========= drm_test_connector_hdmi_init_type_valid =========
[02:39:57] [PASSED] HDMI-A
[02:39:57] [PASSED] HDMI-B
[02:39:57] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[02:39:57] ======== drm_test_connector_hdmi_init_type_invalid ========
[02:39:57] [PASSED] Unknown
[02:39:57] [PASSED] VGA
[02:39:57] [PASSED] DVI-I
[02:39:57] [PASSED] DVI-D
[02:39:57] [PASSED] DVI-A
[02:39:57] [PASSED] Composite
[02:39:57] [PASSED] SVIDEO
[02:39:57] [PASSED] LVDS
[02:39:57] [PASSED] Component
[02:39:57] [PASSED] DIN
[02:39:57] [PASSED] DP
[02:39:57] [PASSED] TV
[02:39:57] [PASSED] eDP
[02:39:57] [PASSED] Virtual
[02:39:57] [PASSED] DSI
[02:39:57] [PASSED] DPI
[02:39:57] [PASSED] Writeback
[02:39:57] [PASSED] SPI
[02:39:57] [PASSED] USB
[02:39:57] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[02:39:57] ============ [PASSED] drmm_connector_hdmi_init =============
[02:39:57] ============= drmm_connector_init (3 subtests) =============
[02:39:57] [PASSED] drm_test_drmm_connector_init
[02:39:57] [PASSED] drm_test_drmm_connector_init_null_ddc
[02:39:57] ========= drm_test_drmm_connector_init_type_valid =========
[02:39:57] [PASSED] Unknown
[02:39:57] [PASSED] VGA
[02:39:57] [PASSED] DVI-I
[02:39:57] [PASSED] DVI-D
[02:39:57] [PASSED] DVI-A
[02:39:57] [PASSED] Composite
[02:39:57] [PASSED] SVIDEO
[02:39:57] [PASSED] LVDS
[02:39:57] [PASSED] Component
[02:39:57] [PASSED] DIN
[02:39:57] [PASSED] DP
[02:39:57] [PASSED] HDMI-A
[02:39:57] [PASSED] HDMI-B
[02:39:57] [PASSED] TV
[02:39:57] [PASSED] eDP
[02:39:57] [PASSED] Virtual
[02:39:57] [PASSED] DSI
[02:39:57] [PASSED] DPI
[02:39:57] [PASSED] Writeback
[02:39:57] [PASSED] SPI
[02:39:57] [PASSED] USB
[02:39:57] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[02:39:57] =============== [PASSED] drmm_connector_init ===============
[02:39:57] ========= drm_connector_dynamic_init (6 subtests) ==========
[02:39:57] [PASSED] drm_test_drm_connector_dynamic_init
[02:39:57] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[02:39:57] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[02:39:57] [PASSED] drm_test_drm_connector_dynamic_init_properties
[02:39:57] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[02:39:57] [PASSED] Unknown
[02:39:57] [PASSED] VGA
[02:39:57] [PASSED] DVI-I
[02:39:57] [PASSED] DVI-D
[02:39:57] [PASSED] DVI-A
[02:39:57] [PASSED] Composite
[02:39:57] [PASSED] SVIDEO
[02:39:57] [PASSED] LVDS
[02:39:57] [PASSED] Component
[02:39:57] [PASSED] DIN
[02:39:57] [PASSED] DP
[02:39:57] [PASSED] HDMI-A
[02:39:57] [PASSED] HDMI-B
[02:39:57] [PASSED] TV
[02:39:57] [PASSED] eDP
[02:39:57] [PASSED] Virtual
[02:39:57] [PASSED] DSI
[02:39:57] [PASSED] DPI
[02:39:57] [PASSED] Writeback
[02:39:57] [PASSED] SPI
[02:39:57] [PASSED] USB
[02:39:57] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[02:39:57] ======== drm_test_drm_connector_dynamic_init_name =========
[02:39:57] [PASSED] Unknown
[02:39:57] [PASSED] VGA
[02:39:57] [PASSED] DVI-I
[02:39:57] [PASSED] DVI-D
[02:39:57] [PASSED] DVI-A
[02:39:57] [PASSED] Composite
[02:39:57] [PASSED] SVIDEO
[02:39:57] [PASSED] LVDS
[02:39:57] [PASSED] Component
[02:39:57] [PASSED] DIN
[02:39:57] [PASSED] DP
[02:39:57] [PASSED] HDMI-A
[02:39:57] [PASSED] HDMI-B
[02:39:57] [PASSED] TV
[02:39:57] [PASSED] eDP
[02:39:57] [PASSED] Virtual
[02:39:57] [PASSED] DSI
[02:39:57] [PASSED] DPI
[02:39:57] [PASSED] Writeback
[02:39:57] [PASSED] SPI
[02:39:57] [PASSED] USB
[02:39:57] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[02:39:57] =========== [PASSED] drm_connector_dynamic_init ============
[02:39:57] ==== drm_connector_dynamic_register_early (4 subtests) =====
[02:39:57] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[02:39:57] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[02:39:57] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[02:39:57] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[02:39:57] ====== [PASSED] drm_connector_dynamic_register_early =======
[02:39:57] ======= drm_connector_dynamic_register (7 subtests) ========
[02:39:57] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[02:39:57] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[02:39:57] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[02:39:57] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[02:39:57] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[02:39:57] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[02:39:57] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[02:39:57] ========= [PASSED] drm_connector_dynamic_register ==========
[02:39:57] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[02:39:57] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[02:39:57] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[02:39:57] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[02:39:57] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[02:39:57] ========== drm_test_get_tv_mode_from_name_valid ===========
[02:39:57] [PASSED] NTSC
[02:39:57] [PASSED] NTSC-443
[02:39:57] [PASSED] NTSC-J
[02:39:57] [PASSED] PAL
[02:39:57] [PASSED] PAL-M
[02:39:57] [PASSED] PAL-N
[02:39:57] [PASSED] SECAM
[02:39:57] [PASSED] Mono
[02:39:57] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[02:39:57] [PASSED] drm_test_get_tv_mode_from_name_truncated
[02:39:57] ============ [PASSED] drm_get_tv_mode_from_name ============
[02:39:57] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[02:39:57] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[02:39:57] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[02:39:57] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[02:39:57] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[02:39:57] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[02:39:57] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[02:39:57] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[02:39:57] [PASSED] VIC 96
[02:39:57] [PASSED] VIC 97
[02:39:57] [PASSED] VIC 101
[02:39:57] [PASSED] VIC 102
[02:39:57] [PASSED] VIC 106
[02:39:57] [PASSED] VIC 107
[02:39:57] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[02:39:57] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[02:39:57] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[02:39:57] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[02:39:57] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[02:39:57] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[02:39:57] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[02:39:57] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[02:39:57] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[02:39:57] [PASSED] Automatic
[02:39:57] [PASSED] Full
[02:39:57] [PASSED] Limited 16:235
[02:39:57] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[02:39:57] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[02:39:57] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[02:39:57] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[02:39:57] === drm_test_drm_hdmi_connector_get_output_format_name ====
[02:39:57] [PASSED] RGB
[02:39:57] [PASSED] YUV 4:2:0
[02:39:57] [PASSED] YUV 4:2:2
[02:39:57] [PASSED] YUV 4:4:4
[02:39:57] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[02:39:57] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[02:39:57] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[02:39:57] ============= drm_damage_helper (21 subtests) ==============
[02:39:57] [PASSED] drm_test_damage_iter_no_damage
[02:39:57] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[02:39:57] [PASSED] drm_test_damage_iter_no_damage_src_moved
[02:39:57] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[02:39:57] [PASSED] drm_test_damage_iter_no_damage_not_visible
[02:39:57] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[02:39:57] [PASSED] drm_test_damage_iter_no_damage_no_fb
[02:39:57] [PASSED] drm_test_damage_iter_simple_damage
[02:39:57] [PASSED] drm_test_damage_iter_single_damage
[02:39:57] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[02:39:57] [PASSED] drm_test_damage_iter_single_damage_outside_src
[02:39:57] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[02:39:57] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[02:39:57] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[02:39:57] [PASSED] drm_test_damage_iter_single_damage_src_moved
[02:39:57] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[02:39:57] [PASSED] drm_test_damage_iter_damage
[02:39:57] [PASSED] drm_test_damage_iter_damage_one_intersect
[02:39:57] [PASSED] drm_test_damage_iter_damage_one_outside
[02:39:57] [PASSED] drm_test_damage_iter_damage_src_moved
[02:39:57] [PASSED] drm_test_damage_iter_damage_not_visible
[02:39:57] ================ [PASSED] drm_damage_helper ================
[02:39:57] ============== drm_dp_mst_helper (3 subtests) ==============
[02:39:57] ============== drm_test_dp_mst_calc_pbn_mode ==============
[02:39:57] [PASSED] Clock 154000 BPP 30 DSC disabled
[02:39:57] [PASSED] Clock 234000 BPP 30 DSC disabled
[02:39:57] [PASSED] Clock 297000 BPP 24 DSC disabled
[02:39:57] [PASSED] Clock 332880 BPP 24 DSC enabled
[02:39:57] [PASSED] Clock 324540 BPP 24 DSC enabled
[02:39:57] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[02:39:57] ============== drm_test_dp_mst_calc_pbn_div ===============
[02:39:57] [PASSED] Link rate 2000000 lane count 4
[02:39:57] [PASSED] Link rate 2000000 lane count 2
[02:39:57] [PASSED] Link rate 2000000 lane count 1
[02:39:57] [PASSED] Link rate 1350000 lane count 4
[02:39:57] [PASSED] Link rate 1350000 lane count 2
[02:39:57] [PASSED] Link rate 1350000 lane count 1
[02:39:57] [PASSED] Link rate 1000000 lane count 4
[02:39:57] [PASSED] Link rate 1000000 lane count 2
[02:39:57] [PASSED] Link rate 1000000 lane count 1
[02:39:57] [PASSED] Link rate 810000 lane count 4
[02:39:57] [PASSED] Link rate 810000 lane count 2
[02:39:57] [PASSED] Link rate 810000 lane count 1
[02:39:57] [PASSED] Link rate 540000 lane count 4
[02:39:57] [PASSED] Link rate 540000 lane count 2
[02:39:57] [PASSED] Link rate 540000 lane count 1
[02:39:57] [PASSED] Link rate 270000 lane count 4
[02:39:57] [PASSED] Link rate 270000 lane count 2
[02:39:57] [PASSED] Link rate 270000 lane count 1
[02:39:57] [PASSED] Link rate 162000 lane count 4
[02:39:57] [PASSED] Link rate 162000 lane count 2
[02:39:57] [PASSED] Link rate 162000 lane count 1
[02:39:57] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[02:39:57] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[02:39:57] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[02:39:57] [PASSED] DP_POWER_UP_PHY with port number
[02:39:57] [PASSED] DP_POWER_DOWN_PHY with port number
[02:39:57] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[02:39:57] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[02:39:57] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[02:39:57] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[02:39:57] [PASSED] DP_QUERY_PAYLOAD with port number
[02:39:57] [PASSED] DP_QUERY_PAYLOAD with VCPI
[02:39:57] [PASSED] DP_REMOTE_DPCD_READ with port number
[02:39:57] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[02:39:57] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[02:39:57] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[02:39:57] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[02:39:57] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[02:39:57] [PASSED] DP_REMOTE_I2C_READ with port number
[02:39:57] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[02:39:57] [PASSED] DP_REMOTE_I2C_READ with transactions array
[02:39:57] [PASSED] DP_REMOTE_I2C_WRITE with port number
[02:39:57] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[02:39:57] [PASSED] DP_REMOTE_I2C_WRITE with data array
[02:39:57] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[02:39:57] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[02:39:57] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[02:39:57] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[02:39:57] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[02:39:57] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[02:39:57] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[02:39:57] ================ [PASSED] drm_dp_mst_helper ================
[02:39:57] ================== drm_exec (7 subtests) ===================
[02:39:57] [PASSED] sanitycheck
[02:39:57] [PASSED] test_lock
[02:39:57] [PASSED] test_lock_unlock
[02:39:57] [PASSED] test_duplicates
[02:39:57] [PASSED] test_prepare
[02:39:57] [PASSED] test_prepare_array
[02:39:57] [PASSED] test_multiple_loops
[02:39:57] ==================== [PASSED] drm_exec =====================
[02:39:57] =========== drm_format_helper_test (17 subtests) ===========
[02:39:57] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[02:39:57] [PASSED] single_pixel_source_buffer
[02:39:57] [PASSED] single_pixel_clip_rectangle
[02:39:57] [PASSED] well_known_colors
[02:39:57] [PASSED] destination_pitch
[02:39:57] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[02:39:57] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[02:39:57] [PASSED] single_pixel_source_buffer
[02:39:57] [PASSED] single_pixel_clip_rectangle
[02:39:57] [PASSED] well_known_colors
[02:39:57] [PASSED] destination_pitch
[02:39:57] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[02:39:57] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[02:39:57] [PASSED] single_pixel_source_buffer
[02:39:57] [PASSED] single_pixel_clip_rectangle
[02:39:57] [PASSED] well_known_colors
[02:39:57] [PASSED] destination_pitch
[02:39:57] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[02:39:57] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[02:39:57] [PASSED] single_pixel_source_buffer
[02:39:57] [PASSED] single_pixel_clip_rectangle
[02:39:57] [PASSED] well_known_colors
[02:39:57] [PASSED] destination_pitch
[02:39:57] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[02:39:57] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[02:39:57] [PASSED] single_pixel_source_buffer
[02:39:57] [PASSED] single_pixel_clip_rectangle
[02:39:57] [PASSED] well_known_colors
[02:39:57] [PASSED] destination_pitch
[02:39:57] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[02:39:57] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[02:39:57] [PASSED] single_pixel_source_buffer
[02:39:57] [PASSED] single_pixel_clip_rectangle
[02:39:57] [PASSED] well_known_colors
[02:39:57] [PASSED] destination_pitch
[02:39:57] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[02:39:57] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[02:39:57] [PASSED] single_pixel_source_buffer
[02:39:57] [PASSED] single_pixel_clip_rectangle
[02:39:57] [PASSED] well_known_colors
[02:39:57] [PASSED] destination_pitch
[02:39:57] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[02:39:57] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[02:39:57] [PASSED] single_pixel_source_buffer
[02:39:57] [PASSED] single_pixel_clip_rectangle
[02:39:57] [PASSED] well_known_colors
[02:39:57] [PASSED] destination_pitch
[02:39:57] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[02:39:57] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[02:39:57] [PASSED] single_pixel_source_buffer
[02:39:57] [PASSED] single_pixel_clip_rectangle
[02:39:57] [PASSED] well_known_colors
[02:39:57] [PASSED] destination_pitch
[02:39:57] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[02:39:57] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[02:39:57] [PASSED] single_pixel_source_buffer
[02:39:57] [PASSED] single_pixel_clip_rectangle
[02:39:57] [PASSED] well_known_colors
[02:39:57] [PASSED] destination_pitch
[02:39:57] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[02:39:57] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[02:39:57] [PASSED] single_pixel_source_buffer
[02:39:57] [PASSED] single_pixel_clip_rectangle
[02:39:57] [PASSED] well_known_colors
[02:39:57] [PASSED] destination_pitch
[02:39:57] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[02:39:57] ============== drm_test_fb_xrgb8888_to_mono ===============
[02:39:57] [PASSED] single_pixel_source_buffer
[02:39:57] [PASSED] single_pixel_clip_rectangle
[02:39:57] [PASSED] well_known_colors
[02:39:57] [PASSED] destination_pitch
[02:39:57] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[02:39:57] ==================== drm_test_fb_swab =====================
[02:39:57] [PASSED] single_pixel_source_buffer
[02:39:57] [PASSED] single_pixel_clip_rectangle
[02:39:57] [PASSED] well_known_colors
[02:39:57] [PASSED] destination_pitch
[02:39:57] ================ [PASSED] drm_test_fb_swab =================
[02:39:57] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[02:39:57] [PASSED] single_pixel_source_buffer
[02:39:57] [PASSED] single_pixel_clip_rectangle
[02:39:57] [PASSED] well_known_colors
[02:39:57] [PASSED] destination_pitch
[02:39:57] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[02:39:57] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[02:39:57] [PASSED] single_pixel_source_buffer
[02:39:57] [PASSED] single_pixel_clip_rectangle
[02:39:57] [PASSED] well_known_colors
[02:39:57] [PASSED] destination_pitch
[02:39:57] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[02:39:57] ================= drm_test_fb_clip_offset =================
[02:39:57] [PASSED] pass through
[02:39:57] [PASSED] horizontal offset
[02:39:57] [PASSED] vertical offset
[02:39:57] [PASSED] horizontal and vertical offset
[02:39:57] [PASSED] horizontal offset (custom pitch)
[02:39:57] [PASSED] vertical offset (custom pitch)
[02:39:57] [PASSED] horizontal and vertical offset (custom pitch)
[02:39:57] ============= [PASSED] drm_test_fb_clip_offset =============
[02:39:57] =================== drm_test_fb_memcpy ====================
[02:39:57] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[02:39:57] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[02:39:57] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[02:39:57] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[02:39:57] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[02:39:57] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[02:39:57] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[02:39:57] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[02:39:57] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[02:39:57] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[02:39:57] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[02:39:57] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[02:39:57] =============== [PASSED] drm_test_fb_memcpy ================
[02:39:57] ============= [PASSED] drm_format_helper_test ==============
[02:39:57] ================= drm_format (18 subtests) =================
[02:39:57] [PASSED] drm_test_format_block_width_invalid
[02:39:57] [PASSED] drm_test_format_block_width_one_plane
[02:39:57] [PASSED] drm_test_format_block_width_two_plane
[02:39:57] [PASSED] drm_test_format_block_width_three_plane
[02:39:57] [PASSED] drm_test_format_block_width_tiled
[02:39:57] [PASSED] drm_test_format_block_height_invalid
[02:39:57] [PASSED] drm_test_format_block_height_one_plane
[02:39:57] [PASSED] drm_test_format_block_height_two_plane
[02:39:57] [PASSED] drm_test_format_block_height_three_plane
[02:39:57] [PASSED] drm_test_format_block_height_tiled
[02:39:57] [PASSED] drm_test_format_min_pitch_invalid
[02:39:57] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[02:39:57] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[02:39:57] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[02:39:57] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[02:39:57] [PASSED] drm_test_format_min_pitch_two_plane
[02:39:57] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[02:39:57] [PASSED] drm_test_format_min_pitch_tiled
[02:39:57] =================== [PASSED] drm_format ====================
[02:39:57] ============== drm_framebuffer (10 subtests) ===============
[02:39:57] ========== drm_test_framebuffer_check_src_coords ==========
[02:39:57] [PASSED] Success: source fits into fb
[02:39:57] [PASSED] Fail: overflowing fb with x-axis coordinate
[02:39:57] [PASSED] Fail: overflowing fb with y-axis coordinate
[02:39:57] [PASSED] Fail: overflowing fb with source width
[02:39:57] [PASSED] Fail: overflowing fb with source height
[02:39:57] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[02:39:57] [PASSED] drm_test_framebuffer_cleanup
[02:39:57] =============== drm_test_framebuffer_create ===============
[02:39:57] [PASSED] ABGR8888 normal sizes
[02:39:57] [PASSED] ABGR8888 max sizes
[02:39:57] [PASSED] ABGR8888 pitch greater than min required
[02:39:57] [PASSED] ABGR8888 pitch less than min required
[02:39:57] [PASSED] ABGR8888 Invalid width
[02:39:57] [PASSED] ABGR8888 Invalid buffer handle
[02:39:57] [PASSED] No pixel format
[02:39:57] [PASSED] ABGR8888 Width 0
[02:39:57] [PASSED] ABGR8888 Height 0
[02:39:57] [PASSED] ABGR8888 Out of bound height * pitch combination
[02:39:57] [PASSED] ABGR8888 Large buffer offset
[02:39:57] [PASSED] ABGR8888 Buffer offset for inexistent plane
[02:39:57] [PASSED] ABGR8888 Invalid flag
[02:39:57] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[02:39:57] [PASSED] ABGR8888 Valid buffer modifier
[02:39:57] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[02:39:57] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[02:39:57] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[02:39:57] [PASSED] NV12 Normal sizes
[02:39:57] [PASSED] NV12 Max sizes
[02:39:57] [PASSED] NV12 Invalid pitch
[02:39:57] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[02:39:57] [PASSED] NV12 different modifier per-plane
[02:39:57] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[02:39:57] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[02:39:57] [PASSED] NV12 Modifier for inexistent plane
[02:39:57] [PASSED] NV12 Handle for inexistent plane
[02:39:57] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[02:39:57] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[02:39:57] [PASSED] YVU420 Normal sizes
[02:39:57] [PASSED] YVU420 Max sizes
[02:39:57] [PASSED] YVU420 Invalid pitch
[02:39:57] [PASSED] YVU420 Different pitches
[02:39:57] [PASSED] YVU420 Different buffer offsets/pitches
[02:39:57] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[02:39:57] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[02:39:57] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[02:39:57] [PASSED] YVU420 Valid modifier
[02:39:57] [PASSED] YVU420 Different modifiers per plane
[02:39:57] [PASSED] YVU420 Modifier for inexistent plane
[02:39:57] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[02:39:57] [PASSED] X0L2 Normal sizes
[02:39:57] [PASSED] X0L2 Max sizes
[02:39:57] [PASSED] X0L2 Invalid pitch
[02:39:57] [PASSED] X0L2 Pitch greater than minimum required
[02:39:57] [PASSED] X0L2 Handle for inexistent plane
[02:39:57] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[02:39:57] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[02:39:57] [PASSED] X0L2 Valid modifier
[02:39:57] [PASSED] X0L2 Modifier for inexistent plane
[02:39:57] =========== [PASSED] drm_test_framebuffer_create ===========
[02:39:57] [PASSED] drm_test_framebuffer_free
[02:39:57] [PASSED] drm_test_framebuffer_init
[02:39:57] [PASSED] drm_test_framebuffer_init_bad_format
[02:39:57] [PASSED] drm_test_framebuffer_init_dev_mismatch
[02:39:57] [PASSED] drm_test_framebuffer_lookup
[02:39:57] [PASSED] drm_test_framebuffer_lookup_inexistent
[02:39:57] [PASSED] drm_test_framebuffer_modifiers_not_supported
[02:39:57] ================= [PASSED] drm_framebuffer =================
[02:39:57] ================ drm_gem_shmem (8 subtests) ================
[02:39:57] [PASSED] drm_gem_shmem_test_obj_create
[02:39:57] [PASSED] drm_gem_shmem_test_obj_create_private
[02:39:57] [PASSED] drm_gem_shmem_test_pin_pages
[02:39:57] [PASSED] drm_gem_shmem_test_vmap
[02:39:57] [PASSED] drm_gem_shmem_test_get_sg_table
[02:39:57] [PASSED] drm_gem_shmem_test_get_pages_sgt
[02:39:57] [PASSED] drm_gem_shmem_test_madvise
[02:39:57] [PASSED] drm_gem_shmem_test_purge
[02:39:57] ================== [PASSED] drm_gem_shmem ==================
[02:39:57] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[02:39:57] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[02:39:57] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[02:39:57] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[02:39:57] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[02:39:57] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[02:39:57] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[02:39:57] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[02:39:57] [PASSED] Automatic
[02:39:57] [PASSED] Full
[02:39:57] [PASSED] Limited 16:235
[02:39:57] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[02:39:57] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[02:39:57] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[02:39:57] [PASSED] drm_test_check_disable_connector
[02:39:57] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[02:39:57] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[02:39:57] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[02:39:57] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[02:39:57] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[02:39:57] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[02:39:57] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[02:39:57] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[02:39:57] [PASSED] drm_test_check_output_bpc_dvi
[02:39:57] [PASSED] drm_test_check_output_bpc_format_vic_1
[02:39:57] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[02:39:57] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[02:39:57] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[02:39:57] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[02:39:57] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[02:39:57] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[02:39:57] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[02:39:57] ============ drm_test_check_hdmi_color_format =============
[02:39:57] [PASSED] AUTO -> RGB
[02:39:57] [PASSED] YCBCR422 -> YUV422
[02:39:57] [PASSED] YCBCR420 -> YUV420
[02:39:57] [PASSED] YCBCR444 -> YUV444
[02:39:57] [PASSED] RGB -> RGB
[02:39:57] ======== [PASSED] drm_test_check_hdmi_color_format =========
[02:39:57] ======== drm_test_check_hdmi_color_format_420_only ========
[02:39:57] [PASSED] RGB should fail
[02:39:57] [PASSED] YUV444 should fail
[02:39:57] [PASSED] YUV422 should fail
[02:39:57] [PASSED] YUV420 should work
[02:39:57] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[02:39:57] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[02:39:57] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[02:39:57] [PASSED] drm_test_check_broadcast_rgb_value
[02:39:57] [PASSED] drm_test_check_bpc_8_value
[02:39:57] [PASSED] drm_test_check_bpc_10_value
[02:39:57] [PASSED] drm_test_check_bpc_12_value
[02:39:57] [PASSED] drm_test_check_format_value
[02:39:57] [PASSED] drm_test_check_tmds_char_value
[02:39:57] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[02:39:57] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[02:39:57] [PASSED] drm_test_check_mode_valid
[02:39:57] [PASSED] drm_test_check_mode_valid_reject
[02:39:57] [PASSED] drm_test_check_mode_valid_reject_rate
[02:39:57] [PASSED] drm_test_check_mode_valid_reject_max_clock
[02:39:57] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[02:39:57] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[02:39:57] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[02:39:57] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[02:39:57] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[02:39:57] [PASSED] drm_test_check_infoframes
[02:39:57] [PASSED] drm_test_check_reject_avi_infoframe
[02:39:57] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[02:39:57] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[02:39:57] [PASSED] drm_test_check_reject_audio_infoframe
[02:39:57] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[02:39:57] ================= drm_managed (2 subtests) =================
[02:39:57] [PASSED] drm_test_managed_release_action
[02:39:57] [PASSED] drm_test_managed_run_action
[02:39:57] =================== [PASSED] drm_managed ===================
[02:39:57] =================== drm_mm (6 subtests) ====================
[02:39:57] [PASSED] drm_test_mm_init
[02:39:57] [PASSED] drm_test_mm_debug
[02:39:57] [PASSED] drm_test_mm_align32
[02:39:57] [PASSED] drm_test_mm_align64
[02:39:57] [PASSED] drm_test_mm_lowest
[02:39:57] [PASSED] drm_test_mm_highest
[02:39:57] ===================== [PASSED] drm_mm ======================
[02:39:57] ============= drm_modes_analog_tv (5 subtests) =============
[02:39:57] [PASSED] drm_test_modes_analog_tv_mono_576i
[02:39:57] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[02:39:57] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[02:39:57] [PASSED] drm_test_modes_analog_tv_pal_576i
[02:39:57] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[02:39:57] =============== [PASSED] drm_modes_analog_tv ===============
[02:39:57] ============== drm_plane_helper (2 subtests) ===============
[02:39:57] =============== drm_test_check_plane_state ================
[02:39:57] [PASSED] clipping_simple
[02:39:57] [PASSED] clipping_rotate_reflect
[02:39:57] [PASSED] positioning_simple
[02:39:57] [PASSED] upscaling
[02:39:57] [PASSED] downscaling
[02:39:57] [PASSED] rounding1
[02:39:57] [PASSED] rounding2
[02:39:57] [PASSED] rounding3
[02:39:57] [PASSED] rounding4
[02:39:57] =========== [PASSED] drm_test_check_plane_state ============
[02:39:57] =========== drm_test_check_invalid_plane_state ============
[02:39:57] [PASSED] positioning_invalid
[02:39:57] [PASSED] upscaling_invalid
[02:39:57] [PASSED] downscaling_invalid
[02:39:57] ======= [PASSED] drm_test_check_invalid_plane_state ========
[02:39:57] ================ [PASSED] drm_plane_helper =================
[02:39:57] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[02:39:57] ====== drm_test_connector_helper_tv_get_modes_check =======
[02:39:57] [PASSED] None
[02:39:57] [PASSED] PAL
[02:39:57] [PASSED] NTSC
[02:39:57] [PASSED] Both, NTSC Default
[02:39:57] [PASSED] Both, PAL Default
[02:39:57] [PASSED] Both, NTSC Default, with PAL on command-line
[02:39:57] [PASSED] Both, PAL Default, with NTSC on command-line
[02:39:57] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[02:39:57] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[02:39:57] ================== drm_rect (9 subtests) ===================
[02:39:57] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[02:39:57] [PASSED] drm_test_rect_clip_scaled_not_clipped
[02:39:57] [PASSED] drm_test_rect_clip_scaled_clipped
[02:39:57] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[02:39:57] ================= drm_test_rect_intersect =================
[02:39:57] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[02:39:57] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[02:39:57] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[02:39:57] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[02:39:57] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[02:39:57] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[02:39:57] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[02:39:57] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[02:39:57] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[02:39:57] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[02:39:57] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[02:39:57] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[02:39:57] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[02:39:57] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[02:39:57] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[02:39:57] ============= [PASSED] drm_test_rect_intersect =============
[02:39:57] ================ drm_test_rect_calc_hscale ================
[02:39:57] [PASSED] normal use
[02:39:57] [PASSED] out of max range
[02:39:57] [PASSED] out of min range
[02:39:57] [PASSED] zero dst
[02:39:57] [PASSED] negative src
[02:39:57] [PASSED] negative dst
[02:39:57] ============ [PASSED] drm_test_rect_calc_hscale ============
[02:39:57] ================ drm_test_rect_calc_vscale ================
[02:39:57] [PASSED] normal use
[02:39:57] [PASSED] out of max range
[02:39:57] [PASSED] out of min range
[02:39:57] [PASSED] zero dst
[02:39:57] [PASSED] negative src
[02:39:57] [PASSED] negative dst
[02:39:57] ============ [PASSED] drm_test_rect_calc_vscale ============
[02:39:57] ================== drm_test_rect_rotate ===================
[02:39:57] [PASSED] reflect-x
[02:39:57] [PASSED] reflect-y
[02:39:57] [PASSED] rotate-0
[02:39:57] [PASSED] rotate-90
[02:39:57] [PASSED] rotate-180
[02:39:57] [PASSED] rotate-270
[02:39:57] ============== [PASSED] drm_test_rect_rotate ===============
[02:39:57] ================ drm_test_rect_rotate_inv =================
[02:39:57] [PASSED] reflect-x
[02:39:57] [PASSED] reflect-y
[02:39:57] [PASSED] rotate-0
[02:39:57] [PASSED] rotate-90
[02:39:57] [PASSED] rotate-180
[02:39:57] [PASSED] rotate-270
[02:39:57] ============ [PASSED] drm_test_rect_rotate_inv =============
[02:39:57] ==================== [PASSED] drm_rect =====================
[02:39:57] ============ drm_sysfb_modeset_test (1 subtest) ============
[02:39:57] ============ drm_test_sysfb_build_fourcc_list =============
[02:39:57] [PASSED] no native formats
[02:39:57] [PASSED] XRGB8888 as native format
[02:39:57] [PASSED] remove duplicates
[02:39:57] [PASSED] convert alpha formats
[02:39:57] [PASSED] random formats
[02:39:57] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[02:39:57] ============= [PASSED] drm_sysfb_modeset_test ==============
[02:39:57] ================== drm_fixp (2 subtests) ===================
[02:39:57] [PASSED] drm_test_int2fixp
[02:39:57] [PASSED] drm_test_sm2fixp
[02:39:57] ==================== [PASSED] drm_fixp =====================
[02:39:57] ============================================================
[02:39:57] Testing complete. Ran 639 tests: passed: 639
[02:39:57] Elapsed time: 26.724s total, 1.808s configuring, 24.751s building, 0.143s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[02:39:57] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[02:39:59] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[02:40:09] Starting KUnit Kernel (1/1)...
[02:40:09] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[02:40:09] ================= ttm_device (5 subtests) ==================
[02:40:09] [PASSED] ttm_device_init_basic
[02:40:09] [PASSED] ttm_device_init_multiple
[02:40:09] [PASSED] ttm_device_fini_basic
[02:40:09] [PASSED] ttm_device_init_no_vma_man
[02:40:09] ================== ttm_device_init_pools ==================
[02:40:09] [PASSED] No DMA allocations, no DMA32 required
[02:40:09] [PASSED] DMA allocations, DMA32 required
[02:40:09] [PASSED] No DMA allocations, DMA32 required
[02:40:09] [PASSED] DMA allocations, no DMA32 required
[02:40:09] ============== [PASSED] ttm_device_init_pools ==============
[02:40:09] =================== [PASSED] ttm_device ====================
[02:40:09] ================== ttm_pool (8 subtests) ===================
[02:40:09] ================== ttm_pool_alloc_basic ===================
[02:40:09] [PASSED] One page
[02:40:09] [PASSED] More than one page
[02:40:09] [PASSED] Above the allocation limit
[02:40:09] [PASSED] One page, with coherent DMA mappings enabled
[02:40:09] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[02:40:09] ============== [PASSED] ttm_pool_alloc_basic ===============
[02:40:09] ============== ttm_pool_alloc_basic_dma_addr ==============
[02:40:09] [PASSED] One page
[02:40:09] [PASSED] More than one page
[02:40:09] [PASSED] Above the allocation limit
[02:40:09] [PASSED] One page, with coherent DMA mappings enabled
[02:40:09] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[02:40:09] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[02:40:09] [PASSED] ttm_pool_alloc_order_caching_match
[02:40:09] [PASSED] ttm_pool_alloc_caching_mismatch
[02:40:09] [PASSED] ttm_pool_alloc_order_mismatch
[02:40:09] [PASSED] ttm_pool_free_dma_alloc
[02:40:09] [PASSED] ttm_pool_free_no_dma_alloc
[02:40:09] [PASSED] ttm_pool_fini_basic
[02:40:09] ==================== [PASSED] ttm_pool =====================
[02:40:09] ================ ttm_resource (8 subtests) =================
[02:40:09] ================= ttm_resource_init_basic =================
[02:40:09] [PASSED] Init resource in TTM_PL_SYSTEM
[02:40:09] [PASSED] Init resource in TTM_PL_VRAM
[02:40:09] [PASSED] Init resource in a private placement
[02:40:09] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[02:40:09] ============= [PASSED] ttm_resource_init_basic =============
[02:40:09] [PASSED] ttm_resource_init_pinned
[02:40:09] [PASSED] ttm_resource_fini_basic
[02:40:09] [PASSED] ttm_resource_manager_init_basic
[02:40:09] [PASSED] ttm_resource_manager_usage_basic
[02:40:09] [PASSED] ttm_resource_manager_set_used_basic
[02:40:09] [PASSED] ttm_sys_man_alloc_basic
[02:40:09] [PASSED] ttm_sys_man_free_basic
[02:40:09] ================== [PASSED] ttm_resource ===================
[02:40:09] =================== ttm_tt (15 subtests) ===================
[02:40:09] ==================== ttm_tt_init_basic ====================
[02:40:09] [PASSED] Page-aligned size
[02:40:09] [PASSED] Extra pages requested
[02:40:09] ================ [PASSED] ttm_tt_init_basic ================
[02:40:09] [PASSED] ttm_tt_init_misaligned
[02:40:09] [PASSED] ttm_tt_fini_basic
[02:40:09] [PASSED] ttm_tt_fini_sg
[02:40:09] [PASSED] ttm_tt_fini_shmem
[02:40:09] [PASSED] ttm_tt_create_basic
[02:40:09] [PASSED] ttm_tt_create_invalid_bo_type
[02:40:09] [PASSED] ttm_tt_create_ttm_exists
[02:40:09] [PASSED] ttm_tt_create_failed
[02:40:09] [PASSED] ttm_tt_destroy_basic
[02:40:09] [PASSED] ttm_tt_populate_null_ttm
[02:40:09] [PASSED] ttm_tt_populate_populated_ttm
[02:40:09] [PASSED] ttm_tt_unpopulate_basic
[02:40:09] [PASSED] ttm_tt_unpopulate_empty_ttm
[02:40:09] [PASSED] ttm_tt_swapin_basic
[02:40:09] ===================== [PASSED] ttm_tt ======================
[02:40:09] =================== ttm_bo (14 subtests) ===================
[02:40:09] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[02:40:09] [PASSED] Cannot be interrupted and sleeps
[02:40:09] [PASSED] Cannot be interrupted, locks straight away
[02:40:09] [PASSED] Can be interrupted, sleeps
[02:40:09] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[02:40:09] [PASSED] ttm_bo_reserve_locked_no_sleep
[02:40:09] [PASSED] ttm_bo_reserve_no_wait_ticket
[02:40:09] [PASSED] ttm_bo_reserve_double_resv
[02:40:09] [PASSED] ttm_bo_reserve_interrupted
[02:40:09] [PASSED] ttm_bo_reserve_deadlock
[02:40:09] [PASSED] ttm_bo_unreserve_basic
[02:40:09] [PASSED] ttm_bo_unreserve_pinned
[02:40:09] [PASSED] ttm_bo_unreserve_bulk
[02:40:09] [PASSED] ttm_bo_fini_basic
[02:40:09] [PASSED] ttm_bo_fini_shared_resv
[02:40:09] [PASSED] ttm_bo_pin_basic
[02:40:09] [PASSED] ttm_bo_pin_unpin_resource
[02:40:09] [PASSED] ttm_bo_multiple_pin_one_unpin
[02:40:09] ===================== [PASSED] ttm_bo ======================
[02:40:09] ============== ttm_bo_validate (22 subtests) ===============
[02:40:09] ============== ttm_bo_init_reserved_sys_man ===============
[02:40:09] [PASSED] Buffer object for userspace
[02:40:09] [PASSED] Kernel buffer object
[02:40:09] [PASSED] Shared buffer object
[02:40:09] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[02:40:09] ============== ttm_bo_init_reserved_mock_man ==============
[02:40:09] [PASSED] Buffer object for userspace
[02:40:09] [PASSED] Kernel buffer object
[02:40:09] [PASSED] Shared buffer object
[02:40:09] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[02:40:09] [PASSED] ttm_bo_init_reserved_resv
[02:40:09] ================== ttm_bo_validate_basic ==================
[02:40:09] [PASSED] Buffer object for userspace
[02:40:09] [PASSED] Kernel buffer object
[02:40:09] [PASSED] Shared buffer object
[02:40:09] ============== [PASSED] ttm_bo_validate_basic ==============
[02:40:09] [PASSED] ttm_bo_validate_invalid_placement
[02:40:09] ============= ttm_bo_validate_same_placement ==============
[02:40:09] [PASSED] System manager
[02:40:09] [PASSED] VRAM manager
[02:40:09] ========= [PASSED] ttm_bo_validate_same_placement ==========
[02:40:09] [PASSED] ttm_bo_validate_failed_alloc
[02:40:09] [PASSED] ttm_bo_validate_pinned
[02:40:09] [PASSED] ttm_bo_validate_busy_placement
[02:40:09] ================ ttm_bo_validate_multihop =================
[02:40:09] [PASSED] Buffer object for userspace
[02:40:09] [PASSED] Kernel buffer object
[02:40:09] [PASSED] Shared buffer object
[02:40:09] ============ [PASSED] ttm_bo_validate_multihop =============
[02:40:09] ========== ttm_bo_validate_no_placement_signaled ==========
[02:40:09] [PASSED] Buffer object in system domain, no page vector
[02:40:09] [PASSED] Buffer object in system domain with an existing page vector
[02:40:09] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[02:40:09] ======== ttm_bo_validate_no_placement_not_signaled ========
[02:40:09] [PASSED] Buffer object for userspace
[02:40:09] [PASSED] Kernel buffer object
[02:40:09] [PASSED] Shared buffer object
[02:40:09] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[02:40:09] [PASSED] ttm_bo_validate_move_fence_signaled
[02:40:09] ========= ttm_bo_validate_move_fence_not_signaled =========
[02:40:09] [PASSED] Waits for GPU
[02:40:09] [PASSED] Tries to lock straight away
[02:40:09] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[02:40:09] [PASSED] ttm_bo_validate_swapout
[02:40:09] [PASSED] ttm_bo_validate_happy_evict
[02:40:09] [PASSED] ttm_bo_validate_all_pinned_evict
[02:40:09] [PASSED] ttm_bo_validate_allowed_only_evict
[02:40:09] [PASSED] ttm_bo_validate_deleted_evict
[02:40:09] [PASSED] ttm_bo_validate_busy_domain_evict
[02:40:09] [PASSED] ttm_bo_validate_evict_gutting
[02:40:09] [PASSED] ttm_bo_validate_recrusive_evict
[02:40:09] ================= [PASSED] ttm_bo_validate =================
[02:40:09] ============================================================
[02:40:09] Testing complete. Ran 102 tests: passed: 102
[02:40:09] Elapsed time: 11.825s total, 1.737s configuring, 9.873s building, 0.179s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 7+ messages in thread
* ✓ Xe.CI.BAT: success for drm/xe/oa: Fix sync entry leak on OA config emit failure
2026-07-15 2:33 [PATCH] drm/xe/oa: Fix sync entry leak on OA config emit failure Linmao Li
2026-07-15 2:40 ` ✓ CI.KUnit: success for " Patchwork
@ 2026-07-15 3:15 ` Patchwork
2026-07-15 6:22 ` ✓ Xe.CI.FULL: " Patchwork
` (3 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2026-07-15 3:15 UTC (permalink / raw)
To: Linmao Li; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 970 bytes --]
== Series Details ==
Series: drm/xe/oa: Fix sync entry leak on OA config emit failure
URL : https://patchwork.freedesktop.org/series/170447/
State : success
== Summary ==
CI Bug Log - changes from xe-5404-9cf91140eff27765d402aedeea89505d52db121e_BAT -> xe-pw-170447v1_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (13 -> 13)
------------------------------
No changes in participating hosts
Changes
-------
No changes found
Build changes
-------------
* Linux: xe-5404-9cf91140eff27765d402aedeea89505d52db121e -> xe-pw-170447v1
IGT_9006: 6380a8af26359dd222e22679442272ded836c463 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-5404-9cf91140eff27765d402aedeea89505d52db121e: 9cf91140eff27765d402aedeea89505d52db121e
xe-pw-170447v1: 170447v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170447v1/index.html
[-- Attachment #2: Type: text/html, Size: 1518 bytes --]
^ permalink raw reply [flat|nested] 7+ messages in thread
* ✓ Xe.CI.FULL: success for drm/xe/oa: Fix sync entry leak on OA config emit failure
2026-07-15 2:33 [PATCH] drm/xe/oa: Fix sync entry leak on OA config emit failure Linmao Li
2026-07-15 2:40 ` ✓ CI.KUnit: success for " Patchwork
2026-07-15 3:15 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-07-15 6:22 ` Patchwork
2026-07-30 22:20 ` [PATCH] " Dixit, Ashutosh
` (2 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2026-07-15 6:22 UTC (permalink / raw)
To: Linmao Li; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 970 bytes --]
== Series Details ==
Series: drm/xe/oa: Fix sync entry leak on OA config emit failure
URL : https://patchwork.freedesktop.org/series/170447/
State : success
== Summary ==
CI Bug Log - changes from xe-5404-9cf91140eff27765d402aedeea89505d52db121e_FULL -> xe-pw-170447v1_FULL
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (2 -> 2)
------------------------------
No changes in participating hosts
Changes
-------
No changes found
Build changes
-------------
* Linux: xe-5404-9cf91140eff27765d402aedeea89505d52db121e -> xe-pw-170447v1
IGT_9006: 6380a8af26359dd222e22679442272ded836c463 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-5404-9cf91140eff27765d402aedeea89505d52db121e: 9cf91140eff27765d402aedeea89505d52db121e
xe-pw-170447v1: 170447v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170447v1/index.html
[-- Attachment #2: Type: text/html, Size: 1518 bytes --]
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/xe/oa: Fix sync entry leak on OA config emit failure
2026-07-15 2:33 [PATCH] drm/xe/oa: Fix sync entry leak on OA config emit failure Linmao Li
` (2 preceding siblings ...)
2026-07-15 6:22 ` ✓ Xe.CI.FULL: " Patchwork
@ 2026-07-30 22:20 ` Dixit, Ashutosh
2026-07-31 1:19 ` [PATCH v2] " Linmao Li
2026-07-31 1:27 ` ✓ CI.KUnit: success for drm/xe/oa: Fix sync entry leak on OA config emit failure (rev2) Patchwork
5 siblings, 0 replies; 7+ messages in thread
From: Dixit, Ashutosh @ 2026-07-30 22:20 UTC (permalink / raw)
To: Linmao Li
Cc: Matthew Brost, Thomas Hellström, Rodrigo Vivi, David Airlie,
Simona Vetter, José Roberto de Souza, Umesh Nerlige Ramappa,
intel-xe, dri-devel, linux-kernel
On Tue, 14 Jul 2026 19:33:32 -0700, Linmao Li wrote:
>
Hi Linmao,
Sorry for the delay in responding to this patch.
> xe_oa_emit_oa_config() releases the sync entries and the syncs array
> only on its success path. When it fails before the point of no return
> (fence allocation, config buffer allocation or batch submission), it
> returns without touching stream->syncs.
>
> The stream open path handles such failures in the caller, but
> xe_oa_config_locked() propagates the error without any cleanup, so the
> syncs array and the fence references held by the parsed entries are
> leaked. The next config ioctl overwrites stream->syncs, making the
> memory unreachable for good.
>
> Clean up the parsed syncs when xe_oa_emit_oa_config() fails, matching
> the cleanup done by the stream open error path, and reset the stream
> sync state so it does not point at freed entries.
>
> Fixes: 9920c8b88c5c ("drm/xe/oa: Add syncs support to OA config ioctl")
> Signed-off-by: Linmao Li <lilinmao@kylinos.cn>
> ---
> drivers/gpu/drm/xe/xe_oa.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
> index 2dce6a47202c..b1ce312ea97a 100644
> --- a/drivers/gpu/drm/xe/xe_oa.c
> +++ b/drivers/gpu/drm/xe/xe_oa.c
> @@ -1594,6 +1594,12 @@ static long xe_oa_config_locked(struct xe_oa_stream *stream, u64 arg)
> config = xchg(&stream->oa_config, config);
> drm_dbg(&stream->oa->xe->drm, "changed to oa config uuid=%s\n",
> stream->oa_config->uuid);
> + } else {
> + while (param.num_syncs--)
> + xe_sync_entry_cleanup(¶m.syncs[param.num_syncs]);
> + kfree(param.syncs);
> + stream->num_syncs = 0;
> + stream->syncs = NULL;
Yes this looks correct to me. Except that we don't need the two lines
above. Can you please resend a v2 deleting the above two lines.
Thanks for the patch,
Ashutosh
> }
>
> err_config_put:
> --
> 2.25.1
>
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v2] drm/xe/oa: Fix sync entry leak on OA config emit failure
2026-07-15 2:33 [PATCH] drm/xe/oa: Fix sync entry leak on OA config emit failure Linmao Li
` (3 preceding siblings ...)
2026-07-30 22:20 ` [PATCH] " Dixit, Ashutosh
@ 2026-07-31 1:19 ` Linmao Li
2026-07-31 1:27 ` ✓ CI.KUnit: success for drm/xe/oa: Fix sync entry leak on OA config emit failure (rev2) Patchwork
5 siblings, 0 replies; 7+ messages in thread
From: Linmao Li @ 2026-07-31 1:19 UTC (permalink / raw)
To: Ashutosh Dixit, Matthew Brost, Thomas Hellström,
Rodrigo Vivi
Cc: David Airlie, Simona Vetter, José Roberto de Souza,
Umesh Nerlige Ramappa, intel-xe, dri-devel, linux-kernel,
Linmao Li
xe_oa_emit_oa_config() releases the sync entries and the syncs array
only on its success path. When it fails before the point of no return
(fence allocation, config buffer allocation or batch submission), it
returns without touching stream->syncs.
The stream open path handles such failures in the caller, but
xe_oa_config_locked() propagates the error without any cleanup, so the
syncs array and the fence references held by the parsed entries are
leaked. The next config ioctl overwrites stream->syncs, making the
memory unreachable for good.
Clean up the parsed syncs when xe_oa_emit_oa_config() fails, matching
the cleanup done by the stream open error path.
Fixes: 9920c8b88c5c ("drm/xe/oa: Add syncs support to OA config ioctl")
Signed-off-by: Linmao Li <lilinmao@kylinos.cn>
---
v2:
- drop the stream->syncs/num_syncs reset; nothing dereferences them
before they are overwritten or the stream is destroyed (Ashutosh Dixit)
drivers/gpu/drm/xe/xe_oa.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
index b3acbcd678b7c..d334ce8fed1c2 100644
--- a/drivers/gpu/drm/xe/xe_oa.c
+++ b/drivers/gpu/drm/xe/xe_oa.c
@@ -1594,6 +1594,10 @@ static long xe_oa_config_locked(struct xe_oa_stream *stream, u64 arg)
config = xchg(&stream->oa_config, config);
drm_dbg(&stream->oa->xe->drm, "changed to oa config uuid=%s\n",
stream->oa_config->uuid);
+ } else {
+ while (param.num_syncs--)
+ xe_sync_entry_cleanup(¶m.syncs[param.num_syncs]);
+ kfree(param.syncs);
}
err_config_put:
--
2.25.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* ✓ CI.KUnit: success for drm/xe/oa: Fix sync entry leak on OA config emit failure (rev2)
2026-07-15 2:33 [PATCH] drm/xe/oa: Fix sync entry leak on OA config emit failure Linmao Li
` (4 preceding siblings ...)
2026-07-31 1:19 ` [PATCH v2] " Linmao Li
@ 2026-07-31 1:27 ` Patchwork
5 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2026-07-31 1:27 UTC (permalink / raw)
To: Linmao Li; +Cc: intel-xe
== Series Details ==
Series: drm/xe/oa: Fix sync entry leak on OA config emit failure (rev2)
URL : https://patchwork.freedesktop.org/series/170447/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[01:25:50] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[01:25:54] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[01:26:26] Starting KUnit Kernel (1/1)...
[01:26:26] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[01:26:26] ================== guc_buf (11 subtests) ===================
[01:26:26] [PASSED] test_smallest
[01:26:26] [PASSED] test_largest
[01:26:26] [PASSED] test_granular
[01:26:26] [PASSED] test_unique
[01:26:26] [PASSED] test_overlap
[01:26:26] [PASSED] test_reusable
[01:26:26] [PASSED] test_too_big
[01:26:26] [PASSED] test_flush
[01:26:26] [PASSED] test_lookup
[01:26:26] [PASSED] test_data
[01:26:26] [PASSED] test_class
[01:26:26] ===================== [PASSED] guc_buf =====================
[01:26:26] =================== guc_dbm (7 subtests) ===================
[01:26:26] [PASSED] test_empty
[01:26:26] [PASSED] test_default
[01:26:26] ======================== test_size ========================
[01:26:26] [PASSED] 4
[01:26:26] [PASSED] 8
[01:26:26] [PASSED] 32
[01:26:26] [PASSED] 256
[01:26:26] ==================== [PASSED] test_size ====================
[01:26:26] ======================= test_reuse ========================
[01:26:26] [PASSED] 4
[01:26:26] [PASSED] 8
[01:26:26] [PASSED] 32
[01:26:26] [PASSED] 256
[01:26:26] =================== [PASSED] test_reuse ====================
[01:26:26] =================== test_range_overlap ====================
[01:26:26] [PASSED] 4
[01:26:26] [PASSED] 8
[01:26:26] [PASSED] 32
[01:26:26] [PASSED] 256
[01:26:26] =============== [PASSED] test_range_overlap ================
[01:26:26] =================== test_range_compact ====================
[01:26:26] [PASSED] 4
[01:26:26] [PASSED] 8
[01:26:26] [PASSED] 32
[01:26:26] [PASSED] 256
[01:26:26] =============== [PASSED] test_range_compact ================
[01:26:26] ==================== test_range_spare =====================
[01:26:26] [PASSED] 4
[01:26:26] [PASSED] 8
[01:26:26] [PASSED] 32
[01:26:26] [PASSED] 256
[01:26:26] ================ [PASSED] test_range_spare =================
[01:26:26] ===================== [PASSED] guc_dbm =====================
[01:26:26] =================== guc_idm (6 subtests) ===================
[01:26:26] [PASSED] bad_init
[01:26:26] [PASSED] no_init
[01:26:26] [PASSED] init_fini
[01:26:26] [PASSED] check_used
[01:26:26] [PASSED] check_quota
[01:26:26] [PASSED] check_all
[01:26:26] ===================== [PASSED] guc_idm =====================
[01:26:26] =============== guc_klv_helpers (9 subtests) ===============
[01:26:26] [PASSED] test_count
[01:26:26] [PASSED] test_encode_u32
[01:26:26] [PASSED] test_encode_u64
[01:26:26] [PASSED] test_encode_string
[01:26:26] [PASSED] test_encode_object_raw
[01:26:26] [PASSED] test_encode_object_klv
[01:26:26] [PASSED] test_encode_object_nested
[01:26:26] [PASSED] test_encode_object_basic
[01:26:26] [PASSED] test_print
[01:26:26] ================= [PASSED] guc_klv_helpers =================
[01:26:26] ================== no_relay (3 subtests) ===================
[01:26:26] [PASSED] xe_drops_guc2pf_if_not_ready
[01:26:26] [PASSED] xe_drops_guc2vf_if_not_ready
[01:26:26] [PASSED] xe_rejects_send_if_not_ready
[01:26:26] ==================== [PASSED] no_relay =====================
[01:26:26] ================== pf_relay (14 subtests) ==================
[01:26:26] [PASSED] pf_rejects_guc2pf_too_short
[01:26:26] [PASSED] pf_rejects_guc2pf_too_long
[01:26:26] [PASSED] pf_rejects_guc2pf_no_payload
[01:26:26] [PASSED] pf_fails_no_payload
[01:26:26] [PASSED] pf_fails_bad_origin
[01:26:26] [PASSED] pf_fails_bad_type
[01:26:26] [PASSED] pf_txn_reports_error
[01:26:26] [PASSED] pf_txn_sends_pf2guc
[01:26:26] [PASSED] pf_sends_pf2guc
[01:26:26] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[01:26:26] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[01:26:26] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[01:26:26] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[01:26:26] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[01:26:26] ==================== [PASSED] pf_relay =====================
[01:26:26] ================== vf_relay (3 subtests) ===================
[01:26:26] [PASSED] vf_rejects_guc2vf_too_short
[01:26:26] [PASSED] vf_rejects_guc2vf_too_long
[01:26:26] [PASSED] vf_rejects_guc2vf_no_payload
[01:26:26] ==================== [PASSED] vf_relay =====================
[01:26:26] ================ pf_gt_config (9 subtests) =================
[01:26:26] [PASSED] fair_contexts_1vf
[01:26:26] [PASSED] fair_doorbells_1vf
[01:26:26] [PASSED] fair_ggtt_1vf
[01:26:26] ====================== fair_vram_1vf ======================
[01:26:26] [PASSED] 3.50 GiB
[01:26:26] [PASSED] 11.5 GiB
[01:26:26] [PASSED] 15.5 GiB
[01:26:26] [PASSED] 31.5 GiB
[01:26:26] [PASSED] 63.5 GiB
[01:26:26] [PASSED] 1.91 GiB
[01:26:26] ================== [PASSED] fair_vram_1vf ==================
[01:26:26] ================ fair_vram_1vf_admin_only =================
[01:26:26] [PASSED] 3.50 GiB
[01:26:26] [PASSED] 11.5 GiB
[01:26:26] [PASSED] 15.5 GiB
[01:26:26] [PASSED] 31.5 GiB
[01:26:26] [PASSED] 63.5 GiB
[01:26:26] [PASSED] 1.91 GiB
[01:26:26] ============ [PASSED] fair_vram_1vf_admin_only =============
[01:26:26] ====================== fair_contexts ======================
[01:26:26] [PASSED] 1 VF
[01:26:26] [PASSED] 2 VFs
[01:26:26] [PASSED] 3 VFs
[01:26:26] [PASSED] 4 VFs
[01:26:26] [PASSED] 5 VFs
[01:26:26] [PASSED] 6 VFs
[01:26:26] [PASSED] 7 VFs
[01:26:26] [PASSED] 8 VFs
[01:26:26] [PASSED] 9 VFs
[01:26:26] [PASSED] 10 VFs
[01:26:26] [PASSED] 11 VFs
[01:26:26] [PASSED] 12 VFs
[01:26:26] [PASSED] 13 VFs
[01:26:26] [PASSED] 14 VFs
[01:26:26] [PASSED] 15 VFs
[01:26:26] [PASSED] 16 VFs
[01:26:26] [PASSED] 17 VFs
[01:26:26] [PASSED] 18 VFs
[01:26:26] [PASSED] 19 VFs
[01:26:26] [PASSED] 20 VFs
[01:26:26] [PASSED] 21 VFs
[01:26:26] [PASSED] 22 VFs
[01:26:26] [PASSED] 23 VFs
[01:26:26] [PASSED] 24 VFs
[01:26:26] [PASSED] 25 VFs
[01:26:26] [PASSED] 26 VFs
[01:26:26] [PASSED] 27 VFs
[01:26:26] [PASSED] 28 VFs
[01:26:26] [PASSED] 29 VFs
[01:26:26] [PASSED] 30 VFs
[01:26:26] [PASSED] 31 VFs
[01:26:26] [PASSED] 32 VFs
[01:26:26] [PASSED] 33 VFs
[01:26:26] [PASSED] 34 VFs
[01:26:26] [PASSED] 35 VFs
[01:26:26] [PASSED] 36 VFs
[01:26:26] [PASSED] 37 VFs
[01:26:26] [PASSED] 38 VFs
[01:26:26] [PASSED] 39 VFs
[01:26:26] [PASSED] 40 VFs
[01:26:26] [PASSED] 41 VFs
[01:26:26] [PASSED] 42 VFs
[01:26:26] [PASSED] 43 VFs
[01:26:26] [PASSED] 44 VFs
[01:26:26] [PASSED] 45 VFs
[01:26:26] [PASSED] 46 VFs
[01:26:26] [PASSED] 47 VFs
[01:26:26] [PASSED] 48 VFs
[01:26:26] [PASSED] 49 VFs
[01:26:26] [PASSED] 50 VFs
[01:26:26] [PASSED] 51 VFs
[01:26:26] [PASSED] 52 VFs
[01:26:26] [PASSED] 53 VFs
[01:26:26] [PASSED] 54 VFs
[01:26:26] [PASSED] 55 VFs
[01:26:26] [PASSED] 56 VFs
[01:26:26] [PASSED] 57 VFs
[01:26:26] [PASSED] 58 VFs
[01:26:26] [PASSED] 59 VFs
[01:26:26] [PASSED] 60 VFs
[01:26:26] [PASSED] 61 VFs
[01:26:26] [PASSED] 62 VFs
[01:26:26] [PASSED] 63 VFs
[01:26:26] ================== [PASSED] fair_contexts ==================
[01:26:26] ===================== fair_doorbells ======================
[01:26:26] [PASSED] 1 VF
[01:26:26] [PASSED] 2 VFs
[01:26:26] [PASSED] 3 VFs
[01:26:26] [PASSED] 4 VFs
[01:26:26] [PASSED] 5 VFs
[01:26:26] [PASSED] 6 VFs
[01:26:26] [PASSED] 7 VFs
[01:26:26] [PASSED] 8 VFs
[01:26:26] [PASSED] 9 VFs
[01:26:26] [PASSED] 10 VFs
[01:26:26] [PASSED] 11 VFs
[01:26:26] [PASSED] 12 VFs
[01:26:26] [PASSED] 13 VFs
[01:26:26] [PASSED] 14 VFs
[01:26:26] [PASSED] 15 VFs
[01:26:26] [PASSED] 16 VFs
[01:26:26] [PASSED] 17 VFs
[01:26:26] [PASSED] 18 VFs
[01:26:26] [PASSED] 19 VFs
[01:26:26] [PASSED] 20 VFs
[01:26:26] [PASSED] 21 VFs
[01:26:26] [PASSED] 22 VFs
[01:26:26] [PASSED] 23 VFs
[01:26:26] [PASSED] 24 VFs
[01:26:26] [PASSED] 25 VFs
[01:26:26] [PASSED] 26 VFs
[01:26:26] [PASSED] 27 VFs
[01:26:26] [PASSED] 28 VFs
[01:26:26] [PASSED] 29 VFs
[01:26:26] [PASSED] 30 VFs
[01:26:26] [PASSED] 31 VFs
[01:26:26] [PASSED] 32 VFs
[01:26:26] [PASSED] 33 VFs
[01:26:26] [PASSED] 34 VFs
[01:26:26] [PASSED] 35 VFs
[01:26:26] [PASSED] 36 VFs
[01:26:26] [PASSED] 37 VFs
[01:26:26] [PASSED] 38 VFs
[01:26:26] [PASSED] 39 VFs
[01:26:26] [PASSED] 40 VFs
[01:26:26] [PASSED] 41 VFs
[01:26:26] [PASSED] 42 VFs
[01:26:26] [PASSED] 43 VFs
[01:26:26] [PASSED] 44 VFs
[01:26:26] [PASSED] 45 VFs
[01:26:26] [PASSED] 46 VFs
[01:26:26] [PASSED] 47 VFs
[01:26:26] [PASSED] 48 VFs
[01:26:26] [PASSED] 49 VFs
[01:26:26] [PASSED] 50 VFs
[01:26:26] [PASSED] 51 VFs
[01:26:26] [PASSED] 52 VFs
[01:26:26] [PASSED] 53 VFs
[01:26:26] [PASSED] 54 VFs
[01:26:26] [PASSED] 55 VFs
[01:26:26] [PASSED] 56 VFs
[01:26:26] [PASSED] 57 VFs
[01:26:26] [PASSED] 58 VFs
[01:26:26] [PASSED] 59 VFs
[01:26:26] [PASSED] 60 VFs
[01:26:26] [PASSED] 61 VFs
[01:26:26] [PASSED] 62 VFs
[01:26:26] [PASSED] 63 VFs
[01:26:26] ================= [PASSED] fair_doorbells ==================
[01:26:26] ======================== fair_ggtt ========================
[01:26:26] [PASSED] 1 VF
[01:26:26] [PASSED] 2 VFs
[01:26:26] [PASSED] 3 VFs
[01:26:26] [PASSED] 4 VFs
[01:26:26] [PASSED] 5 VFs
[01:26:26] [PASSED] 6 VFs
[01:26:26] [PASSED] 7 VFs
[01:26:26] [PASSED] 8 VFs
[01:26:26] [PASSED] 9 VFs
[01:26:26] [PASSED] 10 VFs
[01:26:26] [PASSED] 11 VFs
[01:26:26] [PASSED] 12 VFs
[01:26:26] [PASSED] 13 VFs
[01:26:26] [PASSED] 14 VFs
[01:26:26] [PASSED] 15 VFs
[01:26:26] [PASSED] 16 VFs
[01:26:26] [PASSED] 17 VFs
[01:26:26] [PASSED] 18 VFs
[01:26:26] [PASSED] 19 VFs
[01:26:26] [PASSED] 20 VFs
[01:26:26] [PASSED] 21 VFs
[01:26:26] [PASSED] 22 VFs
[01:26:26] [PASSED] 23 VFs
[01:26:26] [PASSED] 24 VFs
[01:26:26] [PASSED] 25 VFs
[01:26:26] [PASSED] 26 VFs
[01:26:26] [PASSED] 27 VFs
[01:26:26] [PASSED] 28 VFs
[01:26:26] [PASSED] 29 VFs
[01:26:26] [PASSED] 30 VFs
[01:26:26] [PASSED] 31 VFs
[01:26:26] [PASSED] 32 VFs
[01:26:26] [PASSED] 33 VFs
[01:26:26] [PASSED] 34 VFs
[01:26:26] [PASSED] 35 VFs
[01:26:26] [PASSED] 36 VFs
[01:26:26] [PASSED] 37 VFs
[01:26:26] [PASSED] 38 VFs
[01:26:26] [PASSED] 39 VFs
[01:26:26] [PASSED] 40 VFs
[01:26:26] [PASSED] 41 VFs
[01:26:26] [PASSED] 42 VFs
[01:26:26] [PASSED] 43 VFs
[01:26:26] [PASSED] 44 VFs
[01:26:26] [PASSED] 45 VFs
[01:26:26] [PASSED] 46 VFs
[01:26:26] [PASSED] 47 VFs
[01:26:26] [PASSED] 48 VFs
[01:26:26] [PASSED] 49 VFs
[01:26:26] [PASSED] 50 VFs
[01:26:26] [PASSED] 51 VFs
[01:26:26] [PASSED] 52 VFs
[01:26:26] [PASSED] 53 VFs
[01:26:26] [PASSED] 54 VFs
[01:26:26] [PASSED] 55 VFs
[01:26:26] [PASSED] 56 VFs
[01:26:26] [PASSED] 57 VFs
[01:26:26] [PASSED] 58 VFs
[01:26:26] [PASSED] 59 VFs
[01:26:26] [PASSED] 60 VFs
[01:26:26] [PASSED] 61 VFs
[01:26:26] [PASSED] 62 VFs
[01:26:26] [PASSED] 63 VFs
[01:26:26] ==================== [PASSED] fair_ggtt ====================
[01:26:26] ======================== fair_vram ========================
[01:26:26] [PASSED] 1 VF
[01:26:26] [PASSED] 2 VFs
[01:26:26] [PASSED] 3 VFs
[01:26:26] [PASSED] 4 VFs
[01:26:26] [PASSED] 5 VFs
[01:26:26] [PASSED] 6 VFs
[01:26:26] [PASSED] 7 VFs
[01:26:26] [PASSED] 8 VFs
[01:26:26] [PASSED] 9 VFs
[01:26:26] [PASSED] 10 VFs
[01:26:26] [PASSED] 11 VFs
[01:26:26] [PASSED] 12 VFs
[01:26:26] [PASSED] 13 VFs
[01:26:26] [PASSED] 14 VFs
[01:26:26] [PASSED] 15 VFs
[01:26:26] [PASSED] 16 VFs
[01:26:26] [PASSED] 17 VFs
[01:26:26] [PASSED] 18 VFs
[01:26:26] [PASSED] 19 VFs
[01:26:26] [PASSED] 20 VFs
[01:26:26] [PASSED] 21 VFs
[01:26:26] [PASSED] 22 VFs
[01:26:26] [PASSED] 23 VFs
[01:26:26] [PASSED] 24 VFs
[01:26:26] [PASSED] 25 VFs
[01:26:26] [PASSED] 26 VFs
[01:26:26] [PASSED] 27 VFs
[01:26:26] [PASSED] 28 VFs
[01:26:26] [PASSED] 29 VFs
[01:26:26] [PASSED] 30 VFs
[01:26:26] [PASSED] 31 VFs
[01:26:26] [PASSED] 32 VFs
[01:26:26] [PASSED] 33 VFs
[01:26:26] [PASSED] 34 VFs
[01:26:26] [PASSED] 35 VFs
[01:26:26] [PASSED] 36 VFs
[01:26:26] [PASSED] 37 VFs
[01:26:26] [PASSED] 38 VFs
[01:26:26] [PASSED] 39 VFs
[01:26:26] [PASSED] 40 VFs
[01:26:26] [PASSED] 41 VFs
[01:26:26] [PASSED] 42 VFs
[01:26:26] [PASSED] 43 VFs
[01:26:26] [PASSED] 44 VFs
[01:26:26] [PASSED] 45 VFs
[01:26:26] [PASSED] 46 VFs
[01:26:26] [PASSED] 47 VFs
[01:26:26] [PASSED] 48 VFs
[01:26:26] [PASSED] 49 VFs
[01:26:26] [PASSED] 50 VFs
[01:26:26] [PASSED] 51 VFs
[01:26:26] [PASSED] 52 VFs
[01:26:27] [PASSED] 53 VFs
[01:26:27] [PASSED] 54 VFs
[01:26:27] [PASSED] 55 VFs
[01:26:27] [PASSED] 56 VFs
[01:26:27] [PASSED] 57 VFs
[01:26:27] [PASSED] 58 VFs
[01:26:27] [PASSED] 59 VFs
[01:26:27] [PASSED] 60 VFs
[01:26:27] [PASSED] 61 VFs
[01:26:27] [PASSED] 62 VFs
[01:26:27] [PASSED] 63 VFs
[01:26:27] ==================== [PASSED] fair_vram ====================
[01:26:27] ================== [PASSED] pf_gt_config ===================
[01:26:27] ===================== lmtt (1 subtest) =====================
[01:26:27] ======================== test_ops =========================
[01:26:27] [PASSED] 2-level
[01:26:27] [PASSED] multi-level
[01:26:27] ==================== [PASSED] test_ops =====================
[01:26:27] ====================== [PASSED] lmtt =======================
[01:26:27] ================= sriov_packet (1 subtest) =================
[01:26:27] [PASSED] test_descriptor_init
[01:26:27] ================== [PASSED] sriov_packet ===================
[01:26:27] ================= pf_service (11 subtests) =================
[01:26:27] [PASSED] pf_negotiate_any
[01:26:27] [PASSED] pf_negotiate_base_match
[01:26:27] [PASSED] pf_negotiate_base_newer
[01:26:27] [PASSED] pf_negotiate_base_next
[01:26:27] [SKIPPED] pf_negotiate_base_older (no older minor)
[01:26:27] [PASSED] pf_negotiate_base_prev
[01:26:27] [PASSED] pf_negotiate_latest_match
[01:26:27] [PASSED] pf_negotiate_latest_newer
[01:26:27] [PASSED] pf_negotiate_latest_next
[01:26:27] [SKIPPED] pf_negotiate_latest_older (no older minor)
[01:26:27] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[01:26:27] =================== [PASSED] pf_service ====================
[01:26:27] ================= xe_guc_g2g (2 subtests) ==================
[01:26:27] ============== xe_live_guc_g2g_kunit_default ==============
[01:26:27] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[01:26:27] ============== xe_live_guc_g2g_kunit_allmem ===============
[01:26:27] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[01:26:27] =================== [SKIPPED] xe_guc_g2g ===================
[01:26:27] =================== xe_mocs (2 subtests) ===================
[01:26:27] ================ xe_live_mocs_kernel_kunit ================
[01:26:27] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[01:26:27] ================ xe_live_mocs_reset_kunit =================
[01:26:27] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[01:26:27] ==================== [SKIPPED] xe_mocs =====================
[01:26:27] ================= xe_migrate (2 subtests) ==================
[01:26:27] ================= xe_migrate_sanity_kunit =================
[01:26:27] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[01:26:27] ================== xe_validate_ccs_kunit ==================
[01:26:27] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[01:26:27] =================== [SKIPPED] xe_migrate ===================
[01:26:27] ================== xe_dma_buf (1 subtest) ==================
[01:26:27] ==================== xe_dma_buf_kunit =====================
[01:26:27] ================ [SKIPPED] xe_dma_buf_kunit ================
[01:26:27] =================== [SKIPPED] xe_dma_buf ===================
[01:26:27] ================= xe_bo_shrink (1 subtest) =================
[01:26:27] =================== xe_bo_shrink_kunit ====================
[01:26:27] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[01:26:27] ================== [SKIPPED] xe_bo_shrink ==================
[01:26:27] ==================== xe_bo (2 subtests) ====================
[01:26:27] ================== xe_ccs_migrate_kunit ===================
[01:26:27] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[01:26:27] ==================== xe_bo_evict_kunit ====================
[01:26:27] =============== [SKIPPED] xe_bo_evict_kunit ================
[01:26:27] ===================== [SKIPPED] xe_bo ======================
[01:26:27] ==================== args (13 subtests) ====================
[01:26:27] [PASSED] count_args_test
[01:26:27] [PASSED] call_args_example
[01:26:27] [PASSED] call_args_test
[01:26:27] [PASSED] drop_first_arg_example
[01:26:27] [PASSED] drop_first_arg_test
[01:26:27] [PASSED] first_arg_example
[01:26:27] [PASSED] first_arg_test
[01:26:27] [PASSED] last_arg_example
[01:26:27] [PASSED] last_arg_test
[01:26:27] [PASSED] pick_arg_example
[01:26:27] [PASSED] if_args_example
[01:26:27] [PASSED] if_args_test
[01:26:27] [PASSED] sep_comma_example
[01:26:27] ====================== [PASSED] args =======================
[01:26:27] =================== xe_pci (3 subtests) ====================
[01:26:27] ==================== check_graphics_ip ====================
[01:26:27] [PASSED] 12.00 Xe_LP
[01:26:27] [PASSED] 12.10 Xe_LP+
[01:26:27] [PASSED] 12.55 Xe_HPG
[01:26:27] [PASSED] 12.60 Xe_HPC
[01:26:27] [PASSED] 12.70 Xe_LPG
[01:26:27] [PASSED] 12.71 Xe_LPG
[01:26:27] [PASSED] 12.74 Xe_LPG+
[01:26:27] [PASSED] 20.01 Xe2_HPG
[01:26:27] [PASSED] 20.02 Xe2_HPG
[01:26:27] [PASSED] 20.04 Xe2_LPG
[01:26:27] [PASSED] 30.00 Xe3_LPG
[01:26:27] [PASSED] 30.01 Xe3_LPG
[01:26:27] [PASSED] 30.03 Xe3_LPG
[01:26:27] [PASSED] 30.04 Xe3_LPG
[01:26:27] [PASSED] 30.05 Xe3_LPG
[01:26:27] [PASSED] 35.10 Xe3p_LPG
[01:26:27] [PASSED] 35.11 Xe3p_XPC
[01:26:27] ================ [PASSED] check_graphics_ip ================
[01:26:27] ===================== check_media_ip ======================
[01:26:27] [PASSED] 12.00 Xe_M
[01:26:27] [PASSED] 12.55 Xe_HPM
[01:26:27] [PASSED] 13.00 Xe_LPM+
[01:26:27] [PASSED] 13.01 Xe2_HPM
[01:26:27] [PASSED] 20.00 Xe2_LPM
[01:26:27] [PASSED] 30.00 Xe3_LPM
[01:26:27] [PASSED] 30.02 Xe3_LPM
[01:26:27] [PASSED] 35.00 Xe3p_LPM
[01:26:27] [PASSED] 35.03 Xe3p_HPM
[01:26:27] ================= [PASSED] check_media_ip ==================
[01:26:27] =================== check_platform_desc ===================
[01:26:27] [PASSED] 0x9A60 (TIGERLAKE)
[01:26:27] [PASSED] 0x9A68 (TIGERLAKE)
[01:26:27] [PASSED] 0x9A70 (TIGERLAKE)
[01:26:27] [PASSED] 0x9A40 (TIGERLAKE)
[01:26:27] [PASSED] 0x9A49 (TIGERLAKE)
[01:26:27] [PASSED] 0x9A59 (TIGERLAKE)
[01:26:27] [PASSED] 0x9A78 (TIGERLAKE)
[01:26:27] [PASSED] 0x9AC0 (TIGERLAKE)
[01:26:27] [PASSED] 0x9AC9 (TIGERLAKE)
[01:26:27] [PASSED] 0x9AD9 (TIGERLAKE)
[01:26:27] [PASSED] 0x9AF8 (TIGERLAKE)
[01:26:27] [PASSED] 0x4C80 (ROCKETLAKE)
[01:26:27] [PASSED] 0x4C8A (ROCKETLAKE)
[01:26:27] [PASSED] 0x4C8B (ROCKETLAKE)
[01:26:27] [PASSED] 0x4C8C (ROCKETLAKE)
[01:26:27] [PASSED] 0x4C90 (ROCKETLAKE)
[01:26:27] [PASSED] 0x4C9A (ROCKETLAKE)
[01:26:27] [PASSED] 0x4680 (ALDERLAKE_S)
[01:26:27] [PASSED] 0x4682 (ALDERLAKE_S)
[01:26:27] [PASSED] 0x4688 (ALDERLAKE_S)
[01:26:27] [PASSED] 0x468A (ALDERLAKE_S)
[01:26:27] [PASSED] 0x468B (ALDERLAKE_S)
[01:26:27] [PASSED] 0x4690 (ALDERLAKE_S)
[01:26:27] [PASSED] 0x4692 (ALDERLAKE_S)
[01:26:27] [PASSED] 0x4693 (ALDERLAKE_S)
[01:26:27] [PASSED] 0x46A0 (ALDERLAKE_P)
[01:26:27] [PASSED] 0x46A1 (ALDERLAKE_P)
[01:26:27] [PASSED] 0x46A2 (ALDERLAKE_P)
[01:26:27] [PASSED] 0x46A3 (ALDERLAKE_P)
[01:26:27] [PASSED] 0x46A6 (ALDERLAKE_P)
[01:26:27] [PASSED] 0x46A8 (ALDERLAKE_P)
[01:26:27] [PASSED] 0x46AA (ALDERLAKE_P)
[01:26:27] [PASSED] 0x462A (ALDERLAKE_P)
[01:26:27] [PASSED] 0x4626 (ALDERLAKE_P)
[01:26:27] [PASSED] 0x4628 (ALDERLAKE_P)
[01:26:27] [PASSED] 0x46B0 (ALDERLAKE_P)
[01:26:27] [PASSED] 0x46B1 (ALDERLAKE_P)
[01:26:27] [PASSED] 0x46B2 (ALDERLAKE_P)
[01:26:27] [PASSED] 0x46B3 (ALDERLAKE_P)
[01:26:27] [PASSED] 0x46C0 (ALDERLAKE_P)
[01:26:27] [PASSED] 0x46C1 (ALDERLAKE_P)
[01:26:27] [PASSED] 0x46C2 (ALDERLAKE_P)
[01:26:27] [PASSED] 0x46C3 (ALDERLAKE_P)
[01:26:27] [PASSED] 0x46D0 (ALDERLAKE_N)
[01:26:27] [PASSED] 0x46D1 (ALDERLAKE_N)
[01:26:27] [PASSED] 0x46D2 (ALDERLAKE_N)
[01:26:27] [PASSED] 0x46D3 (ALDERLAKE_N)
[01:26:27] [PASSED] 0x46D4 (ALDERLAKE_N)
[01:26:27] [PASSED] 0xA721 (ALDERLAKE_P)
[01:26:27] [PASSED] 0xA7A1 (ALDERLAKE_P)
[01:26:27] [PASSED] 0xA7A9 (ALDERLAKE_P)
[01:26:27] [PASSED] 0xA7AC (ALDERLAKE_P)
[01:26:27] [PASSED] 0xA7AD (ALDERLAKE_P)
[01:26:27] [PASSED] 0xA720 (ALDERLAKE_P)
[01:26:27] [PASSED] 0xA7A0 (ALDERLAKE_P)
[01:26:27] [PASSED] 0xA7A8 (ALDERLAKE_P)
[01:26:27] [PASSED] 0xA7AA (ALDERLAKE_P)
[01:26:27] [PASSED] 0xA7AB (ALDERLAKE_P)
[01:26:27] [PASSED] 0xA780 (ALDERLAKE_S)
[01:26:27] [PASSED] 0xA781 (ALDERLAKE_S)
[01:26:27] [PASSED] 0xA782 (ALDERLAKE_S)
[01:26:27] [PASSED] 0xA783 (ALDERLAKE_S)
[01:26:27] [PASSED] 0xA788 (ALDERLAKE_S)
[01:26:27] [PASSED] 0xA789 (ALDERLAKE_S)
[01:26:27] [PASSED] 0xA78A (ALDERLAKE_S)
[01:26:27] [PASSED] 0xA78B (ALDERLAKE_S)
[01:26:27] [PASSED] 0x4905 (DG1)
[01:26:27] [PASSED] 0x4906 (DG1)
[01:26:27] [PASSED] 0x4907 (DG1)
[01:26:27] [PASSED] 0x4908 (DG1)
[01:26:27] [PASSED] 0x4909 (DG1)
[01:26:27] [PASSED] 0x56C0 (DG2)
[01:26:27] [PASSED] 0x56C2 (DG2)
[01:26:27] [PASSED] 0x56C1 (DG2)
[01:26:27] [PASSED] 0x7D51 (METEORLAKE)
[01:26:27] [PASSED] 0x7DD1 (METEORLAKE)
[01:26:27] [PASSED] 0x7D41 (METEORLAKE)
[01:26:27] [PASSED] 0x7D67 (METEORLAKE)
[01:26:27] [PASSED] 0xB640 (METEORLAKE)
[01:26:27] [PASSED] 0x56A0 (DG2)
[01:26:27] [PASSED] 0x56A1 (DG2)
[01:26:27] [PASSED] 0x56A2 (DG2)
[01:26:27] [PASSED] 0x56BE (DG2)
[01:26:27] [PASSED] 0x56BF (DG2)
[01:26:27] [PASSED] 0x5690 (DG2)
[01:26:27] [PASSED] 0x5691 (DG2)
[01:26:27] [PASSED] 0x5692 (DG2)
[01:26:27] [PASSED] 0x56A5 (DG2)
[01:26:27] [PASSED] 0x56A6 (DG2)
[01:26:27] [PASSED] 0x56B0 (DG2)
[01:26:27] [PASSED] 0x56B1 (DG2)
[01:26:27] [PASSED] 0x56BA (DG2)
[01:26:27] [PASSED] 0x56BB (DG2)
[01:26:27] [PASSED] 0x56BC (DG2)
[01:26:27] [PASSED] 0x56BD (DG2)
[01:26:27] [PASSED] 0x5693 (DG2)
[01:26:27] [PASSED] 0x5694 (DG2)
[01:26:27] [PASSED] 0x5695 (DG2)
[01:26:27] [PASSED] 0x56A3 (DG2)
[01:26:27] [PASSED] 0x56A4 (DG2)
[01:26:27] [PASSED] 0x56B2 (DG2)
[01:26:27] [PASSED] 0x56B3 (DG2)
[01:26:27] [PASSED] 0x5696 (DG2)
[01:26:27] [PASSED] 0x5697 (DG2)
[01:26:27] [PASSED] 0xB69 (PVC)
[01:26:27] [PASSED] 0xB6E (PVC)
[01:26:27] [PASSED] 0xBD4 (PVC)
[01:26:27] [PASSED] 0xBD5 (PVC)
[01:26:27] [PASSED] 0xBD6 (PVC)
[01:26:27] [PASSED] 0xBD7 (PVC)
[01:26:27] [PASSED] 0xBD8 (PVC)
[01:26:27] [PASSED] 0xBD9 (PVC)
[01:26:27] [PASSED] 0xBDA (PVC)
[01:26:27] [PASSED] 0xBDB (PVC)
[01:26:27] [PASSED] 0xBE0 (PVC)
[01:26:27] [PASSED] 0xBE1 (PVC)
[01:26:27] [PASSED] 0xBE5 (PVC)
[01:26:27] [PASSED] 0x7D40 (METEORLAKE)
[01:26:27] [PASSED] 0x7D45 (METEORLAKE)
[01:26:27] [PASSED] 0x7D55 (METEORLAKE)
[01:26:27] [PASSED] 0x7D60 (METEORLAKE)
[01:26:27] [PASSED] 0x7DD5 (METEORLAKE)
[01:26:27] [PASSED] 0x6420 (LUNARLAKE)
[01:26:27] [PASSED] 0x64A0 (LUNARLAKE)
[01:26:27] [PASSED] 0x64B0 (LUNARLAKE)
[01:26:27] [PASSED] 0xE202 (BATTLEMAGE)
[01:26:27] [PASSED] 0xE209 (BATTLEMAGE)
[01:26:27] [PASSED] 0xE20B (BATTLEMAGE)
[01:26:27] [PASSED] 0xE20C (BATTLEMAGE)
[01:26:27] [PASSED] 0xE20D (BATTLEMAGE)
[01:26:27] [PASSED] 0xE210 (BATTLEMAGE)
[01:26:27] [PASSED] 0xE211 (BATTLEMAGE)
[01:26:27] [PASSED] 0xE212 (BATTLEMAGE)
[01:26:27] [PASSED] 0xE216 (BATTLEMAGE)
[01:26:27] [PASSED] 0xE220 (BATTLEMAGE)
[01:26:27] [PASSED] 0xE221 (BATTLEMAGE)
[01:26:27] [PASSED] 0xE222 (BATTLEMAGE)
[01:26:27] [PASSED] 0xE223 (BATTLEMAGE)
[01:26:27] [PASSED] 0xB080 (PANTHERLAKE)
[01:26:27] [PASSED] 0xB081 (PANTHERLAKE)
[01:26:27] [PASSED] 0xB082 (PANTHERLAKE)
[01:26:27] [PASSED] 0xB083 (PANTHERLAKE)
[01:26:27] [PASSED] 0xB084 (PANTHERLAKE)
[01:26:27] [PASSED] 0xB085 (PANTHERLAKE)
[01:26:27] [PASSED] 0xB086 (PANTHERLAKE)
[01:26:27] [PASSED] 0xB087 (PANTHERLAKE)
[01:26:27] [PASSED] 0xB08F (PANTHERLAKE)
[01:26:27] [PASSED] 0xB090 (PANTHERLAKE)
[01:26:27] [PASSED] 0xB0A0 (PANTHERLAKE)
[01:26:27] [PASSED] 0xB0B0 (PANTHERLAKE)
[01:26:27] [PASSED] 0xFD80 (PANTHERLAKE)
[01:26:27] [PASSED] 0xFD81 (PANTHERLAKE)
[01:26:27] [PASSED] 0xD740 (NOVALAKE_S)
[01:26:27] [PASSED] 0xD741 (NOVALAKE_S)
[01:26:27] [PASSED] 0xD742 (NOVALAKE_S)
[01:26:27] [PASSED] 0xD743 (NOVALAKE_S)
[01:26:27] [PASSED] 0xD745 (NOVALAKE_S)
[01:26:27] [PASSED] 0xD74A (NOVALAKE_S)
[01:26:27] [PASSED] 0xD74B (NOVALAKE_S)
[01:26:27] [PASSED] 0x674C (CRESCENTISLAND)
[01:26:27] [PASSED] 0x674D (CRESCENTISLAND)
[01:26:27] [PASSED] 0x674E (CRESCENTISLAND)
[01:26:27] [PASSED] 0x674F (CRESCENTISLAND)
[01:26:27] [PASSED] 0x6750 (CRESCENTISLAND)
[01:26:27] [PASSED] 0xD750 (NOVALAKE_P)
[01:26:27] [PASSED] 0xD751 (NOVALAKE_P)
[01:26:27] [PASSED] 0xD752 (NOVALAKE_P)
[01:26:27] [PASSED] 0xD753 (NOVALAKE_P)
[01:26:27] [PASSED] 0xD754 (NOVALAKE_P)
[01:26:27] [PASSED] 0xD755 (NOVALAKE_P)
[01:26:27] [PASSED] 0xD756 (NOVALAKE_P)
[01:26:27] [PASSED] 0xD757 (NOVALAKE_P)
[01:26:27] [PASSED] 0xD75F (NOVALAKE_P)
[01:26:27] =============== [PASSED] check_platform_desc ===============
[01:26:27] ===================== [PASSED] xe_pci ======================
[01:26:27] ============= xe_rtp_tables_test (5 subtests) ==============
[01:26:27] ================== xe_rtp_table_gt_test ===================
[01:26:27] [PASSED] gt_was/14011060649
[01:26:27] [PASSED] gt_was/14011059788
[01:26:27] [PASSED] gt_was/14015795083
[01:26:27] [PASSED] gt_was/16021867713
[01:26:27] [PASSED] gt_was/14019449301
[01:26:27] [PASSED] gt_was/16028005424
[01:26:27] [PASSED] gt_was/14026578760
[01:26:27] [PASSED] gt_was/1409420604
[01:26:27] [PASSED] gt_was/1408615072
[01:26:27] [PASSED] gt_was/22010523718
[01:26:27] [PASSED] gt_was/14011006942
[01:26:27] [PASSED] gt_was/14014830051
[01:26:27] [PASSED] gt_was/18018781329
[01:26:27] [PASSED] gt_was/1509235366
[01:26:27] [PASSED] gt_was/18018781329
[01:26:27] [PASSED] gt_was/16016694945
[01:26:27] [PASSED] gt_was/14018575942
[01:26:27] [PASSED] gt_was/22016670082
[01:26:27] [PASSED] gt_was/22016670082
[01:26:27] [PASSED] gt_was/14017421178
[01:26:27] [PASSED] gt_was/16025250150
[01:26:27] [PASSED] gt_was/14021871409
[01:26:27] [PASSED] gt_was/16021865536
[01:26:27] [PASSED] gt_was/14021486841
[01:26:27] [PASSED] gt_was/14025160223
[01:26:27] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[01:26:27] [PASSED] gt_was/14025635424
[01:26:27] [PASSED] gt_was/16028005424
[01:26:27] ============== [PASSED] xe_rtp_table_gt_test ===============
[01:26:27] ================== xe_rtp_table_gt_test ===================
[01:26:27] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[01:26:27] [PASSED] gt_tunings/Tuning: 32B Access Enable
[01:26:27] [PASSED] gt_tunings/Tuning: L3 cache
[01:26:27] [PASSED] gt_tunings/Tuning: L3 cache - media
[01:26:27] [PASSED] gt_tunings/Tuning: Compression Overfetch
[01:26:27] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[01:26:27] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[01:26:27] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[01:26:27] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[01:26:27] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[01:26:27] [PASSED] gt_tunings/Tuning: Stateless compression control
[01:26:27] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[01:26:27] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[01:26:27] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[01:26:27] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[01:26:27] ============== [PASSED] xe_rtp_table_gt_test ===============
[01:26:27] ================== xe_rtp_table_oob_test ==================
[01:26:27] [PASSED] oob_was/1607983814
[01:26:27] [PASSED] oob_was/16010904313
[01:26:27] [PASSED] oob_was/18022495364
[01:26:27] [PASSED] oob_was/22012773006
[01:26:27] [PASSED] oob_was/14014475959
[01:26:27] [PASSED] oob_was/22011391025
[01:26:27] [PASSED] oob_was/22012727170
[01:26:27] [PASSED] oob_was/22012727685
[01:26:27] [PASSED] oob_was/22016596838
[01:26:27] [PASSED] oob_was/18020744125
[01:26:27] [PASSED] oob_was/1409600907
[01:26:27] [PASSED] oob_was/22014953428
[01:26:27] [PASSED] oob_was/16017236439
[01:26:27] [PASSED] oob_was/14019821291
[01:26:27] [PASSED] oob_was/14015076503
[01:26:27] [PASSED] oob_was/14018913170
[01:26:27] [PASSED] oob_was/14018094691
[01:26:27] [PASSED] oob_was/18024947630
[01:26:27] [PASSED] oob_was/16022287689
[01:26:27] [PASSED] oob_was/13011645652
[01:26:27] [PASSED] oob_was/14022293748
[01:26:27] [PASSED] oob_was/22019794406
[01:26:27] [PASSED] oob_was/22019338487
[01:26:27] [PASSED] oob_was/16023588340
[01:26:27] [PASSED] oob_was/14019789679
[01:26:27] [PASSED] oob_was/14022866841
[01:26:27] [PASSED] oob_was/16021333562
[01:26:27] [PASSED] oob_was/14016712196
[01:26:27] [PASSED] oob_was/14015568240
[01:26:27] [PASSED] oob_was/18013179988
[01:26:27] [PASSED] oob_was/1508761755
[01:26:27] [PASSED] oob_was/16023105232
[01:26:27] [PASSED] oob_was/16026508708
[01:26:27] [PASSED] oob_was/14020001231
[01:26:27] [PASSED] oob_was/16023683509
[01:26:27] [PASSED] oob_was/14025515070
[01:26:27] [PASSED] oob_was/15015404425_disable
[01:26:27] [PASSED] oob_was/16026007364
[01:26:27] [PASSED] oob_was/14020316580
[01:26:27] [PASSED] oob_was/14025883347
[01:26:27] [PASSED] oob_was/16029380221
[01:26:27] [PASSED] oob_was/22022079272
[01:26:27] [PASSED] oob_was/16029897822
[01:26:27] [PASSED] oob_was/14027054324
[01:26:27] ============== [PASSED] xe_rtp_table_oob_test ==============
[01:26:27] ================ xe_rtp_table_dev_oob_test ================
[01:26:27] [PASSED] device_oob_was/22010954014
[01:26:27] [PASSED] device_oob_was/15015404425
[01:26:27] [PASSED] device_oob_was/22019338487_display
[01:26:27] [PASSED] device_oob_was/14022085890
[01:26:27] [PASSED] device_oob_was/14026539277
[01:26:27] [PASSED] device_oob_was/14026633728
[01:26:27] [PASSED] device_oob_was/14026746987
[01:26:27] [PASSED] device_oob_was/14026779378
[01:26:27] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[01:26:27] ========== xe_rtp_table_missing_upper_bound_test ==========
[01:26:27] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[01:26:27] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[01:26:27] [PASSED] register_whitelist/1806527549
[01:26:27] [PASSED] register_whitelist/allow_read_ctx_timestamp
[01:26:27] [PASSED] register_whitelist/allow_read_queue_timestamp
[01:26:27] [PASSED] register_whitelist/16014440446
[01:26:27] [PASSED] register_whitelist/16017236439
[01:26:27] [PASSED] register_whitelist/16020183090
[01:26:27] [PASSED] register_whitelist/14024997852
[01:26:27] [PASSED] register_whitelist/14024997852
[01:26:27] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[01:26:27] =============== [PASSED] xe_rtp_tables_test ================
[01:26:27] =================== xe_rtp (3 subtests) ====================
[01:26:27] =================== xe_rtp_rules_tests ====================
[01:26:27] [PASSED] no
[01:26:27] [PASSED] yes
[01:26:27] [PASSED] no-and-no
[01:26:27] [PASSED] no-and-yes
[01:26:27] [PASSED] yes-and-no
[01:26:27] [PASSED] yes-and-yes
[01:26:27] [PASSED] no-or-no
[01:26:27] [PASSED] no-or-yes
[01:26:27] [PASSED] yes-or-no
[01:26:27] [PASSED] yes-or-yes
[01:26:27] [PASSED] no-yes-or-yes-no
[01:26:27] [PASSED] no-yes-or-yes-yes
[01:26:27] [PASSED] yes-yes-or-no-yes
[01:26:27] [PASSED] yes-yes-or-yes-yes
[01:26:27] [PASSED] no-no-or-yes-or-no
[01:26:27] [PASSED] or
[01:26:27] [PASSED] or-yes
[01:26:27] [PASSED] or-no
[01:26:27] [PASSED] yes-or
[01:26:27] [PASSED] no-or
[01:26:27] [PASSED] no-or-or-yes
[01:26:27] [PASSED] yes-or-or-no
[01:26:27] [PASSED] no-or-or-no
[01:26:27] [PASSED] missing-context-engine-class
[01:26:27] [PASSED] missing-context-engine-class-or-yes
[01:26:27] [PASSED] missing-context-engine-class-or-or-yes
[01:26:27] =============== [PASSED] xe_rtp_rules_tests ================
[01:26:27] =============== xe_rtp_process_to_sr_tests ================
[01:26:27] [PASSED] coalesce-same-reg
[01:26:27] [PASSED] coalesce-same-reg-literal-and-func
[01:26:27] [PASSED] no-match-no-add
[01:26:27] [PASSED] two-regs-two-entries
[01:26:27] [PASSED] clr-one-set-other
[01:26:27] [PASSED] set-field
[01:26:27] [PASSED] conflict-duplicate
[01:26:27] [PASSED] conflict-not-disjoint
[01:26:27] [PASSED] conflict-not-disjoint-literal-and-func
[01:26:27] [PASSED] conflict-reg-type
[01:26:27] [PASSED] bad-mcr-reg-forced-to-regular
[01:26:27] [PASSED] bad-regular-reg-forced-to-mcr
[01:26:27] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[01:26:27] ================== xe_rtp_process_tests ===================
[01:26:27] [PASSED] active1
[01:26:27] [PASSED] active2
[01:26:27] [PASSED] active-inactive
[01:26:27] [PASSED] inactive-active
[01:26:27] [PASSED] inactive-active-inactive
[01:26:27] [PASSED] inactive-inactive-inactive
[01:26:27] ============== [PASSED] xe_rtp_process_tests ===============
[01:26:27] ===================== [PASSED] xe_rtp ======================
[01:26:27] ==================== xe_wa (1 subtest) =====================
[01:26:27] ======================== xe_wa_gt =========================
[01:26:27] [PASSED] TIGERLAKE B0
[01:26:27] [PASSED] DG1 A0
[01:26:27] [PASSED] DG1 B0
[01:26:27] [PASSED] ALDERLAKE_S A0
[01:26:27] [PASSED] ALDERLAKE_S B0
[01:26:27] [PASSED] ALDERLAKE_S C0
[01:26:27] [PASSED] ALDERLAKE_S D0
[01:26:27] [PASSED] ALDERLAKE_P A0
[01:26:27] [PASSED] ALDERLAKE_P B0
[01:26:27] [PASSED] ALDERLAKE_P C0
[01:26:27] [PASSED] ALDERLAKE_S RPLS D0
[01:26:27] [PASSED] ALDERLAKE_P RPLU E0
[01:26:27] [PASSED] DG2 G10 C0
[01:26:27] [PASSED] DG2 G11 B1
[01:26:27] [PASSED] DG2 G12 A1
[01:26:27] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[01:26:27] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[01:26:27] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[01:26:27] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[01:26:27] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[01:26:27] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[01:26:27] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[01:26:27] ==================== [PASSED] xe_wa_gt =====================
[01:26:27] ====================== [PASSED] xe_wa ======================
[01:26:27] ============================================================
[01:26:27] Testing complete. Ran 742 tests: passed: 724, skipped: 18
[01:26:27] Elapsed time: 36.702s total, 4.332s configuring, 31.705s building, 0.635s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[01:26:27] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[01:26:29] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[01:26:54] Starting KUnit Kernel (1/1)...
[01:26:54] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[01:26:54] ============ drm_test_pick_cmdline (2 subtests) ============
[01:26:54] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[01:26:54] =============== drm_test_pick_cmdline_named ===============
[01:26:54] [PASSED] NTSC
[01:26:54] [PASSED] NTSC-J
[01:26:54] [PASSED] PAL
[01:26:54] [PASSED] PAL-M
[01:26:54] =========== [PASSED] drm_test_pick_cmdline_named ===========
[01:26:54] ============== [PASSED] drm_test_pick_cmdline ==============
[01:26:54] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[01:26:54] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[01:26:54] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[01:26:54] =========== drm_validate_clone_mode (2 subtests) ===========
[01:26:54] ============== drm_test_check_in_clone_mode ===============
[01:26:54] [PASSED] in_clone_mode
[01:26:54] [PASSED] not_in_clone_mode
[01:26:54] ========== [PASSED] drm_test_check_in_clone_mode ===========
[01:26:54] =============== drm_test_check_valid_clones ===============
[01:26:54] [PASSED] not_in_clone_mode
[01:26:54] [PASSED] valid_clone
[01:26:54] [PASSED] invalid_clone
[01:26:54] =========== [PASSED] drm_test_check_valid_clones ===========
[01:26:54] ============= [PASSED] drm_validate_clone_mode =============
[01:26:54] ============= drm_validate_modeset (1 subtest) =============
[01:26:54] [PASSED] drm_test_check_connector_changed_modeset
[01:26:54] ============== [PASSED] drm_validate_modeset ===============
[01:26:54] ====== drm_test_bridge_get_current_state (1 subtest) =======
[01:26:54] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[01:26:54] ======== [PASSED] drm_test_bridge_get_current_state ========
[01:26:54] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[01:26:54] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[01:26:54] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[01:26:54] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[01:26:54] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[01:26:54] ============== drm_bridge_alloc (2 subtests) ===============
[01:26:54] [PASSED] drm_test_drm_bridge_alloc_basic
[01:26:54] [PASSED] drm_test_drm_bridge_alloc_get_put
[01:26:54] ================ [PASSED] drm_bridge_alloc =================
[01:26:54] ============= drm_bridge_bus_fmt (5 subtests) ==============
[01:26:54] [PASSED] drm_test_bridge_rgb_yuv_rgb
[01:26:54] [PASSED] drm_test_bridge_must_convert_to_yuv444
[01:26:54] [PASSED] drm_test_bridge_hdmi_auto_rgb
[01:26:54] [PASSED] drm_test_bridge_auto_first
[01:26:54] [PASSED] drm_test_bridge_rgb_yuv_no_path
[01:26:54] =============== [PASSED] drm_bridge_bus_fmt ================
[01:26:54] ============= drm_cmdline_parser (40 subtests) =============
[01:26:54] [PASSED] drm_test_cmdline_force_d_only
[01:26:54] [PASSED] drm_test_cmdline_force_D_only_dvi
[01:26:54] [PASSED] drm_test_cmdline_force_D_only_hdmi
[01:26:54] [PASSED] drm_test_cmdline_force_D_only_not_digital
[01:26:54] [PASSED] drm_test_cmdline_force_e_only
[01:26:54] [PASSED] drm_test_cmdline_res
[01:26:54] [PASSED] drm_test_cmdline_res_vesa
[01:26:54] [PASSED] drm_test_cmdline_res_vesa_rblank
[01:26:54] [PASSED] drm_test_cmdline_res_rblank
[01:26:54] [PASSED] drm_test_cmdline_res_bpp
[01:26:54] [PASSED] drm_test_cmdline_res_refresh
[01:26:54] [PASSED] drm_test_cmdline_res_bpp_refresh
[01:26:54] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[01:26:54] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[01:26:54] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[01:26:54] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[01:26:54] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[01:26:54] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[01:26:54] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[01:26:54] [PASSED] drm_test_cmdline_res_margins_force_on
[01:26:54] [PASSED] drm_test_cmdline_res_vesa_margins
[01:26:54] [PASSED] drm_test_cmdline_name
[01:26:54] [PASSED] drm_test_cmdline_name_bpp
[01:26:54] [PASSED] drm_test_cmdline_name_option
[01:26:54] [PASSED] drm_test_cmdline_name_bpp_option
[01:26:54] [PASSED] drm_test_cmdline_rotate_0
[01:26:54] [PASSED] drm_test_cmdline_rotate_90
[01:26:54] [PASSED] drm_test_cmdline_rotate_180
[01:26:54] [PASSED] drm_test_cmdline_rotate_270
[01:26:54] [PASSED] drm_test_cmdline_hmirror
[01:26:54] [PASSED] drm_test_cmdline_vmirror
[01:26:54] [PASSED] drm_test_cmdline_margin_options
[01:26:54] [PASSED] drm_test_cmdline_multiple_options
[01:26:54] [PASSED] drm_test_cmdline_bpp_extra_and_option
[01:26:54] [PASSED] drm_test_cmdline_extra_and_option
[01:26:54] [PASSED] drm_test_cmdline_freestanding_options
[01:26:54] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[01:26:54] [PASSED] drm_test_cmdline_panel_orientation
[01:26:54] ================ drm_test_cmdline_invalid =================
[01:26:54] [PASSED] margin_only
[01:26:54] [PASSED] interlace_only
[01:26:54] [PASSED] res_missing_x
[01:26:54] [PASSED] res_missing_y
[01:26:54] [PASSED] res_bad_y
[01:26:54] [PASSED] res_missing_y_bpp
[01:26:54] [PASSED] res_bad_bpp
[01:26:54] [PASSED] res_bad_refresh
[01:26:54] [PASSED] res_bpp_refresh_force_on_off
[01:26:54] [PASSED] res_invalid_mode
[01:26:54] [PASSED] res_bpp_wrong_place_mode
[01:26:54] [PASSED] name_bpp_refresh
[01:26:54] [PASSED] name_refresh
[01:26:54] [PASSED] name_refresh_wrong_mode
[01:26:54] [PASSED] name_refresh_invalid_mode
[01:26:54] [PASSED] rotate_multiple
[01:26:54] [PASSED] rotate_invalid_val
[01:26:54] [PASSED] rotate_truncated
[01:26:54] [PASSED] invalid_option
[01:26:54] [PASSED] invalid_tv_option
[01:26:54] [PASSED] truncated_tv_option
[01:26:54] ============ [PASSED] drm_test_cmdline_invalid =============
[01:26:54] =============== drm_test_cmdline_tv_options ===============
[01:26:54] [PASSED] NTSC
[01:26:54] [PASSED] NTSC_443
[01:26:54] [PASSED] NTSC_J
[01:26:54] [PASSED] PAL
[01:26:54] [PASSED] PAL_M
[01:26:54] [PASSED] PAL_N
[01:26:54] [PASSED] SECAM
[01:26:54] [PASSED] MONO_525
[01:26:54] [PASSED] MONO_625
[01:26:54] =========== [PASSED] drm_test_cmdline_tv_options ===========
[01:26:54] =============== [PASSED] drm_cmdline_parser ================
[01:26:54] ========== drmm_connector_hdmi_init (20 subtests) ==========
[01:26:54] [PASSED] drm_test_connector_hdmi_init_valid
[01:26:54] [PASSED] drm_test_connector_hdmi_init_bpc_8
[01:26:54] [PASSED] drm_test_connector_hdmi_init_bpc_10
[01:26:54] [PASSED] drm_test_connector_hdmi_init_bpc_12
[01:26:54] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[01:26:54] [PASSED] drm_test_connector_hdmi_init_bpc_null
[01:26:54] [PASSED] drm_test_connector_hdmi_init_formats_empty
[01:26:54] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[01:26:54] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[01:26:54] [PASSED] supported_formats=0x9 yuv420_allowed=1
[01:26:54] [PASSED] supported_formats=0x9 yuv420_allowed=0
[01:26:54] [PASSED] supported_formats=0x5 yuv420_allowed=1
[01:26:54] [PASSED] supported_formats=0x5 yuv420_allowed=0
[01:26:54] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[01:26:54] [PASSED] drm_test_connector_hdmi_init_null_ddc
[01:26:54] [PASSED] drm_test_connector_hdmi_init_null_product
[01:26:54] [PASSED] drm_test_connector_hdmi_init_null_vendor
[01:26:54] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[01:26:54] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[01:26:54] [PASSED] drm_test_connector_hdmi_init_product_valid
[01:26:54] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[01:26:54] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[01:26:54] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[01:26:54] ========= drm_test_connector_hdmi_init_type_valid =========
[01:26:54] [PASSED] HDMI-A
[01:26:54] [PASSED] HDMI-B
[01:26:54] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[01:26:54] ======== drm_test_connector_hdmi_init_type_invalid ========
[01:26:54] [PASSED] Unknown
[01:26:54] [PASSED] VGA
[01:26:54] [PASSED] DVI-I
[01:26:54] [PASSED] DVI-D
[01:26:54] [PASSED] DVI-A
[01:26:54] [PASSED] Composite
[01:26:54] [PASSED] SVIDEO
[01:26:54] [PASSED] LVDS
[01:26:54] [PASSED] Component
[01:26:54] [PASSED] DIN
[01:26:54] [PASSED] DP
[01:26:54] [PASSED] TV
[01:26:54] [PASSED] eDP
[01:26:54] [PASSED] Virtual
[01:26:54] [PASSED] DSI
[01:26:54] [PASSED] DPI
[01:26:54] [PASSED] Writeback
[01:26:54] [PASSED] SPI
[01:26:54] [PASSED] USB
[01:26:54] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[01:26:54] ============ [PASSED] drmm_connector_hdmi_init =============
[01:26:54] ============= drmm_connector_init (3 subtests) =============
[01:26:54] [PASSED] drm_test_drmm_connector_init
[01:26:54] [PASSED] drm_test_drmm_connector_init_null_ddc
[01:26:54] ========= drm_test_drmm_connector_init_type_valid =========
[01:26:54] [PASSED] Unknown
[01:26:54] [PASSED] VGA
[01:26:54] [PASSED] DVI-I
[01:26:54] [PASSED] DVI-D
[01:26:54] [PASSED] DVI-A
[01:26:54] [PASSED] Composite
[01:26:54] [PASSED] SVIDEO
[01:26:54] [PASSED] LVDS
[01:26:54] [PASSED] Component
[01:26:54] [PASSED] DIN
[01:26:54] [PASSED] DP
[01:26:54] [PASSED] HDMI-A
[01:26:54] [PASSED] HDMI-B
[01:26:54] [PASSED] TV
[01:26:54] [PASSED] eDP
[01:26:54] [PASSED] Virtual
[01:26:54] [PASSED] DSI
[01:26:54] [PASSED] DPI
[01:26:54] [PASSED] Writeback
[01:26:54] [PASSED] SPI
[01:26:54] [PASSED] USB
[01:26:54] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[01:26:54] =============== [PASSED] drmm_connector_init ===============
[01:26:54] ========= drm_connector_dynamic_init (6 subtests) ==========
[01:26:54] [PASSED] drm_test_drm_connector_dynamic_init
[01:26:54] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[01:26:54] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[01:26:54] [PASSED] drm_test_drm_connector_dynamic_init_properties
[01:26:54] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[01:26:54] [PASSED] Unknown
[01:26:54] [PASSED] VGA
[01:26:54] [PASSED] DVI-I
[01:26:54] [PASSED] DVI-D
[01:26:54] [PASSED] DVI-A
[01:26:54] [PASSED] Composite
[01:26:54] [PASSED] SVIDEO
[01:26:54] [PASSED] LVDS
[01:26:54] [PASSED] Component
[01:26:54] [PASSED] DIN
[01:26:54] [PASSED] DP
[01:26:54] [PASSED] HDMI-A
[01:26:54] [PASSED] HDMI-B
[01:26:54] [PASSED] TV
[01:26:54] [PASSED] eDP
[01:26:54] [PASSED] Virtual
[01:26:54] [PASSED] DSI
[01:26:54] [PASSED] DPI
[01:26:54] [PASSED] Writeback
[01:26:54] [PASSED] SPI
[01:26:54] [PASSED] USB
[01:26:54] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[01:26:54] ======== drm_test_drm_connector_dynamic_init_name =========
[01:26:54] [PASSED] Unknown
[01:26:54] [PASSED] VGA
[01:26:54] [PASSED] DVI-I
[01:26:54] [PASSED] DVI-D
[01:26:54] [PASSED] DVI-A
[01:26:54] [PASSED] Composite
[01:26:54] [PASSED] SVIDEO
[01:26:54] [PASSED] LVDS
[01:26:54] [PASSED] Component
[01:26:54] [PASSED] DIN
[01:26:54] [PASSED] DP
[01:26:54] [PASSED] HDMI-A
[01:26:54] [PASSED] HDMI-B
[01:26:54] [PASSED] TV
[01:26:54] [PASSED] eDP
[01:26:54] [PASSED] Virtual
[01:26:54] [PASSED] DSI
[01:26:54] [PASSED] DPI
[01:26:54] [PASSED] Writeback
[01:26:54] [PASSED] SPI
[01:26:54] [PASSED] USB
[01:26:54] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[01:26:54] =========== [PASSED] drm_connector_dynamic_init ============
[01:26:54] ==== drm_connector_dynamic_register_early (4 subtests) =====
[01:26:54] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[01:26:54] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[01:26:54] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[01:26:54] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[01:26:54] ====== [PASSED] drm_connector_dynamic_register_early =======
[01:26:54] ======= drm_connector_dynamic_register (7 subtests) ========
[01:26:54] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[01:26:54] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[01:26:54] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[01:26:54] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[01:26:54] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[01:26:54] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[01:26:54] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[01:26:54] ========= [PASSED] drm_connector_dynamic_register ==========
[01:26:54] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[01:26:54] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[01:26:54] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[01:26:54] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[01:26:54] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[01:26:54] ========== drm_test_get_tv_mode_from_name_valid ===========
[01:26:54] [PASSED] NTSC
[01:26:54] [PASSED] NTSC-443
[01:26:54] [PASSED] NTSC-J
[01:26:54] [PASSED] PAL
[01:26:54] [PASSED] PAL-M
[01:26:54] [PASSED] PAL-N
[01:26:54] [PASSED] SECAM
[01:26:54] [PASSED] Mono
[01:26:54] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[01:26:54] [PASSED] drm_test_get_tv_mode_from_name_truncated
[01:26:54] ============ [PASSED] drm_get_tv_mode_from_name ============
[01:26:54] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[01:26:54] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[01:26:54] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[01:26:54] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[01:26:54] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[01:26:54] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[01:26:54] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[01:26:54] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[01:26:54] [PASSED] VIC 96
[01:26:54] [PASSED] VIC 97
[01:26:54] [PASSED] VIC 101
[01:26:54] [PASSED] VIC 102
[01:26:54] [PASSED] VIC 106
[01:26:54] [PASSED] VIC 107
[01:26:54] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[01:26:54] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[01:26:54] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[01:26:54] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[01:26:54] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[01:26:54] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[01:26:54] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[01:26:54] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[01:26:54] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[01:26:54] [PASSED] Automatic
[01:26:54] [PASSED] Full
[01:26:54] [PASSED] Limited 16:235
[01:26:54] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[01:26:54] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[01:26:54] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[01:26:54] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[01:26:54] === drm_test_drm_hdmi_connector_get_output_format_name ====
[01:26:54] [PASSED] RGB
[01:26:54] [PASSED] YUV 4:2:0
[01:26:54] [PASSED] YUV 4:2:2
[01:26:54] [PASSED] YUV 4:4:4
[01:26:54] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[01:26:54] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[01:26:54] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[01:26:54] ============= drm_damage_helper (21 subtests) ==============
[01:26:54] [PASSED] drm_test_damage_iter_no_damage
[01:26:54] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[01:26:54] [PASSED] drm_test_damage_iter_no_damage_src_moved
[01:26:54] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[01:26:54] [PASSED] drm_test_damage_iter_no_damage_not_visible
[01:26:54] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[01:26:54] [PASSED] drm_test_damage_iter_no_damage_no_fb
[01:26:54] [PASSED] drm_test_damage_iter_simple_damage
[01:26:54] [PASSED] drm_test_damage_iter_single_damage
[01:26:54] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[01:26:54] [PASSED] drm_test_damage_iter_single_damage_outside_src
[01:26:54] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[01:26:54] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[01:26:54] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[01:26:54] [PASSED] drm_test_damage_iter_single_damage_src_moved
[01:26:54] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[01:26:54] [PASSED] drm_test_damage_iter_damage
[01:26:54] [PASSED] drm_test_damage_iter_damage_one_intersect
[01:26:54] [PASSED] drm_test_damage_iter_damage_one_outside
[01:26:54] [PASSED] drm_test_damage_iter_damage_src_moved
[01:26:54] [PASSED] drm_test_damage_iter_damage_not_visible
[01:26:54] ================ [PASSED] drm_damage_helper ================
[01:26:54] ============== drm_dp_mst_helper (3 subtests) ==============
[01:26:54] ============== drm_test_dp_mst_calc_pbn_mode ==============
[01:26:54] [PASSED] Clock 154000 BPP 30 DSC disabled
[01:26:54] [PASSED] Clock 234000 BPP 30 DSC disabled
[01:26:54] [PASSED] Clock 297000 BPP 24 DSC disabled
[01:26:54] [PASSED] Clock 332880 BPP 24 DSC enabled
[01:26:54] [PASSED] Clock 324540 BPP 24 DSC enabled
[01:26:54] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[01:26:54] ============== drm_test_dp_mst_calc_pbn_div ===============
[01:26:54] [PASSED] Link rate 2000000 lane count 4
[01:26:54] [PASSED] Link rate 2000000 lane count 2
[01:26:54] [PASSED] Link rate 2000000 lane count 1
[01:26:54] [PASSED] Link rate 1350000 lane count 4
[01:26:54] [PASSED] Link rate 1350000 lane count 2
[01:26:54] [PASSED] Link rate 1350000 lane count 1
[01:26:54] [PASSED] Link rate 1000000 lane count 4
[01:26:54] [PASSED] Link rate 1000000 lane count 2
[01:26:54] [PASSED] Link rate 1000000 lane count 1
[01:26:54] [PASSED] Link rate 810000 lane count 4
[01:26:54] [PASSED] Link rate 810000 lane count 2
[01:26:54] [PASSED] Link rate 810000 lane count 1
[01:26:54] [PASSED] Link rate 540000 lane count 4
[01:26:54] [PASSED] Link rate 540000 lane count 2
[01:26:54] [PASSED] Link rate 540000 lane count 1
[01:26:54] [PASSED] Link rate 270000 lane count 4
[01:26:54] [PASSED] Link rate 270000 lane count 2
[01:26:54] [PASSED] Link rate 270000 lane count 1
[01:26:54] [PASSED] Link rate 162000 lane count 4
[01:26:54] [PASSED] Link rate 162000 lane count 2
[01:26:54] [PASSED] Link rate 162000 lane count 1
[01:26:54] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[01:26:54] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[01:26:54] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[01:26:54] [PASSED] DP_POWER_UP_PHY with port number
[01:26:54] [PASSED] DP_POWER_DOWN_PHY with port number
[01:26:54] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[01:26:54] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[01:26:54] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[01:26:54] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[01:26:54] [PASSED] DP_QUERY_PAYLOAD with port number
[01:26:54] [PASSED] DP_QUERY_PAYLOAD with VCPI
[01:26:54] [PASSED] DP_REMOTE_DPCD_READ with port number
[01:26:54] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[01:26:54] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[01:26:54] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[01:26:54] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[01:26:54] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[01:26:54] [PASSED] DP_REMOTE_I2C_READ with port number
[01:26:54] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[01:26:54] [PASSED] DP_REMOTE_I2C_READ with transactions array
[01:26:54] [PASSED] DP_REMOTE_I2C_WRITE with port number
[01:26:54] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[01:26:54] [PASSED] DP_REMOTE_I2C_WRITE with data array
[01:26:54] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[01:26:54] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[01:26:54] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[01:26:54] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[01:26:54] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[01:26:54] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[01:26:54] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[01:26:54] ================ [PASSED] drm_dp_mst_helper ================
[01:26:54] ================== drm_exec (7 subtests) ===================
[01:26:54] [PASSED] sanitycheck
[01:26:54] [PASSED] test_lock
[01:26:54] [PASSED] test_lock_unlock
[01:26:54] [PASSED] test_duplicates
[01:26:54] [PASSED] test_prepare
[01:26:54] [PASSED] test_prepare_array
[01:26:54] [PASSED] test_multiple_loops
[01:26:54] ==================== [PASSED] drm_exec =====================
[01:26:54] =========== drm_format_helper_test (17 subtests) ===========
[01:26:54] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[01:26:54] [PASSED] single_pixel_source_buffer
[01:26:54] [PASSED] single_pixel_clip_rectangle
[01:26:54] [PASSED] well_known_colors
[01:26:54] [PASSED] destination_pitch
[01:26:54] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[01:26:54] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[01:26:54] [PASSED] single_pixel_source_buffer
[01:26:54] [PASSED] single_pixel_clip_rectangle
[01:26:54] [PASSED] well_known_colors
[01:26:54] [PASSED] destination_pitch
[01:26:54] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[01:26:54] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[01:26:54] [PASSED] single_pixel_source_buffer
[01:26:54] [PASSED] single_pixel_clip_rectangle
[01:26:54] [PASSED] well_known_colors
[01:26:54] [PASSED] destination_pitch
[01:26:54] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[01:26:54] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[01:26:54] [PASSED] single_pixel_source_buffer
[01:26:54] [PASSED] single_pixel_clip_rectangle
[01:26:54] [PASSED] well_known_colors
[01:26:54] [PASSED] destination_pitch
[01:26:54] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[01:26:54] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[01:26:54] [PASSED] single_pixel_source_buffer
[01:26:54] [PASSED] single_pixel_clip_rectangle
[01:26:54] [PASSED] well_known_colors
[01:26:54] [PASSED] destination_pitch
[01:26:54] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[01:26:54] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[01:26:54] [PASSED] single_pixel_source_buffer
[01:26:54] [PASSED] single_pixel_clip_rectangle
[01:26:54] [PASSED] well_known_colors
[01:26:54] [PASSED] destination_pitch
[01:26:54] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[01:26:54] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[01:26:54] [PASSED] single_pixel_source_buffer
[01:26:54] [PASSED] single_pixel_clip_rectangle
[01:26:54] [PASSED] well_known_colors
[01:26:54] [PASSED] destination_pitch
[01:26:54] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[01:26:54] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[01:26:54] [PASSED] single_pixel_source_buffer
[01:26:54] [PASSED] single_pixel_clip_rectangle
[01:26:54] [PASSED] well_known_colors
[01:26:54] [PASSED] destination_pitch
[01:26:54] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[01:26:54] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[01:26:54] [PASSED] single_pixel_source_buffer
[01:26:54] [PASSED] single_pixel_clip_rectangle
[01:26:54] [PASSED] well_known_colors
[01:26:54] [PASSED] destination_pitch
[01:26:54] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[01:26:54] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[01:26:54] [PASSED] single_pixel_source_buffer
[01:26:54] [PASSED] single_pixel_clip_rectangle
[01:26:54] [PASSED] well_known_colors
[01:26:54] [PASSED] destination_pitch
[01:26:54] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[01:26:54] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[01:26:54] [PASSED] single_pixel_source_buffer
[01:26:54] [PASSED] single_pixel_clip_rectangle
[01:26:54] [PASSED] well_known_colors
[01:26:54] [PASSED] destination_pitch
[01:26:54] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[01:26:54] ============== drm_test_fb_xrgb8888_to_mono ===============
[01:26:54] [PASSED] single_pixel_source_buffer
[01:26:54] [PASSED] single_pixel_clip_rectangle
[01:26:54] [PASSED] well_known_colors
[01:26:54] [PASSED] destination_pitch
[01:26:54] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[01:26:54] ==================== drm_test_fb_swab =====================
[01:26:54] [PASSED] single_pixel_source_buffer
[01:26:54] [PASSED] single_pixel_clip_rectangle
[01:26:54] [PASSED] well_known_colors
[01:26:54] [PASSED] destination_pitch
[01:26:54] ================ [PASSED] drm_test_fb_swab =================
[01:26:54] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[01:26:54] [PASSED] single_pixel_source_buffer
[01:26:54] [PASSED] single_pixel_clip_rectangle
[01:26:54] [PASSED] well_known_colors
[01:26:54] [PASSED] destination_pitch
[01:26:54] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[01:26:54] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[01:26:54] [PASSED] single_pixel_source_buffer
[01:26:54] [PASSED] single_pixel_clip_rectangle
[01:26:54] [PASSED] well_known_colors
[01:26:54] [PASSED] destination_pitch
[01:26:54] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[01:26:54] ================= drm_test_fb_clip_offset =================
[01:26:54] [PASSED] pass through
[01:26:54] [PASSED] horizontal offset
[01:26:54] [PASSED] vertical offset
[01:26:54] [PASSED] horizontal and vertical offset
[01:26:54] [PASSED] horizontal offset (custom pitch)
[01:26:54] [PASSED] vertical offset (custom pitch)
[01:26:54] [PASSED] horizontal and vertical offset (custom pitch)
[01:26:54] ============= [PASSED] drm_test_fb_clip_offset =============
[01:26:54] =================== drm_test_fb_memcpy ====================
[01:26:54] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[01:26:54] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[01:26:54] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[01:26:54] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[01:26:54] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[01:26:54] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[01:26:54] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[01:26:54] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[01:26:54] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[01:26:54] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[01:26:54] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[01:26:54] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[01:26:54] =============== [PASSED] drm_test_fb_memcpy ================
[01:26:54] ============= [PASSED] drm_format_helper_test ==============
[01:26:54] ================= drm_format (18 subtests) =================
[01:26:54] [PASSED] drm_test_format_block_width_invalid
[01:26:54] [PASSED] drm_test_format_block_width_one_plane
[01:26:54] [PASSED] drm_test_format_block_width_two_plane
[01:26:54] [PASSED] drm_test_format_block_width_three_plane
[01:26:54] [PASSED] drm_test_format_block_width_tiled
[01:26:54] [PASSED] drm_test_format_block_height_invalid
[01:26:54] [PASSED] drm_test_format_block_height_one_plane
[01:26:54] [PASSED] drm_test_format_block_height_two_plane
[01:26:54] [PASSED] drm_test_format_block_height_three_plane
[01:26:54] [PASSED] drm_test_format_block_height_tiled
[01:26:54] [PASSED] drm_test_format_min_pitch_invalid
[01:26:54] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[01:26:54] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[01:26:54] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[01:26:54] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[01:26:54] [PASSED] drm_test_format_min_pitch_two_plane
[01:26:54] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[01:26:54] [PASSED] drm_test_format_min_pitch_tiled
[01:26:54] =================== [PASSED] drm_format ====================
[01:26:54] ============== drm_framebuffer (10 subtests) ===============
[01:26:54] ========== drm_test_framebuffer_check_src_coords ==========
[01:26:54] [PASSED] Success: source fits into fb
[01:26:54] [PASSED] Fail: overflowing fb with x-axis coordinate
[01:26:54] [PASSED] Fail: overflowing fb with y-axis coordinate
[01:26:54] [PASSED] Fail: overflowing fb with source width
[01:26:54] [PASSED] Fail: overflowing fb with source height
[01:26:54] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[01:26:54] [PASSED] drm_test_framebuffer_cleanup
[01:26:54] =============== drm_test_framebuffer_create ===============
[01:26:54] [PASSED] ABGR8888 normal sizes
[01:26:54] [PASSED] ABGR8888 max sizes
[01:26:54] [PASSED] ABGR8888 pitch greater than min required
[01:26:54] [PASSED] ABGR8888 pitch less than min required
[01:26:54] [PASSED] ABGR8888 Invalid width
[01:26:54] [PASSED] ABGR8888 Invalid buffer handle
[01:26:54] [PASSED] No pixel format
[01:26:54] [PASSED] ABGR8888 Width 0
[01:26:54] [PASSED] ABGR8888 Height 0
[01:26:54] [PASSED] ABGR8888 Out of bound height * pitch combination
[01:26:54] [PASSED] ABGR8888 Large buffer offset
[01:26:54] [PASSED] ABGR8888 Buffer offset for inexistent plane
[01:26:54] [PASSED] ABGR8888 Invalid flag
[01:26:54] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[01:26:54] [PASSED] ABGR8888 Valid buffer modifier
[01:26:54] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[01:26:54] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[01:26:54] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[01:26:54] [PASSED] NV12 Normal sizes
[01:26:54] [PASSED] NV12 Max sizes
[01:26:54] [PASSED] NV12 Invalid pitch
[01:26:54] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[01:26:54] [PASSED] NV12 different modifier per-plane
[01:26:54] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[01:26:54] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[01:26:54] [PASSED] NV12 Modifier for inexistent plane
[01:26:54] [PASSED] NV12 Handle for inexistent plane
[01:26:54] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[01:26:54] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[01:26:54] [PASSED] YVU420 Normal sizes
[01:26:54] [PASSED] YVU420 Max sizes
[01:26:54] [PASSED] YVU420 Invalid pitch
[01:26:54] [PASSED] YVU420 Different pitches
[01:26:54] [PASSED] YVU420 Different buffer offsets/pitches
[01:26:54] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[01:26:54] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[01:26:54] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[01:26:54] [PASSED] YVU420 Valid modifier
[01:26:54] [PASSED] YVU420 Different modifiers per plane
[01:26:54] [PASSED] YVU420 Modifier for inexistent plane
[01:26:54] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[01:26:54] [PASSED] X0L2 Normal sizes
[01:26:54] [PASSED] X0L2 Max sizes
[01:26:54] [PASSED] X0L2 Invalid pitch
[01:26:54] [PASSED] X0L2 Pitch greater than minimum required
[01:26:54] [PASSED] X0L2 Handle for inexistent plane
[01:26:54] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[01:26:54] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[01:26:54] [PASSED] X0L2 Valid modifier
[01:26:54] [PASSED] X0L2 Modifier for inexistent plane
[01:26:54] =========== [PASSED] drm_test_framebuffer_create ===========
[01:26:54] [PASSED] drm_test_framebuffer_free
[01:26:54] [PASSED] drm_test_framebuffer_init
[01:26:54] [PASSED] drm_test_framebuffer_init_bad_format
[01:26:54] [PASSED] drm_test_framebuffer_init_dev_mismatch
[01:26:54] [PASSED] drm_test_framebuffer_lookup
[01:26:54] [PASSED] drm_test_framebuffer_lookup_inexistent
[01:26:54] [PASSED] drm_test_framebuffer_modifiers_not_supported
[01:26:54] ================= [PASSED] drm_framebuffer =================
[01:26:54] ================ drm_gem_shmem (8 subtests) ================
[01:26:54] [PASSED] drm_gem_shmem_test_obj_create
[01:26:54] [PASSED] drm_gem_shmem_test_obj_create_private
[01:26:54] [PASSED] drm_gem_shmem_test_pin_pages
[01:26:54] [PASSED] drm_gem_shmem_test_vmap
[01:26:54] [PASSED] drm_gem_shmem_test_get_sg_table
[01:26:54] [PASSED] drm_gem_shmem_test_get_pages_sgt
[01:26:54] [PASSED] drm_gem_shmem_test_madvise
[01:26:54] [PASSED] drm_gem_shmem_test_purge
[01:26:54] ================== [PASSED] drm_gem_shmem ==================
[01:26:54] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[01:26:54] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[01:26:54] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[01:26:54] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[01:26:54] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[01:26:54] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[01:26:54] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[01:26:54] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[01:26:54] [PASSED] Automatic
[01:26:54] [PASSED] Full
[01:26:54] [PASSED] Limited 16:235
[01:26:54] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[01:26:54] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[01:26:54] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[01:26:54] [PASSED] drm_test_check_disable_connector
[01:26:54] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[01:26:54] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[01:26:54] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[01:26:54] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[01:26:54] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[01:26:54] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[01:26:54] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[01:26:54] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[01:26:54] [PASSED] drm_test_check_output_bpc_dvi
[01:26:54] [PASSED] drm_test_check_output_bpc_format_vic_1
[01:26:54] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[01:26:54] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[01:26:54] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[01:26:54] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[01:26:54] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[01:26:54] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[01:26:54] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[01:26:54] ============ drm_test_check_hdmi_color_format =============
[01:26:54] [PASSED] AUTO -> RGB
[01:26:54] [PASSED] YCBCR422 -> YUV422
[01:26:54] [PASSED] YCBCR420 -> YUV420
[01:26:54] [PASSED] YCBCR444 -> YUV444
[01:26:54] [PASSED] RGB -> RGB
[01:26:54] ======== [PASSED] drm_test_check_hdmi_color_format =========
[01:26:54] ======== drm_test_check_hdmi_color_format_420_only ========
[01:26:54] [PASSED] RGB should fail
[01:26:54] [PASSED] YUV444 should fail
[01:26:54] [PASSED] YUV422 should fail
[01:26:54] [PASSED] YUV420 should work
[01:26:54] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[01:26:54] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[01:26:54] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[01:26:54] [PASSED] drm_test_check_broadcast_rgb_value
[01:26:54] [PASSED] drm_test_check_bpc_8_value
[01:26:54] [PASSED] drm_test_check_bpc_10_value
[01:26:54] [PASSED] drm_test_check_bpc_12_value
[01:26:54] [PASSED] drm_test_check_format_value
[01:26:54] [PASSED] drm_test_check_tmds_char_value
[01:26:54] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[01:26:54] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[01:26:54] [PASSED] drm_test_check_mode_valid
[01:26:54] [PASSED] drm_test_check_mode_valid_reject
[01:26:54] [PASSED] drm_test_check_mode_valid_reject_rate
[01:26:54] [PASSED] drm_test_check_mode_valid_reject_max_clock
[01:26:54] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[01:26:54] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[01:26:54] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[01:26:54] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[01:26:54] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[01:26:54] [PASSED] drm_test_check_infoframes
[01:26:54] [PASSED] drm_test_check_reject_avi_infoframe
[01:26:54] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[01:26:54] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[01:26:54] [PASSED] drm_test_check_reject_audio_infoframe
[01:26:54] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[01:26:54] ================= drm_managed (2 subtests) =================
[01:26:54] [PASSED] drm_test_managed_release_action
[01:26:54] [PASSED] drm_test_managed_run_action
[01:26:54] =================== [PASSED] drm_managed ===================
[01:26:54] =================== drm_mm (6 subtests) ====================
[01:26:54] [PASSED] drm_test_mm_init
[01:26:54] [PASSED] drm_test_mm_debug
[01:26:54] [PASSED] drm_test_mm_align32
[01:26:54] [PASSED] drm_test_mm_align64
[01:26:54] [PASSED] drm_test_mm_lowest
[01:26:54] [PASSED] drm_test_mm_highest
[01:26:54] ===================== [PASSED] drm_mm ======================
[01:26:54] ============= drm_modes_analog_tv (5 subtests) =============
[01:26:54] [PASSED] drm_test_modes_analog_tv_mono_576i
[01:26:54] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[01:26:54] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[01:26:54] [PASSED] drm_test_modes_analog_tv_pal_576i
[01:26:54] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[01:26:54] =============== [PASSED] drm_modes_analog_tv ===============
[01:26:54] ============== drm_plane_helper (2 subtests) ===============
[01:26:54] =============== drm_test_check_plane_state ================
[01:26:54] [PASSED] clipping_simple
[01:26:54] [PASSED] clipping_rotate_reflect
[01:26:54] [PASSED] positioning_simple
[01:26:54] [PASSED] upscaling
[01:26:54] [PASSED] downscaling
[01:26:54] [PASSED] rounding1
[01:26:54] [PASSED] rounding2
[01:26:54] [PASSED] rounding3
[01:26:54] [PASSED] rounding4
[01:26:54] =========== [PASSED] drm_test_check_plane_state ============
[01:26:54] =========== drm_test_check_invalid_plane_state ============
[01:26:54] [PASSED] positioning_invalid
[01:26:54] [PASSED] upscaling_invalid
[01:26:54] [PASSED] downscaling_invalid
[01:26:54] ======= [PASSED] drm_test_check_invalid_plane_state ========
[01:26:54] ================ [PASSED] drm_plane_helper =================
[01:26:54] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[01:26:54] ====== drm_test_connector_helper_tv_get_modes_check =======
[01:26:54] [PASSED] None
[01:26:54] [PASSED] PAL
[01:26:54] [PASSED] NTSC
[01:26:54] [PASSED] Both, NTSC Default
[01:26:54] [PASSED] Both, PAL Default
[01:26:54] [PASSED] Both, NTSC Default, with PAL on command-line
[01:26:54] [PASSED] Both, PAL Default, with NTSC on command-line
[01:26:54] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[01:26:54] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[01:26:54] ================== drm_rect (9 subtests) ===================
[01:26:54] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[01:26:54] [PASSED] drm_test_rect_clip_scaled_not_clipped
[01:26:54] [PASSED] drm_test_rect_clip_scaled_clipped
[01:26:54] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[01:26:54] ================= drm_test_rect_intersect =================
[01:26:54] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[01:26:54] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[01:26:54] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[01:26:54] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[01:26:54] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[01:26:54] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[01:26:54] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[01:26:54] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[01:26:54] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[01:26:54] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[01:26:54] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[01:26:54] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[01:26:54] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[01:26:54] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[01:26:54] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[01:26:54] ============= [PASSED] drm_test_rect_intersect =============
[01:26:54] ================ drm_test_rect_calc_hscale ================
[01:26:54] [PASSED] normal use
[01:26:54] [PASSED] out of max range
[01:26:54] [PASSED] out of min range
[01:26:54] [PASSED] zero dst
[01:26:54] [PASSED] negative src
[01:26:54] [PASSED] negative dst
[01:26:54] ============ [PASSED] drm_test_rect_calc_hscale ============
[01:26:54] ================ drm_test_rect_calc_vscale ================
[01:26:54] [PASSED] normal use
[01:26:54] [PASSED] out of max range
[01:26:54] [PASSED] out of min range
[01:26:54] [PASSED] zero dst
[01:26:54] [PASSED] negative src
[01:26:54] [PASSED] negative dst
[01:26:54] ============ [PASSED] drm_test_rect_calc_vscale ============
[01:26:54] ================== drm_test_rect_rotate ===================
[01:26:54] [PASSED] reflect-x
[01:26:54] [PASSED] reflect-y
[01:26:54] [PASSED] rotate-0
[01:26:54] [PASSED] rotate-90
[01:26:54] [PASSED] rotate-180
[01:26:54] [PASSED] rotate-270
[01:26:54] ============== [PASSED] drm_test_rect_rotate ===============
[01:26:54] ================ drm_test_rect_rotate_inv =================
[01:26:54] [PASSED] reflect-x
[01:26:54] [PASSED] reflect-y
[01:26:54] [PASSED] rotate-0
[01:26:54] [PASSED] rotate-90
[01:26:54] [PASSED] rotate-180
[01:26:54] [PASSED] rotate-270
[01:26:54] ============ [PASSED] drm_test_rect_rotate_inv =============
[01:26:54] ==================== [PASSED] drm_rect =====================
[01:26:54] ============ drm_sysfb_modeset_test (1 subtest) ============
[01:26:54] ============ drm_test_sysfb_build_fourcc_list =============
[01:26:54] [PASSED] no native formats
[01:26:54] [PASSED] XRGB8888 as native format
[01:26:54] [PASSED] remove duplicates
[01:26:54] [PASSED] convert alpha formats
[01:26:54] [PASSED] random formats
[01:26:54] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[01:26:54] ============= [PASSED] drm_sysfb_modeset_test ==============
[01:26:54] ================== drm_fixp (2 subtests) ===================
[01:26:54] [PASSED] drm_test_int2fixp
[01:26:54] [PASSED] drm_test_sm2fixp
[01:26:54] ==================== [PASSED] drm_fixp =====================
[01:26:54] ============================================================
[01:26:54] Testing complete. Ran 637 tests: passed: 637
[01:26:54] Elapsed time: 26.993s total, 1.806s configuring, 25.022s building, 0.147s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[01:26:54] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[01:26:56] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[01:27:05] Starting KUnit Kernel (1/1)...
[01:27:05] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[01:27:06] ================= ttm_device (5 subtests) ==================
[01:27:06] [PASSED] ttm_device_init_basic
[01:27:06] [PASSED] ttm_device_init_multiple
[01:27:06] [PASSED] ttm_device_fini_basic
[01:27:06] [PASSED] ttm_device_init_no_vma_man
[01:27:06] ================== ttm_device_init_pools ==================
[01:27:06] [PASSED] No DMA allocations, no DMA32 required
[01:27:06] [PASSED] DMA allocations, DMA32 required
[01:27:06] [PASSED] No DMA allocations, DMA32 required
[01:27:06] [PASSED] DMA allocations, no DMA32 required
[01:27:06] ============== [PASSED] ttm_device_init_pools ==============
[01:27:06] =================== [PASSED] ttm_device ====================
[01:27:06] ================== ttm_pool (8 subtests) ===================
[01:27:06] ================== ttm_pool_alloc_basic ===================
[01:27:06] [PASSED] One page
[01:27:06] [PASSED] More than one page
[01:27:06] [PASSED] Above the allocation limit
[01:27:06] [PASSED] One page, with coherent DMA mappings enabled
[01:27:06] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[01:27:06] ============== [PASSED] ttm_pool_alloc_basic ===============
[01:27:06] ============== ttm_pool_alloc_basic_dma_addr ==============
[01:27:06] [PASSED] One page
[01:27:06] [PASSED] More than one page
[01:27:06] [PASSED] Above the allocation limit
[01:27:06] [PASSED] One page, with coherent DMA mappings enabled
[01:27:06] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[01:27:06] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[01:27:06] [PASSED] ttm_pool_alloc_order_caching_match
[01:27:06] [PASSED] ttm_pool_alloc_caching_mismatch
[01:27:06] [PASSED] ttm_pool_alloc_order_mismatch
[01:27:06] [PASSED] ttm_pool_free_dma_alloc
[01:27:06] [PASSED] ttm_pool_free_no_dma_alloc
[01:27:06] [PASSED] ttm_pool_fini_basic
[01:27:06] ==================== [PASSED] ttm_pool =====================
[01:27:06] ================ ttm_resource (8 subtests) =================
[01:27:06] ================= ttm_resource_init_basic =================
[01:27:06] [PASSED] Init resource in TTM_PL_SYSTEM
[01:27:06] [PASSED] Init resource in TTM_PL_VRAM
[01:27:06] [PASSED] Init resource in a private placement
[01:27:06] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[01:27:06] ============= [PASSED] ttm_resource_init_basic =============
[01:27:06] [PASSED] ttm_resource_init_pinned
[01:27:06] [PASSED] ttm_resource_fini_basic
[01:27:06] [PASSED] ttm_resource_manager_init_basic
[01:27:06] [PASSED] ttm_resource_manager_usage_basic
[01:27:06] [PASSED] ttm_resource_manager_set_used_basic
[01:27:06] [PASSED] ttm_sys_man_alloc_basic
[01:27:06] [PASSED] ttm_sys_man_free_basic
[01:27:06] ================== [PASSED] ttm_resource ===================
[01:27:06] =================== ttm_tt (15 subtests) ===================
[01:27:06] ==================== ttm_tt_init_basic ====================
[01:27:06] [PASSED] Page-aligned size
[01:27:06] [PASSED] Extra pages requested
[01:27:06] ================ [PASSED] ttm_tt_init_basic ================
[01:27:06] [PASSED] ttm_tt_init_misaligned
[01:27:06] [PASSED] ttm_tt_fini_basic
[01:27:06] [PASSED] ttm_tt_fini_sg
[01:27:06] [PASSED] ttm_tt_fini_shmem
[01:27:06] [PASSED] ttm_tt_create_basic
[01:27:06] [PASSED] ttm_tt_create_invalid_bo_type
[01:27:06] [PASSED] ttm_tt_create_ttm_exists
[01:27:06] [PASSED] ttm_tt_create_failed
[01:27:06] [PASSED] ttm_tt_destroy_basic
[01:27:06] [PASSED] ttm_tt_populate_null_ttm
[01:27:06] [PASSED] ttm_tt_populate_populated_ttm
[01:27:06] [PASSED] ttm_tt_unpopulate_basic
[01:27:06] [PASSED] ttm_tt_unpopulate_empty_ttm
[01:27:06] [PASSED] ttm_tt_swapin_basic
[01:27:06] ===================== [PASSED] ttm_tt ======================
[01:27:06] =================== ttm_bo (14 subtests) ===================
[01:27:06] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[01:27:06] [PASSED] Cannot be interrupted and sleeps
[01:27:06] [PASSED] Cannot be interrupted, locks straight away
[01:27:06] [PASSED] Can be interrupted, sleeps
[01:27:06] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[01:27:06] [PASSED] ttm_bo_reserve_locked_no_sleep
[01:27:06] [PASSED] ttm_bo_reserve_no_wait_ticket
[01:27:06] [PASSED] ttm_bo_reserve_double_resv
[01:27:06] [PASSED] ttm_bo_reserve_interrupted
[01:27:06] [PASSED] ttm_bo_reserve_deadlock
[01:27:06] [PASSED] ttm_bo_unreserve_basic
[01:27:06] [PASSED] ttm_bo_unreserve_pinned
[01:27:06] [PASSED] ttm_bo_unreserve_bulk
[01:27:06] [PASSED] ttm_bo_fini_basic
[01:27:06] [PASSED] ttm_bo_fini_shared_resv
[01:27:06] [PASSED] ttm_bo_pin_basic
[01:27:06] [PASSED] ttm_bo_pin_unpin_resource
[01:27:06] [PASSED] ttm_bo_multiple_pin_one_unpin
[01:27:06] ===================== [PASSED] ttm_bo ======================
[01:27:06] ============== ttm_bo_validate (22 subtests) ===============
[01:27:06] ============== ttm_bo_init_reserved_sys_man ===============
[01:27:06] [PASSED] Buffer object for userspace
[01:27:06] [PASSED] Kernel buffer object
[01:27:06] [PASSED] Shared buffer object
[01:27:06] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[01:27:06] ============== ttm_bo_init_reserved_mock_man ==============
[01:27:06] [PASSED] Buffer object for userspace
[01:27:06] [PASSED] Kernel buffer object
[01:27:06] [PASSED] Shared buffer object
[01:27:06] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[01:27:06] [PASSED] ttm_bo_init_reserved_resv
[01:27:06] ================== ttm_bo_validate_basic ==================
[01:27:06] [PASSED] Buffer object for userspace
[01:27:06] [PASSED] Kernel buffer object
[01:27:06] [PASSED] Shared buffer object
[01:27:06] ============== [PASSED] ttm_bo_validate_basic ==============
[01:27:06] [PASSED] ttm_bo_validate_invalid_placement
[01:27:06] ============= ttm_bo_validate_same_placement ==============
[01:27:06] [PASSED] System manager
[01:27:06] [PASSED] VRAM manager
[01:27:06] ========= [PASSED] ttm_bo_validate_same_placement ==========
[01:27:06] [PASSED] ttm_bo_validate_failed_alloc
[01:27:06] [PASSED] ttm_bo_validate_pinned
[01:27:06] [PASSED] ttm_bo_validate_busy_placement
[01:27:06] ================ ttm_bo_validate_multihop =================
[01:27:06] [PASSED] Buffer object for userspace
[01:27:06] [PASSED] Kernel buffer object
[01:27:06] [PASSED] Shared buffer object
[01:27:06] ============ [PASSED] ttm_bo_validate_multihop =============
[01:27:06] ========== ttm_bo_validate_no_placement_signaled ==========
[01:27:06] [PASSED] Buffer object in system domain, no page vector
[01:27:06] [PASSED] Buffer object in system domain with an existing page vector
[01:27:06] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[01:27:06] ======== ttm_bo_validate_no_placement_not_signaled ========
[01:27:06] [PASSED] Buffer object for userspace
[01:27:06] [PASSED] Kernel buffer object
[01:27:06] [PASSED] Shared buffer object
[01:27:06] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[01:27:06] [PASSED] ttm_bo_validate_move_fence_signaled
[01:27:06] ========= ttm_bo_validate_move_fence_not_signaled =========
[01:27:06] [PASSED] Waits for GPU
[01:27:06] [PASSED] Tries to lock straight away
[01:27:06] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[01:27:06] [PASSED] ttm_bo_validate_swapout
[01:27:06] [PASSED] ttm_bo_validate_happy_evict
[01:27:06] [PASSED] ttm_bo_validate_all_pinned_evict
[01:27:06] [PASSED] ttm_bo_validate_allowed_only_evict
[01:27:06] [PASSED] ttm_bo_validate_deleted_evict
[01:27:06] [PASSED] ttm_bo_validate_busy_domain_evict
[01:27:06] [PASSED] ttm_bo_validate_evict_gutting
[01:27:06] [PASSED] ttm_bo_validate_recrusive_evict
[01:27:06] ================= [PASSED] ttm_bo_validate =================
[01:27:06] ============================================================
[01:27:06] Testing complete. Ran 102 tests: passed: 102
[01:27:06] Elapsed time: 11.761s total, 1.692s configuring, 9.853s building, 0.183s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 7+ messages in thread
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2026-07-15 2:33 [PATCH] drm/xe/oa: Fix sync entry leak on OA config emit failure Linmao Li
2026-07-15 2:40 ` ✓ CI.KUnit: success for " Patchwork
2026-07-15 3:15 ` ✓ Xe.CI.BAT: " Patchwork
2026-07-15 6:22 ` ✓ Xe.CI.FULL: " Patchwork
2026-07-30 22:20 ` [PATCH] " Dixit, Ashutosh
2026-07-31 1:19 ` [PATCH v2] " Linmao Li
2026-07-31 1:27 ` ✓ CI.KUnit: success for drm/xe/oa: Fix sync entry leak on OA config emit failure (rev2) Patchwork
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