From: Marc Zyngier <maz@kernel.org>
To: Evgenii Stepanov <eugenis@google.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
Peter Collingbourne <pcc@google.com>,
Vincenzo Frascino <vincenzo.frascino@arm.com>,
Andrey Konovalov <andreyknvl@gmail.com>,
Mark Brown <broonie@kernel.org>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] mte: Follow arm64.nomte override in MMU setup.
Date: Tue, 09 Aug 2022 09:50:55 +0100 [thread overview]
Message-ID: <875yj1x0k0.wl-maz@kernel.org> (raw)
In-Reply-To: <20220805214734.1937451-1-eugenis@google.com>
On Fri, 05 Aug 2022 22:47:34 +0100,
Evgenii Stepanov <eugenis@google.com> wrote:
>
> The current code sets up the memory attribute for Normal Tagged memory
> in MAIR_EL1 whenever MTE is supported according to AA64PFR1.MTE without
> taking arm64.nomte command line option into account.
>
> This breaks when tag pages are reused as regular memory, as direct
> access to such pages through the linear map may create an invalid DRAM
> address (tags-of-tags).
How comes such memory is being used? How comes it is in the linear
map?
arm64.nomte is affecting the use of MTE feature on the platform. It
doesn't guard the use of a MTE carve-out, and doesn't allow it to be
used in any shape or form.
To use this memory, you should remove the MTE configuration
altogether, as you cannot infer what the CPU is doing with it.
M.
--
Without deviation from the norm, progress is not possible.
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WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Evgenii Stepanov <eugenis@google.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
Peter Collingbourne <pcc@google.com>,
Vincenzo Frascino <vincenzo.frascino@arm.com>,
Andrey Konovalov <andreyknvl@gmail.com>,
Mark Brown <broonie@kernel.org>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] mte: Follow arm64.nomte override in MMU setup.
Date: Tue, 09 Aug 2022 09:50:55 +0100 [thread overview]
Message-ID: <875yj1x0k0.wl-maz@kernel.org> (raw)
In-Reply-To: <20220805214734.1937451-1-eugenis@google.com>
On Fri, 05 Aug 2022 22:47:34 +0100,
Evgenii Stepanov <eugenis@google.com> wrote:
>
> The current code sets up the memory attribute for Normal Tagged memory
> in MAIR_EL1 whenever MTE is supported according to AA64PFR1.MTE without
> taking arm64.nomte command line option into account.
>
> This breaks when tag pages are reused as regular memory, as direct
> access to such pages through the linear map may create an invalid DRAM
> address (tags-of-tags).
How comes such memory is being used? How comes it is in the linear
map?
arm64.nomte is affecting the use of MTE feature on the platform. It
doesn't guard the use of a MTE carve-out, and doesn't allow it to be
used in any shape or form.
To use this memory, you should remove the MTE configuration
altogether, as you cannot infer what the CPU is doing with it.
M.
--
Without deviation from the norm, progress is not possible.
next prev parent reply other threads:[~2022-08-09 8:52 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-05 21:47 [PATCH] mte: Follow arm64.nomte override in MMU setup Evgenii Stepanov
2022-08-05 21:47 ` Evgenii Stepanov
2022-08-09 8:50 ` Marc Zyngier [this message]
2022-08-09 8:50 ` Marc Zyngier
2022-08-09 16:41 ` Evgenii Stepanov
2022-08-09 16:41 ` Evgenii Stepanov
2022-08-09 16:49 ` Marc Zyngier
2022-08-09 16:49 ` Marc Zyngier
2022-08-09 17:29 ` Evgenii Stepanov
2022-08-09 17:29 ` Evgenii Stepanov
2022-08-10 1:24 ` Peter Collingbourne
2022-08-10 1:24 ` Peter Collingbourne
2022-08-16 7:51 ` Catalin Marinas
2022-08-16 7:51 ` Catalin Marinas
2022-08-17 5:38 ` Peter Collingbourne
2022-08-17 5:38 ` Peter Collingbourne
2022-08-18 16:33 ` Catalin Marinas
2022-08-18 16:33 ` Catalin Marinas
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