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From: Thomas Gleixner <tglx@kernel.org>
To: Icenowy Zheng <zhengxingda@iscas.ac.cn>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Huacai Chen <chenhuacai@kernel.org>,
	WANG Xuerui <kernel@xen0n.name>,
	Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc: Icenowy Zheng <uwu@icenowy.me>, Yao Zi <me@ziyao.cc>,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	loongarch@lists.linux.dev, linux-mips@vger.kernel.org,
	Icenowy Zheng <zhengxingda@iscas.ac.cn>
Subject: Re: [PATCH v3 4/8] irqchip/loongson-pch-lpc: extract non-ACPI-related code from ACPI init
Date: Fri, 20 Mar 2026 10:15:32 +0100	[thread overview]
Message-ID: <877br6lv4b.ffs@tglx> (raw)
In-Reply-To: <20260314162828.1055188-5-zhengxingda@iscas.ac.cn>

On Sun, Mar 15 2026 at 00:28, Icenowy Zheng wrote:

> A lot of code could be shared between the current ACPI init flow with

s/could/can/    s/current/existing/

> the possible OF init flow.

s/possible/upcoming/

> Extract it to a dedicated function.

s/to/into/

> +
> +int __init pch_lpc_acpi_init(struct irq_domain *parent, struct acpi_madt_lpc_pic *acpi_pchlpc)
> +{
> +	struct fwnode_handle *irq_handle;
> +	struct irq_fwspec fwspec;
> +	int parent_irq, ret;
> +
> +	irq_handle = irq_domain_alloc_named_fwnode("lpcintc");
> +	if (!irq_handle) {
> +		pr_err("Unable to allocate domain handle\n");
> +		return -ENOMEM;
> +	}
> +
> +	fwspec.fwnode = parent->fwnode;
> +	fwspec.param[0] = acpi_pchlpc->cascade + GSI_MIN_PCH_IRQ;
> +	fwspec.param[1] = IRQ_TYPE_LEVEL_HIGH;
> +	fwspec.param_count = 2;
> +	parent_irq = irq_create_fwspec_mapping(&fwspec);
> +
> +	ret = pch_lpc_init(acpi_pchlpc->address, acpi_pchlpc->size,
> +			   irq_handle, parent_irq);

No line break required. You have 100 characters per line.

Thanks,

        tglx

  reply	other threads:[~2026-03-20  9:15 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-14 16:28 [PATCH v3 0/8] Add support for LS7A LPC IRQ for MIPS Loongson systems Icenowy Zheng
2026-03-14 16:28 ` [PATCH v3 1/8] MIPS: Loongson64: Override arch_dynirq_lower_bound to reserve LPC IRQs Icenowy Zheng
2026-03-20  9:09   ` Thomas Gleixner
2026-03-14 16:28 ` [PATCH v3 2/8] LoongArch: " Icenowy Zheng
2026-03-14 16:28 ` [PATCH v3 3/8] dt-bindings: interrupt-controller: add LS7A PCH LPC Icenowy Zheng
2026-03-14 16:28 ` [PATCH v3 4/8] irqchip/loongson-pch-lpc: extract non-ACPI-related code from ACPI init Icenowy Zheng
2026-03-20  9:15   ` Thomas Gleixner [this message]
2026-03-14 16:28 ` [PATCH v3 5/8] irqchip/loongson-pch-lpc: add OF init code Icenowy Zheng
2026-03-14 16:28 ` [PATCH v3 6/8] irqchip/loongson-pch-lpc: enable building on MIPS Loongson64 Icenowy Zheng
2026-03-14 16:28 ` [PATCH v3 7/8] MIPS: Loongson64: dts: sort nodes Icenowy Zheng
2026-03-14 16:28 ` [PATCH v3 8/8] MIPS: Loongson64: dts: add node for LS7A PCH LPC Icenowy Zheng
2026-03-18 13:57 ` [PATCH v3 0/8] Add support for LS7A LPC IRQ for MIPS Loongson systems Huacai Chen
2026-03-20  9:16   ` Thomas Gleixner
2026-03-21  9:15     ` Icenowy Zheng
2026-03-21  8:59   ` Icenowy Zheng
2026-03-21 17:14     ` Thomas Gleixner

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