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From: Volodymyr Babchuk <Volodymyr_Babchuk@epam.com>
To: Leonid Komarianskyi <Leonid_Komarianskyi@epam.com>
Cc: "xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>,
	"olekstysh@gmail.com" <olekstysh@gmail.com>,
	Stefano Stabellini <sstabellini@kernel.org>,
	Julien Grall <julien@xen.org>,
	Bertrand Marquis <bertrand.marquis@arm.com>,
	Michal Orzel <michal.orzel@amd.com>
Subject: Re: [PATCH v4 09/12] xen/arm: domain_build/dom0less-build: adjust domains config to support eSPIs
Date: Wed, 27 Aug 2025 23:03:37 +0000	[thread overview]
Message-ID: <877byo1i5y.fsf@epam.com> (raw)
In-Reply-To: <66b39c4ba25e7a19beeca62ab23f5d3ab3cbae52.1756317702.git.leonid_komarianskyi@epam.com> (Leonid Komarianskyi's message of "Wed, 27 Aug 2025 18:24:21 +0000")

Hi Loenid,

Leonid Komarianskyi <Leonid_Komarianskyi@epam.com> writes:

> The Dom0 and DomUs logic for the dom0less configuration in create_dom0() and
> arch_create_domUs() has been updated to account for extended SPIs when
> supported by the hardware and enabled with CONFIG_GICV3_ESPI. These changes
> ensure the proper calculation of the maximum number of SPIs and eSPIs available
> to Dom0 and DomUs in dom0less setups.
>
> When eSPIs are supported by the hardware and CONFIG_GICV3_ESPI is enabled, the
> maximum number of eSPI interrupts is calculated using the ESPI_BASE_INTID
> offset (4096) and is limited to 1024, with 32 IRQs subtracted. To ensure
> compatibility with non-Dom0 domains, this adjustment is applied by the
> toolstack during domain creation, while for Dom0 or DomUs in Dom0, it is
> handled directly during VGIC initialization. If eSPIs are not supported, the
> calculation defaults to using the standard SPI range, with a maximum value of
> 992 interrupt lines, as it works currently.
>
> Signed-off-by: Leonid Komarianskyi <leonid_komarianskyi@epam.com>

Reviewed-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>

>
> ---
> Changes in V4:
> - consolidated the eSPI and SPI logic into a new inline function,
>   vgic_def_nr_spis. Without eSPI support (either due to config being
>   disabled or hardware not supporting it), it will return the regular SPI
>   range, as it works currently. There are no functional changes compared
>   with the previous patch version
> - removed VGIC_DEF_MAX_SPI macro, to reduce the number of ifdefs
>
> Changes in V3:
> - renamed macro VGIC_DEF_NR_ESPIS to more appropriate VGIC_DEF_MAX_SPI
> - added eSPI initialization for dom0less setups
> - fixed comment with mentions about dom0less builds
> - fixed formatting for lines with more than 80 symbols
> - updated commit message
>
> Changes in V2:
> - no changes
> ---
>  xen/arch/arm/dom0less-build.c   |  2 +-
>  xen/arch/arm/domain_build.c     |  2 +-
>  xen/arch/arm/include/asm/vgic.h | 21 +++++++++++++++++++++
>  3 files changed, 23 insertions(+), 2 deletions(-)
>
> diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c
> index 69b9ea22ce..02d5559102 100644
> --- a/xen/arch/arm/dom0less-build.c
> +++ b/xen/arch/arm/dom0less-build.c
> @@ -285,7 +285,7 @@ void __init arch_create_domUs(struct dt_device_node *node,
>      {
>          int vpl011_virq = GUEST_VPL011_SPI;
>  
> -        d_cfg->arch.nr_spis = VGIC_DEF_NR_SPIS;
> +        d_cfg->arch.nr_spis = vgic_def_nr_spis();
>  
>          /*
>           * The VPL011 virq is GUEST_VPL011_SPI, unless direct-map is
> diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c
> index d91a71acfd..39eea0be00 100644
> --- a/xen/arch/arm/domain_build.c
> +++ b/xen/arch/arm/domain_build.c
> @@ -2054,7 +2054,7 @@ void __init create_dom0(void)
>  
>      /* The vGIC for DOM0 is exactly emulating the hardware GIC */
>      dom0_cfg.arch.gic_version = XEN_DOMCTL_CONFIG_GIC_NATIVE;
> -    dom0_cfg.arch.nr_spis = VGIC_DEF_NR_SPIS;
> +    dom0_cfg.arch.nr_spis = vgic_def_nr_spis();
>      dom0_cfg.arch.tee_type = tee_get_type();
>      dom0_cfg.max_vcpus = dom0_max_vcpus();
>  
> diff --git a/xen/arch/arm/include/asm/vgic.h b/xen/arch/arm/include/asm/vgic.h
> index fb4cea73eb..11f9d216eb 100644
> --- a/xen/arch/arm/include/asm/vgic.h
> +++ b/xen/arch/arm/include/asm/vgic.h
> @@ -355,6 +355,27 @@ extern void vgic_check_inflight_irqs_pending(struct vcpu *v,
>  /* Default number of vGIC SPIs. 32 are substracted to cover local IRQs. */
>  #define VGIC_DEF_NR_SPIS (min(gic_number_lines(), VGIC_MAX_IRQS) - 32)
>  
> +static inline unsigned int vgic_def_nr_spis(void)
> +{
> +#ifdef CONFIG_GICV3_ESPI
> +    /*
> +     * Check if the hardware supports extended SPIs (even if the appropriate
> +     * config is set). If not, the common SPI range will be used. Otherwise
> +     * returns the maximum eSPI INTID, supported by HW GIC, subtracted by 32.
> +     * For non-Dom0 domains, the toolstack or arch_create_domUs function
> +     * applies the same adjustment to cover local IRQs (please, see comment
> +     * for macro that is used for regular SPIs - VGIC_DEF_NR_SPIS). We will
> +     * add back this value during VGIC initialization. This ensures consistent
> +     * handling for Dom0 and other domains. For the regular SPI range interrupts
> +     * in this case, the maximum value of VGIC_DEF_NR_SPIS will be used.
> +     */
> +    if ( gic_number_espis() > 0 )
> +        return ESPI_BASE_INTID + min(gic_number_espis(), 1024U) - 32;
> +#endif
> +
> +    return VGIC_DEF_NR_SPIS;
> +}
> +
>  extern bool vgic_is_valid_line(struct domain *d, unsigned int virq);
>  
>  static inline bool vgic_is_spi(struct domain *d, unsigned int virq)

-- 
WBR, Volodymyr

  reply	other threads:[~2025-08-27 23:03 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-08-27 18:23 [PATCH v4 00/12] Introduce eSPI support Leonid Komarianskyi
2025-08-27 18:24 ` [PATCH v4 01/12] xen/arm: gicv3: refactor obtaining GIC addresses for common operations Leonid Komarianskyi
2025-08-28 12:00   ` Julien Grall
2025-08-28 16:17     ` Leonid Komarianskyi
2025-09-01 15:48       ` Julien Grall
2025-08-27 18:24 ` [PATCH v4 02/12] xen/arm: gic: implement helper functions for INTID checks Leonid Komarianskyi
2025-08-28 12:10   ` Julien Grall
2025-08-28 16:20     ` Leonid Komarianskyi
2025-08-27 18:24 ` [PATCH v4 03/12] xen/arm: vgic: implement helper functions for virq checks Leonid Komarianskyi
2025-08-27 22:49   ` Volodymyr Babchuk
2025-08-28 12:14   ` Julien Grall
2025-08-28 12:26   ` Oleksandr Tyshchenko
2025-08-27 18:24 ` [PATCH v4 04/12] xen/arm/irq: add handling for IRQs in the eSPI range Leonid Komarianskyi
2025-08-28 18:39   ` Oleksandr Tyshchenko
2025-08-27 18:24 ` [PATCH v4 05/12] xen/arm: gicv3: implement handling of GICv3.1 eSPI Leonid Komarianskyi
2025-08-27 22:55   ` Volodymyr Babchuk
2025-08-28 14:15   ` Oleksandr Tyshchenko
2025-08-28 16:26     ` Leonid Komarianskyi
2025-08-27 18:24 ` [PATCH v4 06/12] xen/arm/irq: allow eSPI processing in the gic_interrupt function Leonid Komarianskyi
2025-08-27 18:24 ` [PATCH v4 07/12] xen/arm: gicv3: modify ICH_LR_PHYSICAL_MASK to allow eSPI processing Leonid Komarianskyi
2025-08-27 18:24 ` [PATCH v4 08/12] xen/arm: vgic: add resource management for extended SPIs Leonid Komarianskyi
2025-08-27 23:01   ` Volodymyr Babchuk
2025-08-28  9:16     ` Leonid Komarianskyi
2025-08-28 17:34   ` Oleksandr Tyshchenko
2025-08-28 19:09     ` Leonid Komarianskyi
2025-08-29  9:48       ` Oleksandr Tyshchenko
2025-08-29 13:58         ` Leonid Komarianskyi
2025-08-27 18:24 ` [PATCH v4 09/12] xen/arm: domain_build/dom0less-build: adjust domains config to support eSPIs Leonid Komarianskyi
2025-08-27 23:03   ` Volodymyr Babchuk [this message]
2025-08-28 13:19   ` Oleksandr Tyshchenko
2025-08-28 16:38     ` Leonid Komarianskyi
2025-08-27 18:24 ` [PATCH v4 10/12] xen/arm: vgic-v3: add emulation of GICv3.1 eSPI registers Leonid Komarianskyi
2025-08-28 11:41   ` Leonid Komarianskyi
2025-08-27 18:24 ` [PATCH v4 11/12] doc/man: update description for nr_spis with eSPI Leonid Komarianskyi
2025-08-27 23:20   ` Volodymyr Babchuk
2025-08-28 12:05     ` Leonid Komarianskyi
2025-08-27 18:24 ` [PATCH v4 12/12] CHANGELOG.md: add mention of GICv3.1 eSPI support Leonid Komarianskyi

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