From: Marc Zyngier <maz@kernel.org>
To: Frank Li <frank.li@nxp.com>
Cc: "tglx@linutronix.de" <tglx@linutronix.de>,
"robh+dt@kernel.org" <robh+dt@kernel.org>,
"krzysztof.kozlowski+dt@linaro.org"
<krzysztof.kozlowski+dt@linaro.org>,
"shawnguo@kernel.org" <shawnguo@kernel.org>,
"s.hauer@pengutronix.de" <s.hauer@pengutronix.de>,
"kw@linux.com" <kw@linux.com>,
"bhelgaas@google.com" <bhelgaas@google.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
Peng Fan <peng.fan@nxp.com>, Aisheng Dong <aisheng.dong@nxp.com>,
"jdmason@kudzu.us" <jdmason@kudzu.us>,
"kernel@pengutronix.de" <kernel@pengutronix.de>,
"festevam@gmail.com" <festevam@gmail.com>,
dl-linux-imx <linux-imx@nxp.com>, "kishon@ti.com" <kishon@ti.com>,
"lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>,
"ntb@lists.linux.dev" <ntb@lists.linux.dev>,
"lznuaa@gmail.com" <lznuaa@gmail.com>,
"imx@lists.linux.dev" <imx@lists.linux.dev>,
"manivannan.sadhasivam@linaro.org"
<manivannan.sadhasivam@linaro.org>
Subject: Re: [EXT] Re: [PATCH v9 2/4] irqchip: Add IMX MU MSI controller driver
Date: Thu, 08 Sep 2022 15:51:30 +0100 [thread overview]
Message-ID: <877d2dvs0d.wl-maz@kernel.org> (raw)
In-Reply-To: <AM9PR04MB879338D6D4B55A74CD002E6D88409@AM9PR04MB8793.eurprd04.prod.outlook.com>
On Thu, 08 Sep 2022 15:23:53 +0100,
Frank Li <frank.li@nxp.com> wrote:
>
> >
> > On Wed, 07 Sep 2022 04:48:54 +0100,
> > Frank Li <Frank.Li@nxp.com> wrote:
> > >
> > > The MU block found in a number of Freescale/NXP SoCs supports
> > generating
> > > IRQs by writing data to a register
> > >
> > > This enables the MU block to be used as a MSI controller, by leveraging
> > > the platform-MSI API
> >
> > Missing full stop after each sentence.
>
> [Frank Li] Do you means missed "."?
Yes.
> > > diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
> > > index 5e4e50122777d..e04c6521dce55 100644
> > > --- a/drivers/irqchip/Kconfig
> > > +++ b/drivers/irqchip/Kconfig
> > > @@ -470,6 +470,15 @@ config IMX_INTMUX
> > > help
> > > Support for the i.MX INTMUX interrupt multiplexer.
> > >
> > > +config IMX_MU_MSI
> > > + bool "i.MX MU work as MSI controller"
> >
> > Why bool? Doesn't it also work as a module?
>
> [Frank Li] I remember you said that irq-chip can't be removed.
> So I am not sure why need build as module.
Not being removed doesn't mean it cannot be built as a module and
loaded on demand. Why should I be forced to have this driver built-in
if my kernel is used on a variety of systems, only one of them having
this device?
> > > +
> > > +struct imx_mu_msi {
> > > + spinlock_t lock;
> > > + raw_spinlock_t reglock;
> >
> > Why two locks? Isn't one enough to protect both MSI allocation (which
> > happens once in a blue moon) and register access?
>
> [Frank Li] Previously your comment, ask me to use raw_spinlock for
> read\write register access. I don't think raw_spinlock is good for
> MSI allocation.
Why wouldn't it be good enough? I'd really like to know.
>
> >
> > Also, where are these locks initialised?
> >
>
> [Frank Li] struct imx_mu_msi is fill zero when allocated.
> Does it still need additional initialization for spinlock?
Have you heard of lockdep? Or CONFIG_DEBUG_SPINLOCK? Maybe you should
try it.
> > > + if (!pdev)
> > > + return -ENODEV;
> >
> > How can that happen?
> >
> [Frank Li] Not sure, many driver check as it.
And? Just because someone does something pointless, you have to
imitate them?
M.
--
Without deviation from the norm, progress is not possible.
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Frank Li <frank.li@nxp.com>
Cc: "tglx@linutronix.de" <tglx@linutronix.de>,
"robh+dt@kernel.org" <robh+dt@kernel.org>,
"krzysztof.kozlowski+dt@linaro.org"
<krzysztof.kozlowski+dt@linaro.org>,
"shawnguo@kernel.org" <shawnguo@kernel.org>,
"s.hauer@pengutronix.de" <s.hauer@pengutronix.de>,
"kw@linux.com" <kw@linux.com>,
"bhelgaas@google.com" <bhelgaas@google.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
Peng Fan <peng.fan@nxp.com>, Aisheng Dong <aisheng.dong@nxp.com>,
"jdmason@kudzu.us" <jdmason@kudzu.us>,
"kernel@pengutronix.de" <kernel@pengutronix.de>,
"festevam@gmail.com" <festevam@gmail.com>,
dl-linux-imx <linux-imx@nxp.com>, "kishon@ti.com" <kishon@ti.com>,
"lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>,
"ntb@lists.linux.dev" <ntb@lists.linux.dev>,
"lznuaa@gmail.com" <lznuaa@gmail.com>,
"imx@lists.linux.dev" <imx@lists.linux.dev>,
"manivannan.sadhasivam@linaro.org"
<manivannan.sadhasivam@linaro.org>
Subject: Re: [EXT] Re: [PATCH v9 2/4] irqchip: Add IMX MU MSI controller driver
Date: Thu, 08 Sep 2022 15:51:30 +0100 [thread overview]
Message-ID: <877d2dvs0d.wl-maz@kernel.org> (raw)
In-Reply-To: <AM9PR04MB879338D6D4B55A74CD002E6D88409@AM9PR04MB8793.eurprd04.prod.outlook.com>
On Thu, 08 Sep 2022 15:23:53 +0100,
Frank Li <frank.li@nxp.com> wrote:
>
> >
> > On Wed, 07 Sep 2022 04:48:54 +0100,
> > Frank Li <Frank.Li@nxp.com> wrote:
> > >
> > > The MU block found in a number of Freescale/NXP SoCs supports
> > generating
> > > IRQs by writing data to a register
> > >
> > > This enables the MU block to be used as a MSI controller, by leveraging
> > > the platform-MSI API
> >
> > Missing full stop after each sentence.
>
> [Frank Li] Do you means missed "."?
Yes.
> > > diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
> > > index 5e4e50122777d..e04c6521dce55 100644
> > > --- a/drivers/irqchip/Kconfig
> > > +++ b/drivers/irqchip/Kconfig
> > > @@ -470,6 +470,15 @@ config IMX_INTMUX
> > > help
> > > Support for the i.MX INTMUX interrupt multiplexer.
> > >
> > > +config IMX_MU_MSI
> > > + bool "i.MX MU work as MSI controller"
> >
> > Why bool? Doesn't it also work as a module?
>
> [Frank Li] I remember you said that irq-chip can't be removed.
> So I am not sure why need build as module.
Not being removed doesn't mean it cannot be built as a module and
loaded on demand. Why should I be forced to have this driver built-in
if my kernel is used on a variety of systems, only one of them having
this device?
> > > +
> > > +struct imx_mu_msi {
> > > + spinlock_t lock;
> > > + raw_spinlock_t reglock;
> >
> > Why two locks? Isn't one enough to protect both MSI allocation (which
> > happens once in a blue moon) and register access?
>
> [Frank Li] Previously your comment, ask me to use raw_spinlock for
> read\write register access. I don't think raw_spinlock is good for
> MSI allocation.
Why wouldn't it be good enough? I'd really like to know.
>
> >
> > Also, where are these locks initialised?
> >
>
> [Frank Li] struct imx_mu_msi is fill zero when allocated.
> Does it still need additional initialization for spinlock?
Have you heard of lockdep? Or CONFIG_DEBUG_SPINLOCK? Maybe you should
try it.
> > > + if (!pdev)
> > > + return -ENODEV;
> >
> > How can that happen?
> >
> [Frank Li] Not sure, many driver check as it.
And? Just because someone does something pointless, you have to
imitate them?
M.
--
Without deviation from the norm, progress is not possible.
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-09-08 14:51 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-07 3:48 [PATCH v9 0/4] PCI EP driver support MSI doorbell from host Frank Li
2022-09-07 3:48 ` Frank Li
2022-09-07 3:48 ` [PATCH v9 1/4] irqchip: allow pass down .pm field at IRQCHIP_PLATFORM_DRIVER_END Frank Li
2022-09-07 3:48 ` Frank Li
2022-09-07 3:48 ` [PATCH v9 2/4] irqchip: Add IMX MU MSI controller driver Frank Li
2022-09-07 3:48 ` Frank Li
2022-09-08 0:03 ` kernel test robot
2022-09-08 0:03 ` kernel test robot
2022-09-08 7:02 ` Marc Zyngier
2022-09-08 7:02 ` Marc Zyngier
2022-09-08 7:02 ` Marc Zyngier
2022-09-08 14:26 ` [EXT] " Frank Li
2022-09-08 14:26 ` Frank Li
2022-09-08 14:26 ` Frank Li
2022-09-08 14:35 ` Marc Zyngier
2022-09-08 14:35 ` Marc Zyngier
2022-09-08 14:35 ` Marc Zyngier
2022-09-08 7:39 ` Marc Zyngier
2022-09-08 7:39 ` Marc Zyngier
2022-09-08 14:23 ` [EXT] " Frank Li
2022-09-08 14:23 ` Frank Li
2022-09-08 14:51 ` Marc Zyngier [this message]
2022-09-08 14:51 ` Marc Zyngier
2022-09-08 15:35 ` Frank Li
2022-09-08 15:35 ` Frank Li
2022-09-09 12:07 ` Marc Zyngier
2022-09-09 12:07 ` Marc Zyngier
2022-09-09 14:59 ` Frank Li
2022-09-09 14:59 ` Frank Li
2022-09-10 14:35 ` Marc Zyngier
2022-09-10 14:35 ` Marc Zyngier
2022-09-12 15:53 ` Frank Li
2022-09-12 15:53 ` Frank Li
2022-09-13 17:44 ` Marc Zyngier
2022-09-13 17:44 ` Marc Zyngier
2022-09-09 14:52 ` Frank Li
2022-09-09 14:52 ` Frank Li
2022-09-10 14:40 ` Marc Zyngier
2022-09-10 14:40 ` Marc Zyngier
2022-09-12 16:17 ` Frank Li
2022-09-12 16:17 ` Frank Li
2022-09-07 3:48 ` [PATCH v9 3/4] dt-bindings: irqchip: imx mu work as msi controller Frank Li
2022-09-07 3:48 ` Frank Li
2022-09-09 1:43 ` Rob Herring
2022-09-09 1:43 ` Rob Herring
2022-09-07 3:48 ` [PATCH v9 4/4] PCI: endpoint: Add vNTB MSI support Frank Li
2022-09-07 3:48 ` Frank Li
2022-09-07 20:43 ` kernel test robot
2022-09-07 20:43 ` kernel test robot
2022-09-13 17:24 ` Manivannan Sadhasivam
2022-09-13 17:24 ` Manivannan Sadhasivam
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