From: "Alex Bennée" <alex.bennee@linaro.org>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: Andrew Jones <drjones@redhat.com>,
qemu-devel@nongnu.org, qemu-arm@nongnu.org,
peter.maydell@linaro.org, armbru@redhat.com, eblake@redhat.com,
Dave.Martin@arm.com, eric.auger@redhat.com, imammedo@redhat.com
Subject: Re: [PATCH v4 4/9] target/arm/cpu64: max cpu: Introduce sve<N> properties
Date: Fri, 27 Sep 2019 00:50:55 +0100 [thread overview]
Message-ID: <877e5uaa74.fsf@linaro.org> (raw)
In-Reply-To: <2beb840f-99cf-d928-0926-c284933c78d9@linaro.org>
Richard Henderson <richard.henderson@linaro.org> writes:
> On 9/24/19 4:31 AM, Andrew Jones wrote:
<snip>
>
>> +#if __SIZEOF_LONG__ == 8
>> +#define BIT(n) (1UL << (n))
>> +#else
>> +#define BIT(n) (1ULL << (n))
>> +#endif
>
> There's no reason not to always use 1ULL is there?
Also we already have this helper in bitops.h so should just use that.
--
Alex Bennée
WARNING: multiple messages have this Message-ID (diff)
From: "Alex Bennée" <alex.bennee@linaro.org>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: peter.maydell@linaro.org, Andrew Jones <drjones@redhat.com>,
qemu-devel@nongnu.org, armbru@redhat.com, eric.auger@redhat.com,
qemu-arm@nongnu.org, imammedo@redhat.com, Dave.Martin@arm.com
Subject: Re: [PATCH v4 4/9] target/arm/cpu64: max cpu: Introduce sve<N> properties
Date: Fri, 27 Sep 2019 00:50:55 +0100 [thread overview]
Message-ID: <877e5uaa74.fsf@linaro.org> (raw)
In-Reply-To: <2beb840f-99cf-d928-0926-c284933c78d9@linaro.org>
Richard Henderson <richard.henderson@linaro.org> writes:
> On 9/24/19 4:31 AM, Andrew Jones wrote:
<snip>
>
>> +#if __SIZEOF_LONG__ == 8
>> +#define BIT(n) (1UL << (n))
>> +#else
>> +#define BIT(n) (1ULL << (n))
>> +#endif
>
> There's no reason not to always use 1ULL is there?
Also we already have this helper in bitops.h so should just use that.
--
Alex Bennée
next prev parent reply other threads:[~2019-09-26 23:50 UTC|newest]
Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-24 11:30 [PATCH v4 0/9] target/arm/kvm: enable SVE in guests Andrew Jones
2019-09-24 11:30 ` Andrew Jones
2019-09-24 11:30 ` [PATCH v4 1/9] target/arm/monitor: Introduce qmp_query_cpu_model_expansion Andrew Jones
2019-09-24 11:30 ` Andrew Jones
2019-09-24 15:06 ` Auger Eric
2019-09-24 15:06 ` Auger Eric
2019-09-24 11:30 ` [PATCH v4 2/9] tests: arm: Introduce cpu feature tests Andrew Jones
2019-09-24 11:30 ` Andrew Jones
2019-09-24 11:30 ` [PATCH v4 3/9] target/arm: Allow SVE to be disabled via a CPU property Andrew Jones
2019-09-24 11:30 ` Andrew Jones
2019-09-24 15:06 ` Auger Eric
2019-09-24 15:06 ` Auger Eric
2019-09-24 11:31 ` [PATCH v4 4/9] target/arm/cpu64: max cpu: Introduce sve<N> properties Andrew Jones
2019-09-24 11:31 ` Andrew Jones
2019-09-24 13:55 ` Andrew Jones
2019-09-24 13:55 ` Andrew Jones
2019-09-25 13:53 ` Auger Eric
2019-09-25 13:53 ` Auger Eric
2019-09-26 8:21 ` Andrew Jones
2019-09-26 8:21 ` Andrew Jones
2019-09-26 9:34 ` Auger Eric
2019-09-26 11:14 ` Andrew Jones
2019-09-26 19:07 ` Richard Henderson
2019-09-26 19:07 ` Richard Henderson
2019-09-26 23:50 ` Alex Bennée [this message]
2019-09-26 23:50 ` Alex Bennée
2019-09-27 6:51 ` Andrew Jones
2019-09-27 6:51 ` Andrew Jones
2019-09-27 6:45 ` Andrew Jones
2019-09-27 6:45 ` Andrew Jones
2019-09-24 11:31 ` [PATCH v4 5/9] target/arm/kvm64: Add kvm_arch_get/put_sve Andrew Jones
2019-09-24 11:31 ` Andrew Jones
2019-09-25 13:58 ` Auger Eric
2019-09-25 13:58 ` Auger Eric
2019-09-27 13:00 ` Andrew Jones
2019-09-27 13:00 ` Andrew Jones
2019-10-01 6:53 ` Andrew Jones
2019-09-24 11:31 ` [PATCH v4 6/9] target/arm/kvm64: max cpu: Enable SVE when available Andrew Jones
2019-09-24 11:31 ` Andrew Jones
2019-09-26 6:53 ` Auger Eric
2019-09-24 11:31 ` [PATCH v4 7/9] target/arm/kvm: scratch vcpu: Preserve input kvm_vcpu_init features Andrew Jones
2019-09-24 11:31 ` Andrew Jones
2019-09-24 11:31 ` [PATCH v4 8/9] target/arm/cpu64: max cpu: Support sve properties with KVM Andrew Jones
2019-09-24 11:31 ` Andrew Jones
2019-09-26 6:52 ` Auger Eric
2019-09-26 8:41 ` Andrew Jones
2019-09-26 8:41 ` Andrew Jones
2019-09-26 10:01 ` Auger Eric
2019-09-26 10:01 ` Auger Eric
2019-09-26 11:40 ` Andrew Jones
2019-09-26 11:40 ` Andrew Jones
2019-09-26 11:50 ` Auger Eric
2019-09-26 11:50 ` Auger Eric
2019-09-24 11:31 ` [PATCH v4 9/9] target/arm/kvm: host cpu: Add support for sve<N> properties Andrew Jones
2019-09-24 11:31 ` Andrew Jones
2019-09-26 7:07 ` Auger Eric
2019-09-26 8:53 ` Andrew Jones
2019-09-26 8:53 ` Andrew Jones
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=877e5uaa74.fsf@linaro.org \
--to=alex.bennee@linaro.org \
--cc=Dave.Martin@arm.com \
--cc=armbru@redhat.com \
--cc=drjones@redhat.com \
--cc=eblake@redhat.com \
--cc=eric.auger@redhat.com \
--cc=imammedo@redhat.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
--cc=richard.henderson@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.