From: Gregory CLEMENT <gregory.clement@bootlin.com>
To: Alexandre Belloni <alexandre.belloni@bootlin.com>,
Vladimir Zapolskiy <vz@mleia.com>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Sylvain Lemieux <slemieux.tyco@gmail.com>
Subject: Re: [PATCH] ARM: dts: lpc32xx: Revert set default clock rate of HCLK PLL
Date: Fri, 10 May 2019 15:15:58 +0200 [thread overview]
Message-ID: <877eay30xd.fsf@FE-laptop> (raw)
In-Reply-To: <20190510130855.4263-1-alexandre.belloni@bootlin.com>
Hi Alexandre,
> This reverts commit c17e9377aa81664d94b4f2102559fcf2a01ec8e7.
>
> The lpc32xx clock driver is not able to actually change the PLL rate as
> this would require reparenting ARM_CLK, DDRAM_CLK, PERIPH_CLK to SYSCLK,
> then stop the PLL, update the register, restart the PLL and wait for the
> PLL to lock and finally reparent ARM_CLK, DDRAM_CLK, PERIPH_CLK to HCLK
> PLL.
>
> Currently, the HCLK driver simply updates the registers but this has no
> real effect and all the clock rate calculation end up being wrong. This is
> especially annoying for the peripheral (e.g. UARTs, I2C, SPI).
>
> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Tested-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Gregory
> ---
> arch/arm/boot/dts/lpc32xx.dtsi | 3 ---
> 1 file changed, 3 deletions(-)
>
> diff --git a/arch/arm/boot/dts/lpc32xx.dtsi b/arch/arm/boot/dts/lpc32xx.dtsi
> index 20b38f4ade37..a49c97e5a38a 100644
> --- a/arch/arm/boot/dts/lpc32xx.dtsi
> +++ b/arch/arm/boot/dts/lpc32xx.dtsi
> @@ -323,9 +323,6 @@
>
> clocks = <&xtal_32k>, <&xtal>;
> clock-names = "xtal_32k", "xtal";
> -
> - assigned-clocks = <&clk LPC32XX_CLK_HCLK_PLL>;
> - assigned-clock-rates = <208000000>;
> };
> };
>
> --
> 2.21.0
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Gregory CLEMENT <gregory.clement@bootlin.com>
To: Alexandre Belloni <alexandre.belloni@bootlin.com>,
Vladimir Zapolskiy <vz@mleia.com>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Sylvain Lemieux <slemieux.tyco@gmail.com>
Subject: Re: [PATCH] ARM: dts: lpc32xx: Revert set default clock rate of HCLK PLL
Date: Fri, 10 May 2019 15:15:58 +0200 [thread overview]
Message-ID: <877eay30xd.fsf@FE-laptop> (raw)
In-Reply-To: <20190510130855.4263-1-alexandre.belloni@bootlin.com>
Hi Alexandre,
> This reverts commit c17e9377aa81664d94b4f2102559fcf2a01ec8e7.
>
> The lpc32xx clock driver is not able to actually change the PLL rate as
> this would require reparenting ARM_CLK, DDRAM_CLK, PERIPH_CLK to SYSCLK,
> then stop the PLL, update the register, restart the PLL and wait for the
> PLL to lock and finally reparent ARM_CLK, DDRAM_CLK, PERIPH_CLK to HCLK
> PLL.
>
> Currently, the HCLK driver simply updates the registers but this has no
> real effect and all the clock rate calculation end up being wrong. This is
> especially annoying for the peripheral (e.g. UARTs, I2C, SPI).
>
> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Tested-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Gregory
> ---
> arch/arm/boot/dts/lpc32xx.dtsi | 3 ---
> 1 file changed, 3 deletions(-)
>
> diff --git a/arch/arm/boot/dts/lpc32xx.dtsi b/arch/arm/boot/dts/lpc32xx.dtsi
> index 20b38f4ade37..a49c97e5a38a 100644
> --- a/arch/arm/boot/dts/lpc32xx.dtsi
> +++ b/arch/arm/boot/dts/lpc32xx.dtsi
> @@ -323,9 +323,6 @@
>
> clocks = <&xtal_32k>, <&xtal>;
> clock-names = "xtal_32k", "xtal";
> -
> - assigned-clocks = <&clk LPC32XX_CLK_HCLK_PLL>;
> - assigned-clock-rates = <208000000>;
> };
> };
>
> --
> 2.21.0
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com
next prev parent reply other threads:[~2019-05-10 13:16 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-10 13:08 [PATCH] ARM: dts: lpc32xx: Revert set default clock rate of HCLK PLL Alexandre Belloni
2019-05-10 13:08 ` Alexandre Belloni
2019-05-10 13:15 ` Gregory CLEMENT [this message]
2019-05-10 13:15 ` Gregory CLEMENT
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