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From: Nam Cao <namcao@linutronix.de>
To: Charlie Jenkins <thecharlesjenkins@gmail.com>,
	Xiaofeng Yuan <xiaofengmian@163.com>
Cc: pjw@kernel.org, palmer@dabbelt.com, aou@eecs.berkeley.edu,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v4] riscv: probes: simulate c.jal instruction
Date: Sat, 27 Jun 2026 12:59:50 +0200	[thread overview]
Message-ID: <878q805jvd.fsf@yellow.woof> (raw)
In-Reply-To: <178253409654.105999.9483335947060007692.b4-review@b4>

Charlie Jenkins <thecharlesjenkins@gmail.com> writes:
> I was looking at this recently trying to figure out why this hadn't been
> implemented and couldn't determine why this one was special, it might be
> because it is 32-bit only.

Yes. When I looked into this, I had no idea how to test rv32, so I skipped it.

> Since it is 32-bit only, can you put ifdefs
> around it for riscv32 (#if __riscv_xlen == 32) ?

Except for slightly bigger kernel size, it does not hurt to keep. And
#if stuff is quite ugly. But I'm fine with it either way.

> Can you also add a test case to:
> arch/riscv/kernel/tests/kprobes/test-kprobes-asm.S?

I already have a patch adding test case. Let me send it.

Nam

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WARNING: multiple messages have this Message-ID (diff)
From: Nam Cao <namcao@linutronix.de>
To: Charlie Jenkins <thecharlesjenkins@gmail.com>,
	Xiaofeng Yuan <xiaofengmian@163.com>
Cc: pjw@kernel.org, palmer@dabbelt.com, aou@eecs.berkeley.edu,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v4] riscv: probes: simulate c.jal instruction
Date: Sat, 27 Jun 2026 12:59:50 +0200	[thread overview]
Message-ID: <878q805jvd.fsf@yellow.woof> (raw)
In-Reply-To: <178253409654.105999.9483335947060007692.b4-review@b4>

Charlie Jenkins <thecharlesjenkins@gmail.com> writes:
> I was looking at this recently trying to figure out why this hadn't been
> implemented and couldn't determine why this one was special, it might be
> because it is 32-bit only.

Yes. When I looked into this, I had no idea how to test rv32, so I skipped it.

> Since it is 32-bit only, can you put ifdefs
> around it for riscv32 (#if __riscv_xlen == 32) ?

Except for slightly bigger kernel size, it does not hurt to keep. And
#if stuff is quite ugly. But I'm fine with it either way.

> Can you also add a test case to:
> arch/riscv/kernel/tests/kprobes/test-kprobes-asm.S?

I already have a patch adding test case. Let me send it.

Nam

  reply	other threads:[~2026-06-27 11:00 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-27  0:19 [PATCH v4] riscv: probes: simulate c.jal instruction Xiaofeng Yuan
2026-06-27  0:19 ` Xiaofeng Yuan
2026-06-27  4:21 ` Charlie Jenkins
2026-06-27  4:21   ` Charlie Jenkins
2026-06-27 10:59   ` Nam Cao [this message]
2026-06-27 10:59     ` Nam Cao
2026-06-27 11:52     ` Nam Cao
2026-06-27 11:52       ` Nam Cao
2026-06-27 11:04 ` Nam Cao
2026-06-27 11:04   ` Nam Cao

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