From: Andreas Schwab <schwab@linux-m68k.org>
To: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Cc: Charlie Jenkins <charlie@rivosinc.com>,
linux-riscv@lists.infradead.org, linux-mm@kvack.org,
linux-kernel@vger.kernel.org,
Eric Biederman <ebiederm@xmission.com>,
Kees Cook <keescook@chromium.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Samuel Holland <samuel.holland@sifive.com>,
Nelson Chu <nelson@rivosinc.com>,
Emil Renner Berthing <kernel@esmil.dk>
Subject: Re: [PATCH v7 1/3] riscv: Avoid unaligned access when relocating modules
Date: Tue, 31 Oct 2023 17:35:57 +0100 [thread overview]
Message-ID: <878r7iiwb6.fsf@igel.home> (raw)
In-Reply-To: <CAJM55Z-v0EwrZp876DdLSzad2u55nJV_uBs_+MUJDqFW5MTPkA@mail.gmail.com> (Emil Renner Berthing's message of "Tue, 31 Oct 2023 06:11:47 -0700")
On Okt 31 2023, Emil Renner Berthing wrote:
>> +static int riscv_insn_rmw(void *location, u32 keep, u32 set)
>> +{
>> + u16 *parcel = location;
>> + u32 insn = (u32)le16_to_cpu(parcel[0]) | (u32)le16_to_cpu(parcel[1]) << 16;
>> +
>> + insn &= keep;
>> + insn |= set;
>> +
>> + parcel[0] = cpu_to_le32(insn);
>
> Why cpu_to_le32(insn)? Unless I've misunderstood something downcasting unsigned
> to unsigned values in C (eg. from u32 to u16) is defined to always discard the
> most signifcant bits, so cpu_to_le16(insn) should be fine.
cpu_to_le32(insn) can't be right here anyway, since it also swaps the
two u16 halves and would be the same as cpu_to_le16(insn >> 16) on big
endian.
--
Andreas Schwab, schwab@linux-m68k.org
GPG Key fingerprint = 7578 EB47 D4E5 4D69 2510 2552 DF73 E780 A9DA AEC1
"And now for something completely different."
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WARNING: multiple messages have this Message-ID (diff)
From: Andreas Schwab <schwab@linux-m68k.org>
To: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Cc: Charlie Jenkins <charlie@rivosinc.com>,
linux-riscv@lists.infradead.org, linux-mm@kvack.org,
linux-kernel@vger.kernel.org,
Eric Biederman <ebiederm@xmission.com>,
Kees Cook <keescook@chromium.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Samuel Holland <samuel.holland@sifive.com>,
Nelson Chu <nelson@rivosinc.com>,
Emil Renner Berthing <kernel@esmil.dk>
Subject: Re: [PATCH v7 1/3] riscv: Avoid unaligned access when relocating modules
Date: Tue, 31 Oct 2023 17:35:57 +0100 [thread overview]
Message-ID: <878r7iiwb6.fsf@igel.home> (raw)
In-Reply-To: <CAJM55Z-v0EwrZp876DdLSzad2u55nJV_uBs_+MUJDqFW5MTPkA@mail.gmail.com> (Emil Renner Berthing's message of "Tue, 31 Oct 2023 06:11:47 -0700")
On Okt 31 2023, Emil Renner Berthing wrote:
>> +static int riscv_insn_rmw(void *location, u32 keep, u32 set)
>> +{
>> + u16 *parcel = location;
>> + u32 insn = (u32)le16_to_cpu(parcel[0]) | (u32)le16_to_cpu(parcel[1]) << 16;
>> +
>> + insn &= keep;
>> + insn |= set;
>> +
>> + parcel[0] = cpu_to_le32(insn);
>
> Why cpu_to_le32(insn)? Unless I've misunderstood something downcasting unsigned
> to unsigned values in C (eg. from u32 to u16) is defined to always discard the
> most signifcant bits, so cpu_to_le16(insn) should be fine.
cpu_to_le32(insn) can't be right here anyway, since it also swaps the
two u16 halves and would be the same as cpu_to_le16(insn >> 16) on big
endian.
--
Andreas Schwab, schwab@linux-m68k.org
GPG Key fingerprint = 7578 EB47 D4E5 4D69 2510 2552 DF73 E780 A9DA AEC1
"And now for something completely different."
next prev parent reply other threads:[~2023-10-31 16:41 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-31 7:24 [PATCH v7 0/3] riscv: Add remaining module relocations and tests Charlie Jenkins
2023-10-31 7:24 ` Charlie Jenkins
2023-10-31 7:24 ` [PATCH v7 1/3] riscv: Avoid unaligned access when relocating modules Charlie Jenkins
2023-10-31 7:24 ` Charlie Jenkins
2023-10-31 13:11 ` Emil Renner Berthing
2023-10-31 13:11 ` Emil Renner Berthing
2023-10-31 16:35 ` Andreas Schwab [this message]
2023-10-31 16:35 ` Andreas Schwab
2023-10-31 20:06 ` Charlie Jenkins
2023-10-31 20:06 ` Charlie Jenkins
2023-10-31 7:24 ` [PATCH v7 2/3] riscv: Add remaining module relocations Charlie Jenkins
2023-10-31 7:24 ` Charlie Jenkins
2023-10-31 13:43 ` Emil Renner Berthing
2023-10-31 13:43 ` Emil Renner Berthing
2023-10-31 18:18 ` Charlie Jenkins
2023-10-31 18:18 ` Charlie Jenkins
2023-10-31 7:24 ` [PATCH v7 3/3] riscv: Add tests for riscv module loading Charlie Jenkins
2023-10-31 7:24 ` Charlie Jenkins
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