From: Fabiano Rosas <farosas@linux.ibm.com>
To: Nicholas Piggin <npiggin@gmail.com>, kvm-ppc@vger.kernel.org
Cc: linuxppc-dev@lists.ozlabs.org, Nicholas Piggin <npiggin@gmail.com>
Subject: Re: [PATCH 12/13] KVM: PPC: Book3S HV: Move radix MMU switching together in the P9 path
Date: Wed, 24 Feb 2021 20:36:16 +0000 [thread overview]
Message-ID: <878s7dxkxr.fsf@linux.ibm.com> (raw)
In-Reply-To: <20210219063542.1425130-13-npiggin@gmail.com>
Nicholas Piggin <npiggin@gmail.com> writes:
> Switching the MMU from radix<->radix mode is tricky particularly as the
> MMU can remain enabled and requires a certain sequence of SPR updates.
> Move these together into their own functions.
>
> This also includes the radix TLB check / flush because it's tied in to
> MMU switching due to tlbiel getting LPID from LPIDR.
>
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> ---
<snip>
> @@ -4117,7 +4138,7 @@ int kvmhv_run_single_vcpu(struct kvm_vcpu *vcpu, u64 time_limit,
> {
> struct kvm_run *run = vcpu->run;
> int trap, r, pcpu;
> - int srcu_idx, lpid;
> + int srcu_idx;
> struct kvmppc_vcore *vc;
> struct kvm *kvm = vcpu->kvm;
> struct kvm_nested_guest *nested = vcpu->arch.nested;
> @@ -4191,13 +4212,6 @@ int kvmhv_run_single_vcpu(struct kvm_vcpu *vcpu, u64 time_limit,
> vc->vcore_state = VCORE_RUNNING;
> trace_kvmppc_run_core(vc, 0);
>
> - if (cpu_has_feature(CPU_FTR_HVMODE)) {
> - lpid = nested ? nested->shadow_lpid : kvm->arch.lpid;
> - mtspr(SPRN_LPID, lpid);
> - isync();
> - kvmppc_check_need_tlb_flush(kvm, pcpu, nested);
> - }
> -
What about the counterpart to this^ down below?
if (cpu_has_feature(CPU_FTR_HVMODE)) {
mtspr(SPRN_LPID, kvm->arch.host_lpid);
isync();
}
> guest_enter_irqoff();
>
> srcu_idx = srcu_read_lock(&kvm->srcu);
WARNING: multiple messages have this Message-ID (diff)
From: Fabiano Rosas <farosas@linux.ibm.com>
To: Nicholas Piggin <npiggin@gmail.com>, kvm-ppc@vger.kernel.org
Cc: linuxppc-dev@lists.ozlabs.org, Nicholas Piggin <npiggin@gmail.com>
Subject: Re: [PATCH 12/13] KVM: PPC: Book3S HV: Move radix MMU switching together in the P9 path
Date: Wed, 24 Feb 2021 17:36:16 -0300 [thread overview]
Message-ID: <878s7dxkxr.fsf@linux.ibm.com> (raw)
In-Reply-To: <20210219063542.1425130-13-npiggin@gmail.com>
Nicholas Piggin <npiggin@gmail.com> writes:
> Switching the MMU from radix<->radix mode is tricky particularly as the
> MMU can remain enabled and requires a certain sequence of SPR updates.
> Move these together into their own functions.
>
> This also includes the radix TLB check / flush because it's tied in to
> MMU switching due to tlbiel getting LPID from LPIDR.
>
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> ---
<snip>
> @@ -4117,7 +4138,7 @@ int kvmhv_run_single_vcpu(struct kvm_vcpu *vcpu, u64 time_limit,
> {
> struct kvm_run *run = vcpu->run;
> int trap, r, pcpu;
> - int srcu_idx, lpid;
> + int srcu_idx;
> struct kvmppc_vcore *vc;
> struct kvm *kvm = vcpu->kvm;
> struct kvm_nested_guest *nested = vcpu->arch.nested;
> @@ -4191,13 +4212,6 @@ int kvmhv_run_single_vcpu(struct kvm_vcpu *vcpu, u64 time_limit,
> vc->vcore_state = VCORE_RUNNING;
> trace_kvmppc_run_core(vc, 0);
>
> - if (cpu_has_feature(CPU_FTR_HVMODE)) {
> - lpid = nested ? nested->shadow_lpid : kvm->arch.lpid;
> - mtspr(SPRN_LPID, lpid);
> - isync();
> - kvmppc_check_need_tlb_flush(kvm, pcpu, nested);
> - }
> -
What about the counterpart to this^ down below?
if (cpu_has_feature(CPU_FTR_HVMODE)) {
mtspr(SPRN_LPID, kvm->arch.host_lpid);
isync();
}
> guest_enter_irqoff();
>
> srcu_idx = srcu_read_lock(&kvm->srcu);
next prev parent reply other threads:[~2021-02-24 20:36 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-19 6:35 [PATCH 00/13] KVM: PPC: Book3S: C-ify the P9 entry/exit code Nicholas Piggin
2021-02-19 6:35 ` Nicholas Piggin
2021-02-19 6:35 ` [PATCH 01/13] powerpc/64s: Remove KVM handler support from CBE_RAS interrupts Nicholas Piggin
2021-02-19 6:35 ` Nicholas Piggin
2021-02-22 22:22 ` Fabiano Rosas
2021-02-22 22:22 ` Fabiano Rosas
2021-02-19 6:35 ` [PATCH 02/13] powerpc/64s: remove KVM SKIP test from instruction breakpoint handler Nicholas Piggin
2021-02-19 6:35 ` Nicholas Piggin
2021-02-22 22:22 ` Fabiano Rosas
2021-02-22 22:22 ` Fabiano Rosas
2021-02-19 6:35 ` [PATCH 03/13] KVM: PPC: Book3S HV: Ensure MSR[ME] is always set in guest MSR Nicholas Piggin
2021-02-19 6:35 ` Nicholas Piggin
2021-02-22 22:23 ` Fabiano Rosas
2021-02-22 22:23 ` Fabiano Rosas
2021-02-19 6:35 ` [PATCH 04/13] KVM: PPC: Book3S 64: remove unused kvmppc_h_protect argument Nicholas Piggin
2021-02-19 6:35 ` Nicholas Piggin
2021-02-19 6:35 ` [PATCH 05/13] KVM: PPC: Book3S 64: move KVM interrupt entry to a common entry point Nicholas Piggin
2021-02-19 6:35 ` Nicholas Piggin
2021-02-19 6:35 ` [PATCH 06/13] KVM: PPC: Book3S 64: Move GUEST_MODE_SKIP test into KVM Nicholas Piggin
2021-02-19 6:35 ` Nicholas Piggin
2021-02-22 22:40 ` Fabiano Rosas
2021-02-22 22:40 ` Fabiano Rosas
2021-02-19 6:35 ` [PATCH 07/13] KVM: PPC: Book3S 64: add hcall interrupt handler Nicholas Piggin
2021-02-19 6:35 ` Nicholas Piggin
2021-02-19 6:35 ` [PATCH 08/13] KVM: PPC: Book3S HV: Move hcall early register setup to KVM Nicholas Piggin
2021-02-19 6:35 ` Nicholas Piggin
2021-02-19 6:35 ` [PATCH 09/13] KVM: PPC: Book3S HV: Move interrupt " Nicholas Piggin
2021-02-19 6:35 ` Nicholas Piggin
2021-02-19 6:35 ` [PATCH 10/13] KVM: PPC: Book3S HV: move bad_host_intr check to HV handler Nicholas Piggin
2021-02-19 6:35 ` Nicholas Piggin
2021-02-19 6:35 ` [PATCH 11/13] KVM: PPC: Book3S HV: Minimise hcall handler calling convention differences Nicholas Piggin
2021-02-19 6:35 ` Nicholas Piggin
2021-02-19 6:35 ` [PATCH 12/13] KVM: PPC: Book3S HV: Move radix MMU switching together in the P9 path Nicholas Piggin
2021-02-19 6:35 ` Nicholas Piggin
2021-02-24 20:36 ` Fabiano Rosas [this message]
2021-02-24 20:36 ` Fabiano Rosas
2021-02-25 10:59 ` Nicholas Piggin
2021-02-25 10:59 ` Nicholas Piggin
2021-02-19 6:35 ` [PATCH 13/13] KVM: PPC: Book3S HV: Implement the rest of the P9 entry/exit handling in C Nicholas Piggin
2021-02-19 6:35 ` Nicholas Piggin
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