[PATCH 1/3] drm/i915/selftests: add test to verify get/put fw domains

[PATCH 1/3] drm/i915/selftests: add test to verify get/put fw domains

[Chris Wilson]

From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

Exercise acquiring and releasing forcewake around register reads. In
order to read a register behind a GT powerwell, we need to instruct that
powerwell to wake up using a forcewake. When we no longer require the GT
powerwell, we tell the GT to release our forcewake. Inside the
forcewake, the register read should work but outside it should just
return garbage, 0 being the most common garbage. Thus we can detect when
we are inside and outside of the forcewake with just a simple register
read, and so can verify that the GT powerwell is released when we say
so.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/selftests/intel_uncore.c | 104 +++++++++++++++++-
 1 file changed, 98 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/selftests/intel_uncore.c b/drivers/gpu/drm/i915/selftests/intel_uncore.c
index 81d9d31042a9..10820de209a7 100644
--- a/drivers/gpu/drm/i915/selftests/intel_uncore.c
+++ b/drivers/gpu/drm/i915/selftests/intel_uncore.c
@@ -119,9 +119,100 @@ int intel_uncore_mock_selftests(void)
 	return 0;
 }
 
-static int intel_uncore_check_forcewake_domains(struct drm_i915_private *dev_priv)
+static int live_forcewake_ops(void *arg)
+{
+	struct drm_i915_private *i915 = arg;
+	struct intel_uncore_forcewake_domain *domain;
+	struct intel_engine_cs *engine;
+	enum intel_engine_id id;
+	intel_wakeref_t wakeref;
+	unsigned int tmp;
+	int err = 0;
+
+	GEM_BUG_ON(i915->gt.awake);
+
+	/* vlv/chv with their pcu behave differently wrt reads */
+	if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
+		return 0;
+
+	wakeref = intel_runtime_pm_get(i915);
+
+	for_each_fw_domain(domain, i915, tmp) {
+		smp_store_mb(domain->active, false);
+		if (!hrtimer_cancel(&domain->timer))
+			continue;
+
+		intel_uncore_fw_release_timer(&domain->timer);
+	}
+
+	for_each_engine(engine, i915, id) {
+		i915_reg_t offset = RING_HEAD(engine->mmio_base);
+		u32 *reg = i915->regs + i915_mmio_reg_offset(offset);
+		enum forcewake_domains fw_domains;
+		u32 val;
+
+		if (!engine->default_state)
+			continue;
+
+		fw_domains = intel_uncore_forcewake_for_reg(i915, offset,
+							    FW_REG_READ);
+		if (!fw_domains)
+			continue;
+
+		for_each_fw_domain_masked(domain, fw_domains, i915, tmp) {
+			if (!domain->wake_count)
+				continue;
+
+			pr_err("fw_domain %s still active, aborting test!\n",
+			       intel_uncore_forcewake_domain_to_str(domain->id));
+			err = -EINVAL;
+			goto out_rpm;
+		}
+
+		intel_uncore_forcewake_get(i915, fw_domains);
+		val = readl(reg);
+		intel_uncore_forcewake_put(i915, fw_domains);
+
+		/* Flush the forcewake release (delayed onto a timer) */
+		for_each_fw_domain_masked(domain, fw_domains, i915, tmp) {
+			smp_store_mb(domain->active, false);
+			if (!hrtimer_cancel(&domain->timer))
+				continue;
+
+			intel_uncore_fw_release_timer(&domain->timer);
+			if (wait_ack_clear(domain, FORCEWAKE_KERNEL)) {
+				pr_err("Failed to clear fw_domain %s\n",
+				       intel_uncore_forcewake_domain_to_str(domain->id));
+				err = -EIO;
+				goto out_rpm;
+			}
+		}
+
+		if (!val) {
+			pr_err("%s:RING_HEAD was zero while fw was held!\n",
+			       engine->name);
+			err = -EINVAL;
+			goto out_rpm;
+		}
+
+		/* We then expect the read to return 0 outside of the fw */
+		if (wait_for(readl(reg) == 0, 100)) {
+			pr_err("%s:RING_HEAD=%0x, fw_domains 0x%x still up after 100ms!\n",
+				engine->name, readl(reg), fw_domains);
+			err = -ETIMEDOUT;
+			goto out_rpm;
+		}
+	}
+
+out_rpm:
+	intel_runtime_pm_put(i915, wakeref);
+	return err;
+}
+
+static int live_forcewake_domains(void *arg)
 {
 #define FW_RANGE 0x40000
+	struct drm_i915_private *dev_priv = arg;
 	unsigned long *valid;
 	u32 offset;
 	int err;
@@ -179,6 +270,11 @@ static int intel_uncore_check_forcewake_domains(struct drm_i915_private *dev_pri
 
 int intel_uncore_live_selftests(struct drm_i915_private *i915)
 {
+	static const struct i915_subtest tests[] = {
+		SUBTEST(live_forcewake_ops),
+		SUBTEST(live_forcewake_domains),
+	};
+
 	int err;
 
 	/* Confirm the table we load is still valid */
@@ -188,9 +284,5 @@ int intel_uncore_live_selftests(struct drm_i915_private *i915)
 	if (err)
 		return err;
 
-	err = intel_uncore_check_forcewake_domains(i915);
-	if (err)
-		return err;
-
-	return 0;
+	return i915_subtests(tests, i915);
 }
-- 
2.20.1

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[PATCH 2/3] drm/i915/selftests: Calculate maximum ring size for preemption chain

[Chris Wilson]

32 is too many for the likes of kbl, and in order to insert that many
requests into the ring requires us to declare the first few hung --
understandably a slow and unexpected process. Instead, measure the size
of a singe requests and use that to estimate the upper bound on the
chain length we can use for our test, remembering to flush the previous
chain between tests for safety.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 drivers/gpu/drm/i915/selftests/intel_lrc.c | 40 ++++++++++++++++++++--
 1 file changed, 37 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/selftests/intel_lrc.c b/drivers/gpu/drm/i915/selftests/intel_lrc.c
index d61520ea03c1..42068ed5eec0 100644
--- a/drivers/gpu/drm/i915/selftests/intel_lrc.c
+++ b/drivers/gpu/drm/i915/selftests/intel_lrc.c
@@ -615,14 +615,33 @@ static int live_chain_preempt(void *arg)
 		struct i915_sched_attr attr = {
 			.priority = I915_USER_PRIORITY(I915_PRIORITY_MAX),
 		};
-		int count, i;
+		struct i915_request *rq;
+		int ring_size, count, i;
 
 		if (!intel_engine_has_preemption(engine))
 			continue;
 
-		for_each_prime_number_from(count, 1, 32) { /* must fit ring! */
-			struct i915_request *rq;
+		rq = igt_spinner_create_request(&lo.spin,
+						lo.ctx, engine,
+						MI_ARB_CHECK);
+		if (IS_ERR(rq))
+			goto err_wedged;
+		i915_request_add(rq);
+
+		ring_size = rq->wa_tail - rq->head;
+		if (ring_size < 0)
+			ring_size += rq->ring->size;
+		ring_size = rq->ring->size / ring_size;
+		pr_debug("%s(%s): Using maximum of %d requests\n",
+			 __func__, engine->name, ring_size);
 
+		igt_spinner_end(&lo.spin);
+		if (i915_request_wait(rq, I915_WAIT_LOCKED, HZ / 2) < 0) {
+			pr_err("Timed out waiting to flush %s\n", engine->name);
+			goto err_wedged;
+		}
+
+		for_each_prime_number_from(count, 1, ring_size) {
 			rq = igt_spinner_create_request(&hi.spin,
 							hi.ctx, engine,
 							MI_ARB_CHECK);
@@ -664,6 +683,21 @@ static int live_chain_preempt(void *arg)
 				goto err_wedged;
 			}
 			igt_spinner_end(&lo.spin);
+
+			rq = i915_request_alloc(engine, lo.ctx);
+			if (IS_ERR(rq))
+				goto err_wedged;
+			i915_request_add(rq);
+			if (i915_request_wait(rq, I915_WAIT_LOCKED, HZ / 5) < 0) {
+				struct drm_printer p =
+					drm_info_printer(i915->drm.dev);
+
+				pr_err("Failed to flush low priority chain of %d requests\n",
+				       count);
+				intel_engine_dump(engine, &p,
+						  "%s\n", engine->name);
+				goto err_wedged;
+			}
 		}
 	}
 
-- 
2.20.1

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[PATCH 3/3] drm/i915/selftests: Provide stub reset functions

[Chris Wilson]

If a test fails, we quite often mark the device as wedged. Provide the
stub functions so that we can wedge the mock device, and avoid exploding
on test failures.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109981
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
 drivers/gpu/drm/i915/selftests/mock_engine.c | 36 ++++++++++++++++++++
 1 file changed, 36 insertions(+)

diff --git a/drivers/gpu/drm/i915/selftests/mock_engine.c b/drivers/gpu/drm/i915/selftests/mock_engine.c
index 639d36eb904a..61744819172b 100644
--- a/drivers/gpu/drm/i915/selftests/mock_engine.c
+++ b/drivers/gpu/drm/i915/selftests/mock_engine.c
@@ -198,6 +198,37 @@ static void mock_submit_request(struct i915_request *request)
 	spin_unlock_irqrestore(&engine->hw_lock, flags);
 }
 
+static void mock_reset_prepare(struct intel_engine_cs *engine)
+{
+}
+
+static void mock_reset(struct intel_engine_cs *engine, bool stalled)
+{
+	GEM_BUG_ON(stalled);
+}
+
+static void mock_reset_finish(struct intel_engine_cs *engine)
+{
+}
+
+static void mock_cancel_requests(struct intel_engine_cs *engine)
+{
+	struct i915_request *request;
+	unsigned long flags;
+
+	spin_lock_irqsave(&engine->timeline.lock, flags);
+
+	/* Mark all submitted requests as skipped. */
+	list_for_each_entry(request, &engine->timeline.requests, sched.link) {
+		if (!i915_request_signaled(request))
+			dma_fence_set_error(&request->fence, -EIO);
+
+		i915_request_mark_complete(request);
+	}
+
+	spin_unlock_irqrestore(&engine->timeline.lock, flags);
+}
+
 struct intel_engine_cs *mock_engine(struct drm_i915_private *i915,
 				    const char *name,
 				    int id)
@@ -223,6 +254,11 @@ struct intel_engine_cs *mock_engine(struct drm_i915_private *i915,
 	engine->base.emit_fini_breadcrumb = mock_emit_breadcrumb;
 	engine->base.submit_request = mock_submit_request;
 
+	engine->base.reset.prepare = mock_reset_prepare;
+	engine->base.reset.reset = mock_reset;
+	engine->base.reset.finish = mock_reset_finish;
+	engine->base.cancel_requests = mock_cancel_requests;
+
 	if (i915_timeline_init(i915,
 			       &engine->base.timeline,
 			       engine->base.name,
-- 
2.20.1

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Re: [PATCH 3/3] drm/i915/selftests: Provide stub reset functions

[Mika Kuoppala]

Chris Wilson <chris@chris-wilson.co.uk> writes:

> If a test fails, we quite often mark the device as wedged. Provide the
> stub functions so that we can wedge the mock device, and avoid exploding
> on test failures.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109981
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>

Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/selftests/mock_engine.c | 36 ++++++++++++++++++++
>  1 file changed, 36 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/selftests/mock_engine.c b/drivers/gpu/drm/i915/selftests/mock_engine.c
> index 639d36eb904a..61744819172b 100644
> --- a/drivers/gpu/drm/i915/selftests/mock_engine.c
> +++ b/drivers/gpu/drm/i915/selftests/mock_engine.c
> @@ -198,6 +198,37 @@ static void mock_submit_request(struct i915_request *request)
>  	spin_unlock_irqrestore(&engine->hw_lock, flags);
>  }
>  
> +static void mock_reset_prepare(struct intel_engine_cs *engine)
> +{
> +}
> +
> +static void mock_reset(struct intel_engine_cs *engine, bool stalled)
> +{
> +	GEM_BUG_ON(stalled);
> +}
> +
> +static void mock_reset_finish(struct intel_engine_cs *engine)
> +{
> +}
> +
> +static void mock_cancel_requests(struct intel_engine_cs *engine)
> +{
> +	struct i915_request *request;
> +	unsigned long flags;
> +
> +	spin_lock_irqsave(&engine->timeline.lock, flags);
> +
> +	/* Mark all submitted requests as skipped. */
> +	list_for_each_entry(request, &engine->timeline.requests, sched.link) {
> +		if (!i915_request_signaled(request))
> +			dma_fence_set_error(&request->fence, -EIO);
> +
> +		i915_request_mark_complete(request);
> +	}
> +
> +	spin_unlock_irqrestore(&engine->timeline.lock, flags);
> +}
> +
>  struct intel_engine_cs *mock_engine(struct drm_i915_private *i915,
>  				    const char *name,
>  				    int id)
> @@ -223,6 +254,11 @@ struct intel_engine_cs *mock_engine(struct drm_i915_private *i915,
>  	engine->base.emit_fini_breadcrumb = mock_emit_breadcrumb;
>  	engine->base.submit_request = mock_submit_request;
>  
> +	engine->base.reset.prepare = mock_reset_prepare;
> +	engine->base.reset.reset = mock_reset;
> +	engine->base.reset.finish = mock_reset_finish;
> +	engine->base.cancel_requests = mock_cancel_requests;
> +
>  	if (i915_timeline_init(i915,
>  			       &engine->base.timeline,
>  			       engine->base.name,
> -- 
> 2.20.1
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✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915/selftests: add test to verify get/put fw domains

[Patchwork]

== Series Details ==

Series: series starting with [1/3] drm/i915/selftests: add test to verify get/put fw domains
URL   : https://patchwork.freedesktop.org/series/58202/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
351c90eb9ad2 drm/i915/selftests: add test to verify get/put fw domains
-:48: WARNING:MEMORY_BARRIER: memory barrier without comment
#48: FILE: drivers/gpu/drm/i915/selftests/intel_uncore.c:141:
+		smp_store_mb(domain->active, false);

-:85: WARNING:MEMORY_BARRIER: memory barrier without comment
#85: FILE: drivers/gpu/drm/i915/selftests/intel_uncore.c:178:
+			smp_store_mb(domain->active, false);

-:108: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#108: FILE: drivers/gpu/drm/i915/selftests/intel_uncore.c:201:
+			pr_err("%s:RING_HEAD=%0x, fw_domains 0x%x still up after 100ms!\n",
+				engine->name, readl(reg), fw_domains);

total: 0 errors, 2 warnings, 1 checks, 122 lines checked
f485d54a6fde drm/i915/selftests: Calculate maximum ring size for preemption chain
7a72677d296c drm/i915/selftests: Provide stub reset functions

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✗ Fi.CI.SPARSE: warning for series starting with [1/3] drm/i915/selftests: add test to verify get/put fw domains

[Patchwork]

== Series Details ==

Series: series starting with [1/3] drm/i915/selftests: add test to verify get/put fw domains
URL   : https://patchwork.freedesktop.org/series/58202/
State : warning

== Summary ==

$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915/selftests: add test to verify get/put fw domains
+drivers/gpu/drm/i915/selftests/intel_uncore.c:150:39:    expected unsigned int [usertype] *reg
+drivers/gpu/drm/i915/selftests/intel_uncore.c:150:39:    got void [noderef] <asn:2>*
+drivers/gpu/drm/i915/selftests/intel_uncore.c:150:39: warning: incorrect type in initializer (different address spaces)
+drivers/gpu/drm/i915/selftests/intel_uncore.c:173:29:    expected void const volatile [noderef] <asn:2>*addr
+drivers/gpu/drm/i915/selftests/intel_uncore.c:173:29:    got unsigned int [usertype] *reg
+drivers/gpu/drm/i915/selftests/intel_uncore.c:173:29: warning: incorrect type in argument 1 (different address spaces)
+drivers/gpu/drm/i915/selftests/intel_uncore.c:199:21:    expected void const volatile [noderef] <asn:2>*addr
+drivers/gpu/drm/i915/selftests/intel_uncore.c:199:21:    got unsigned int [usertype] *reg
+drivers/gpu/drm/i915/selftests/intel_uncore.c:199:21: warning: incorrect type in argument 1 (different address spaces)
+drivers/gpu/drm/i915/selftests/intel_uncore.c:200:25:    expected void const volatile [noderef] <asn:2>*addr
+drivers/gpu/drm/i915/selftests/intel_uncore.c:200:25:    got unsigned int [usertype] *reg
+drivers/gpu/drm/i915/selftests/intel_uncore.c:200:25: warning: incorrect type in argument 1 (different address spaces)

Commit: drm/i915/selftests: Calculate maximum ring size for preemption chain
Okay!

Commit: drm/i915/selftests: Provide stub reset functions
Okay!

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✗ Fi.CI.BAT: failure for series starting with [1/3] drm/i915/selftests: add test to verify get/put fw domains

[Patchwork]

== Series Details ==

Series: series starting with [1/3] drm/i915/selftests: add test to verify get/put fw domains
URL   : https://patchwork.freedesktop.org/series/58202/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_5775 -> Patchwork_12519
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_12519 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_12519, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/58202/revisions/1/mbox/

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_12519:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_selftest@live_uncore:
    - fi-skl-iommu:       PASS -> DMESG-WARN
    - fi-skl-gvtdvm:      PASS -> DMESG-WARN
    - fi-kbl-x1275:       NOTRUN -> DMESG-WARN
    - fi-hsw-peppy:       NOTRUN -> DMESG-WARN
    - fi-hsw-4770r:       PASS -> DMESG-WARN
    - fi-skl-guc:         PASS -> DMESG-WARN
    - fi-kbl-8809g:       PASS -> DMESG-WARN
    - fi-bdw-5557u:       PASS -> DMESG-FAIL
    - fi-cfl-8700k:       PASS -> DMESG-WARN
    - fi-skl-6600u:       PASS -> DMESG-WARN
    - fi-cfl-guc:         PASS -> DMESG-WARN
    - fi-skl-6770hq:      PASS -> DMESG-WARN
    - fi-skl-6700k2:      PASS -> DMESG-WARN
    - fi-snb-2600:        PASS -> DMESG-WARN
    - fi-bxt-j4205:       NOTRUN -> DMESG-WARN
    - fi-skl-6260u:       PASS -> DMESG-WARN
    - fi-icl-u3:          NOTRUN -> DMESG-WARN
    - fi-cfl-8109u:       NOTRUN -> DMESG-WARN
    - fi-kbl-r:           PASS -> DMESG-WARN
    - fi-kbl-7567u:       PASS -> DMESG-WARN
    - fi-kbl-guc:         PASS -> DMESG-WARN
    - fi-bdw-gvtdvm:      PASS -> DMESG-FAIL
    - fi-hsw-4770:        NOTRUN -> DMESG-WARN
    - fi-whl-u:           PASS -> DMESG-WARN
    - fi-snb-2520m:       PASS -> DMESG-WARN
    - fi-ivb-3770:        PASS -> DMESG-WARN

  * igt@runner@aborted:
    - fi-bdw-gvtdvm:      NOTRUN -> FAIL
    - fi-cfl-8109u:       NOTRUN -> FAIL
    - fi-hsw-peppy:       NOTRUN -> FAIL
    - fi-snb-2520m:       NOTRUN -> FAIL
    - fi-hsw-4770:        NOTRUN -> FAIL
    - fi-bxt-j4205:       NOTRUN -> FAIL
    - fi-whl-u:           NOTRUN -> FAIL
    - fi-icl-u3:          NOTRUN -> FAIL
    - fi-ivb-3770:        NOTRUN -> FAIL
    - fi-cfl-guc:         NOTRUN -> FAIL
    - fi-kbl-7567u:       NOTRUN -> FAIL
    - fi-kbl-x1275:       NOTRUN -> FAIL
    - fi-cfl-8700k:       NOTRUN -> FAIL
    - fi-hsw-4770r:       NOTRUN -> FAIL
    - fi-kbl-8809g:       NOTRUN -> FAIL
    - fi-kbl-r:           NOTRUN -> FAIL
    - fi-bdw-5557u:       NOTRUN -> FAIL
    - fi-kbl-guc:         NOTRUN -> FAIL
    - fi-snb-2600:        NOTRUN -> FAIL

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@i915_selftest@live_uncore:
    - {fi-icl-y}:         PASS -> DMESG-WARN
    - {fi-skl-lmem}:      PASS -> DMESG-WARN

  * igt@runner@aborted:
    - {fi-icl-y}:         NOTRUN -> FAIL

  
Known issues
------------

  Here are the changes found in Patchwork_12519 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@amdgpu/amd_cs_nop@sync-fork-compute0:
    - fi-icl-u3:          NOTRUN -> SKIP [fdo#109315] +17

  * igt@amdgpu/amd_prime@amd-to-i915:
    - fi-kbl-x1275:       NOTRUN -> SKIP [fdo#109271] +45

  * igt@gem_ctx_create@basic-files:
    - fi-gdg-551:         NOTRUN -> SKIP [fdo#109271] +106

  * igt@gem_exec_basic@gtt-bsd1:
    - fi-icl-u3:          NOTRUN -> SKIP [fdo#109276] +7

  * igt@gem_exec_basic@readonly-bsd2:
    - fi-pnv-d510:        NOTRUN -> SKIP [fdo#109271] +76

  * igt@gem_exec_parse@basic-rejected:
    - fi-icl-u3:          NOTRUN -> SKIP [fdo#109289] +1

  * igt@gem_exec_store@basic-bsd2:
    - fi-hsw-4770:        NOTRUN -> SKIP [fdo#109271] +41

  * igt@i915_pm_rpm@module-reload:
    - fi-skl-6770hq:      PASS -> FAIL [fdo#108511]

  * igt@kms_busy@basic-flip-a:
    - fi-gdg-551:         NOTRUN -> FAIL [fdo#103182] +2
    - fi-bsw-n3050:       NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +1

  * igt@kms_busy@basic-flip-c:
    - fi-gdg-551:         NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
    - fi-pnv-d510:        NOTRUN -> SKIP [fdo#109271] / [fdo#109278]

  * igt@kms_chamelium@hdmi-crc-fast:
    - fi-bsw-n3050:       NOTRUN -> SKIP [fdo#109271] +62

  * igt@kms_chamelium@hdmi-edid-read:
    - fi-hsw-peppy:       NOTRUN -> SKIP [fdo#109271] +46
    - fi-icl-u3:          NOTRUN -> SKIP [fdo#109284] +8

  * igt@kms_force_connector_basic@force-load-detect:
    - fi-bxt-j4205:       NOTRUN -> SKIP [fdo#109271] +47

  * igt@kms_force_connector_basic@prune-stale-modes:
    - fi-icl-u3:          NOTRUN -> SKIP [fdo#109285] +3

  * igt@kms_frontbuffer_tracking@basic:
    - fi-icl-u3:          NOTRUN -> FAIL [fdo#103167]
    - fi-hsw-peppy:       NOTRUN -> DMESG-FAIL [fdo#102614] / [fdo#107814]
    - fi-byt-clapper:     PASS -> FAIL [fdo#103167]

  * igt@kms_psr@primary_mmap_gtt:
    - fi-cfl-8109u:       NOTRUN -> SKIP [fdo#109271] +37

  * igt@runner@aborted:
    - fi-bxt-dsi:         NOTRUN -> FAIL [fdo#109516]
    - fi-skl-iommu:       NOTRUN -> FAIL [fdo#104108]
    - fi-skl-guc:         NOTRUN -> FAIL [fdo#104108]
    - fi-skl-6700k2:      NOTRUN -> FAIL [fdo#104108]
    - fi-skl-6600u:       NOTRUN -> FAIL [fdo#104108]
    - fi-skl-6770hq:      NOTRUN -> FAIL [fdo#104108]
    - fi-skl-gvtdvm:      NOTRUN -> FAIL [fdo#104108]
    - fi-skl-6260u:       NOTRUN -> FAIL [fdo#104108]

  
#### Possible fixes ####

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
    - fi-byt-clapper:     FAIL [fdo#103191] / [fdo#107362] -> PASS +1

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103182]: https://bugs.freedesktop.org/show_bug.cgi?id=103182
  [fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
  [fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
  [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
  [fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362
  [fdo#107814]: https://bugs.freedesktop.org/show_bug.cgi?id=107814
  [fdo#108511]: https://bugs.freedesktop.org/show_bug.cgi?id=108511
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
  [fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
  [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
  [fdo#109516]: https://bugs.freedesktop.org/show_bug.cgi?id=109516


Participating hosts (36 -> 41)
------------------------------

  Additional (10): fi-bxt-dsi fi-bsw-n3050 fi-hsw-peppy fi-hsw-4770 fi-kbl-x1275 fi-bxt-j4205 fi-gdg-551 fi-icl-u3 fi-pnv-d510 fi-cfl-8109u 
  Missing    (5): fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan fi-ctg-p8600 fi-bdw-samus 


Build changes
-------------

    * Linux: CI_DRM_5775 -> Patchwork_12519

  CI_DRM_5775: 3ead1aea2137c77a4fe00637dca589736397d885 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4890: 6d4d6949a099521003de252358601d22115e27ef @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_12519: 7a72677d296ca2c2125aeefbf3b999f500e5d8ab @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

7a72677d296c drm/i915/selftests: Provide stub reset functions
f485d54a6fde drm/i915/selftests: Calculate maximum ring size for preemption chain
351c90eb9ad2 drm/i915/selftests: add test to verify get/put fw domains

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12519/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[PATCH] drm/i915/selftests: add test to verify get/put fw domains

[Chris Wilson]

From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

Exercise acquiring and releasing forcewake around register reads. In
order to read a register behind a GT powerwell, we need to instruct that
powerwell to wake up using a forcewake. When we no longer require the GT
powerwell, we tell the GT to release our forcewake. Inside the
forcewake, the register read should work but outside it should just
return garbage, 0 being the most common garbage. Thus we can detect when
we are inside and outside of the forcewake with just a simple register
read, and so can verify that the GT powerwell is released when we say
so.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/selftests/intel_uncore.c | 105 +++++++++++++++++-
 1 file changed, 99 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/selftests/intel_uncore.c b/drivers/gpu/drm/i915/selftests/intel_uncore.c
index 81d9d31042a9..31d68e0a8168 100644
--- a/drivers/gpu/drm/i915/selftests/intel_uncore.c
+++ b/drivers/gpu/drm/i915/selftests/intel_uncore.c
@@ -119,9 +119,101 @@ int intel_uncore_mock_selftests(void)
 	return 0;
 }
 
-static int intel_uncore_check_forcewake_domains(struct drm_i915_private *dev_priv)
+static int live_forcewake_ops(void *arg)
+{
+	struct drm_i915_private *i915 = arg;
+	struct intel_uncore_forcewake_domain *domain;
+	struct intel_engine_cs *engine;
+	enum intel_engine_id id;
+	intel_wakeref_t wakeref;
+	unsigned int tmp;
+	int err = 0;
+
+	GEM_BUG_ON(i915->gt.awake);
+
+	/* vlv/chv with their pcu behave differently wrt reads */
+	if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
+		return 0;
+
+	wakeref = intel_runtime_pm_get(i915);
+
+	for_each_fw_domain(domain, i915, tmp) {
+		smp_store_mb(domain->active, false);
+		if (!hrtimer_cancel(&domain->timer))
+			continue;
+
+		intel_uncore_fw_release_timer(&domain->timer);
+	}
+
+	for_each_engine(engine, i915, id) {
+		i915_reg_t offset = RING_HEAD(engine->mmio_base);
+		u32 __iomem *reg = i915->regs + i915_mmio_reg_offset(offset);
+		enum forcewake_domains fw_domains;
+		u32 val;
+
+		if (!engine->default_state)
+			continue;
+
+		fw_domains = intel_uncore_forcewake_for_reg(i915, offset,
+							    FW_REG_READ);
+		if (!fw_domains)
+			continue;
+
+		for_each_fw_domain_masked(domain, fw_domains, i915, tmp) {
+			if (!domain->wake_count)
+				continue;
+
+			pr_err("fw_domain %s still active, aborting test!\n",
+			       intel_uncore_forcewake_domain_to_str(domain->id));
+			err = -EINVAL;
+			goto out_rpm;
+		}
+
+		intel_uncore_forcewake_get(i915, fw_domains);
+		val = readl(reg);
+		intel_uncore_forcewake_put(i915, fw_domains);
+
+		/* Flush the forcewake release (delayed onto a timer) */
+		for_each_fw_domain_masked(domain, fw_domains, i915, tmp) {
+			smp_store_mb(domain->active, false);
+			if (hrtimer_cancel(&domain->timer))
+				intel_uncore_fw_release_timer(&domain->timer);
+
+			preempt_disable();
+			err = wait_ack_clear(domain, FORCEWAKE_KERNEL);
+			preempt_enable();
+			if (err) {
+				pr_err("Failed to clear fw_domain %s\n",
+				       intel_uncore_forcewake_domain_to_str(domain->id));
+				goto out_rpm;
+			}
+		}
+
+		if (!val) {
+			pr_err("%s:RING_HEAD was zero while fw was held!\n",
+			       engine->name);
+			err = -EINVAL;
+			goto out_rpm;
+		}
+
+		/* We then expect the read to return 0 outside of the fw */
+		if (wait_for(readl(reg) == 0, 100)) {
+			pr_err("%s:RING_HEAD=%0x, fw_domains 0x%x still up after 100ms!\n",
+			       engine->name, readl(reg), fw_domains);
+			err = -ETIMEDOUT;
+			goto out_rpm;
+		}
+	}
+
+out_rpm:
+	intel_runtime_pm_put(i915, wakeref);
+	return err;
+}
+
+static int live_forcewake_domains(void *arg)
 {
 #define FW_RANGE 0x40000
+	struct drm_i915_private *dev_priv = arg;
 	unsigned long *valid;
 	u32 offset;
 	int err;
@@ -179,6 +271,11 @@ static int intel_uncore_check_forcewake_domains(struct drm_i915_private *dev_pri
 
 int intel_uncore_live_selftests(struct drm_i915_private *i915)
 {
+	static const struct i915_subtest tests[] = {
+		SUBTEST(live_forcewake_ops),
+		SUBTEST(live_forcewake_domains),
+	};
+
 	int err;
 
 	/* Confirm the table we load is still valid */
@@ -188,9 +285,5 @@ int intel_uncore_live_selftests(struct drm_i915_private *i915)
 	if (err)
 		return err;
 
-	err = intel_uncore_check_forcewake_domains(i915);
-	if (err)
-		return err;
-
-	return 0;
+	return i915_subtests(tests, i915);
 }
-- 
2.20.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✗ Fi.CI.CHECKPATCH: warning for series starting with drm/i915/selftests: add test to verify get/put fw domains (rev2)

[Patchwork]

== Series Details ==

Series: series starting with drm/i915/selftests: add test to verify get/put fw domains (rev2)
URL   : https://patchwork.freedesktop.org/series/58202/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
fc8491052559 drm/i915/selftests: add test to verify get/put fw domains
-:48: WARNING:MEMORY_BARRIER: memory barrier without comment
#48: FILE: drivers/gpu/drm/i915/selftests/intel_uncore.c:141:
+		smp_store_mb(domain->active, false);

-:85: WARNING:MEMORY_BARRIER: memory barrier without comment
#85: FILE: drivers/gpu/drm/i915/selftests/intel_uncore.c:178:
+			smp_store_mb(domain->active, false);

total: 0 errors, 2 warnings, 0 checks, 123 lines checked
d4a462c68333 drm/i915/selftests: Calculate maximum ring size for preemption chain
86f30be0f25b drm/i915/selftests: Provide stub reset functions

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✗ Fi.CI.BAT: failure for series starting with drm/i915/selftests: add test to verify get/put fw domains (rev2)

[Patchwork]

== Series Details ==

Series: series starting with drm/i915/selftests: add test to verify get/put fw domains (rev2)
URL   : https://patchwork.freedesktop.org/series/58202/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_5775 -> Patchwork_12521
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_12521 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_12521, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/58202/revisions/2/mbox/

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_12521:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_selftest@live_uncore:
    - fi-bdw-5557u:       PASS -> DMESG-FAIL
    - fi-bdw-gvtdvm:      PASS -> DMESG-FAIL

  
Known issues
------------

  Here are the changes found in Patchwork_12521 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@amdgpu/amd_cs_nop@sync-fork-compute0:
    - fi-icl-u3:          NOTRUN -> SKIP [fdo#109315] +17

  * igt@amdgpu/amd_prime@amd-to-i915:
    - fi-kbl-x1275:       NOTRUN -> SKIP [fdo#109271] +45

  * igt@gem_ctx_create@basic-files:
    - fi-gdg-551:         NOTRUN -> SKIP [fdo#109271] +106

  * igt@gem_exec_basic@gtt-bsd1:
    - fi-icl-u3:          NOTRUN -> SKIP [fdo#109276] +7

  * igt@gem_exec_basic@readonly-bsd2:
    - fi-pnv-d510:        NOTRUN -> SKIP [fdo#109271] +76

  * igt@gem_exec_parse@basic-rejected:
    - fi-icl-u3:          NOTRUN -> SKIP [fdo#109289] +1

  * igt@gem_exec_store@basic-bsd2:
    - fi-hsw-4770:        NOTRUN -> SKIP [fdo#109271] +41

  * igt@i915_module_load@reload:
    - fi-blb-e6850:       PASS -> INCOMPLETE [fdo#107718]

  * igt@i915_selftest@live_contexts:
    - fi-icl-u3:          NOTRUN -> DMESG-FAIL [fdo#108569]

  * igt@i915_selftest@live_evict:
    - fi-bsw-kefka:       PASS -> DMESG-WARN [fdo#107709]

  * igt@i915_selftest@live_execlists:
    - fi-apl-guc:         NOTRUN -> INCOMPLETE [fdo#103927] / [fdo#109720]

  * igt@kms_busy@basic-flip-a:
    - fi-gdg-551:         NOTRUN -> FAIL [fdo#103182] +1
    - fi-bsw-n3050:       NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +1

  * igt@kms_busy@basic-flip-c:
    - fi-gdg-551:         NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
    - fi-pnv-d510:        NOTRUN -> SKIP [fdo#109271] / [fdo#109278]

  * igt@kms_chamelium@hdmi-crc-fast:
    - fi-bsw-n3050:       NOTRUN -> SKIP [fdo#109271] +62

  * igt@kms_chamelium@hdmi-edid-read:
    - fi-hsw-peppy:       NOTRUN -> SKIP [fdo#109271] +46
    - fi-icl-u3:          NOTRUN -> SKIP [fdo#109284] +8

  * igt@kms_force_connector_basic@force-load-detect:
    - fi-bxt-j4205:       NOTRUN -> SKIP [fdo#109271] +47

  * igt@kms_force_connector_basic@prune-stale-modes:
    - fi-icl-u3:          NOTRUN -> SKIP [fdo#109285] +3

  * igt@kms_frontbuffer_tracking@basic:
    - fi-icl-u3:          NOTRUN -> FAIL [fdo#103167]
    - fi-hsw-peppy:       NOTRUN -> DMESG-FAIL [fdo#102614] / [fdo#107814]
    - fi-byt-clapper:     PASS -> FAIL [fdo#103167]

  * igt@kms_pipe_crc_basic@read-crc-pipe-a-frame-sequence:
    - fi-byt-clapper:     PASS -> FAIL [fdo#103191] / [fdo#107362]

  * igt@kms_psr@primary_mmap_gtt:
    - fi-cfl-8109u:       NOTRUN -> SKIP [fdo#109271] +37

  * igt@kms_psr@primary_page_flip:
    - fi-apl-guc:         NOTRUN -> SKIP [fdo#109271] +50

  * igt@runner@aborted:
    - fi-bxt-dsi:         NOTRUN -> FAIL [fdo#109516]
    - fi-bsw-kefka:       NOTRUN -> FAIL [fdo#107709]
    - fi-apl-guc:         NOTRUN -> FAIL [fdo#108622] / [fdo#109720]

  
#### Possible fixes ####

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
    - fi-byt-clapper:     FAIL [fdo#103191] / [fdo#107362] -> PASS

  
  [fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103182]: https://bugs.freedesktop.org/show_bug.cgi?id=103182
  [fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362
  [fdo#107709]: https://bugs.freedesktop.org/show_bug.cgi?id=107709
  [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
  [fdo#107814]: https://bugs.freedesktop.org/show_bug.cgi?id=107814
  [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
  [fdo#108622]: https://bugs.freedesktop.org/show_bug.cgi?id=108622
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
  [fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
  [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
  [fdo#109516]: https://bugs.freedesktop.org/show_bug.cgi?id=109516
  [fdo#109720]: https://bugs.freedesktop.org/show_bug.cgi?id=109720


Participating hosts (36 -> 41)
------------------------------

  Additional (11): fi-bxt-dsi fi-bsw-n3050 fi-hsw-peppy fi-apl-guc fi-hsw-4770 fi-kbl-x1275 fi-bxt-j4205 fi-gdg-551 fi-icl-u3 fi-pnv-d510 fi-cfl-8109u 
  Missing    (6): fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan fi-ctg-p8600 fi-icl-y fi-bdw-samus 


Build changes
-------------

    * Linux: CI_DRM_5775 -> Patchwork_12521

  CI_DRM_5775: 3ead1aea2137c77a4fe00637dca589736397d885 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4890: 6d4d6949a099521003de252358601d22115e27ef @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_12521: 86f30be0f25b753924890c33616910d87bdee519 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

86f30be0f25b drm/i915/selftests: Provide stub reset functions
d4a462c68333 drm/i915/selftests: Calculate maximum ring size for preemption chain
fc8491052559 drm/i915/selftests: add test to verify get/put fw domains

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12521/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[PATCH] drm/i915/selftests: add test to verify get/put fw domains

[Chris Wilson]

From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

Exercise acquiring and releasing forcewake around register reads. In
order to read a register behind a GT powerwell, we need to instruct that
powerwell to wake up using a forcewake. When we no longer require the GT
powerwell, we tell the GT to release our forcewake. Inside the
forcewake, the register read should work but outside it should just
return garbage, 0 being the most common garbage. Thus we can detect when
we are inside and outside of the forcewake with just a simple register
read, and so can verify that the GT powerwell is released when we say
so.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/selftests/intel_uncore.c | 105 +++++++++++++++++-
 1 file changed, 99 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/selftests/intel_uncore.c b/drivers/gpu/drm/i915/selftests/intel_uncore.c
index 81d9d31042a9..76b1f71e2972 100644
--- a/drivers/gpu/drm/i915/selftests/intel_uncore.c
+++ b/drivers/gpu/drm/i915/selftests/intel_uncore.c
@@ -119,9 +119,101 @@ int intel_uncore_mock_selftests(void)
 	return 0;
 }
 
-static int intel_uncore_check_forcewake_domains(struct drm_i915_private *dev_priv)
+static int live_forcewake_ops(void *arg)
+{
+	struct drm_i915_private *i915 = arg;
+	struct intel_uncore_forcewake_domain *domain;
+	struct intel_engine_cs *engine;
+	enum intel_engine_id id;
+	intel_wakeref_t wakeref;
+	unsigned int tmp;
+	int err = 0;
+
+	GEM_BUG_ON(i915->gt.awake);
+
+	/* vlv/chv with their pcu behave differently wrt reads */
+	if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
+		return 0;
+
+	wakeref = intel_runtime_pm_get(i915);
+
+	for_each_fw_domain(domain, i915, tmp) {
+		smp_store_mb(domain->active, false);
+		if (!hrtimer_cancel(&domain->timer))
+			continue;
+
+		intel_uncore_fw_release_timer(&domain->timer);
+	}
+
+	for_each_engine(engine, i915, id) {
+		i915_reg_t offset = RING_START(engine->mmio_base);
+		u32 __iomem *reg = i915->regs + i915_mmio_reg_offset(offset);
+		enum forcewake_domains fw_domains;
+		u32 val;
+
+		if (!engine->default_state)
+			continue;
+
+		fw_domains = intel_uncore_forcewake_for_reg(i915, offset,
+							    FW_REG_READ);
+		if (!fw_domains)
+			continue;
+
+		for_each_fw_domain_masked(domain, fw_domains, i915, tmp) {
+			if (!domain->wake_count)
+				continue;
+
+			pr_err("fw_domain %s still active, aborting test!\n",
+			       intel_uncore_forcewake_domain_to_str(domain->id));
+			err = -EINVAL;
+			goto out_rpm;
+		}
+
+		intel_uncore_forcewake_get(i915, fw_domains);
+		val = readl(reg);
+		intel_uncore_forcewake_put(i915, fw_domains);
+
+		/* Flush the forcewake release (delayed onto a timer) */
+		for_each_fw_domain_masked(domain, fw_domains, i915, tmp) {
+			smp_store_mb(domain->active, false);
+			if (hrtimer_cancel(&domain->timer))
+				intel_uncore_fw_release_timer(&domain->timer);
+
+			preempt_disable();
+			err = wait_ack_clear(domain, FORCEWAKE_KERNEL);
+			preempt_enable();
+			if (err) {
+				pr_err("Failed to clear fw_domain %s\n",
+				       intel_uncore_forcewake_domain_to_str(domain->id));
+				goto out_rpm;
+			}
+		}
+
+		if (!val) {
+			pr_err("%s:RING_START was zero while fw was held!\n",
+			       engine->name);
+			err = -EINVAL;
+			goto out_rpm;
+		}
+
+		/* We then expect the read to return 0 outside of the fw */
+		if (wait_for(readl(reg) == 0, 100)) {
+			pr_err("%s:RING_START=%0x, fw_domains 0x%x still up after 100ms!\n",
+			       engine->name, readl(reg), fw_domains);
+			err = -ETIMEDOUT;
+			goto out_rpm;
+		}
+	}
+
+out_rpm:
+	intel_runtime_pm_put(i915, wakeref);
+	return err;
+}
+
+static int live_forcewake_domains(void *arg)
 {
 #define FW_RANGE 0x40000
+	struct drm_i915_private *dev_priv = arg;
 	unsigned long *valid;
 	u32 offset;
 	int err;
@@ -179,6 +271,11 @@ static int intel_uncore_check_forcewake_domains(struct drm_i915_private *dev_pri
 
 int intel_uncore_live_selftests(struct drm_i915_private *i915)
 {
+	static const struct i915_subtest tests[] = {
+		SUBTEST(live_forcewake_ops),
+		SUBTEST(live_forcewake_domains),
+	};
+
 	int err;
 
 	/* Confirm the table we load is still valid */
@@ -188,9 +285,5 @@ int intel_uncore_live_selftests(struct drm_i915_private *i915)
 	if (err)
 		return err;
 
-	err = intel_uncore_check_forcewake_domains(i915);
-	if (err)
-		return err;
-
-	return 0;
+	return i915_subtests(tests, i915);
 }
-- 
2.20.1

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Re: [PATCH] drm/i915/selftests: add test to verify get/put fw domains

[Daniele Ceraolo Spurio]

<snip>

> +
> +	for_each_engine(engine, i915, id) {
> +		i915_reg_t offset = RING_START(engine->mmio_base);

I had a failure on the BCS on gen8 with this register in my trybot run. 
Maybe we can use RING_MI_MODE instead? if we wait for idle at the 
beginning of the test we should always have the IDLE bit set, so we're 
guaranteed a non-zero value with FW.

Daniele
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✗ Fi.CI.CHECKPATCH: warning for series starting with drm/i915/selftests: add test to verify get/put fw domains (rev3)

[Patchwork]

== Series Details ==

Series: series starting with drm/i915/selftests: add test to verify get/put fw domains (rev3)
URL   : https://patchwork.freedesktop.org/series/58202/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
2c248c918b79 drm/i915/selftests: add test to verify get/put fw domains
-:48: WARNING:MEMORY_BARRIER: memory barrier without comment
#48: FILE: drivers/gpu/drm/i915/selftests/intel_uncore.c:141:
+		smp_store_mb(domain->active, false);

-:85: WARNING:MEMORY_BARRIER: memory barrier without comment
#85: FILE: drivers/gpu/drm/i915/selftests/intel_uncore.c:178:
+			smp_store_mb(domain->active, false);

total: 0 errors, 2 warnings, 0 checks, 123 lines checked
b78212329721 drm/i915/selftests: Calculate maximum ring size for preemption chain
b2fb051c9c17 drm/i915/selftests: Provide stub reset functions

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✗ Fi.CI.BAT: failure for series starting with drm/i915/selftests: add test to verify get/put fw domains (rev3)

[Patchwork]

== Series Details ==

Series: series starting with drm/i915/selftests: add test to verify get/put fw domains (rev3)
URL   : https://patchwork.freedesktop.org/series/58202/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_5775 -> Patchwork_12523
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_12523 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_12523, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/58202/revisions/3/mbox/

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_12523:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_selftest@live_uncore:
    - fi-bdw-5557u:       PASS -> DMESG-FAIL
    - fi-bdw-gvtdvm:      PASS -> DMESG-FAIL

  
Known issues
------------

  Here are the changes found in Patchwork_12523 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@amdgpu/amd_prime@amd-to-i915:
    - fi-kbl-x1275:       NOTRUN -> SKIP [fdo#109271] +45

  * igt@gem_ctx_create@basic-files:
    - fi-gdg-551:         NOTRUN -> SKIP [fdo#109271] +106

  * igt@gem_exec_basic@readonly-bsd2:
    - fi-pnv-d510:        NOTRUN -> SKIP [fdo#109271] +76

  * igt@i915_pm_rpm@module-reload:
    - fi-skl-6770hq:      PASS -> DMESG-FAIL [fdo#105541] / [fdo#108511]

  * igt@i915_selftest@live_evict:
    - fi-bsw-kefka:       PASS -> DMESG-WARN [fdo#107709]

  * igt@i915_selftest@live_execlists:
    - fi-apl-guc:         NOTRUN -> INCOMPLETE [fdo#103927] / [fdo#109720]

  * igt@kms_busy@basic-flip-a:
    - fi-gdg-551:         NOTRUN -> FAIL [fdo#103182] +1
    - fi-bsw-n3050:       NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +1

  * igt@kms_busy@basic-flip-c:
    - fi-gdg-551:         NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
    - fi-pnv-d510:        NOTRUN -> SKIP [fdo#109271] / [fdo#109278]

  * igt@kms_chamelium@hdmi-crc-fast:
    - fi-bsw-n3050:       NOTRUN -> SKIP [fdo#109271] +62

  * igt@kms_force_connector_basic@force-load-detect:
    - fi-bxt-j4205:       NOTRUN -> SKIP [fdo#109271] +47

  * igt@kms_psr@primary_mmap_gtt:
    - fi-cfl-8109u:       NOTRUN -> SKIP [fdo#109271] +37

  * igt@kms_psr@primary_page_flip:
    - fi-apl-guc:         NOTRUN -> SKIP [fdo#109271] +50

  * igt@runner@aborted:
    - fi-bxt-dsi:         NOTRUN -> FAIL [fdo#109516]
    - fi-bsw-kefka:       NOTRUN -> FAIL [fdo#107709]

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103182]: https://bugs.freedesktop.org/show_bug.cgi?id=103182
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#105541]: https://bugs.freedesktop.org/show_bug.cgi?id=105541
  [fdo#107709]: https://bugs.freedesktop.org/show_bug.cgi?id=107709
  [fdo#108511]: https://bugs.freedesktop.org/show_bug.cgi?id=108511
  [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
  [fdo#109516]: https://bugs.freedesktop.org/show_bug.cgi?id=109516
  [fdo#109638]: https://bugs.freedesktop.org/show_bug.cgi?id=109638
  [fdo#109720]: https://bugs.freedesktop.org/show_bug.cgi?id=109720


Participating hosts (36 -> 37)
------------------------------

  Additional (8): fi-bxt-dsi fi-bsw-n3050 fi-apl-guc fi-kbl-x1275 fi-bxt-j4205 fi-gdg-551 fi-cfl-8109u fi-pnv-d510 
  Missing    (7): fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan fi-snb-2520m fi-ctg-p8600 fi-byt-clapper fi-bdw-samus 


Build changes
-------------

    * Linux: CI_DRM_5775 -> Patchwork_12523

  CI_DRM_5775: 3ead1aea2137c77a4fe00637dca589736397d885 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4890: 6d4d6949a099521003de252358601d22115e27ef @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_12523: b2fb051c9c17c541879b8ffe058b23198c970d4e @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

b2fb051c9c17 drm/i915/selftests: Provide stub reset functions
b78212329721 drm/i915/selftests: Calculate maximum ring size for preemption chain
2c248c918b79 drm/i915/selftests: add test to verify get/put fw domains

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12523/
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[PATCH] drm/i915/selftests: add test to verify get/put fw domains

[Chris Wilson]

From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

Exercise acquiring and releasing forcewake around register reads. In
order to read a register behind a GT powerwell, we need to instruct that
powerwell to wake up using a forcewake. When we no longer require the GT
powerwell, we tell the GT to release our forcewake. Inside the
forcewake, the register read should work but outside it should just
return garbage, 0 being the most common garbage. Thus we can detect when
we are inside and outside of the forcewake with just a simple register
read, and so can verify that the GT powerwell is released when we say
so.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/selftests/intel_uncore.c | 105 +++++++++++++++++-
 1 file changed, 99 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/selftests/intel_uncore.c b/drivers/gpu/drm/i915/selftests/intel_uncore.c
index 81d9d31042a9..a53aca6631b8 100644
--- a/drivers/gpu/drm/i915/selftests/intel_uncore.c
+++ b/drivers/gpu/drm/i915/selftests/intel_uncore.c
@@ -119,9 +119,101 @@ int intel_uncore_mock_selftests(void)
 	return 0;
 }
 
-static int intel_uncore_check_forcewake_domains(struct drm_i915_private *dev_priv)
+static int live_forcewake_ops(void *arg)
+{
+	struct drm_i915_private *i915 = arg;
+	struct intel_uncore_forcewake_domain *domain;
+	struct intel_engine_cs *engine;
+	enum intel_engine_id id;
+	intel_wakeref_t wakeref;
+	unsigned int tmp;
+	int err = 0;
+
+	GEM_BUG_ON(i915->gt.awake);
+
+	/* vlv/chv with their pcu behave differently wrt reads */
+	if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
+		return 0;
+
+	wakeref = intel_runtime_pm_get(i915);
+
+	for_each_fw_domain(domain, i915, tmp) {
+		smp_store_mb(domain->active, false);
+		if (!hrtimer_cancel(&domain->timer))
+			continue;
+
+		intel_uncore_fw_release_timer(&domain->timer);
+	}
+
+	for_each_engine(engine, i915, id) {
+		i915_reg_t offset = RING_MI_MODE(engine->mmio_base);
+		u32 __iomem *reg = i915->regs + i915_mmio_reg_offset(offset);
+		enum forcewake_domains fw_domains;
+		u32 val;
+
+		if (!engine->default_state)
+			continue;
+
+		fw_domains = intel_uncore_forcewake_for_reg(i915, offset,
+							    FW_REG_READ);
+		if (!fw_domains)
+			continue;
+
+		for_each_fw_domain_masked(domain, fw_domains, i915, tmp) {
+			if (!domain->wake_count)
+				continue;
+
+			pr_err("fw_domain %s still active, aborting test!\n",
+			       intel_uncore_forcewake_domain_to_str(domain->id));
+			err = -EINVAL;
+			goto out_rpm;
+		}
+
+		intel_uncore_forcewake_get(i915, fw_domains);
+		val = readl(reg);
+		intel_uncore_forcewake_put(i915, fw_domains);
+
+		/* Flush the forcewake release (delayed onto a timer) */
+		for_each_fw_domain_masked(domain, fw_domains, i915, tmp) {
+			smp_store_mb(domain->active, false);
+			if (hrtimer_cancel(&domain->timer))
+				intel_uncore_fw_release_timer(&domain->timer);
+
+			preempt_disable();
+			err = wait_ack_clear(domain, FORCEWAKE_KERNEL);
+			preempt_enable();
+			if (err) {
+				pr_err("Failed to clear fw_domain %s\n",
+				       intel_uncore_forcewake_domain_to_str(domain->id));
+				goto out_rpm;
+			}
+		}
+
+		if (!val) {
+			pr_err("%s:RING_MI_MODE was zero while fw was held!\n",
+			       engine->name);
+			err = -EINVAL;
+			goto out_rpm;
+		}
+
+		/* We then expect the read to return 0 outside of the fw */
+		if (wait_for(readl(reg) == 0, 100)) {
+			pr_err("%s:RING_MI_MODE=%0x, fw_domains 0x%x still up after 100ms!\n",
+			       engine->name, readl(reg), fw_domains);
+			err = -ETIMEDOUT;
+			goto out_rpm;
+		}
+	}
+
+out_rpm:
+	intel_runtime_pm_put(i915, wakeref);
+	return err;
+}
+
+static int live_forcewake_domains(void *arg)
 {
 #define FW_RANGE 0x40000
+	struct drm_i915_private *dev_priv = arg;
 	unsigned long *valid;
 	u32 offset;
 	int err;
@@ -179,6 +271,11 @@ static int intel_uncore_check_forcewake_domains(struct drm_i915_private *dev_pri
 
 int intel_uncore_live_selftests(struct drm_i915_private *i915)
 {
+	static const struct i915_subtest tests[] = {
+		SUBTEST(live_forcewake_ops),
+		SUBTEST(live_forcewake_domains),
+	};
+
 	int err;
 
 	/* Confirm the table we load is still valid */
@@ -188,9 +285,5 @@ int intel_uncore_live_selftests(struct drm_i915_private *i915)
 	if (err)
 		return err;
 
-	err = intel_uncore_check_forcewake_domains(i915);
-	if (err)
-		return err;
-
-	return 0;
+	return i915_subtests(tests, i915);
 }
-- 
2.20.1

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[PATCH v2] drm/i915/selftests: add test to verify get/put fw domains

[Chris Wilson]

From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

Exercise acquiring and releasing forcewake around register reads. In
order to read a register behind a GT powerwell, we need to instruct that
powerwell to wake up using a forcewake. When we no longer require the GT
powerwell, we tell the GT to release our forcewake. Inside the
forcewake, the register read should work but outside it should just
return garbage, 0 being the most common garbage. Thus we can detect when
we are inside and outside of the forcewake with just a simple register
read, and so can verify that the GT powerwell is released when we say
so.

v2: Picked the right forcewaked register to return 0 outside of
forcewake is an art.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/selftests/intel_uncore.c | 134 +++++++++++++++++-
 1 file changed, 128 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/selftests/intel_uncore.c b/drivers/gpu/drm/i915/selftests/intel_uncore.c
index 81d9d31042a9..84ce50d732b7 100644
--- a/drivers/gpu/drm/i915/selftests/intel_uncore.c
+++ b/drivers/gpu/drm/i915/selftests/intel_uncore.c
@@ -119,9 +119,130 @@ int intel_uncore_mock_selftests(void)
 	return 0;
 }
 
-static int intel_uncore_check_forcewake_domains(struct drm_i915_private *dev_priv)
+static int live_forcewake_ops(void *arg)
+{
+	static const struct reg {
+		unsigned long platforms;
+		const char *name;
+		unsigned int offset;
+	} registers[] = {
+		{ 
+			INTEL_GEN_MASK(6, 7),
+			"RING_START",
+			0x38,
+		},
+		{
+			INTEL_GEN_MASK(8, BITS_PER_LONG - 1),
+			"RING_MI_MODE",
+			0x9c,
+		}
+	};
+	const struct reg *r;
+	struct drm_i915_private *i915 = arg;
+	struct intel_uncore_forcewake_domain *domain;
+	struct intel_engine_cs *engine;
+	enum intel_engine_id id;
+	intel_wakeref_t wakeref;
+	unsigned int tmp;
+	int err = 0;
+
+	GEM_BUG_ON(i915->gt.awake);
+
+	/* vlv/chv with their pcu behave differently wrt reads */
+	if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) {
+		pr_debug("PCU fakes forcewake badly; skipping\n");
+		return 0;
+	}
+
+	/* We have to pick carefully to get the exact behaviour we need */
+	for (r = registers; r->name; r++)
+		if (r->platforms & INTEL_INFO(i915)->gen_mask)
+			break;
+	if (!r->name) {
+		pr_debug("Forcewaked register not known for %s; skipping\n",
+			 intel_platform_name(INTEL_INFO(i915)->platform));
+		return 0;
+	}
+
+	wakeref = intel_runtime_pm_get(i915);
+
+	for_each_fw_domain(domain, i915, tmp) {
+		smp_store_mb(domain->active, false);
+		if (!hrtimer_cancel(&domain->timer))
+			continue;
+
+		intel_uncore_fw_release_timer(&domain->timer);
+	}
+
+	for_each_engine(engine, i915, id) {
+		i915_reg_t mmio = _MMIO(engine->mmio_base + r->offset);
+		u32 __iomem *reg = i915->regs + engine->mmio_base + r->offset;
+		enum forcewake_domains fw_domains;
+		u32 val;
+
+		if (!engine->default_state)
+			continue;
+
+		fw_domains = intel_uncore_forcewake_for_reg(i915, mmio,
+							    FW_REG_READ);
+		if (!fw_domains)
+			continue;
+
+		for_each_fw_domain_masked(domain, fw_domains, i915, tmp) {
+			if (!domain->wake_count)
+				continue;
+
+			pr_err("fw_domain %s still active, aborting test!\n",
+			       intel_uncore_forcewake_domain_to_str(domain->id));
+			err = -EINVAL;
+			goto out_rpm;
+		}
+
+		intel_uncore_forcewake_get(i915, fw_domains);
+		val = readl(reg);
+		intel_uncore_forcewake_put(i915, fw_domains);
+
+		/* Flush the forcewake release (delayed onto a timer) */
+		for_each_fw_domain_masked(domain, fw_domains, i915, tmp) {
+			smp_store_mb(domain->active, false);
+			if (hrtimer_cancel(&domain->timer))
+				intel_uncore_fw_release_timer(&domain->timer);
+
+			preempt_disable();
+			err = wait_ack_clear(domain, FORCEWAKE_KERNEL);
+			preempt_enable();
+			if (err) {
+				pr_err("Failed to clear fw_domain %s\n",
+				       intel_uncore_forcewake_domain_to_str(domain->id));
+				goto out_rpm;
+			}
+		}
+
+		if (!val) {
+			pr_err("%s:%s was zero while fw was held!\n",
+			       engine->name, r->name);
+			err = -EINVAL;
+			goto out_rpm;
+		}
+
+		/* We then expect the read to return 0 outside of the fw */
+		if (wait_for(readl(reg) == 0, 100)) {
+			pr_err("%s:%s=%0x, fw_domains 0x%x still up after 100ms!\n",
+			       engine->name, r->name, readl(reg), fw_domains);
+			err = -ETIMEDOUT;
+			goto out_rpm;
+		}
+	}
+
+out_rpm:
+	intel_runtime_pm_put(i915, wakeref);
+	return err;
+}
+
+static int live_forcewake_domains(void *arg)
 {
 #define FW_RANGE 0x40000
+	struct drm_i915_private *dev_priv = arg;
 	unsigned long *valid;
 	u32 offset;
 	int err;
@@ -179,6 +300,11 @@ static int intel_uncore_check_forcewake_domains(struct drm_i915_private *dev_pri
 
 int intel_uncore_live_selftests(struct drm_i915_private *i915)
 {
+	static const struct i915_subtest tests[] = {
+		SUBTEST(live_forcewake_ops),
+		SUBTEST(live_forcewake_domains),
+	};
+
 	int err;
 
 	/* Confirm the table we load is still valid */
@@ -188,9 +314,5 @@ int intel_uncore_live_selftests(struct drm_i915_private *i915)
 	if (err)
 		return err;
 
-	err = intel_uncore_check_forcewake_domains(i915);
-	if (err)
-		return err;
-
-	return 0;
+	return i915_subtests(tests, i915);
 }
-- 
2.20.1

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✗ Fi.CI.CHECKPATCH: warning for series starting with drm/i915/selftests: add test to verify get/put fw domains (rev4)

[Patchwork]

== Series Details ==

Series: series starting with drm/i915/selftests: add test to verify get/put fw domains (rev4)
URL   : https://patchwork.freedesktop.org/series/58202/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
776050824830 drm/i915/selftests: add test to verify get/put fw domains
-:48: WARNING:MEMORY_BARRIER: memory barrier without comment
#48: FILE: drivers/gpu/drm/i915/selftests/intel_uncore.c:141:
+		smp_store_mb(domain->active, false);

-:85: WARNING:MEMORY_BARRIER: memory barrier without comment
#85: FILE: drivers/gpu/drm/i915/selftests/intel_uncore.c:178:
+			smp_store_mb(domain->active, false);

total: 0 errors, 2 warnings, 0 checks, 123 lines checked
a00cd5cd75e0 drm/i915/selftests: Calculate maximum ring size for preemption chain
c814abb74e5f drm/i915/selftests: Provide stub reset functions

_______________________________________________
Intel-gfx mailing list
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✗ Fi.CI.BAT: failure for series starting with drm/i915/selftests: add test to verify get/put fw domains (rev4)

[Patchwork]

== Series Details ==

Series: series starting with drm/i915/selftests: add test to verify get/put fw domains (rev4)
URL   : https://patchwork.freedesktop.org/series/58202/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_5775 -> Patchwork_12524
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_12524 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_12524, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/58202/revisions/4/mbox/

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_12524:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_selftest@live_uncore:
    - fi-ivb-3770:        PASS -> DMESG-FAIL

  
Known issues
------------

  Here are the changes found in Patchwork_12524 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@amdgpu/amd_cs_nop@sync-fork-compute0:
    - fi-icl-u3:          NOTRUN -> SKIP [fdo#109315] +17

  * igt@amdgpu/amd_prime@amd-to-i915:
    - fi-kbl-x1275:       NOTRUN -> SKIP [fdo#109271] +45

  * igt@gem_ctx_create@basic-files:
    - fi-gdg-551:         NOTRUN -> SKIP [fdo#109271] +106

  * igt@gem_exec_basic@gtt-bsd1:
    - fi-icl-u3:          NOTRUN -> SKIP [fdo#109276] +7

  * igt@gem_exec_basic@readonly-bsd2:
    - fi-pnv-d510:        NOTRUN -> SKIP [fdo#109271] +76

  * igt@gem_exec_parse@basic-rejected:
    - fi-icl-u3:          NOTRUN -> SKIP [fdo#109289] +1

  * igt@gem_exec_store@basic-bsd2:
    - fi-hsw-4770:        NOTRUN -> SKIP [fdo#109271] +41

  * igt@gem_exec_suspend@basic-s3:
    - fi-blb-e6850:       PASS -> INCOMPLETE [fdo#107718]

  * igt@i915_pm_rpm@module-reload:
    - fi-skl-6770hq:      PASS -> FAIL [fdo#108511]

  * igt@i915_selftest@live_contexts:
    - fi-icl-u3:          NOTRUN -> DMESG-FAIL [fdo#108569]

  * igt@i915_selftest@live_execlists:
    - fi-apl-guc:         NOTRUN -> INCOMPLETE [fdo#103927] / [fdo#109720]

  * igt@kms_busy@basic-flip-a:
    - fi-gdg-551:         NOTRUN -> FAIL [fdo#103182] +1

  * igt@kms_busy@basic-flip-c:
    - fi-gdg-551:         NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
    - fi-pnv-d510:        NOTRUN -> SKIP [fdo#109271] / [fdo#109278]

  * igt@kms_chamelium@hdmi-edid-read:
    - fi-hsw-peppy:       NOTRUN -> SKIP [fdo#109271] +46
    - fi-icl-u3:          NOTRUN -> SKIP [fdo#109284] +8

  * igt@kms_force_connector_basic@force-load-detect:
    - fi-bxt-j4205:       NOTRUN -> SKIP [fdo#109271] +47

  * igt@kms_force_connector_basic@prune-stale-modes:
    - fi-icl-u3:          NOTRUN -> SKIP [fdo#109285] +3

  * igt@kms_frontbuffer_tracking@basic:
    - fi-icl-u3:          NOTRUN -> FAIL [fdo#103167]
    - fi-hsw-peppy:       NOTRUN -> DMESG-FAIL [fdo#102614] / [fdo#107814]

  * igt@kms_psr@primary_mmap_gtt:
    - fi-cfl-8109u:       NOTRUN -> SKIP [fdo#109271] +37

  * igt@kms_psr@primary_page_flip:
    - fi-apl-guc:         NOTRUN -> SKIP [fdo#109271] +50

  * igt@runner@aborted:
    - fi-bxt-dsi:         NOTRUN -> FAIL [fdo#109516]
    - fi-apl-guc:         NOTRUN -> FAIL [fdo#108622] / [fdo#109720]

  
  [fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103182]: https://bugs.freedesktop.org/show_bug.cgi?id=103182
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
  [fdo#107814]: https://bugs.freedesktop.org/show_bug.cgi?id=107814
  [fdo#108511]: https://bugs.freedesktop.org/show_bug.cgi?id=108511
  [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
  [fdo#108622]: https://bugs.freedesktop.org/show_bug.cgi?id=108622
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
  [fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
  [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
  [fdo#109516]: https://bugs.freedesktop.org/show_bug.cgi?id=109516
  [fdo#109720]: https://bugs.freedesktop.org/show_bug.cgi?id=109720


Participating hosts (36 -> 40)
------------------------------

  Additional (10): fi-bxt-dsi fi-hsw-peppy fi-apl-guc fi-hsw-4770 fi-kbl-x1275 fi-bxt-j4205 fi-gdg-551 fi-icl-u3 fi-pnv-d510 fi-cfl-8109u 
  Missing    (6): fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper fi-bdw-samus 


Build changes
-------------

    * Linux: CI_DRM_5775 -> Patchwork_12524

  CI_DRM_5775: 3ead1aea2137c77a4fe00637dca589736397d885 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4890: 6d4d6949a099521003de252358601d22115e27ef @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_12524: c814abb74e5f1e34bd2f87dc38d1009d5df2b67b @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

c814abb74e5f drm/i915/selftests: Provide stub reset functions
a00cd5cd75e0 drm/i915/selftests: Calculate maximum ring size for preemption chain
776050824830 drm/i915/selftests: add test to verify get/put fw domains

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12524/
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✗ Fi.CI.CHECKPATCH: warning for series starting with [v2] drm/i915/selftests: add test to verify get/put fw domains (rev5)

[Patchwork]

== Series Details ==

Series: series starting with [v2] drm/i915/selftests: add test to verify get/put fw domains (rev5)
URL   : https://patchwork.freedesktop.org/series/58202/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
7b3b753c99d3 drm/i915/selftests: add test to verify get/put fw domains
-:39: ERROR:TRAILING_WHITESPACE: trailing whitespace
#39: FILE: drivers/gpu/drm/i915/selftests/intel_uncore.c:129:
+^I^I{ $

-:80: WARNING:MEMORY_BARRIER: memory barrier without comment
#80: FILE: drivers/gpu/drm/i915/selftests/intel_uncore.c:170:
+		smp_store_mb(domain->active, false);

-:117: WARNING:MEMORY_BARRIER: memory barrier without comment
#117: FILE: drivers/gpu/drm/i915/selftests/intel_uncore.c:207:
+			smp_store_mb(domain->active, false);

total: 1 errors, 2 warnings, 0 checks, 152 lines checked
a53482214287 drm/i915/selftests: Calculate maximum ring size for preemption chain

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✗ Fi.CI.BAT: failure for series starting with [v2] drm/i915/selftests: add test to verify get/put fw domains (rev5)

[Patchwork]

== Series Details ==

Series: series starting with [v2] drm/i915/selftests: add test to verify get/put fw domains (rev5)
URL   : https://patchwork.freedesktop.org/series/58202/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_5778 -> Patchwork_12525
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_12525 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_12525, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/58202/revisions/5/mbox/

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_12525:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_pm_rpm@basic-pci-d3-state:
    - fi-skl-6600u:       PASS -> FAIL

  
Known issues
------------

  Here are the changes found in Patchwork_12525 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
    - fi-blb-e6850:       PASS -> INCOMPLETE [fdo#107718]

  
#### Possible fixes ####

  * igt@i915_selftest@live_execlists:
    - fi-apl-guc:         INCOMPLETE [fdo#103927] / [fdo#109720] -> PASS

  * igt@i915_selftest@live_hangcheck:
    - fi-skl-iommu:       INCOMPLETE [fdo#108602] / [fdo#108744] -> PASS

  * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence:
    - fi-byt-clapper:     FAIL [fdo#103191] / [fdo#107362] -> PASS

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362
  [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
  [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
  [fdo#108602]: https://bugs.freedesktop.org/show_bug.cgi?id=108602
  [fdo#108744]: https://bugs.freedesktop.org/show_bug.cgi?id=108744
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
  [fdo#109294]: https://bugs.freedesktop.org/show_bug.cgi?id=109294
  [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
  [fdo#109720]: https://bugs.freedesktop.org/show_bug.cgi?id=109720
  [fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189


Participating hosts (49 -> 42)
------------------------------

  Additional (1): fi-icl-y 
  Missing    (8): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-pnv-d510 fi-bdw-samus 


Build changes
-------------

    * Linux: CI_DRM_5778 -> Patchwork_12525

  CI_DRM_5778: 110de1a2cf715beda24f357eda8afd6404d63dda @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4892: 8ae86621d6fff60b6e20c6b0f9b336785c935b0f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_12525: a5348221428704a582978dbaae2468e31d29d7ae @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

a53482214287 drm/i915/selftests: Calculate maximum ring size for preemption chain
7b3b753c99d3 drm/i915/selftests: add test to verify get/put fw domains

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12525/
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx