All of lore.kernel.org
 help / color / mirror / Atom feed
From: Jani Nikula <jani.nikula@linux.intel.com>
To: Uma Shankar <uma.shankar@intel.com>, intel-gfx@lists.freedesktop.org
Cc: shobhit.kumar@intel.com
Subject: Re: [PATCH 08/12] drm/i915/bxt: DSI disable and post-disable
Date: Mon, 25 May 2015 19:44:47 +0300	[thread overview]
Message-ID: <878uccip34.fsf@intel.com> (raw)
In-Reply-To: <1432310765-2218-9-git-send-email-uma.shankar@intel.com>

On Fri, 22 May 2015, Uma Shankar <uma.shankar@intel.com> wrote:
> From: Shashank Sharma <shashank.sharma@intel.com>
>
> This patch contains changes to support DSI disble sequence in BXT.
> The changes are:
> 1. BXT specific changes in clear_device_ready function.
> 2. BXT specific changes in DSI disable and post-disable functions.
> 3. Add a new function to reset BXT Dphy clock and dividers
>    (bxt_dsi_reset_clocks).
> 4. Moved some part of the vlv clock reset code, in a new function
>    (vlv_dsi_reset_clocks) maintaining the exact same sequence.
> 5. Wrapper function to call corresponding reset clock function.
>
> Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> Signed-off-by: Shashank Sharma <shashank.sharma@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_dsi.c     |   39 ++++++++++++++++++++------------
>  drivers/gpu/drm/i915/intel_dsi.h     |    2 ++
>  drivers/gpu/drm/i915/intel_dsi_pll.c |   41 ++++++++++++++++++++++++++++++++++
>  3 files changed, 68 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
> index 729faf6..e4b96bc 100644
> --- a/drivers/gpu/drm/i915/intel_dsi.c
> +++ b/drivers/gpu/drm/i915/intel_dsi.c
> @@ -427,12 +427,16 @@ static void intel_dsi_port_disable(struct intel_encoder *encoder)
>  	struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
>  	enum port port;
>  	u32 temp;
> +	u32 port_ctrl;
>  
>  	for_each_dsi_port(port, intel_dsi->ports) {
>  		/* de-assert ip_tg_enable signal */
> -		temp = I915_READ(MIPI_PORT_CTRL(port));
> -		I915_WRITE(MIPI_PORT_CTRL(port), temp & ~DPI_ENABLE);
> -		POSTING_READ(MIPI_PORT_CTRL(port));
> +		port_ctrl = IS_BROXTON(dev) ?
> +				BXT_MIPI_PORT_CTRL(port) :
> +					MIPI_PORT_CTRL(port);
> +		temp = I915_READ(port_ctrl);
> +		I915_WRITE(port_ctrl, temp & ~DPI_ENABLE);
> +		POSTING_READ(port_ctrl);
>  	}
>  }
>  
> @@ -570,12 +574,7 @@ static void intel_dsi_disable(struct intel_encoder *encoder)
>  		/* Panel commands can be sent when clock is in LP11 */
>  		I915_WRITE(MIPI_DEVICE_READY(port), 0x0);
>  
> -		temp = I915_READ(MIPI_CTRL(port));
> -		temp &= ~ESCAPE_CLOCK_DIVIDER_MASK;
> -		I915_WRITE(MIPI_CTRL(port), temp |
> -			   intel_dsi->escape_clk_div <<
> -			   ESCAPE_CLOCK_DIVIDER_SHIFT);
> -
> +		intel_dsi_reset_clocks(encoder, port);
>  		I915_WRITE(MIPI_EOT_DISABLE(port), CLOCKSTOP);
>  
>  		temp = I915_READ(MIPI_DSI_FUNC_PRG(port));
> @@ -594,12 +593,15 @@ static void intel_dsi_disable(struct intel_encoder *encoder)
>  
>  static void intel_dsi_clear_device_ready(struct intel_encoder *encoder)
>  {
> +	struct drm_device *dev = encoder->base.dev;

You don't need dev. IS_BROXTON and IS_VALLEYVIEW eat both dev and
dev_priv.

>  	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
>  	struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
>  	enum port port;
>  	u32 val;
> +	u32 port_ctrl;
>  
>  	DRM_DEBUG_KMS("\n");
> +

Unrelated whitespace change.

>  	for_each_dsi_port(port, intel_dsi->ports) {
>  
>  		I915_WRITE(MIPI_DEVICE_READY(port), DEVICE_READY |
> @@ -614,18 +616,27 @@ static void intel_dsi_clear_device_ready(struct intel_encoder *encoder)
>  							ULPS_STATE_ENTER);
>  		usleep_range(2000, 2500);
>  
> +		if (IS_BROXTON(dev))
> +			port_ctrl = BXT_MIPI_PORT_CTRL(port);
> +		else if (IS_VALLEYVIEW(dev))
> +			port_ctrl = MIPI_PORT_CTRL(PORT_A);
> +		else {
> +			DRM_ERROR("Invalid DSI device to clear device ready\n");
> +			return;

Please drop all such else branches.

> +		}
> +
>  		/* Wait till Clock lanes are in LP-00 state for MIPI Port A
>  		 * only. MIPI Port C has no similar bit for checking
>  		 */
> -		if (wait_for(((I915_READ(MIPI_PORT_CTRL(PORT_A)) & AFE_LATCHOUT)
> +		if (wait_for(((I915_READ(port_ctrl) & AFE_LATCHOUT)
>  							== 0x00000), 30))
>  			DRM_ERROR("DSI LP not going Low\n");
>  
>  		/* Disable MIPI PHY transparent latch
>  		 * Common bit for both MIPI Port A & MIPI Port C
>  		 */
> -		val = I915_READ(MIPI_PORT_CTRL(PORT_A));
> -		I915_WRITE(MIPI_PORT_CTRL(PORT_A), val & ~LP_OUTPUT_HOLD);
> +		val = I915_READ(port_ctrl);
> +		I915_WRITE(port_ctrl, val & ~LP_OUTPUT_HOLD);
>  		usleep_range(1000, 1500);
>  
>  		I915_WRITE(MIPI_DEVICE_READY(port), 0x00);
> @@ -637,14 +648,14 @@ static void intel_dsi_clear_device_ready(struct intel_encoder *encoder)
>  
>  static void intel_dsi_post_disable(struct intel_encoder *encoder)
>  {
> -	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
> +	struct drm_device *dev = encoder->base.dev;
> +	struct drm_i915_private *dev_priv = dev->dev_private;

Unnecessary change.

>  	struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
>  	u32 val;
>  
>  	DRM_DEBUG_KMS("\n");
>  
>  	intel_dsi_disable(encoder);
> -

Unrelated whitespace change.

>  	intel_dsi_clear_device_ready(encoder);
>  
>  	val = I915_READ(DSPCLK_GATE_D);
> diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h
> index af5a09f..8bc8d94 100644
> --- a/drivers/gpu/drm/i915/intel_dsi.h
> +++ b/drivers/gpu/drm/i915/intel_dsi.h
> @@ -125,6 +125,8 @@ extern void intel_enable_dsi_pll(struct intel_encoder *encoder);
>  extern void intel_disable_dsi_pll(struct intel_encoder *encoder);
>  extern u32 vlv_get_dsi_pclk(struct intel_encoder *encoder, int pipe_bpp);
>  extern void bxt_dsi_program_clocks(struct drm_device *dev, int pipe);
> +extern void intel_dsi_reset_clocks(struct intel_encoder *encoder,
> +						enum port port);
>  
>  struct drm_panel *vbt_panel_init(struct intel_dsi *intel_dsi, u16 panel_id);
>  
> diff --git a/drivers/gpu/drm/i915/intel_dsi_pll.c b/drivers/gpu/drm/i915/intel_dsi_pll.c
> index 9a8a35d..49330b0 100644
> --- a/drivers/gpu/drm/i915/intel_dsi_pll.c
> +++ b/drivers/gpu/drm/i915/intel_dsi_pll.c
> @@ -369,6 +369,19 @@ u32 vlv_get_dsi_pclk(struct intel_encoder *encoder, int pipe_bpp)
>  	return pclk;
>  }
>  
> +void vlv_dsi_reset_clocks(struct intel_encoder *encoder, enum port port)
> +{
> +	u32 temp;
> +	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
> +	struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
> +
> +	temp = I915_READ(MIPI_CTRL(port));
> +	temp &= ~ESCAPE_CLOCK_DIVIDER_MASK;
> +	I915_WRITE(MIPI_CTRL(port), temp |
> +			intel_dsi->escape_clk_div <<
> +			ESCAPE_CLOCK_DIVIDER_SHIFT);
> +}
> +
>  /* Program BXT Mipi clocks and dividers */
>  void bxt_dsi_program_clocks(struct drm_device *dev, int pipe)
>  {
> @@ -515,3 +528,31 @@ void intel_disable_dsi_pll(struct intel_encoder *encoder)
>  	else
>  		DRM_ERROR("Invalid DSI device to pre_pll_enable\n");
>  }
> +
> +void bxt_dsi_reset_clocks(struct intel_encoder *encoder, enum port port)
> +{
> +	u32 tmp;
> +	struct drm_device *dev = encoder->base.dev;
> +	struct drm_i915_private *dev_priv = dev->dev_private;
> +
> +	/* Clear old configurations */
> +	tmp = I915_READ(BXT_MIPI_CLOCK_CTL);
> +	tmp &= ~(BXT_MIPI_TX_ESCLK_FIXDIV_MASK(port));
> +	tmp &= ~(BXT_MIPI_RX_ESCLK_FIXDIV_MASK(port));
> +	tmp &= ~(BXT_MIPI_ESCLK_VAR_DIV_MASK(port));
> +	tmp &= ~(BXT_MIPI_DPHY_DIVIDER_MASK(port));
> +	I915_WRITE(BXT_MIPI_CLOCK_CTL, tmp);
> +	I915_WRITE(MIPI_EOT_DISABLE(port), CLOCKSTOP);
> +}
> +
> +void intel_dsi_reset_clocks(struct intel_encoder *encoder, enum port port)
> +{
> +	struct drm_device *dev = encoder->base.dev;
> +
> +	if (IS_BROXTON(dev))
> +		bxt_dsi_reset_clocks(encoder, port);
> +	else if (IS_VALLEYVIEW(dev))
> +		vlv_dsi_reset_clocks(encoder, port);
> +	else
> +		DRM_ERROR("Invalid DSI device to reset clocks\n");

Please drop all such else branches.

> +}
> -- 
> 1.7.9.5
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2015-05-25 16:46 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-05-22 16:05 [PATCH 00/12] *** MIPI DSI Support for BXT *** Uma Shankar
2015-05-22 16:05 ` [PATCH 01/12] drm/i915/bxt: Initialize MIPI for BXT Uma Shankar
2015-05-22 16:05 ` [PATCH 02/12] drm/i915/bxt: Enable BXT DSI PLL Uma Shankar
2015-05-25 16:10   ` Jani Nikula
2015-05-22 16:05 ` [PATCH 03/12] drm/i915/bxt: Disable DSI PLL for BXT Uma Shankar
2015-05-25 16:12   ` Jani Nikula
2015-05-22 16:05 ` [PATCH 04/12] drm/i915/bxt: DSI prepare changes " Uma Shankar
2015-05-25 16:25   ` Jani Nikula
2015-05-22 16:05 ` [PATCH 05/12] drm/i915/bxt: DSI encoder support in CRTC modeset Uma Shankar
2015-05-25 10:13   ` Jani Nikula
2015-05-25 11:24     ` Jani Nikula
2015-05-25 10:25   ` Jani Nikula
2015-05-26  7:11     ` Daniel Vetter
2015-05-26  7:19       ` Jani Nikula
2015-05-26  8:26         ` Daniel Vetter
2015-05-22 16:05 ` [PATCH 06/12] drm/i915/bxt: DSI enable for BXT Uma Shankar
2015-05-25 16:39   ` Jani Nikula
2015-05-22 16:06 ` [PATCH 07/12] drm/i915/bxt: Program Tx Rx and Dphy clocks Uma Shankar
2015-05-25 16:52   ` Jani Nikula
2015-05-22 16:06 ` [PATCH 08/12] drm/i915/bxt: DSI disable and post-disable Uma Shankar
2015-05-25 16:44   ` Jani Nikula [this message]
2015-05-22 16:06 ` [PATCH 09/12] drm/i915/bxt: get_hw_state for BXT Uma Shankar
2015-05-22 16:06 ` [PATCH 10/12] drm/i915/bxt: get DSI pixelclock Uma Shankar
2015-05-25 16:54   ` Jani Nikula
2015-05-22 16:06 ` [PATCH 11/12] drm/i915/bxt: Modify BXT BLC according to VBT changes Uma Shankar
2015-05-25 10:03   ` Jani Nikula
2015-05-25 16:57     ` Jani Nikula
2015-05-22 16:06 ` [PATCH 12/12] drm/i915/bxt: Remove DSP CLK_GATE programming for BXT Uma Shankar

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=878uccip34.fsf@intel.com \
    --to=jani.nikula@linux.intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=shobhit.kumar@intel.com \
    --cc=uma.shankar@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.