From: Jani Nikula <jani.nikula@linux.intel.com>
To: Uma Shankar <uma.shankar@intel.com>, intel-gfx@lists.freedesktop.org
Cc: shobhit.kumar@intel.com
Subject: Re: [PATCH 03/12] drm/i915/bxt: Disable DSI PLL for BXT
Date: Mon, 25 May 2015 19:12:42 +0300 [thread overview]
Message-ID: <87h9r0iqkl.fsf@intel.com> (raw)
In-Reply-To: <1432310765-2218-4-git-send-email-uma.shankar@intel.com>
On Fri, 22 May 2015, Uma Shankar <uma.shankar@intel.com> wrote:
> From: Shashank Sharma <shashank.sharma@intel.com>
>
> This patch adds two new functions:
> - disable_dsi_pll.
> BXT DSI disable sequence and registers are
> different from previous platforms.
> - intel_disable_dsi_pll
> wrapper function to re-use the same code for
> multiple platforms. It checks platform type and
> calls appropriate core pll disable function.
>
> Signed-off-by: Shashank Sharma <shashank.sharma@intel.com>
> Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> ---
> drivers/gpu/drm/i915/intel_dsi.c | 2 +-
> drivers/gpu/drm/i915/intel_dsi.h | 2 +-
> drivers/gpu/drm/i915/intel_dsi_pll.c | 31 ++++++++++++++++++++++++++++++-
> 3 files changed, 32 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
> index 1927546..2c0ea6f 100644
> --- a/drivers/gpu/drm/i915/intel_dsi.c
> +++ b/drivers/gpu/drm/i915/intel_dsi.c
> @@ -553,7 +553,7 @@ static void intel_dsi_clear_device_ready(struct intel_encoder *encoder)
> usleep_range(2000, 2500);
> }
>
> - vlv_disable_dsi_pll(encoder);
> + intel_disable_dsi_pll(encoder);
> }
>
> static void intel_dsi_post_disable(struct intel_encoder *encoder)
> diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h
> index 20cfcf07..759983e 100644
> --- a/drivers/gpu/drm/i915/intel_dsi.h
> +++ b/drivers/gpu/drm/i915/intel_dsi.h
> @@ -122,7 +122,7 @@ static inline struct intel_dsi *enc_to_intel_dsi(struct drm_encoder *encoder)
> }
>
> extern void intel_enable_dsi_pll(struct intel_encoder *encoder);
> -extern void vlv_disable_dsi_pll(struct intel_encoder *encoder);
> +extern void intel_disable_dsi_pll(struct intel_encoder *encoder);
> extern u32 vlv_get_dsi_pclk(struct intel_encoder *encoder, int pipe_bpp);
>
> struct drm_panel *vbt_panel_init(struct intel_dsi *intel_dsi, u16 panel_id);
> diff --git a/drivers/gpu/drm/i915/intel_dsi_pll.c b/drivers/gpu/drm/i915/intel_dsi_pll.c
> index a58f0a1..0cbcf32 100644
> --- a/drivers/gpu/drm/i915/intel_dsi_pll.c
> +++ b/drivers/gpu/drm/i915/intel_dsi_pll.c
> @@ -267,7 +267,7 @@ static void vlv_enable_dsi_pll(struct intel_encoder *encoder)
> DRM_DEBUG_KMS("DSI PLL locked\n");
> }
>
> -void vlv_disable_dsi_pll(struct intel_encoder *encoder)
> +static void vlv_disable_dsi_pll(struct intel_encoder *encoder)
> {
> struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
> u32 tmp;
> @@ -440,6 +440,23 @@ static void bxt_enable_dsi_pll(struct intel_encoder *encoder)
> DRM_DEBUG_KMS("DSI PLL locked\n");
> }
>
> +static void bxt_disable_dsi_pll(struct intel_encoder *encoder)
> +{
> + struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
> +
> + DRM_DEBUG_KMS("\n");
> +
> + /* Disable DSI PLL */
That is obvious from the code.
> + I915_WRITE(BXT_DSI_PLL_ENABLE, 0);
> +
> + /* Should timeout and fail if not locked after 200 us */
> + if (wait_for((I915_READ(BXT_DSI_PLL_ENABLE)
> + & BXT_DSI_PLL_LOCKED) == 0, 1)) {
> + DRM_ERROR("Disable: DSI PLL not locked\n");
not unlocked?
> + return;
Unnecessary return statement.
> + }
> +}
> +
> void intel_enable_dsi_pll(struct intel_encoder *encoder)
> {
> struct drm_device *dev = encoder->base.dev;
> @@ -451,3 +468,15 @@ void intel_enable_dsi_pll(struct intel_encoder *encoder)
> else
> DRM_ERROR("Invalid DSI device to pre_pll_enable\n");
> }
> +
> +void intel_disable_dsi_pll(struct intel_encoder *encoder)
> +{
> + struct drm_device *dev = encoder->base.dev;
> +
> + if (IS_VALLEYVIEW(dev))
> + vlv_disable_dsi_pll(encoder);
> + else if (IS_BROXTON(dev))
> + bxt_disable_dsi_pll(encoder);
> + else
> + DRM_ERROR("Invalid DSI device to pre_pll_enable\n");
Please drop the else branch.
BR,
Jani.
> +}
> --
> 1.7.9.5
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
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next prev parent reply other threads:[~2015-05-25 16:14 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-22 16:05 [PATCH 00/12] *** MIPI DSI Support for BXT *** Uma Shankar
2015-05-22 16:05 ` [PATCH 01/12] drm/i915/bxt: Initialize MIPI for BXT Uma Shankar
2015-05-22 16:05 ` [PATCH 02/12] drm/i915/bxt: Enable BXT DSI PLL Uma Shankar
2015-05-25 16:10 ` Jani Nikula
2015-05-22 16:05 ` [PATCH 03/12] drm/i915/bxt: Disable DSI PLL for BXT Uma Shankar
2015-05-25 16:12 ` Jani Nikula [this message]
2015-05-22 16:05 ` [PATCH 04/12] drm/i915/bxt: DSI prepare changes " Uma Shankar
2015-05-25 16:25 ` Jani Nikula
2015-05-22 16:05 ` [PATCH 05/12] drm/i915/bxt: DSI encoder support in CRTC modeset Uma Shankar
2015-05-25 10:13 ` Jani Nikula
2015-05-25 11:24 ` Jani Nikula
2015-05-25 10:25 ` Jani Nikula
2015-05-26 7:11 ` Daniel Vetter
2015-05-26 7:19 ` Jani Nikula
2015-05-26 8:26 ` Daniel Vetter
2015-05-22 16:05 ` [PATCH 06/12] drm/i915/bxt: DSI enable for BXT Uma Shankar
2015-05-25 16:39 ` Jani Nikula
2015-05-22 16:06 ` [PATCH 07/12] drm/i915/bxt: Program Tx Rx and Dphy clocks Uma Shankar
2015-05-25 16:52 ` Jani Nikula
2015-05-22 16:06 ` [PATCH 08/12] drm/i915/bxt: DSI disable and post-disable Uma Shankar
2015-05-25 16:44 ` Jani Nikula
2015-05-22 16:06 ` [PATCH 09/12] drm/i915/bxt: get_hw_state for BXT Uma Shankar
2015-05-22 16:06 ` [PATCH 10/12] drm/i915/bxt: get DSI pixelclock Uma Shankar
2015-05-25 16:54 ` Jani Nikula
2015-05-22 16:06 ` [PATCH 11/12] drm/i915/bxt: Modify BXT BLC according to VBT changes Uma Shankar
2015-05-25 10:03 ` Jani Nikula
2015-05-25 16:57 ` Jani Nikula
2015-05-22 16:06 ` [PATCH 12/12] drm/i915/bxt: Remove DSP CLK_GATE programming for BXT Uma Shankar
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