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From: Thomas Gleixner <tglx@kernel.org>
To: Changhuang Liang <changhuang.liang@starfivetech.com>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>
Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	linux-riscv@lists.infradead.org,
	Ley Foon Tan <leyfoon.tan@starfivetech.com>,
	Changhuang Liang <changhuang.liang@starfivetech.com>
Subject: Re: [PATCH v1 3/5] irqchip: starfive: Use devm_ interfaces to simplify resource release
Date: Fri, 10 Apr 2026 16:32:00 +0200	[thread overview]
Message-ID: <87a4va28f3.ffs@tglx> (raw)
In-Reply-To: <20260410090106.622781-4-changhuang.liang@starfivetech.com>

On Fri, Apr 10 2026 at 02:01, Changhuang Liang wrote:
> -	irqc->base = of_iomap(intc, 0);
> +	irqc->base = devm_platform_ioremap_resource(pdev, 0);
>  	if (!irqc->base) {
> -		pr_err("Unable to map registers\n");
> +		dev_err(&pdev->dev, "unable to map registers\n");
>  		ret = -ENXIO;
>  		goto err_free;

You can eliminate err_free as well by doing:

    struct startfive_irq_chip *irqc __free(kfree) = kzalloc_obj(*irqc);

    ....
    dev_info(..);

    retain_and_null_ptr(irqc);
    return 0;

Thanks,

        tglx

WARNING: multiple messages have this Message-ID (diff)
From: Thomas Gleixner <tglx@kernel.org>
To: Changhuang Liang <changhuang.liang@starfivetech.com>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>
Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	linux-riscv@lists.infradead.org,
	Ley Foon Tan <leyfoon.tan@starfivetech.com>,
	Changhuang Liang <changhuang.liang@starfivetech.com>
Subject: Re: [PATCH v1 3/5] irqchip: starfive: Use devm_ interfaces to simplify resource release
Date: Fri, 10 Apr 2026 16:32:00 +0200	[thread overview]
Message-ID: <87a4va28f3.ffs@tglx> (raw)
In-Reply-To: <20260410090106.622781-4-changhuang.liang@starfivetech.com>

On Fri, Apr 10 2026 at 02:01, Changhuang Liang wrote:
> -	irqc->base = of_iomap(intc, 0);
> +	irqc->base = devm_platform_ioremap_resource(pdev, 0);
>  	if (!irqc->base) {
> -		pr_err("Unable to map registers\n");
> +		dev_err(&pdev->dev, "unable to map registers\n");
>  		ret = -ENXIO;
>  		goto err_free;

You can eliminate err_free as well by doing:

    struct startfive_irq_chip *irqc __free(kfree) = kzalloc_obj(*irqc);

    ....
    dev_info(..);

    retain_and_null_ptr(irqc);
    return 0;

Thanks,

        tglx

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  parent reply	other threads:[~2026-04-10 14:32 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-10  9:01 [PATCH v1 0/5] Add interrupt controller for JHB100 SoC Changhuang Liang
2026-04-10  9:01 ` Changhuang Liang
2026-04-10  9:01 ` [PATCH v1 1/5] dt-bindings: interrupt-controller: Convert the word "jh8100" to "jhb100" Changhuang Liang
2026-04-10  9:01   ` Changhuang Liang
2026-04-10 17:43   ` Conor Dooley
2026-04-10 17:43     ` Conor Dooley
2026-04-10  9:01 ` [PATCH v1 2/5] irqchip: starfive: " Changhuang Liang
2026-04-10  9:01   ` Changhuang Liang
2026-04-10 14:26   ` Thomas Gleixner
2026-04-10 14:26     ` Thomas Gleixner
2026-04-10  9:01 ` [PATCH v1 3/5] irqchip: starfive: Use devm_ interfaces to simplify resource release Changhuang Liang
2026-04-10  9:01   ` Changhuang Liang
2026-04-10  9:27   ` Philipp Zabel
2026-04-10  9:27     ` Philipp Zabel
2026-04-10  9:53     ` Changhuang Liang
2026-04-10  9:53       ` Changhuang Liang
2026-04-10 14:32   ` Thomas Gleixner [this message]
2026-04-10 14:32     ` Thomas Gleixner
2026-04-10  9:01 ` [PATCH v1 4/5] irqchip: starfive: Increase the interrupt source number up to 64 Changhuang Liang
2026-04-10  9:01   ` Changhuang Liang
2026-04-10 14:37   ` Thomas Gleixner
2026-04-10 14:37     ` Thomas Gleixner
2026-04-10  9:01 ` [PATCH v1 5/5] irqchip: starfive: Implement irq_set_type and irq_ack hooks Changhuang Liang
2026-04-10  9:01   ` Changhuang Liang
2026-04-10 14:46   ` Thomas Gleixner
2026-04-10 14:46     ` Thomas Gleixner

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