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From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
	intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 04/15] drm/i915: Relocate skl_get_pfit_config()
Date: Wed, 19 Apr 2023 18:17:35 +0300	[thread overview]
Message-ID: <87a5z3zysw.fsf@intel.com> (raw)
In-Reply-To: <20230418175528.13117-5-ville.syrjala@linux.intel.com>

On Tue, 18 Apr 2023, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Move skl_get_pfit_config() next to the other skl+ scaler code
> and rename it to skl_scaler_get_config() so that it has a consistnet
> namespace.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 49 ++------------------
>  drivers/gpu/drm/i915/display/skl_scaler.c    | 37 +++++++++++++++
>  drivers/gpu/drm/i915/display/skl_scaler.h    |  2 +
>  3 files changed, 43 insertions(+), 45 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 1c264c17b6e4..a450d62e431c 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -3224,49 +3224,6 @@ void intel_cpu_transcoder_get_m2_n2(struct intel_crtc *crtc,
>  		      PIPE_LINK_M2(transcoder), PIPE_LINK_N2(transcoder));
>  }
>  
> -static void ilk_get_pfit_pos_size(struct intel_crtc_state *crtc_state,
> -				  u32 pos, u32 size)
> -{
> -	drm_rect_init(&crtc_state->pch_pfit.dst,
> -		      pos >> 16, pos & 0xffff,
> -		      size >> 16, size & 0xffff);
> -}
> -
> -static void skl_get_pfit_config(struct intel_crtc_state *crtc_state)
> -{
> -	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> -	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> -	struct intel_crtc_scaler_state *scaler_state = &crtc_state->scaler_state;
> -	int id = -1;
> -	int i;
> -
> -	/* find scaler attached to this pipe */
> -	for (i = 0; i < crtc->num_scalers; i++) {
> -		u32 ctl, pos, size;
> -
> -		ctl = intel_de_read(dev_priv, SKL_PS_CTRL(crtc->pipe, i));
> -		if ((ctl & (PS_SCALER_EN | PS_PLANE_SEL_MASK)) != PS_SCALER_EN)
> -			continue;
> -
> -		id = i;
> -		crtc_state->pch_pfit.enabled = true;
> -
> -		pos = intel_de_read(dev_priv, SKL_PS_WIN_POS(crtc->pipe, i));
> -		size = intel_de_read(dev_priv, SKL_PS_WIN_SZ(crtc->pipe, i));
> -
> -		ilk_get_pfit_pos_size(crtc_state, pos, size);
> -
> -		scaler_state->scalers[i].in_use = true;
> -		break;
> -	}
> -
> -	scaler_state->scaler_id = id;
> -	if (id >= 0)
> -		scaler_state->scaler_users |= (1 << SKL_CRTC_INDEX);
> -	else
> -		scaler_state->scaler_users &= ~(1 << SKL_CRTC_INDEX);
> -}
> -
>  static void ilk_get_pfit_config(struct intel_crtc_state *crtc_state)
>  {
>  	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> @@ -3282,7 +3239,9 @@ static void ilk_get_pfit_config(struct intel_crtc_state *crtc_state)
>  	pos = intel_de_read(dev_priv, PF_WIN_POS(crtc->pipe));
>  	size = intel_de_read(dev_priv, PF_WIN_SZ(crtc->pipe));
>  
> -	ilk_get_pfit_pos_size(crtc_state, pos, size);
> +	drm_rect_init(&crtc_state->pch_pfit.dst,
> +		      pos >> 16, pos & 0xffff,
> +		      size >> 16, size & 0xffff);
>  
>  	/*
>  	 * We currently do not free assignements of panel fitters on
> @@ -3773,7 +3732,7 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc,
>  	if (intel_display_power_get_in_set_if_enabled(dev_priv, &crtc->hw_readout_power_domains,
>  						      POWER_DOMAIN_PIPE_PANEL_FITTER(crtc->pipe))) {
>  		if (DISPLAY_VER(dev_priv) >= 9)
> -			skl_get_pfit_config(pipe_config);
> +			skl_scaler_get_config(pipe_config);
>  		else
>  			ilk_get_pfit_config(pipe_config);
>  	}
> diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c
> index 62443834f64e..ec930aec21c4 100644
> --- a/drivers/gpu/drm/i915/display/skl_scaler.c
> +++ b/drivers/gpu/drm/i915/display/skl_scaler.c
> @@ -856,3 +856,40 @@ void skl_scaler_disable(const struct intel_crtc_state *old_crtc_state)
>  	for (i = 0; i < crtc->num_scalers; i++)
>  		skl_detach_scaler(crtc, i);
>  }
> +
> +void skl_scaler_get_config(struct intel_crtc_state *crtc_state)
> +{
> +	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> +	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> +	struct intel_crtc_scaler_state *scaler_state = &crtc_state->scaler_state;
> +	int id = -1;
> +	int i;
> +
> +	/* find scaler attached to this pipe */
> +	for (i = 0; i < crtc->num_scalers; i++) {
> +		u32 ctl, pos, size;
> +
> +		ctl = intel_de_read(dev_priv, SKL_PS_CTRL(crtc->pipe, i));
> +		if ((ctl & (PS_SCALER_EN | PS_PLANE_SEL_MASK)) != PS_SCALER_EN)
> +			continue;
> +
> +		id = i;
> +		crtc_state->pch_pfit.enabled = true;
> +
> +		pos = intel_de_read(dev_priv, SKL_PS_WIN_POS(crtc->pipe, i));
> +		size = intel_de_read(dev_priv, SKL_PS_WIN_SZ(crtc->pipe, i));
> +
> +		drm_rect_init(&crtc_state->pch_pfit.dst,
> +			      pos >> 16, pos & 0xffff,
> +			      size >> 16, size & 0xffff);
> +
> +		scaler_state->scalers[i].in_use = true;
> +		break;
> +	}
> +
> +	scaler_state->scaler_id = id;
> +	if (id >= 0)
> +		scaler_state->scaler_users |= (1 << SKL_CRTC_INDEX);
> +	else
> +		scaler_state->scaler_users &= ~(1 << SKL_CRTC_INDEX);
> +}
> diff --git a/drivers/gpu/drm/i915/display/skl_scaler.h b/drivers/gpu/drm/i915/display/skl_scaler.h
> index f040f6ac061f..63f93ca03c89 100644
> --- a/drivers/gpu/drm/i915/display/skl_scaler.h
> +++ b/drivers/gpu/drm/i915/display/skl_scaler.h
> @@ -32,4 +32,6 @@ void skl_program_plane_scaler(struct intel_plane *plane,
>  void skl_detach_scalers(const struct intel_crtc_state *crtc_state);
>  void skl_scaler_disable(const struct intel_crtc_state *old_crtc_state);
>  
> +void skl_scaler_get_config(struct intel_crtc_state *crtc_state);
> +
>  #endif

-- 
Jani Nikula, Intel Open Source Graphics Center

  reply	other threads:[~2023-04-19 15:18 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-18 17:55 [Intel-gfx] [PATCH 00/15] drm/i915: Scaler/pfit stuff Ville Syrjala
2023-04-18 17:55 ` [Intel-gfx] [PATCH 01/15] drm/i915: Check pipe source size when using skl+ scalers Ville Syrjala
2023-04-18 17:55   ` Ville Syrjala
2023-04-19 15:11   ` [Intel-gfx] " Jani Nikula
2023-04-18 17:55 ` [Intel-gfx] [PATCH 02/15] drm/i915: Relocate VBLANK_EVASION_TIME_US Ville Syrjala
2023-04-19 15:13   ` Jani Nikula
2023-04-18 17:55 ` [Intel-gfx] [PATCH 03/15] drm/i915: Relocate intel_atomic_setup_scalers() Ville Syrjala
2023-04-19 15:16   ` Jani Nikula
2023-04-18 17:55 ` [Intel-gfx] [PATCH 04/15] drm/i915: Relocate skl_get_pfit_config() Ville Syrjala
2023-04-19 15:17   ` Jani Nikula [this message]
2023-04-18 17:55 ` [Intel-gfx] [PATCH 05/15] drm/i915: Use REG_BIT() & co for the pre-ilk pfit registers Ville Syrjala
2023-04-19 15:28   ` Jani Nikula
2023-04-18 17:55 ` [Intel-gfx] [PATCH 06/15] drm/i915: Namespace pfit registers properly Ville Syrjala
2023-04-19 15:28   ` Jani Nikula
2023-04-18 17:55 ` [Intel-gfx] [PATCH 07/15] drm/i915: Use REG_BIT() & co. for ilk+ pfit registers Ville Syrjala
2023-04-19 15:29   ` Jani Nikula
2023-04-18 17:55 ` [Intel-gfx] [PATCH 08/15] drm/i915: Drop a useless forward declararion Ville Syrjala
2023-04-19 15:30   ` Jani Nikula
2023-04-18 17:55 ` [Intel-gfx] [PATCH 09/15] drm/i915: Define bitmasks for ilk pfit window pos/size Ville Syrjala
2023-04-19 15:34   ` Jani Nikula
2023-04-20 12:09     ` Ville Syrjälä
2023-04-25 10:49       ` Ville Syrjälä
2023-04-18 17:55 ` [Intel-gfx] [PATCH 10/15] drm/i915: Remove dead scaler register defines Ville Syrjala
2023-04-19 15:35   ` Jani Nikula
2023-04-18 17:55 ` [Intel-gfx] [PATCH 11/15] drm/i915: Rename skl+ scaler binding bits Ville Syrjala
2023-04-18 19:36   ` [Intel-gfx] [PATCH v2 " Ville Syrjala
2023-04-19 15:38     ` Jani Nikula
2023-04-18 22:06   ` [Intel-gfx] [PATCH " kernel test robot
2023-04-19 15:38   ` Jani Nikula
2023-04-18 17:55 ` [Intel-gfx] [PATCH 12/15] drm/i915: s/PS_COEE_INDEX_AUTO_INC/PS_COEF_INDEX_AUTO_INC/ Ville Syrjala
2023-04-19 15:38   ` Jani Nikula
2023-04-18 17:55 ` [Intel-gfx] [PATCH 13/15] drm/i915: Define bitmasks for sik+ scaler window pos/size Ville Syrjala
2023-04-19 15:41   ` Jani Nikula
2023-04-18 17:55 ` [Intel-gfx] [PATCH 14/15] drm/i915: Use REG_BIT() & co. for pipe scaler registers Ville Syrjala
2023-04-19 15:48   ` Jani Nikula
2023-04-18 17:55 ` [Intel-gfx] [PATCH 15/15] drm/i915: Define more PS_CTRL bits Ville Syrjala
2023-04-18 18:31 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Scaler/pfit stuff Patchwork
2023-04-18 22:20 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Scaler/pfit stuff (rev2) Patchwork
2023-04-18 22:20 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-04-18 22:30 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-04-19  4:12 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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