From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
intel-gfx@lists.freedesktop.org
Cc: Takashi Iwai <tiwai@suse.de>
Subject: Re: [Intel-gfx] [PATCH 12/22] drm/i915/audio: Use intel_de_rmw() for most audio registers
Date: Wed, 12 Oct 2022 17:33:31 +0300 [thread overview]
Message-ID: <87a661w1qc.fsf@intel.com> (raw)
In-Reply-To: <20221011170011.17198-13-ville.syrjala@linux.intel.com>
On Tue, 11 Oct 2022, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> The audio code does a lot of RMW accesses. Utilize
> intel_de_rmw() to make that a bit less tedious.
>
> There are still some hand rolled RMW left, but those have
> a lot of code in between the read and write to calculate
> the new value, so would need some refactoring first.
>
> Cc: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
> Cc: Kai Vehmanen <kai.vehmanen@linux.intel.com>
> Cc: Takashi Iwai <tiwai@suse.de>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
With commit 06b975d58fd6 ("drm/i915: make intel_uncore_rmw() write
unconditionally") I feel much more comfortable doing these changes.
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_audio.c | 136 +++++++++------------
> 1 file changed, 56 insertions(+), 80 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_audio.c b/drivers/gpu/drm/i915/display/intel_audio.c
> index 9f64f52f895f..1b928d283b8d 100644
> --- a/drivers/gpu/drm/i915/display/intel_audio.c
> +++ b/drivers/gpu/drm/i915/display/intel_audio.c
> @@ -318,12 +318,10 @@ static void g4x_audio_codec_disable(struct intel_encoder *encoder,
> const struct drm_connector_state *old_conn_state)
> {
> struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> - u32 tmp;
>
> /* Invalidate ELD */
> - tmp = intel_de_read(i915, G4X_AUD_CNTL_ST);
> - tmp &= ~G4X_ELD_VALID;
> - intel_de_write(i915, G4X_AUD_CNTL_ST, tmp);
> + intel_de_rmw(i915, G4X_AUD_CNTL_ST,
> + G4X_ELD_VALID, 0);
> }
>
> static void g4x_audio_codec_enable(struct intel_encoder *encoder,
> @@ -334,11 +332,9 @@ static void g4x_audio_codec_enable(struct intel_encoder *encoder,
> struct drm_connector *connector = conn_state->connector;
> const u32 *eld = (const u32 *)connector->eld;
> int eld_buffer_size, len, i;
> - u32 tmp;
>
> - tmp = intel_de_read(i915, G4X_AUD_CNTL_ST);
> - tmp &= ~(G4X_ELD_VALID | G4X_ELD_ADDRESS_MASK);
> - intel_de_write(i915, G4X_AUD_CNTL_ST, tmp);
> + intel_de_rmw(i915, G4X_AUD_CNTL_ST,
> + G4X_ELD_VALID | G4X_ELD_ADDRESS_MASK, 0);
>
> eld_buffer_size = g4x_eld_buffer_size(i915);
> len = min(drm_eld_size(connector->eld) / 4, eld_buffer_size);
> @@ -351,9 +347,8 @@ static void g4x_audio_codec_enable(struct intel_encoder *encoder,
> drm_WARN_ON(&i915->drm,
> (intel_de_read(i915, G4X_AUD_CNTL_ST) & G4X_ELD_ADDRESS_MASK) != 0);
>
> - tmp = intel_de_read(i915, G4X_AUD_CNTL_ST);
> - tmp |= G4X_ELD_VALID;
> - intel_de_write(i915, G4X_AUD_CNTL_ST, tmp);
> + intel_de_rmw(i915, G4X_AUD_CNTL_ST,
> + 0, G4X_ELD_VALID);
> }
>
> static void
> @@ -472,25 +467,22 @@ static void hsw_audio_codec_disable(struct intel_encoder *encoder,
> {
> struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> enum transcoder cpu_transcoder = old_crtc_state->cpu_transcoder;
> - u32 tmp;
>
> mutex_lock(&i915->display.audio.mutex);
>
> /* Disable timestamps */
> - tmp = intel_de_read(i915, HSW_AUD_CFG(cpu_transcoder));
> - tmp &= ~AUD_CONFIG_N_VALUE_INDEX;
> - tmp |= AUD_CONFIG_N_PROG_ENABLE;
> - tmp &= ~AUD_CONFIG_UPPER_N_MASK;
> - tmp &= ~AUD_CONFIG_LOWER_N_MASK;
> - if (intel_crtc_has_dp_encoder(old_crtc_state))
> - tmp |= AUD_CONFIG_N_VALUE_INDEX;
> - intel_de_write(i915, HSW_AUD_CFG(cpu_transcoder), tmp);
> + intel_de_rmw(i915, HSW_AUD_CFG(cpu_transcoder),
> + AUD_CONFIG_N_VALUE_INDEX |
> + AUD_CONFIG_UPPER_N_MASK |
> + AUD_CONFIG_LOWER_N_MASK,
> + AUD_CONFIG_N_PROG_ENABLE |
> + intel_crtc_has_dp_encoder(old_crtc_state) ?
> + AUD_CONFIG_N_VALUE_INDEX : 0);
>
> - /* Invalidate ELD */
> - tmp = intel_de_read(i915, HSW_AUD_PIN_ELD_CP_VLD);
> - tmp &= ~AUDIO_ELD_VALID(cpu_transcoder);
> - tmp &= ~AUDIO_OUTPUT_ENABLE(cpu_transcoder);
> - intel_de_write(i915, HSW_AUD_PIN_ELD_CP_VLD, tmp);
> + /* Disable audio presence detect, invalidate ELD */
> + intel_de_rmw(i915, HSW_AUD_PIN_ELD_CP_VLD,
> + AUDIO_ELD_VALID(cpu_transcoder) |
> + AUDIO_OUTPUT_ENABLE(cpu_transcoder), 0);
>
> mutex_unlock(&i915->display.audio.mutex);
> }
> @@ -613,7 +605,6 @@ static void hsw_audio_codec_enable(struct intel_encoder *encoder,
> enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> const u32 *eld = (const u32 *)connector->eld;
> int eld_buffer_size, len, i;
> - u32 tmp;
>
> mutex_lock(&i915->display.audio.mutex);
>
> @@ -622,10 +613,9 @@ static void hsw_audio_codec_enable(struct intel_encoder *encoder,
> enable_audio_dsc_wa(encoder, crtc_state);
>
> /* Enable audio presence detect, invalidate ELD */
> - tmp = intel_de_read(i915, HSW_AUD_PIN_ELD_CP_VLD);
> - tmp |= AUDIO_OUTPUT_ENABLE(cpu_transcoder);
> - tmp &= ~AUDIO_ELD_VALID(cpu_transcoder);
> - intel_de_write(i915, HSW_AUD_PIN_ELD_CP_VLD, tmp);
> + intel_de_rmw(i915, HSW_AUD_PIN_ELD_CP_VLD,
> + AUDIO_ELD_VALID(cpu_transcoder),
> + AUDIO_OUTPUT_ENABLE(cpu_transcoder));
>
> /*
> * FIXME: We're supposed to wait for vblank here, but we have vblanks
> @@ -634,10 +624,9 @@ static void hsw_audio_codec_enable(struct intel_encoder *encoder,
> * infrastructure is not there yet.
> */
>
> - /* Reset ELD write address */
> - tmp = intel_de_read(i915, HSW_AUD_DIP_ELD_CTRL(cpu_transcoder));
> - tmp &= ~IBX_ELD_ADDRESS_MASK;
> - intel_de_write(i915, HSW_AUD_DIP_ELD_CTRL(cpu_transcoder), tmp);
> + /* Reset ELD address */
> + intel_de_rmw(i915, HSW_AUD_DIP_ELD_CTRL(cpu_transcoder),
> + IBX_ELD_ADDRESS_MASK, 0);
>
> eld_buffer_size = hsw_eld_buffer_size(i915, cpu_transcoder);
> len = min(drm_eld_size(connector->eld) / 4, eld_buffer_size);
> @@ -652,9 +641,8 @@ static void hsw_audio_codec_enable(struct intel_encoder *encoder,
> IBX_ELD_ADDRESS_MASK) != 0);
>
> /* ELD valid */
> - tmp = intel_de_read(i915, HSW_AUD_PIN_ELD_CP_VLD);
> - tmp |= AUDIO_ELD_VALID(cpu_transcoder);
> - intel_de_write(i915, HSW_AUD_PIN_ELD_CP_VLD, tmp);
> + intel_de_rmw(i915, HSW_AUD_PIN_ELD_CP_VLD,
> + 0, AUDIO_ELD_VALID(cpu_transcoder));
>
> /* Enable timestamps */
> hsw_audio_config_update(encoder, crtc_state);
> @@ -707,10 +695,9 @@ static void ilk_audio_codec_disable(struct intel_encoder *encoder,
> {
> struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);
> - enum pipe pipe = crtc->pipe;
> enum port port = encoder->port;
> + enum pipe pipe = crtc->pipe;
> struct ilk_audio_regs regs;
> - u32 tmp;
>
> if (drm_WARN_ON(&i915->drm, port == PORT_A))
> return;
> @@ -720,19 +707,17 @@ static void ilk_audio_codec_disable(struct intel_encoder *encoder,
> mutex_lock(&i915->display.audio.mutex);
>
> /* Disable timestamps */
> - tmp = intel_de_read(i915, regs.aud_config);
> - tmp &= ~AUD_CONFIG_N_VALUE_INDEX;
> - tmp |= AUD_CONFIG_N_PROG_ENABLE;
> - tmp &= ~AUD_CONFIG_UPPER_N_MASK;
> - tmp &= ~AUD_CONFIG_LOWER_N_MASK;
> - if (intel_crtc_has_dp_encoder(old_crtc_state))
> - tmp |= AUD_CONFIG_N_VALUE_INDEX;
> - intel_de_write(i915, regs.aud_config, tmp);
> + intel_de_rmw(i915, regs.aud_config,
> + AUD_CONFIG_N_VALUE_INDEX |
> + AUD_CONFIG_UPPER_N_MASK |
> + AUD_CONFIG_LOWER_N_MASK,
> + AUD_CONFIG_N_PROG_ENABLE |
> + intel_crtc_has_dp_encoder(old_crtc_state) ?
> + AUD_CONFIG_N_VALUE_INDEX : 0);
>
> /* Invalidate ELD */
> - tmp = intel_de_read(i915, regs.aud_cntrl_st2);
> - tmp &= ~IBX_ELD_VALID(port);
> - intel_de_write(i915, regs.aud_cntrl_st2, tmp);
> + intel_de_rmw(i915, regs.aud_cntrl_st2,
> + IBX_ELD_VALID(port), 0);
>
> mutex_unlock(&i915->display.audio.mutex);
> }
> @@ -745,11 +730,10 @@ static void ilk_audio_codec_enable(struct intel_encoder *encoder,
> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> struct drm_connector *connector = conn_state->connector;
> const u32 *eld = (const u32 *)connector->eld;
> - enum pipe pipe = crtc->pipe;
> enum port port = encoder->port;
> + enum pipe pipe = crtc->pipe;
> int eld_buffer_size, len, i;
> struct ilk_audio_regs regs;
> - u32 tmp;
>
> if (drm_WARN_ON(&i915->drm, port == PORT_A))
> return;
> @@ -766,14 +750,12 @@ static void ilk_audio_codec_enable(struct intel_encoder *encoder,
> mutex_lock(&i915->display.audio.mutex);
>
> /* Invalidate ELD */
> - tmp = intel_de_read(i915, regs.aud_cntrl_st2);
> - tmp &= ~IBX_ELD_VALID(port);
> - intel_de_write(i915, regs.aud_cntrl_st2, tmp);
> + intel_de_rmw(i915, regs.aud_cntrl_st2,
> + IBX_ELD_VALID(port), 0);
>
> - /* Reset ELD write address */
> - tmp = intel_de_read(i915, regs.aud_cntl_st);
> - tmp &= ~IBX_ELD_ADDRESS_MASK;
> - intel_de_write(i915, regs.aud_cntl_st, tmp);
> + /* Reset ELD address */
> + intel_de_rmw(i915, regs.aud_cntl_st,
> + IBX_ELD_ADDRESS_MASK, 0);
>
> eld_buffer_size = ilk_eld_buffer_size(i915, pipe);
> len = min(drm_eld_size(connector->eld) / 4, eld_buffer_size);
> @@ -787,20 +769,17 @@ static void ilk_audio_codec_enable(struct intel_encoder *encoder,
> (intel_de_read(i915, regs.aud_cntl_st) & IBX_ELD_ADDRESS_MASK) != 0);
>
> /* ELD valid */
> - tmp = intel_de_read(i915, regs.aud_cntrl_st2);
> - tmp |= IBX_ELD_VALID(port);
> - intel_de_write(i915, regs.aud_cntrl_st2, tmp);
> + intel_de_rmw(i915, regs.aud_cntrl_st2,
> + 0, IBX_ELD_VALID(port));
>
> /* Enable timestamps */
> - tmp = intel_de_read(i915, regs.aud_config);
> - tmp &= ~AUD_CONFIG_N_VALUE_INDEX;
> - tmp &= ~AUD_CONFIG_N_PROG_ENABLE;
> - tmp &= ~AUD_CONFIG_PIXEL_CLOCK_HDMI_MASK;
> - if (intel_crtc_has_dp_encoder(crtc_state))
> - tmp |= AUD_CONFIG_N_VALUE_INDEX;
> - else
> - tmp |= audio_config_hdmi_pixel_clock(crtc_state);
> - intel_de_write(i915, regs.aud_config, tmp);
> + intel_de_rmw(i915, regs.aud_config,
> + AUD_CONFIG_N_VALUE_INDEX |
> + AUD_CONFIG_N_PROG_ENABLE |
> + AUD_CONFIG_PIXEL_CLOCK_HDMI_MASK,
> + intel_crtc_has_dp_encoder(crtc_state) ?
> + AUD_CONFIG_N_VALUE_INDEX :
> + audio_config_hdmi_pixel_clock(crtc_state));
>
> mutex_unlock(&i915->display.audio.mutex);
> }
> @@ -1065,8 +1044,8 @@ static unsigned long i915_audio_component_get_power(struct device *kdev)
> glk_force_audio_cdclk(i915, true);
>
> if (DISPLAY_VER(i915) >= 10)
> - intel_de_write(i915, AUD_PIN_BUF_CTL,
> - (intel_de_read(i915, AUD_PIN_BUF_CTL) | AUD_PIN_BUF_ENABLE));
> + intel_de_rmw(i915, AUD_PIN_BUF_CTL,
> + 0, AUD_PIN_BUF_ENABLE);
> }
>
> return ret;
> @@ -1090,7 +1069,6 @@ static void i915_audio_component_codec_wake_override(struct device *kdev,
> {
> struct drm_i915_private *i915 = kdev_to_i915(kdev);
> unsigned long cookie;
> - u32 tmp;
>
> if (DISPLAY_VER(i915) < 9)
> return;
> @@ -1101,15 +1079,13 @@ static void i915_audio_component_codec_wake_override(struct device *kdev,
> * Enable/disable generating the codec wake signal, overriding the
> * internal logic to generate the codec wake to controller.
> */
> - tmp = intel_de_read(i915, HSW_AUD_CHICKENBIT);
> - tmp &= ~SKL_AUD_CODEC_WAKE_SIGNAL;
> - intel_de_write(i915, HSW_AUD_CHICKENBIT, tmp);
> + intel_de_rmw(i915, HSW_AUD_CHICKENBIT,
> + SKL_AUD_CODEC_WAKE_SIGNAL, 0);
> usleep_range(1000, 1500);
>
> if (enable) {
> - tmp = intel_de_read(i915, HSW_AUD_CHICKENBIT);
> - tmp |= SKL_AUD_CODEC_WAKE_SIGNAL;
> - intel_de_write(i915, HSW_AUD_CHICKENBIT, tmp);
> + intel_de_rmw(i915, HSW_AUD_CHICKENBIT,
> + 0, SKL_AUD_CODEC_WAKE_SIGNAL);
> usleep_range(1000, 1500);
> }
--
Jani Nikula, Intel Open Source Graphics Center
next prev parent reply other threads:[~2022-10-12 14:33 UTC|newest]
Thread overview: 67+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-11 16:59 [Intel-gfx] [PATCH 00/22] drm/i915: ELD precompute and readout Ville Syrjala
2022-10-11 16:59 ` [Intel-gfx] [PATCH 01/22] drm/i915/audio: s/dev_priv/i915/ Ville Syrjala
2022-10-12 14:35 ` Jani Nikula
2022-10-11 16:59 ` [Intel-gfx] [PATCH 02/22] drm/i915/audio: Nuke leftover ROUNDING_FACTOR Ville Syrjala
2022-10-12 14:36 ` Jani Nikula
2022-10-11 16:59 ` [Intel-gfx] [PATCH 03/22] drm/i915/audio: Remove CL/BLC audio stuff Ville Syrjala
2022-10-12 14:36 ` Jani Nikula
2022-10-11 16:59 ` [Intel-gfx] [PATCH 04/22] drm/i915/audio: Exract struct ilk_audio_regs Ville Syrjala
2022-10-12 14:36 ` Jani Nikula
2022-10-11 16:59 ` [Intel-gfx] [PATCH 05/22] drm/i915/audio: Use REG_BIT() & co Ville Syrjala
2022-10-12 14:37 ` Jani Nikula
2022-10-11 16:59 ` [Intel-gfx] [PATCH 06/22] drm/i915/audio: Unify register bit naming Ville Syrjala
2022-10-12 14:37 ` Jani Nikula
2022-10-11 16:59 ` [Intel-gfx] [PATCH 07/22] drm/i915/audio: Protect singleton register with a lock Ville Syrjala
2022-10-12 14:38 ` Jani Nikula
2022-10-11 16:59 ` [Intel-gfx] [PATCH 08/22] drm/i915/audio: Nuke intel_eld_uptodate() Ville Syrjala
2022-10-12 14:40 ` Jani Nikula
2022-10-11 16:59 ` [Intel-gfx] [PATCH 09/22] drm/i915/audio: Read ELD buffer size from hardware Ville Syrjala
2022-10-12 14:41 ` Jani Nikula
2022-10-12 14:46 ` Jani Nikula
2022-10-11 16:59 ` [Intel-gfx] [PATCH 10/22] drm/i915/audio: Make sure we write the whole ELD buffer Ville Syrjala
2022-10-12 14:28 ` Jani Nikula
2022-10-12 15:03 ` Ville Syrjälä
2022-10-12 16:06 ` Jani Nikula
2022-10-11 17:00 ` [Intel-gfx] [PATCH 11/22] drm/i915/audio: Use u32* for ELD Ville Syrjala
2022-10-12 14:42 ` Jani Nikula
2022-10-11 17:00 ` [Intel-gfx] [PATCH 12/22] drm/i915/audio: Use intel_de_rmw() for most audio registers Ville Syrjala
2022-10-11 21:00 ` kernel test robot
2022-10-11 23:05 ` kernel test robot
2022-10-12 14:33 ` Jani Nikula [this message]
2022-10-12 15:05 ` Ville Syrjälä
2022-10-11 17:00 ` [Intel-gfx] [PATCH 13/22] drm/i915/audio: Split "ELD valid" vs. audio PD on hsw+ Ville Syrjala
2022-10-12 15:01 ` Jani Nikula
2022-10-11 17:00 ` [Intel-gfx] [PATCH 14/22] drm/i915/audio: Do the vblank waits Ville Syrjala
2022-10-12 15:01 ` Jani Nikula
2022-10-11 17:00 ` [Intel-gfx] [PATCH 15/22] drm/i915/audio: Precompute the ELD Ville Syrjala
2022-10-12 15:11 ` Jani Nikula
2022-10-11 17:00 ` [Intel-gfx] [PATCH 16/22] drm/i915/audio: Hardware ELD readout Ville Syrjala
2022-10-12 15:19 ` Jani Nikula
2022-10-11 17:00 ` [Intel-gfx] [PATCH 17/22] drm/i915/sdvo: Extract intel_sdvo_has_audio() Ville Syrjala
2022-10-12 15:15 ` Jani Nikula
2022-10-11 17:00 ` [Intel-gfx] [PATCH 18/22] drm/i915/sdvo: Precompute the ELD Ville Syrjala
2022-10-12 15:16 ` Jani Nikula
2022-10-11 17:00 ` [Intel-gfx] [PATCH 19/22] drm/i915/sdvo: Do ELD hardware readout Ville Syrjala
2022-10-12 15:22 ` Jani Nikula
2022-10-11 17:00 ` [Intel-gfx] [PATCH 20/22] drm/i915/audio: Hook up ELD into the state checker Ville Syrjala
2022-10-12 15:25 ` Jani Nikula
2022-10-11 17:00 ` [Intel-gfx] [PATCH 21/22] drm/i915/audio: Include ELD in the state dump Ville Syrjala
2022-10-12 15:26 ` Jani Nikula
2022-10-11 17:00 ` [Intel-gfx] [PATCH 22/22] hax: drm/i915/audio: Make HSW hardware ELD buffer sort of work Ville Syrjala
2022-10-12 10:49 ` [Intel-gfx] [PATCH v2 22/22] drm/i915/audio: Resume HSW/BDW HDA controller around ELD access Ville Syrjala
2022-10-12 11:08 ` Ville Syrjälä
2022-10-12 11:42 ` Kai Vehmanen
2022-10-12 13:53 ` Kai Vehmanen
2022-10-12 14:24 ` Ville Syrjälä
2022-10-19 18:06 ` Ville Syrjälä
2022-10-14 10:51 ` Kai Vehmanen
2022-10-19 18:43 ` Ville Syrjälä
2022-10-11 17:39 ` [Intel-gfx] [PATCH 00/22] drm/i915: ELD precompute and readout Jani Nikula
2022-10-11 20:38 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2022-10-11 20:38 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-10-11 21:00 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-10-12 12:33 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: ELD precompute and readout (rev2) Patchwork
2022-10-12 12:33 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-10-12 12:58 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-10-14 9:03 ` [Intel-gfx] [PATCH 00/22] drm/i915: ELD precompute and readout Borah, Chaitanya Kumar
2022-10-14 9:13 ` Jani Nikula
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