* [PATCH v2 0/4] RISC-V: Various XIP fixes
@ 2022-04-20 18:40 ` Palmer Dabbelt
0 siblings, 0 replies; 22+ messages in thread
From: Palmer Dabbelt @ 2022-04-20 18:40 UTC (permalink / raw)
To: linux-riscv, rdunlap
Cc: Paul Walmsley, Palmer Dabbelt, aou, anup, vincent.chen, guoren,
Atish Patra, alexandre.ghiti, jszhang, vitaly.wool, gatecat,
wangkefeng.wang, mick, panqinglin2020, rppt, linux-riscv,
linux-kernel, linux
I found a handful of XIP-related bit rot when chasing down a
LKP-reported issue. They're not really related, aside from all being
XIP-related. I thought I had an XIP build test, I'll make sure to
add/resurrect one when I get back around to these.
Changes since v1 <20220419194846.18318-1-palmer@rivosinc.com>:
* Defines the mapping functions themselves to have no-op bodies, as
opposed to wrapping their uses.
* 2-4 are new patches.
^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH v2 1/4] RISC-V: Avoid empty create_*_mapping definitions
2022-04-20 18:40 ` Palmer Dabbelt
@ 2022-04-20 18:40 ` Palmer Dabbelt
-1 siblings, 0 replies; 22+ messages in thread
From: Palmer Dabbelt @ 2022-04-20 18:40 UTC (permalink / raw)
To: linux-riscv, rdunlap
Cc: Paul Walmsley, Palmer Dabbelt, aou, anup, vincent.chen, guoren,
Atish Patra, alexandre.ghiti, jszhang, vitaly.wool, gatecat,
wangkefeng.wang, mick, panqinglin2020, rppt, linux-riscv,
linux-kernel, linux, Palmer Dabbelt, kernel test robot
From: Palmer Dabbelt <palmer@rivosinc.com>
At least one use of these, that in create_fdt_early_page_table(),
triggers warnings and should cause a real error (create_pmd_mpping()
ends up skipped on XIP_KERNEL).
Reported-by: kernel test robot <lkp@intel.com>
Fixes: 677b9eb8810e ("riscv: mm: Prepare pt_ops helper functions for sv57")
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
---
arch/riscv/mm/init.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
index 9535bea8688c..7bc9a21e29fb 100644
--- a/arch/riscv/mm/init.c
+++ b/arch/riscv/mm/init.c
@@ -567,9 +567,9 @@ static void __init create_p4d_mapping(p4d_t *p4dp,
create_pte_mapping(__nextp, __va, __pa, __sz, __prot)
#define fixmap_pgd_next ((uintptr_t)fixmap_pte)
#define early_dtb_pgd_next ((uintptr_t)early_dtb_pmd)
-#define create_p4d_mapping(__pmdp, __va, __pa, __sz, __prot)
-#define create_pud_mapping(__pmdp, __va, __pa, __sz, __prot)
-#define create_pmd_mapping(__pmdp, __va, __pa, __sz, __prot)
+#define create_p4d_mapping(__pmdp, __va, __pa, __sz, __prot) do {} while(0)
+#define create_pud_mapping(__pmdp, __va, __pa, __sz, __prot) do {} while(0)
+#define create_pmd_mapping(__pmdp, __va, __pa, __sz, __prot) do {} while(0)
#endif /* __PAGETABLE_PMD_FOLDED */
void __init create_pgd_mapping(pgd_t *pgdp,
--
2.34.1
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http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH v2 1/4] RISC-V: Avoid empty create_*_mapping definitions
@ 2022-04-20 18:40 ` Palmer Dabbelt
0 siblings, 0 replies; 22+ messages in thread
From: Palmer Dabbelt @ 2022-04-20 18:40 UTC (permalink / raw)
To: linux-riscv, rdunlap
Cc: Paul Walmsley, Palmer Dabbelt, aou, anup, vincent.chen, guoren,
Atish Patra, alexandre.ghiti, jszhang, vitaly.wool, gatecat,
wangkefeng.wang, mick, panqinglin2020, rppt, linux-riscv,
linux-kernel, linux, Palmer Dabbelt, kernel test robot
From: Palmer Dabbelt <palmer@rivosinc.com>
At least one use of these, that in create_fdt_early_page_table(),
triggers warnings and should cause a real error (create_pmd_mpping()
ends up skipped on XIP_KERNEL).
Reported-by: kernel test robot <lkp@intel.com>
Fixes: 677b9eb8810e ("riscv: mm: Prepare pt_ops helper functions for sv57")
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
---
arch/riscv/mm/init.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
index 9535bea8688c..7bc9a21e29fb 100644
--- a/arch/riscv/mm/init.c
+++ b/arch/riscv/mm/init.c
@@ -567,9 +567,9 @@ static void __init create_p4d_mapping(p4d_t *p4dp,
create_pte_mapping(__nextp, __va, __pa, __sz, __prot)
#define fixmap_pgd_next ((uintptr_t)fixmap_pte)
#define early_dtb_pgd_next ((uintptr_t)early_dtb_pmd)
-#define create_p4d_mapping(__pmdp, __va, __pa, __sz, __prot)
-#define create_pud_mapping(__pmdp, __va, __pa, __sz, __prot)
-#define create_pmd_mapping(__pmdp, __va, __pa, __sz, __prot)
+#define create_p4d_mapping(__pmdp, __va, __pa, __sz, __prot) do {} while(0)
+#define create_pud_mapping(__pmdp, __va, __pa, __sz, __prot) do {} while(0)
+#define create_pmd_mapping(__pmdp, __va, __pa, __sz, __prot) do {} while(0)
#endif /* __PAGETABLE_PMD_FOLDED */
void __init create_pgd_mapping(pgd_t *pgdp,
--
2.34.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [PATCH v2 1/4] RISC-V: Avoid empty create_*_mapping definitions
2022-04-20 18:40 ` Palmer Dabbelt
@ 2022-04-20 22:11 ` Andreas Schwab
-1 siblings, 0 replies; 22+ messages in thread
From: Andreas Schwab @ 2022-04-20 22:11 UTC (permalink / raw)
To: Palmer Dabbelt
Cc: linux-riscv, rdunlap, Paul Walmsley, Palmer Dabbelt, aou, anup,
vincent.chen, guoren, Atish Patra, alexandre.ghiti, jszhang,
vitaly.wool, gatecat, wangkefeng.wang, mick, panqinglin2020, rppt,
linux-kernel, linux, kernel test robot
On Apr 20 2022, Palmer Dabbelt wrote:
> (create_pmd_mpping() ends up skipped on XIP_KERNEL).
Does it? There is always the semicolon left as the body of the
conditional (which is why you get the empty-body warning in the first
place).
--
Andreas Schwab, schwab@linux-m68k.org
GPG Key fingerprint = 7578 EB47 D4E5 4D69 2510 2552 DF73 E780 A9DA AEC1
"And now for something completely different."
_______________________________________________
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linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH v2 1/4] RISC-V: Avoid empty create_*_mapping definitions
@ 2022-04-20 22:11 ` Andreas Schwab
0 siblings, 0 replies; 22+ messages in thread
From: Andreas Schwab @ 2022-04-20 22:11 UTC (permalink / raw)
To: Palmer Dabbelt
Cc: linux-riscv, rdunlap, Paul Walmsley, Palmer Dabbelt, aou, anup,
vincent.chen, guoren, Atish Patra, alexandre.ghiti, jszhang,
vitaly.wool, gatecat, wangkefeng.wang, mick, panqinglin2020, rppt,
linux-kernel, linux, kernel test robot
On Apr 20 2022, Palmer Dabbelt wrote:
> (create_pmd_mpping() ends up skipped on XIP_KERNEL).
Does it? There is always the semicolon left as the body of the
conditional (which is why you get the empty-body warning in the first
place).
--
Andreas Schwab, schwab@linux-m68k.org
GPG Key fingerprint = 7578 EB47 D4E5 4D69 2510 2552 DF73 E780 A9DA AEC1
"And now for something completely different."
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH v2 1/4] RISC-V: Avoid empty create_*_mapping definitions
2022-04-20 22:11 ` Andreas Schwab
@ 2022-05-25 21:32 ` Palmer Dabbelt
-1 siblings, 0 replies; 22+ messages in thread
From: Palmer Dabbelt @ 2022-05-25 21:32 UTC (permalink / raw)
To: schwab
Cc: linux-riscv, rdunlap, Paul Walmsley, aou, anup, vincent.chen,
guoren, Atish Patra, alexandre.ghiti, jszhang, vitaly.wool,
gatecat, wangkefeng.wang, mick, panqinglin2020, rppt,
linux-kernel, linux, lkp
On Wed, 20 Apr 2022 15:11:37 PDT (-0700), schwab@linux-m68k.org wrote:
> On Apr 20 2022, Palmer Dabbelt wrote:
>
>> (create_pmd_mpping() ends up skipped on XIP_KERNEL).
>
> Does it? There is always the semicolon left as the body of the
> conditional (which is why you get the empty-body warning in the first
> place).
Yep, you're right. I fixed up the commit message, thanks!
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH v2 1/4] RISC-V: Avoid empty create_*_mapping definitions
@ 2022-05-25 21:32 ` Palmer Dabbelt
0 siblings, 0 replies; 22+ messages in thread
From: Palmer Dabbelt @ 2022-05-25 21:32 UTC (permalink / raw)
To: schwab
Cc: linux-riscv, rdunlap, Paul Walmsley, aou, anup, vincent.chen,
guoren, Atish Patra, alexandre.ghiti, jszhang, vitaly.wool,
gatecat, wangkefeng.wang, mick, panqinglin2020, rppt,
linux-kernel, linux, lkp
On Wed, 20 Apr 2022 15:11:37 PDT (-0700), schwab@linux-m68k.org wrote:
> On Apr 20 2022, Palmer Dabbelt wrote:
>
>> (create_pmd_mpping() ends up skipped on XIP_KERNEL).
>
> Does it? There is always the semicolon left as the body of the
> conditional (which is why you get the empty-body warning in the first
> place).
Yep, you're right. I fixed up the commit message, thanks!
^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH v2 2/4] RISC-V: ignore xipImage
2022-04-20 18:40 ` Palmer Dabbelt
@ 2022-04-20 18:40 ` Palmer Dabbelt
-1 siblings, 0 replies; 22+ messages in thread
From: Palmer Dabbelt @ 2022-04-20 18:40 UTC (permalink / raw)
To: linux-riscv, rdunlap
Cc: Paul Walmsley, Palmer Dabbelt, aou, anup, vincent.chen, guoren,
Atish Patra, alexandre.ghiti, jszhang, vitaly.wool, gatecat,
wangkefeng.wang, mick, panqinglin2020, rppt, linux-riscv,
linux-kernel, linux, Palmer Dabbelt
From: Palmer Dabbelt <palmer@rivosinc.com>
This built file shows up in "git status" without an explicit ignore.
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
---
arch/riscv/boot/.gitignore | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/riscv/boot/.gitignore b/arch/riscv/boot/.gitignore
index 90e66adb7de5..0cea9f7fa9d5 100644
--- a/arch/riscv/boot/.gitignore
+++ b/arch/riscv/boot/.gitignore
@@ -4,3 +4,4 @@ Image.*
loader
loader.lds
loader.bin
+xipImage
--
2.34.1
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH v2 2/4] RISC-V: ignore xipImage
@ 2022-04-20 18:40 ` Palmer Dabbelt
0 siblings, 0 replies; 22+ messages in thread
From: Palmer Dabbelt @ 2022-04-20 18:40 UTC (permalink / raw)
To: linux-riscv, rdunlap
Cc: Paul Walmsley, Palmer Dabbelt, aou, anup, vincent.chen, guoren,
Atish Patra, alexandre.ghiti, jszhang, vitaly.wool, gatecat,
wangkefeng.wang, mick, panqinglin2020, rppt, linux-riscv,
linux-kernel, linux, Palmer Dabbelt
From: Palmer Dabbelt <palmer@rivosinc.com>
This built file shows up in "git status" without an explicit ignore.
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
---
arch/riscv/boot/.gitignore | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/riscv/boot/.gitignore b/arch/riscv/boot/.gitignore
index 90e66adb7de5..0cea9f7fa9d5 100644
--- a/arch/riscv/boot/.gitignore
+++ b/arch/riscv/boot/.gitignore
@@ -4,3 +4,4 @@ Image.*
loader
loader.lds
loader.bin
+xipImage
--
2.34.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* Re: [PATCH v2 2/4] RISC-V: ignore xipImage
2022-04-20 18:40 ` Palmer Dabbelt
@ 2022-04-21 6:26 ` Guo Ren
-1 siblings, 0 replies; 22+ messages in thread
From: Guo Ren @ 2022-04-21 6:26 UTC (permalink / raw)
To: Palmer Dabbelt
Cc: linux-riscv, Randy Dunlap, Paul Walmsley, Palmer Dabbelt,
Albert Ou, Anup Patel, Vincent Chen, Atish Patra, Alexandre Ghiti,
jszhang, Vitaly Wool, gatecat, Kefeng Wang, Nick Kossifidis,
潘庆霖, Mike Rapoport,
Linux Kernel Mailing List, linux
Reviewed-by: Guo Ren <guoren@kernel.org>
On Thu, Apr 21, 2022 at 2:48 AM Palmer Dabbelt <palmer@rivosinc.com> wrote:
>
> From: Palmer Dabbelt <palmer@rivosinc.com>
>
> This built file shows up in "git status" without an explicit ignore.
>
> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
> ---
> arch/riscv/boot/.gitignore | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/riscv/boot/.gitignore b/arch/riscv/boot/.gitignore
> index 90e66adb7de5..0cea9f7fa9d5 100644
> --- a/arch/riscv/boot/.gitignore
> +++ b/arch/riscv/boot/.gitignore
> @@ -4,3 +4,4 @@ Image.*
> loader
> loader.lds
> loader.bin
> +xipImage
> --
> 2.34.1
>
--
Best Regards
Guo Ren
ML: https://lore.kernel.org/linux-csky/
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH v2 2/4] RISC-V: ignore xipImage
@ 2022-04-21 6:26 ` Guo Ren
0 siblings, 0 replies; 22+ messages in thread
From: Guo Ren @ 2022-04-21 6:26 UTC (permalink / raw)
To: Palmer Dabbelt
Cc: linux-riscv, Randy Dunlap, Paul Walmsley, Palmer Dabbelt,
Albert Ou, Anup Patel, Vincent Chen, Atish Patra, Alexandre Ghiti,
jszhang, Vitaly Wool, gatecat, Kefeng Wang, Nick Kossifidis,
潘庆霖, Mike Rapoport,
Linux Kernel Mailing List, linux
Reviewed-by: Guo Ren <guoren@kernel.org>
On Thu, Apr 21, 2022 at 2:48 AM Palmer Dabbelt <palmer@rivosinc.com> wrote:
>
> From: Palmer Dabbelt <palmer@rivosinc.com>
>
> This built file shows up in "git status" without an explicit ignore.
>
> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
> ---
> arch/riscv/boot/.gitignore | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/riscv/boot/.gitignore b/arch/riscv/boot/.gitignore
> index 90e66adb7de5..0cea9f7fa9d5 100644
> --- a/arch/riscv/boot/.gitignore
> +++ b/arch/riscv/boot/.gitignore
> @@ -4,3 +4,4 @@ Image.*
> loader
> loader.lds
> loader.bin
> +xipImage
> --
> 2.34.1
>
--
Best Regards
Guo Ren
ML: https://lore.kernel.org/linux-csky/
^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH v2 3/4] RISC-V: Split out the XIP fixups into their own file
2022-04-20 18:40 ` Palmer Dabbelt
@ 2022-04-20 18:40 ` Palmer Dabbelt
-1 siblings, 0 replies; 22+ messages in thread
From: Palmer Dabbelt @ 2022-04-20 18:40 UTC (permalink / raw)
To: linux-riscv, rdunlap
Cc: Paul Walmsley, Palmer Dabbelt, aou, anup, vincent.chen, guoren,
Atish Patra, alexandre.ghiti, jszhang, vitaly.wool, gatecat,
wangkefeng.wang, mick, panqinglin2020, rppt, linux-riscv,
linux-kernel, linux, Palmer Dabbelt
From: Palmer Dabbelt <palmer@rivosinc.com>
This was broken by the original refactoring (as the XIP definitions
depend on <asm/pgtable.h>) and then more broken by the merge (as I
accidentally took the old version). This fixes both breakages, while
also pulling this out of <asm/asm.h> to avoid polluting most assembly
files with the XIP fixups.
Fixes: bee7fbc38579 ("RISC-V CPU Idle Support")
Fixes: 63b13e64a829 ("RISC-V: Add arch functions for non-retentive suspend entry/exit")
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
---
arch/riscv/include/asm/asm.h | 26 ------------------------
arch/riscv/include/asm/xip_fixup.h | 32 ++++++++++++++++++++++++++++++
arch/riscv/kernel/head.S | 1 +
arch/riscv/kernel/suspend_entry.S | 1 +
4 files changed, 34 insertions(+), 26 deletions(-)
create mode 100644 arch/riscv/include/asm/xip_fixup.h
diff --git a/arch/riscv/include/asm/asm.h b/arch/riscv/include/asm/asm.h
index 8c2549b16ac0..618d7c5af1a2 100644
--- a/arch/riscv/include/asm/asm.h
+++ b/arch/riscv/include/asm/asm.h
@@ -67,30 +67,4 @@
#error "Unexpected __SIZEOF_SHORT__"
#endif
-#ifdef __ASSEMBLY__
-
-/* Common assembly source macros */
-
-#ifdef CONFIG_XIP_KERNEL
-.macro XIP_FIXUP_OFFSET reg
- REG_L t0, _xip_fixup
- add \reg, \reg, t0
-.endm
-.macro XIP_FIXUP_FLASH_OFFSET reg
- la t1, __data_loc
- REG_L t1, _xip_phys_offset
- sub \reg, \reg, t1
- add \reg, \reg, t0
-.endm
-_xip_fixup: .dword CONFIG_PHYS_RAM_BASE - CONFIG_XIP_PHYS_ADDR - XIP_OFFSET
-_xip_phys_offset: .dword CONFIG_XIP_PHYS_ADDR + XIP_OFFSET
-#else
-.macro XIP_FIXUP_OFFSET reg
-.endm
-.macro XIP_FIXUP_FLASH_OFFSET reg
-.endm
-#endif /* CONFIG_XIP_KERNEL */
-
-#endif /* __ASSEMBLY__ */
-
#endif /* _ASM_RISCV_ASM_H */
diff --git a/arch/riscv/include/asm/xip_fixup.h b/arch/riscv/include/asm/xip_fixup.h
new file mode 100644
index 000000000000..0d0754305324
--- /dev/null
+++ b/arch/riscv/include/asm/xip_fixup.h
@@ -0,0 +1,32 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * XIP fixup macros, only useful in assembly.
+ */
+#ifndef _ASM_RISCV_XIP_FIXUP_H
+#define _ASM_RISCV_XIP_FIXUP_H
+
+#include <linux/pgtable.h>
+
+#ifdef CONFIG_XIP_KERNEL
+.macro XIP_FIXUP_OFFSET reg
+ REG_L t0, _xip_fixup
+ add \reg, \reg, t0
+.endm
+.macro XIP_FIXUP_FLASH_OFFSET reg
+ la t1, __data_loc
+ li t0, XIP_OFFSET_MASK
+ and t1, t1, t0
+ li t1, XIP_OFFSET
+ sub t0, t0, t1
+ sub \reg, \reg, t0
+.endm
+
+_xip_fixup: .dword CONFIG_PHYS_RAM_BASE - CONFIG_XIP_PHYS_ADDR - XIP_OFFSET
+#else
+.macro XIP_FIXUP_OFFSET reg
+.endm
+.macro XIP_FIXUP_FLASH_OFFSET reg
+.endm
+#endif /* CONFIG_XIP_KERNEL */
+
+#endif
diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
index 893b8bb69391..822c33aa7f45 100644
--- a/arch/riscv/kernel/head.S
+++ b/arch/riscv/kernel/head.S
@@ -14,6 +14,7 @@
#include <asm/hwcap.h>
#include <asm/image.h>
+#include <asm/xip_fixup.h>
#include "efi-header.S"
__HEAD
diff --git a/arch/riscv/kernel/suspend_entry.S b/arch/riscv/kernel/suspend_entry.S
index 4b07b809a2b8..aafcca58c19d 100644
--- a/arch/riscv/kernel/suspend_entry.S
+++ b/arch/riscv/kernel/suspend_entry.S
@@ -8,6 +8,7 @@
#include <asm/asm.h>
#include <asm/asm-offsets.h>
#include <asm/csr.h>
+#include <asm/xip_fixup.h>
.text
.altmacro
--
2.34.1
_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH v2 3/4] RISC-V: Split out the XIP fixups into their own file
@ 2022-04-20 18:40 ` Palmer Dabbelt
0 siblings, 0 replies; 22+ messages in thread
From: Palmer Dabbelt @ 2022-04-20 18:40 UTC (permalink / raw)
To: linux-riscv, rdunlap
Cc: Paul Walmsley, Palmer Dabbelt, aou, anup, vincent.chen, guoren,
Atish Patra, alexandre.ghiti, jszhang, vitaly.wool, gatecat,
wangkefeng.wang, mick, panqinglin2020, rppt, linux-riscv,
linux-kernel, linux, Palmer Dabbelt
From: Palmer Dabbelt <palmer@rivosinc.com>
This was broken by the original refactoring (as the XIP definitions
depend on <asm/pgtable.h>) and then more broken by the merge (as I
accidentally took the old version). This fixes both breakages, while
also pulling this out of <asm/asm.h> to avoid polluting most assembly
files with the XIP fixups.
Fixes: bee7fbc38579 ("RISC-V CPU Idle Support")
Fixes: 63b13e64a829 ("RISC-V: Add arch functions for non-retentive suspend entry/exit")
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
---
arch/riscv/include/asm/asm.h | 26 ------------------------
arch/riscv/include/asm/xip_fixup.h | 32 ++++++++++++++++++++++++++++++
arch/riscv/kernel/head.S | 1 +
arch/riscv/kernel/suspend_entry.S | 1 +
4 files changed, 34 insertions(+), 26 deletions(-)
create mode 100644 arch/riscv/include/asm/xip_fixup.h
diff --git a/arch/riscv/include/asm/asm.h b/arch/riscv/include/asm/asm.h
index 8c2549b16ac0..618d7c5af1a2 100644
--- a/arch/riscv/include/asm/asm.h
+++ b/arch/riscv/include/asm/asm.h
@@ -67,30 +67,4 @@
#error "Unexpected __SIZEOF_SHORT__"
#endif
-#ifdef __ASSEMBLY__
-
-/* Common assembly source macros */
-
-#ifdef CONFIG_XIP_KERNEL
-.macro XIP_FIXUP_OFFSET reg
- REG_L t0, _xip_fixup
- add \reg, \reg, t0
-.endm
-.macro XIP_FIXUP_FLASH_OFFSET reg
- la t1, __data_loc
- REG_L t1, _xip_phys_offset
- sub \reg, \reg, t1
- add \reg, \reg, t0
-.endm
-_xip_fixup: .dword CONFIG_PHYS_RAM_BASE - CONFIG_XIP_PHYS_ADDR - XIP_OFFSET
-_xip_phys_offset: .dword CONFIG_XIP_PHYS_ADDR + XIP_OFFSET
-#else
-.macro XIP_FIXUP_OFFSET reg
-.endm
-.macro XIP_FIXUP_FLASH_OFFSET reg
-.endm
-#endif /* CONFIG_XIP_KERNEL */
-
-#endif /* __ASSEMBLY__ */
-
#endif /* _ASM_RISCV_ASM_H */
diff --git a/arch/riscv/include/asm/xip_fixup.h b/arch/riscv/include/asm/xip_fixup.h
new file mode 100644
index 000000000000..0d0754305324
--- /dev/null
+++ b/arch/riscv/include/asm/xip_fixup.h
@@ -0,0 +1,32 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * XIP fixup macros, only useful in assembly.
+ */
+#ifndef _ASM_RISCV_XIP_FIXUP_H
+#define _ASM_RISCV_XIP_FIXUP_H
+
+#include <linux/pgtable.h>
+
+#ifdef CONFIG_XIP_KERNEL
+.macro XIP_FIXUP_OFFSET reg
+ REG_L t0, _xip_fixup
+ add \reg, \reg, t0
+.endm
+.macro XIP_FIXUP_FLASH_OFFSET reg
+ la t1, __data_loc
+ li t0, XIP_OFFSET_MASK
+ and t1, t1, t0
+ li t1, XIP_OFFSET
+ sub t0, t0, t1
+ sub \reg, \reg, t0
+.endm
+
+_xip_fixup: .dword CONFIG_PHYS_RAM_BASE - CONFIG_XIP_PHYS_ADDR - XIP_OFFSET
+#else
+.macro XIP_FIXUP_OFFSET reg
+.endm
+.macro XIP_FIXUP_FLASH_OFFSET reg
+.endm
+#endif /* CONFIG_XIP_KERNEL */
+
+#endif
diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
index 893b8bb69391..822c33aa7f45 100644
--- a/arch/riscv/kernel/head.S
+++ b/arch/riscv/kernel/head.S
@@ -14,6 +14,7 @@
#include <asm/hwcap.h>
#include <asm/image.h>
+#include <asm/xip_fixup.h>
#include "efi-header.S"
__HEAD
diff --git a/arch/riscv/kernel/suspend_entry.S b/arch/riscv/kernel/suspend_entry.S
index 4b07b809a2b8..aafcca58c19d 100644
--- a/arch/riscv/kernel/suspend_entry.S
+++ b/arch/riscv/kernel/suspend_entry.S
@@ -8,6 +8,7 @@
#include <asm/asm.h>
#include <asm/asm-offsets.h>
#include <asm/csr.h>
+#include <asm/xip_fixup.h>
.text
.altmacro
--
2.34.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [PATCH v2 3/4] RISC-V: Split out the XIP fixups into their own file
2022-04-20 18:40 ` Palmer Dabbelt
@ 2022-04-21 6:45 ` Guo Ren
-1 siblings, 0 replies; 22+ messages in thread
From: Guo Ren @ 2022-04-21 6:45 UTC (permalink / raw)
To: Palmer Dabbelt
Cc: linux-riscv, Randy Dunlap, Paul Walmsley, Palmer Dabbelt,
Albert Ou, Anup Patel, Vincent Chen, Atish Patra, Alexandre Ghiti,
jszhang, Vitaly Wool, gatecat, Kefeng Wang, Nick Kossifidis,
潘庆霖, Mike Rapoport,
Linux Kernel Mailing List, linux
On Thu, Apr 21, 2022 at 2:48 AM Palmer Dabbelt <palmer@rivosinc.com> wrote:
>
> From: Palmer Dabbelt <palmer@rivosinc.com>
>
> This was broken by the original refactoring (as the XIP definitions
> depend on <asm/pgtable.h>) and then more broken by the merge (as I
> accidentally took the old version). This fixes both breakages, while
> also pulling this out of <asm/asm.h> to avoid polluting most assembly
> files with the XIP fixups.
>
> Fixes: bee7fbc38579 ("RISC-V CPU Idle Support")
> Fixes: 63b13e64a829 ("RISC-V: Add arch functions for non-retentive suspend entry/exit")
> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
> ---
> arch/riscv/include/asm/asm.h | 26 ------------------------
> arch/riscv/include/asm/xip_fixup.h | 32 ++++++++++++++++++++++++++++++
> arch/riscv/kernel/head.S | 1 +
> arch/riscv/kernel/suspend_entry.S | 1 +
> 4 files changed, 34 insertions(+), 26 deletions(-)
> create mode 100644 arch/riscv/include/asm/xip_fixup.h
>
> diff --git a/arch/riscv/include/asm/asm.h b/arch/riscv/include/asm/asm.h
> index 8c2549b16ac0..618d7c5af1a2 100644
> --- a/arch/riscv/include/asm/asm.h
> +++ b/arch/riscv/include/asm/asm.h
> @@ -67,30 +67,4 @@
> #error "Unexpected __SIZEOF_SHORT__"
> #endif
>
> -#ifdef __ASSEMBLY__
> -
> -/* Common assembly source macros */
> -
> -#ifdef CONFIG_XIP_KERNEL
> -.macro XIP_FIXUP_OFFSET reg
> - REG_L t0, _xip_fixup
> - add \reg, \reg, t0
> -.endm
> -.macro XIP_FIXUP_FLASH_OFFSET reg
> - la t1, __data_loc
> - REG_L t1, _xip_phys_offset
> - sub \reg, \reg, t1
> - add \reg, \reg, t0
> -.endm
> -_xip_fixup: .dword CONFIG_PHYS_RAM_BASE - CONFIG_XIP_PHYS_ADDR - XIP_OFFSET
> -_xip_phys_offset: .dword CONFIG_XIP_PHYS_ADDR + XIP_OFFSET
> -#else
> -.macro XIP_FIXUP_OFFSET reg
> -.endm
> -.macro XIP_FIXUP_FLASH_OFFSET reg
> -.endm
> -#endif /* CONFIG_XIP_KERNEL */
> -
> -#endif /* __ASSEMBLY__ */
> -
> #endif /* _ASM_RISCV_ASM_H */
> diff --git a/arch/riscv/include/asm/xip_fixup.h b/arch/riscv/include/asm/xip_fixup.h
> new file mode 100644
> index 000000000000..0d0754305324
> --- /dev/null
> +++ b/arch/riscv/include/asm/xip_fixup.h
> @@ -0,0 +1,32 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * XIP fixup macros, only useful in assembly.
> + */
> +#ifndef _ASM_RISCV_XIP_FIXUP_H
> +#define _ASM_RISCV_XIP_FIXUP_H
> +
> +#include <linux/pgtable.h>
> +
> +#ifdef CONFIG_XIP_KERNEL
> +.macro XIP_FIXUP_OFFSET reg
> + REG_L t0, _xip_fixup
> + add \reg, \reg, t0
> +.endm
> +.macro XIP_FIXUP_FLASH_OFFSET reg
> + la t1, __data_loc
> + li t0, XIP_OFFSET_MASK
> + and t1, t1, t0
> + li t1, XIP_OFFSET
I still prefer the style:
REG_L t1, _xip_phys_offset
...
_xip_phys_offset: .dword CONFIG_XIP_PHYS_ADDR + XIP_OFFSET
Because it's more clear and has the same style as your _xip_fixup.
Others:
Reviewed-by: Guo Ren <guoren@kernel.org>
> + sub t0, t0, t1
> + sub \reg, \reg, t0
> +.endm
-.endm
> +
> +_xip_fixup: .dword CONFIG_PHYS_RAM_BASE - CONFIG_XIP_PHYS_ADDR - XIP_OFFSET
> +#else
> +.macro XIP_FIXUP_OFFSET reg
> +.endm
> +.macro XIP_FIXUP_FLASH_OFFSET reg
> +.endm
> +#endif /* CONFIG_XIP_KERNEL */
> +
> +#endif
> diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
> index 893b8bb69391..822c33aa7f45 100644
> --- a/arch/riscv/kernel/head.S
> +++ b/arch/riscv/kernel/head.S
> @@ -14,6 +14,7 @@
> #include <asm/hwcap.h>
> #include <asm/image.h>
> +#include <asm/xip_fixup.h>
> #include "efi-header.S"
>
> __HEAD
> diff --git a/arch/riscv/kernel/suspend_entry.S b/arch/riscv/kernel/suspend_entry.S
> index 4b07b809a2b8..aafcca58c19d 100644
> --- a/arch/riscv/kernel/suspend_entry.S
> +++ b/arch/riscv/kernel/suspend_entry.S
> @@ -8,6 +8,7 @@
> #include <asm/asm.h>
> #include <asm/asm-offsets.h>
> #include <asm/csr.h>
> +#include <asm/xip_fixup.h>
>
> .text
> .altmacro
> --
> 2.34.1
>
--
Best Regards
Guo Ren
ML: https://lore.kernel.org/linux-csky/
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH v2 3/4] RISC-V: Split out the XIP fixups into their own file
@ 2022-04-21 6:45 ` Guo Ren
0 siblings, 0 replies; 22+ messages in thread
From: Guo Ren @ 2022-04-21 6:45 UTC (permalink / raw)
To: Palmer Dabbelt
Cc: linux-riscv, Randy Dunlap, Paul Walmsley, Palmer Dabbelt,
Albert Ou, Anup Patel, Vincent Chen, Atish Patra, Alexandre Ghiti,
jszhang, Vitaly Wool, gatecat, Kefeng Wang, Nick Kossifidis,
潘庆霖, Mike Rapoport,
Linux Kernel Mailing List, linux
On Thu, Apr 21, 2022 at 2:48 AM Palmer Dabbelt <palmer@rivosinc.com> wrote:
>
> From: Palmer Dabbelt <palmer@rivosinc.com>
>
> This was broken by the original refactoring (as the XIP definitions
> depend on <asm/pgtable.h>) and then more broken by the merge (as I
> accidentally took the old version). This fixes both breakages, while
> also pulling this out of <asm/asm.h> to avoid polluting most assembly
> files with the XIP fixups.
>
> Fixes: bee7fbc38579 ("RISC-V CPU Idle Support")
> Fixes: 63b13e64a829 ("RISC-V: Add arch functions for non-retentive suspend entry/exit")
> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
> ---
> arch/riscv/include/asm/asm.h | 26 ------------------------
> arch/riscv/include/asm/xip_fixup.h | 32 ++++++++++++++++++++++++++++++
> arch/riscv/kernel/head.S | 1 +
> arch/riscv/kernel/suspend_entry.S | 1 +
> 4 files changed, 34 insertions(+), 26 deletions(-)
> create mode 100644 arch/riscv/include/asm/xip_fixup.h
>
> diff --git a/arch/riscv/include/asm/asm.h b/arch/riscv/include/asm/asm.h
> index 8c2549b16ac0..618d7c5af1a2 100644
> --- a/arch/riscv/include/asm/asm.h
> +++ b/arch/riscv/include/asm/asm.h
> @@ -67,30 +67,4 @@
> #error "Unexpected __SIZEOF_SHORT__"
> #endif
>
> -#ifdef __ASSEMBLY__
> -
> -/* Common assembly source macros */
> -
> -#ifdef CONFIG_XIP_KERNEL
> -.macro XIP_FIXUP_OFFSET reg
> - REG_L t0, _xip_fixup
> - add \reg, \reg, t0
> -.endm
> -.macro XIP_FIXUP_FLASH_OFFSET reg
> - la t1, __data_loc
> - REG_L t1, _xip_phys_offset
> - sub \reg, \reg, t1
> - add \reg, \reg, t0
> -.endm
> -_xip_fixup: .dword CONFIG_PHYS_RAM_BASE - CONFIG_XIP_PHYS_ADDR - XIP_OFFSET
> -_xip_phys_offset: .dword CONFIG_XIP_PHYS_ADDR + XIP_OFFSET
> -#else
> -.macro XIP_FIXUP_OFFSET reg
> -.endm
> -.macro XIP_FIXUP_FLASH_OFFSET reg
> -.endm
> -#endif /* CONFIG_XIP_KERNEL */
> -
> -#endif /* __ASSEMBLY__ */
> -
> #endif /* _ASM_RISCV_ASM_H */
> diff --git a/arch/riscv/include/asm/xip_fixup.h b/arch/riscv/include/asm/xip_fixup.h
> new file mode 100644
> index 000000000000..0d0754305324
> --- /dev/null
> +++ b/arch/riscv/include/asm/xip_fixup.h
> @@ -0,0 +1,32 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * XIP fixup macros, only useful in assembly.
> + */
> +#ifndef _ASM_RISCV_XIP_FIXUP_H
> +#define _ASM_RISCV_XIP_FIXUP_H
> +
> +#include <linux/pgtable.h>
> +
> +#ifdef CONFIG_XIP_KERNEL
> +.macro XIP_FIXUP_OFFSET reg
> + REG_L t0, _xip_fixup
> + add \reg, \reg, t0
> +.endm
> +.macro XIP_FIXUP_FLASH_OFFSET reg
> + la t1, __data_loc
> + li t0, XIP_OFFSET_MASK
> + and t1, t1, t0
> + li t1, XIP_OFFSET
I still prefer the style:
REG_L t1, _xip_phys_offset
...
_xip_phys_offset: .dword CONFIG_XIP_PHYS_ADDR + XIP_OFFSET
Because it's more clear and has the same style as your _xip_fixup.
Others:
Reviewed-by: Guo Ren <guoren@kernel.org>
> + sub t0, t0, t1
> + sub \reg, \reg, t0
> +.endm
-.endm
> +
> +_xip_fixup: .dword CONFIG_PHYS_RAM_BASE - CONFIG_XIP_PHYS_ADDR - XIP_OFFSET
> +#else
> +.macro XIP_FIXUP_OFFSET reg
> +.endm
> +.macro XIP_FIXUP_FLASH_OFFSET reg
> +.endm
> +#endif /* CONFIG_XIP_KERNEL */
> +
> +#endif
> diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
> index 893b8bb69391..822c33aa7f45 100644
> --- a/arch/riscv/kernel/head.S
> +++ b/arch/riscv/kernel/head.S
> @@ -14,6 +14,7 @@
> #include <asm/hwcap.h>
> #include <asm/image.h>
> +#include <asm/xip_fixup.h>
> #include "efi-header.S"
>
> __HEAD
> diff --git a/arch/riscv/kernel/suspend_entry.S b/arch/riscv/kernel/suspend_entry.S
> index 4b07b809a2b8..aafcca58c19d 100644
> --- a/arch/riscv/kernel/suspend_entry.S
> +++ b/arch/riscv/kernel/suspend_entry.S
> @@ -8,6 +8,7 @@
> #include <asm/asm.h>
> #include <asm/asm-offsets.h>
> #include <asm/csr.h>
> +#include <asm/xip_fixup.h>
>
> .text
> .altmacro
> --
> 2.34.1
>
--
Best Regards
Guo Ren
ML: https://lore.kernel.org/linux-csky/
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH v2 3/4] RISC-V: Split out the XIP fixups into their own file
2022-04-21 6:45 ` Guo Ren
@ 2022-05-25 21:45 ` Palmer Dabbelt
-1 siblings, 0 replies; 22+ messages in thread
From: Palmer Dabbelt @ 2022-05-25 21:45 UTC (permalink / raw)
To: guoren
Cc: linux-riscv, rdunlap, Paul Walmsley, aou, anup, vincent.chen,
Atish Patra, alexandre.ghiti, jszhang, vitaly.wool, gatecat,
wangkefeng.wang, mick, panqinglin2020, rppt, linux-kernel, linux
On Wed, 20 Apr 2022 23:45:23 PDT (-0700), guoren@kernel.org wrote:
> On Thu, Apr 21, 2022 at 2:48 AM Palmer Dabbelt <palmer@rivosinc.com> wrote:
>>
>> From: Palmer Dabbelt <palmer@rivosinc.com>
>>
>> This was broken by the original refactoring (as the XIP definitions
>> depend on <asm/pgtable.h>) and then more broken by the merge (as I
>> accidentally took the old version). This fixes both breakages, while
>> also pulling this out of <asm/asm.h> to avoid polluting most assembly
>> files with the XIP fixups.
>>
>> Fixes: bee7fbc38579 ("RISC-V CPU Idle Support")
>> Fixes: 63b13e64a829 ("RISC-V: Add arch functions for non-retentive suspend entry/exit")
>> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
>> ---
>> arch/riscv/include/asm/asm.h | 26 ------------------------
>> arch/riscv/include/asm/xip_fixup.h | 32 ++++++++++++++++++++++++++++++
>> arch/riscv/kernel/head.S | 1 +
>> arch/riscv/kernel/suspend_entry.S | 1 +
>> 4 files changed, 34 insertions(+), 26 deletions(-)
>> create mode 100644 arch/riscv/include/asm/xip_fixup.h
>>
>> diff --git a/arch/riscv/include/asm/asm.h b/arch/riscv/include/asm/asm.h
>> index 8c2549b16ac0..618d7c5af1a2 100644
>> --- a/arch/riscv/include/asm/asm.h
>> +++ b/arch/riscv/include/asm/asm.h
>> @@ -67,30 +67,4 @@
>> #error "Unexpected __SIZEOF_SHORT__"
>> #endif
>>
>> -#ifdef __ASSEMBLY__
>> -
>> -/* Common assembly source macros */
>> -
>> -#ifdef CONFIG_XIP_KERNEL
>> -.macro XIP_FIXUP_OFFSET reg
>> - REG_L t0, _xip_fixup
>> - add \reg, \reg, t0
>> -.endm
>> -.macro XIP_FIXUP_FLASH_OFFSET reg
>> - la t1, __data_loc
>> - REG_L t1, _xip_phys_offset
>> - sub \reg, \reg, t1
>> - add \reg, \reg, t0
>> -.endm
>> -_xip_fixup: .dword CONFIG_PHYS_RAM_BASE - CONFIG_XIP_PHYS_ADDR - XIP_OFFSET
>> -_xip_phys_offset: .dword CONFIG_XIP_PHYS_ADDR + XIP_OFFSET
>> -#else
>> -.macro XIP_FIXUP_OFFSET reg
>> -.endm
>> -.macro XIP_FIXUP_FLASH_OFFSET reg
>> -.endm
>> -#endif /* CONFIG_XIP_KERNEL */
>> -
>> -#endif /* __ASSEMBLY__ */
>> -
>> #endif /* _ASM_RISCV_ASM_H */
>> diff --git a/arch/riscv/include/asm/xip_fixup.h b/arch/riscv/include/asm/xip_fixup.h
>> new file mode 100644
>> index 000000000000..0d0754305324
>> --- /dev/null
>> +++ b/arch/riscv/include/asm/xip_fixup.h
>> @@ -0,0 +1,32 @@
>> +/* SPDX-License-Identifier: GPL-2.0-only */
>> +/*
>> + * XIP fixup macros, only useful in assembly.
>> + */
>> +#ifndef _ASM_RISCV_XIP_FIXUP_H
>> +#define _ASM_RISCV_XIP_FIXUP_H
>> +
>> +#include <linux/pgtable.h>
>> +
>> +#ifdef CONFIG_XIP_KERNEL
>> +.macro XIP_FIXUP_OFFSET reg
>> + REG_L t0, _xip_fixup
>> + add \reg, \reg, t0
>> +.endm
>> +.macro XIP_FIXUP_FLASH_OFFSET reg
>> + la t1, __data_loc
>> + li t0, XIP_OFFSET_MASK
>> + and t1, t1, t0
>> + li t1, XIP_OFFSET
> I still prefer the style:
> REG_L t1, _xip_phys_offset
> ...
> _xip_phys_offset: .dword CONFIG_XIP_PHYS_ADDR + XIP_OFFSET
>
> Because it's more clear and has the same style as your _xip_fixup.
Thanks, not quite shure how I pulled the old version over. I've fixed
this one up.
> Others:
> Reviewed-by: Guo Ren <guoren@kernel.org>
>
>> + sub t0, t0, t1
>> + sub \reg, \reg, t0
>> +.endm
> -.endm
>> +
>> +_xip_fixup: .dword CONFIG_PHYS_RAM_BASE - CONFIG_XIP_PHYS_ADDR - XIP_OFFSET
>> +#else
>> +.macro XIP_FIXUP_OFFSET reg
>> +.endm
>> +.macro XIP_FIXUP_FLASH_OFFSET reg
>> +.endm
>> +#endif /* CONFIG_XIP_KERNEL */
>> +
>> +#endif
>> diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
>> index 893b8bb69391..822c33aa7f45 100644
>> --- a/arch/riscv/kernel/head.S
>> +++ b/arch/riscv/kernel/head.S
>> @@ -14,6 +14,7 @@
>> #include <asm/hwcap.h>
>> #include <asm/image.h>
>> +#include <asm/xip_fixup.h>
>> #include "efi-header.S"
>>
>> __HEAD
>> diff --git a/arch/riscv/kernel/suspend_entry.S b/arch/riscv/kernel/suspend_entry.S
>> index 4b07b809a2b8..aafcca58c19d 100644
>> --- a/arch/riscv/kernel/suspend_entry.S
>> +++ b/arch/riscv/kernel/suspend_entry.S
>> @@ -8,6 +8,7 @@
>> #include <asm/asm.h>
>> #include <asm/asm-offsets.h>
>> #include <asm/csr.h>
>> +#include <asm/xip_fixup.h>
>>
>> .text
>> .altmacro
>> --
>> 2.34.1
>>
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH v2 3/4] RISC-V: Split out the XIP fixups into their own file
@ 2022-05-25 21:45 ` Palmer Dabbelt
0 siblings, 0 replies; 22+ messages in thread
From: Palmer Dabbelt @ 2022-05-25 21:45 UTC (permalink / raw)
To: guoren
Cc: linux-riscv, rdunlap, Paul Walmsley, aou, anup, vincent.chen,
Atish Patra, alexandre.ghiti, jszhang, vitaly.wool, gatecat,
wangkefeng.wang, mick, panqinglin2020, rppt, linux-kernel, linux
On Wed, 20 Apr 2022 23:45:23 PDT (-0700), guoren@kernel.org wrote:
> On Thu, Apr 21, 2022 at 2:48 AM Palmer Dabbelt <palmer@rivosinc.com> wrote:
>>
>> From: Palmer Dabbelt <palmer@rivosinc.com>
>>
>> This was broken by the original refactoring (as the XIP definitions
>> depend on <asm/pgtable.h>) and then more broken by the merge (as I
>> accidentally took the old version). This fixes both breakages, while
>> also pulling this out of <asm/asm.h> to avoid polluting most assembly
>> files with the XIP fixups.
>>
>> Fixes: bee7fbc38579 ("RISC-V CPU Idle Support")
>> Fixes: 63b13e64a829 ("RISC-V: Add arch functions for non-retentive suspend entry/exit")
>> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
>> ---
>> arch/riscv/include/asm/asm.h | 26 ------------------------
>> arch/riscv/include/asm/xip_fixup.h | 32 ++++++++++++++++++++++++++++++
>> arch/riscv/kernel/head.S | 1 +
>> arch/riscv/kernel/suspend_entry.S | 1 +
>> 4 files changed, 34 insertions(+), 26 deletions(-)
>> create mode 100644 arch/riscv/include/asm/xip_fixup.h
>>
>> diff --git a/arch/riscv/include/asm/asm.h b/arch/riscv/include/asm/asm.h
>> index 8c2549b16ac0..618d7c5af1a2 100644
>> --- a/arch/riscv/include/asm/asm.h
>> +++ b/arch/riscv/include/asm/asm.h
>> @@ -67,30 +67,4 @@
>> #error "Unexpected __SIZEOF_SHORT__"
>> #endif
>>
>> -#ifdef __ASSEMBLY__
>> -
>> -/* Common assembly source macros */
>> -
>> -#ifdef CONFIG_XIP_KERNEL
>> -.macro XIP_FIXUP_OFFSET reg
>> - REG_L t0, _xip_fixup
>> - add \reg, \reg, t0
>> -.endm
>> -.macro XIP_FIXUP_FLASH_OFFSET reg
>> - la t1, __data_loc
>> - REG_L t1, _xip_phys_offset
>> - sub \reg, \reg, t1
>> - add \reg, \reg, t0
>> -.endm
>> -_xip_fixup: .dword CONFIG_PHYS_RAM_BASE - CONFIG_XIP_PHYS_ADDR - XIP_OFFSET
>> -_xip_phys_offset: .dword CONFIG_XIP_PHYS_ADDR + XIP_OFFSET
>> -#else
>> -.macro XIP_FIXUP_OFFSET reg
>> -.endm
>> -.macro XIP_FIXUP_FLASH_OFFSET reg
>> -.endm
>> -#endif /* CONFIG_XIP_KERNEL */
>> -
>> -#endif /* __ASSEMBLY__ */
>> -
>> #endif /* _ASM_RISCV_ASM_H */
>> diff --git a/arch/riscv/include/asm/xip_fixup.h b/arch/riscv/include/asm/xip_fixup.h
>> new file mode 100644
>> index 000000000000..0d0754305324
>> --- /dev/null
>> +++ b/arch/riscv/include/asm/xip_fixup.h
>> @@ -0,0 +1,32 @@
>> +/* SPDX-License-Identifier: GPL-2.0-only */
>> +/*
>> + * XIP fixup macros, only useful in assembly.
>> + */
>> +#ifndef _ASM_RISCV_XIP_FIXUP_H
>> +#define _ASM_RISCV_XIP_FIXUP_H
>> +
>> +#include <linux/pgtable.h>
>> +
>> +#ifdef CONFIG_XIP_KERNEL
>> +.macro XIP_FIXUP_OFFSET reg
>> + REG_L t0, _xip_fixup
>> + add \reg, \reg, t0
>> +.endm
>> +.macro XIP_FIXUP_FLASH_OFFSET reg
>> + la t1, __data_loc
>> + li t0, XIP_OFFSET_MASK
>> + and t1, t1, t0
>> + li t1, XIP_OFFSET
> I still prefer the style:
> REG_L t1, _xip_phys_offset
> ...
> _xip_phys_offset: .dword CONFIG_XIP_PHYS_ADDR + XIP_OFFSET
>
> Because it's more clear and has the same style as your _xip_fixup.
Thanks, not quite shure how I pulled the old version over. I've fixed
this one up.
> Others:
> Reviewed-by: Guo Ren <guoren@kernel.org>
>
>> + sub t0, t0, t1
>> + sub \reg, \reg, t0
>> +.endm
> -.endm
>> +
>> +_xip_fixup: .dword CONFIG_PHYS_RAM_BASE - CONFIG_XIP_PHYS_ADDR - XIP_OFFSET
>> +#else
>> +.macro XIP_FIXUP_OFFSET reg
>> +.endm
>> +.macro XIP_FIXUP_FLASH_OFFSET reg
>> +.endm
>> +#endif /* CONFIG_XIP_KERNEL */
>> +
>> +#endif
>> diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
>> index 893b8bb69391..822c33aa7f45 100644
>> --- a/arch/riscv/kernel/head.S
>> +++ b/arch/riscv/kernel/head.S
>> @@ -14,6 +14,7 @@
>> #include <asm/hwcap.h>
>> #include <asm/image.h>
>> +#include <asm/xip_fixup.h>
>> #include "efi-header.S"
>>
>> __HEAD
>> diff --git a/arch/riscv/kernel/suspend_entry.S b/arch/riscv/kernel/suspend_entry.S
>> index 4b07b809a2b8..aafcca58c19d 100644
>> --- a/arch/riscv/kernel/suspend_entry.S
>> +++ b/arch/riscv/kernel/suspend_entry.S
>> @@ -8,6 +8,7 @@
>> #include <asm/asm.h>
>> #include <asm/asm-offsets.h>
>> #include <asm/csr.h>
>> +#include <asm/xip_fixup.h>
>>
>> .text
>> .altmacro
>> --
>> 2.34.1
>>
^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH v2 4/4] RISC-V: Fix the XIP build
2022-04-20 18:40 ` Palmer Dabbelt
@ 2022-04-20 18:40 ` Palmer Dabbelt
-1 siblings, 0 replies; 22+ messages in thread
From: Palmer Dabbelt @ 2022-04-20 18:40 UTC (permalink / raw)
To: linux-riscv, rdunlap
Cc: Paul Walmsley, Palmer Dabbelt, aou, anup, vincent.chen, guoren,
Atish Patra, alexandre.ghiti, jszhang, vitaly.wool, gatecat,
wangkefeng.wang, mick, panqinglin2020, rppt, linux-riscv,
linux-kernel, linux, Palmer Dabbelt
From: Palmer Dabbelt <palmer@rivosinc.com>
A handful of functions unused functions were enabled during XIP builds,
which themselves didn't build correctly. This just disables the
functions entirely.
Fixes: e8a62cc26ddf ("riscv: Implement sv48 support")
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
---
arch/riscv/mm/init.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
index 7bc9a21e29fb..d2054a6cd791 100644
--- a/arch/riscv/mm/init.c
+++ b/arch/riscv/mm/init.c
@@ -660,7 +660,7 @@ static __init pgprot_t pgprot_from_va(uintptr_t va)
}
#endif /* CONFIG_STRICT_KERNEL_RWX */
-#ifdef CONFIG_64BIT
+#if defined(CONFIG_64BIT) && !defined(CONFIG_XIP_KERNEL)
static void __init disable_pgtable_l5(void)
{
pgtable_l5_enabled = false;
--
2.34.1
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH v2 4/4] RISC-V: Fix the XIP build
@ 2022-04-20 18:40 ` Palmer Dabbelt
0 siblings, 0 replies; 22+ messages in thread
From: Palmer Dabbelt @ 2022-04-20 18:40 UTC (permalink / raw)
To: linux-riscv, rdunlap
Cc: Paul Walmsley, Palmer Dabbelt, aou, anup, vincent.chen, guoren,
Atish Patra, alexandre.ghiti, jszhang, vitaly.wool, gatecat,
wangkefeng.wang, mick, panqinglin2020, rppt, linux-riscv,
linux-kernel, linux, Palmer Dabbelt
From: Palmer Dabbelt <palmer@rivosinc.com>
A handful of functions unused functions were enabled during XIP builds,
which themselves didn't build correctly. This just disables the
functions entirely.
Fixes: e8a62cc26ddf ("riscv: Implement sv48 support")
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
---
arch/riscv/mm/init.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
index 7bc9a21e29fb..d2054a6cd791 100644
--- a/arch/riscv/mm/init.c
+++ b/arch/riscv/mm/init.c
@@ -660,7 +660,7 @@ static __init pgprot_t pgprot_from_va(uintptr_t va)
}
#endif /* CONFIG_STRICT_KERNEL_RWX */
-#ifdef CONFIG_64BIT
+#if defined(CONFIG_64BIT) && !defined(CONFIG_XIP_KERNEL)
static void __init disable_pgtable_l5(void)
{
pgtable_l5_enabled = false;
--
2.34.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [PATCH v2 4/4] RISC-V: Fix the XIP build
2022-04-20 18:40 ` Palmer Dabbelt
@ 2022-04-21 6:46 ` Guo Ren
-1 siblings, 0 replies; 22+ messages in thread
From: Guo Ren @ 2022-04-21 6:46 UTC (permalink / raw)
To: Palmer Dabbelt
Cc: linux-riscv, Randy Dunlap, Paul Walmsley, Palmer Dabbelt,
Albert Ou, Anup Patel, Vincent Chen, Atish Patra, Alexandre Ghiti,
jszhang, Vitaly Wool, gatecat, Kefeng Wang, Nick Kossifidis,
潘庆霖, Mike Rapoport,
Linux Kernel Mailing List, linux
Reviewed-by: Guo Ren <guoren@kernel.org>
On Thu, Apr 21, 2022 at 2:48 AM Palmer Dabbelt <palmer@rivosinc.com> wrote:
>
> From: Palmer Dabbelt <palmer@rivosinc.com>
>
> A handful of functions unused functions were enabled during XIP builds,
> which themselves didn't build correctly. This just disables the
> functions entirely.
>
> Fixes: e8a62cc26ddf ("riscv: Implement sv48 support")
> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
> ---
> arch/riscv/mm/init.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
> index 7bc9a21e29fb..d2054a6cd791 100644
> --- a/arch/riscv/mm/init.c
> +++ b/arch/riscv/mm/init.c
> @@ -660,7 +660,7 @@ static __init pgprot_t pgprot_from_va(uintptr_t va)
> }
> #endif /* CONFIG_STRICT_KERNEL_RWX */
>
> -#ifdef CONFIG_64BIT
> +#if defined(CONFIG_64BIT) && !defined(CONFIG_XIP_KERNEL)
> static void __init disable_pgtable_l5(void)
> {
> pgtable_l5_enabled = false;
> --
> 2.34.1
>
--
Best Regards
Guo Ren
ML: https://lore.kernel.org/linux-csky/
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH v2 4/4] RISC-V: Fix the XIP build
@ 2022-04-21 6:46 ` Guo Ren
0 siblings, 0 replies; 22+ messages in thread
From: Guo Ren @ 2022-04-21 6:46 UTC (permalink / raw)
To: Palmer Dabbelt
Cc: linux-riscv, Randy Dunlap, Paul Walmsley, Palmer Dabbelt,
Albert Ou, Anup Patel, Vincent Chen, Atish Patra, Alexandre Ghiti,
jszhang, Vitaly Wool, gatecat, Kefeng Wang, Nick Kossifidis,
潘庆霖, Mike Rapoport,
Linux Kernel Mailing List, linux
Reviewed-by: Guo Ren <guoren@kernel.org>
On Thu, Apr 21, 2022 at 2:48 AM Palmer Dabbelt <palmer@rivosinc.com> wrote:
>
> From: Palmer Dabbelt <palmer@rivosinc.com>
>
> A handful of functions unused functions were enabled during XIP builds,
> which themselves didn't build correctly. This just disables the
> functions entirely.
>
> Fixes: e8a62cc26ddf ("riscv: Implement sv48 support")
> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
> ---
> arch/riscv/mm/init.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
> index 7bc9a21e29fb..d2054a6cd791 100644
> --- a/arch/riscv/mm/init.c
> +++ b/arch/riscv/mm/init.c
> @@ -660,7 +660,7 @@ static __init pgprot_t pgprot_from_va(uintptr_t va)
> }
> #endif /* CONFIG_STRICT_KERNEL_RWX */
>
> -#ifdef CONFIG_64BIT
> +#if defined(CONFIG_64BIT) && !defined(CONFIG_XIP_KERNEL)
> static void __init disable_pgtable_l5(void)
> {
> pgtable_l5_enabled = false;
> --
> 2.34.1
>
--
Best Regards
Guo Ren
ML: https://lore.kernel.org/linux-csky/
^ permalink raw reply [flat|nested] 22+ messages in thread