* [PATCH] drm/i915: Skip force-wake for uncached mmio flush of GGTT writes
@ 2017-03-18 10:42 Chris Wilson
2017-03-18 11:03 ` ✓ Fi.CI.BAT: success for " Patchwork
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Chris Wilson @ 2017-03-18 10:42 UTC (permalink / raw)
To: intel-gfx
The trick of using an uncached mmio read to ensure that the GGTT writes
are flushed does not require us to do the forcewake dance, so avoid it
in the hope of reducing the frequency that we do keep the device forced
awake.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/i915_gem.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 5e280e3bfd86..d468300e2f05 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3094,8 +3094,11 @@ i915_gem_object_flush_gtt_write_domain(struct drm_i915_gem_object *obj)
* system agents we cannot reproduce this behaviour).
*/
wmb();
- if (INTEL_GEN(dev_priv) >= 6 && !HAS_LLC(dev_priv))
- POSTING_READ(RING_ACTHD(dev_priv->engine[RCS]->mmio_base));
+ if (INTEL_GEN(dev_priv) >= 6 && !HAS_LLC(dev_priv)) {
+ spin_lock_irq(&dev_priv->uncore.lock);
+ POSTING_READ_FW(RING_ACTHD(dev_priv->engine[RCS]->mmio_base));
+ spin_unlock_irq(&dev_priv->uncore.lock);
+ }
intel_fb_obj_flush(obj, write_origin(obj, I915_GEM_DOMAIN_GTT));
--
2.11.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread* ✓ Fi.CI.BAT: success for drm/i915: Skip force-wake for uncached mmio flush of GGTT writes
2017-03-18 10:42 [PATCH] drm/i915: Skip force-wake for uncached mmio flush of GGTT writes Chris Wilson
@ 2017-03-18 11:03 ` Patchwork
2017-03-20 10:02 ` [PATCH] " Mika Kuoppala
2017-03-20 10:38 ` Mika Kuoppala
2 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2017-03-18 11:03 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Skip force-wake for uncached mmio flush of GGTT writes
URL : https://patchwork.freedesktop.org/series/21486/
State : success
== Summary ==
Series 21486v1 drm/i915: Skip force-wake for uncached mmio flush of GGTT writes
https://patchwork.freedesktop.org/api/1.0/series/21486/revisions/1/mbox/
Test drv_module_reload:
Subgroup basic-no-display:
incomplete -> PASS (fi-hsw-4770r) fdo#100121
Test gem_exec_flush:
Subgroup basic-batch-kernel-default-uc:
pass -> FAIL (fi-snb-2600) fdo#100007
Test gem_exec_suspend:
Subgroup basic-s4-devices:
pass -> DMESG-WARN (fi-bxt-t5700) fdo#100125
fdo#100121 https://bugs.freedesktop.org/show_bug.cgi?id=100121
fdo#100007 https://bugs.freedesktop.org/show_bug.cgi?id=100007
fdo#100125 https://bugs.freedesktop.org/show_bug.cgi?id=100125
fi-bdw-5557u total:278 pass:267 dwarn:0 dfail:0 fail:0 skip:11 time: 455s
fi-bsw-n3050 total:278 pass:239 dwarn:0 dfail:0 fail:0 skip:39 time: 579s
fi-bxt-j4205 total:278 pass:259 dwarn:0 dfail:0 fail:0 skip:19 time: 533s
fi-bxt-t5700 total:278 pass:257 dwarn:1 dfail:0 fail:0 skip:20 time: 562s
fi-byt-j1900 total:278 pass:251 dwarn:0 dfail:0 fail:0 skip:27 time: 498s
fi-byt-n2820 total:278 pass:247 dwarn:0 dfail:0 fail:0 skip:31 time: 496s
fi-hsw-4770 total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16 time: 440s
fi-hsw-4770r total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16 time: 435s
fi-ilk-650 total:278 pass:228 dwarn:0 dfail:0 fail:0 skip:50 time: 437s
fi-ivb-3520m total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time: 515s
fi-ivb-3770 total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time: 493s
fi-kbl-7500u total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time: 484s
fi-skl-6260u total:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 time: 484s
fi-skl-6700hq total:278 pass:261 dwarn:0 dfail:0 fail:0 skip:17 time: 595s
fi-skl-6700k total:278 pass:256 dwarn:4 dfail:0 fail:0 skip:18 time: 480s
fi-skl-6770hq total:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 time: 520s
fi-snb-2520m total:278 pass:250 dwarn:0 dfail:0 fail:0 skip:28 time: 549s
fi-snb-2600 total:278 pass:248 dwarn:0 dfail:0 fail:1 skip:29 time: 417s
d8839e27a455191ec29780759a908f9d30a77cbb drm-tip: 2017y-03m-17d-23h-25m-27s UTC integration manifest
2891676 drm/i915: Skip force-wake for uncached mmio flush of GGTT writes
== Logs ==
For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_4226/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH] drm/i915: Skip force-wake for uncached mmio flush of GGTT writes
2017-03-18 10:42 [PATCH] drm/i915: Skip force-wake for uncached mmio flush of GGTT writes Chris Wilson
2017-03-18 11:03 ` ✓ Fi.CI.BAT: success for " Patchwork
@ 2017-03-20 10:02 ` Mika Kuoppala
2017-03-20 10:08 ` Chris Wilson
2017-03-20 10:38 ` Mika Kuoppala
2 siblings, 1 reply; 6+ messages in thread
From: Mika Kuoppala @ 2017-03-20 10:02 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
Chris Wilson <chris@chris-wilson.co.uk> writes:
> The trick of using an uncached mmio read to ensure that the GGTT writes
> are flushed does not require us to do the forcewake dance, so avoid it
> in the hope of reducing the frequency that we do keep the device forced
> awake.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
> drivers/gpu/drm/i915/i915_gem.c | 7 +++++--
> 1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 5e280e3bfd86..d468300e2f05 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -3094,8 +3094,11 @@ i915_gem_object_flush_gtt_write_domain(struct drm_i915_gem_object *obj)
> * system agents we cannot reproduce this behaviour).
> */
> wmb();
> - if (INTEL_GEN(dev_priv) >= 6 && !HAS_LLC(dev_priv))
> - POSTING_READ(RING_ACTHD(dev_priv->engine[RCS]->mmio_base));
> + if (INTEL_GEN(dev_priv) >= 6 && !HAS_LLC(dev_priv)) {
> + spin_lock_irq(&dev_priv->uncore.lock);
> + POSTING_READ_FW(RING_ACTHD(dev_priv->engine[RCS]->mmio_base));
> + spin_unlock_irq(&dev_priv->uncore.lock);
> + }
>
Why is it so that the flushing (from gpu side) doesn't need
the rc6?
Also noticed that write domain check, prior to calling this,
in set_to_cpu_domain() is redundant.
-Mika
> intel_fb_obj_flush(obj, write_origin(obj, I915_GEM_DOMAIN_GTT));
>
> --
> 2.11.0
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH] drm/i915: Skip force-wake for uncached mmio flush of GGTT writes
2017-03-20 10:02 ` [PATCH] " Mika Kuoppala
@ 2017-03-20 10:08 ` Chris Wilson
0 siblings, 0 replies; 6+ messages in thread
From: Chris Wilson @ 2017-03-20 10:08 UTC (permalink / raw)
To: Mika Kuoppala; +Cc: intel-gfx
On Mon, Mar 20, 2017 at 12:02:02PM +0200, Mika Kuoppala wrote:
> Chris Wilson <chris@chris-wilson.co.uk> writes:
>
> > The trick of using an uncached mmio read to ensure that the GGTT writes
> > are flushed does not require us to do the forcewake dance, so avoid it
> > in the hope of reducing the frequency that we do keep the device forced
> > awake.
> >
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > ---
> > drivers/gpu/drm/i915/i915_gem.c | 7 +++++--
> > 1 file changed, 5 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> > index 5e280e3bfd86..d468300e2f05 100644
> > --- a/drivers/gpu/drm/i915/i915_gem.c
> > +++ b/drivers/gpu/drm/i915/i915_gem.c
> > @@ -3094,8 +3094,11 @@ i915_gem_object_flush_gtt_write_domain(struct drm_i915_gem_object *obj)
> > * system agents we cannot reproduce this behaviour).
> > */
> > wmb();
> > - if (INTEL_GEN(dev_priv) >= 6 && !HAS_LLC(dev_priv))
> > - POSTING_READ(RING_ACTHD(dev_priv->engine[RCS]->mmio_base));
> > + if (INTEL_GEN(dev_priv) >= 6 && !HAS_LLC(dev_priv)) {
> > + spin_lock_irq(&dev_priv->uncore.lock);
> > + POSTING_READ_FW(RING_ACTHD(dev_priv->engine[RCS]->mmio_base));
> > + spin_unlock_irq(&dev_priv->uncore.lock);
> > + }
> >
>
> Why is it so that the flushing (from gpu side) doesn't need
> the rc6?
It's not GPU, it's GTT. Just the usual thing with our fake pci not
following pci ordering rules.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/i915: Skip force-wake for uncached mmio flush of GGTT writes
2017-03-18 10:42 [PATCH] drm/i915: Skip force-wake for uncached mmio flush of GGTT writes Chris Wilson
2017-03-18 11:03 ` ✓ Fi.CI.BAT: success for " Patchwork
2017-03-20 10:02 ` [PATCH] " Mika Kuoppala
@ 2017-03-20 10:38 ` Mika Kuoppala
2017-03-20 13:51 ` Chris Wilson
2 siblings, 1 reply; 6+ messages in thread
From: Mika Kuoppala @ 2017-03-20 10:38 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
Chris Wilson <chris@chris-wilson.co.uk> writes:
> The trick of using an uncached mmio read to ensure that the GGTT writes
> are flushed does not require us to do the forcewake dance, so avoid it
> in the hope of reducing the frequency that we do keep the device forced
> awake.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
> ---
> drivers/gpu/drm/i915/i915_gem.c | 7 +++++--
> 1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 5e280e3bfd86..d468300e2f05 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -3094,8 +3094,11 @@ i915_gem_object_flush_gtt_write_domain(struct drm_i915_gem_object *obj)
> * system agents we cannot reproduce this behaviour).
> */
> wmb();
> - if (INTEL_GEN(dev_priv) >= 6 && !HAS_LLC(dev_priv))
> - POSTING_READ(RING_ACTHD(dev_priv->engine[RCS]->mmio_base));
> + if (INTEL_GEN(dev_priv) >= 6 && !HAS_LLC(dev_priv)) {
> + spin_lock_irq(&dev_priv->uncore.lock);
> + POSTING_READ_FW(RING_ACTHD(dev_priv->engine[RCS]->mmio_base));
> + spin_unlock_irq(&dev_priv->uncore.lock);
> + }
>
> intel_fb_obj_flush(obj, write_origin(obj, I915_GEM_DOMAIN_GTT));
>
> --
> 2.11.0
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH] drm/i915: Skip force-wake for uncached mmio flush of GGTT writes
2017-03-20 10:38 ` Mika Kuoppala
@ 2017-03-20 13:51 ` Chris Wilson
0 siblings, 0 replies; 6+ messages in thread
From: Chris Wilson @ 2017-03-20 13:51 UTC (permalink / raw)
To: Mika Kuoppala; +Cc: intel-gfx
On Mon, Mar 20, 2017 at 12:38:31PM +0200, Mika Kuoppala wrote:
> Chris Wilson <chris@chris-wilson.co.uk> writes:
>
> > The trick of using an uncached mmio read to ensure that the GGTT writes
> > are flushed does not require us to do the forcewake dance, so avoid it
> > in the hope of reducing the frequency that we do keep the device forced
> > awake.
> >
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
>
> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Applied, thanks.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2017-03-20 13:51 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2017-03-18 10:42 [PATCH] drm/i915: Skip force-wake for uncached mmio flush of GGTT writes Chris Wilson
2017-03-18 11:03 ` ✓ Fi.CI.BAT: success for " Patchwork
2017-03-20 10:02 ` [PATCH] " Mika Kuoppala
2017-03-20 10:08 ` Chris Wilson
2017-03-20 10:38 ` Mika Kuoppala
2017-03-20 13:51 ` Chris Wilson
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.