From: "Alex Bennée" <alex.bennee@linaro.org>
To: "Torbjörn SVENSSON" <torbjorn.svensson@foss.st.com>
Cc: <qemu-devel@nongnu.org>,
Peter Maydell <peter.maydell@linaro.org>, <qemu-arm@nongnu.org>
Subject: Re: [PATCH 2/3] target/arm/tcg: add PAC related instructions
Date: Wed, 27 May 2026 14:33:30 +0100 [thread overview]
Message-ID: <87bje1x9hx.fsf@draig.linaro.org> (raw)
In-Reply-To: <20260518-pr-pacbti-v1-2-8932a885b03d@foss.st.com> ("Torbjörn SVENSSON"'s message of "Mon, 18 May 2026 18:14:00 +0200")
Torbjörn SVENSSON <torbjorn.svensson@foss.st.com> writes:
> This commit adds the pointer authentication instructions from the Arm
> v8.1-m PACBTI extension.
> While the instructions are properly recognized, they are all NOPs.
>
> Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
> ---
> target/arm/tcg/t32.decode | 21 +++++++++++++---
> target/arm/tcg/translate.c | 62 ++++++++++++++++++++++++++++++++++++++++++++++
> 2 files changed, 80 insertions(+), 3 deletions(-)
>
> diff --git a/target/arm/tcg/t32.decode b/target/arm/tcg/t32.decode
> index 49b8d0037e..a885eed101 100644
> --- a/target/arm/tcg/t32.decode
> +++ b/target/arm/tcg/t32.decode
> @@ -263,6 +263,7 @@ BFCI 1111 0011 011 0 .... 0 ... .... ..0..... @bfi
> @s0_rnadm .... .... .... rn:4 ra:4 rd:4 .... rm:4 &s_rrrr s=0
> @s0_rn0dm .... .... .... rn:4 .... rd:4 .... rm:4 &s_rrrr ra=0 s=0
> @rnadm .... .... .... rn:4 ra:4 rd:4 .... rm:4 &rrrr
> +@rna0m .... .... .... rn:4 ra:4 .... .... rm:4 &rrrr rd=0
> @rn0dm .... .... .... rn:4 .... rd:4 .... rm:4 &rrrr ra=0
> @rndm .... .... .... rn:4 .... rd:4 .... rm:4 &rrr
> @rdm .... .... .... .... .... rd:4 .... rm:4 &rr
> @@ -319,9 +320,18 @@ SMLALDX 1111 1011 1100 .... .... .... 1101 .... @rnadm
> SMLSLD 1111 1011 1101 .... .... .... 1100 .... @rnadm
> SMLSLDX 1111 1011 1101 .... .... .... 1101 .... @rnadm
>
> -SMMLA 1111 1011 0101 .... .... .... 0000 .... @rnadm
> -SMMLAR 1111 1011 0101 .... .... .... 0001 .... @rnadm
> -SMMLS 1111 1011 0110 .... .... .... 0000 .... @rnadm
> +{
> + AUTG 1111 1011 0101 .... .... 1111 0000 .... @rna0m
> + SMMLA 1111 1011 0101 .... .... .... 0000 .... @rnadm
> +}
> +{
> + BXAUT 1111 1011 0101 .... .... 1111 0001 .... @rna0m
> + SMMLAR 1111 1011 0101 .... .... .... 0001 .... @rnadm
> +}
> +{
> + PACG 1111 1011 0110 .... 1111 .... 0000 .... @rndm
> + SMMLS 1111 1011 0110 .... .... .... 0000 .... @rnadm
> +}
> SMMLSR 1111 1011 0110 .... .... .... 0001 .... @rnadm
>
> SDIV 1111 1011 1001 .... 1111 .... 1111 .... @rndm
> @@ -375,6 +385,11 @@ CLZ 1111 1010 1011 ---- 1111 .... 1000 .... @rdm
> # SEVL 1111 0011 1010 1111 1000 0000 0000 0101
>
> ESB 1111 0011 1010 1111 1000 0000 0001 0000
> +
> + # v8.1-m PACBTI extention
> + AUT 1111 0011 1010 1111 1000 0000 0010 1101
> + PAC 1111 0011 1010 1111 1000 0000 0001 1101
> + PACBTI 1111 0011 1010 1111 1000 0000 0000 1101
> ]
>
> # The canonical nop ends in 0000 0000, but the whole rest
> diff --git a/target/arm/tcg/translate.c b/target/arm/tcg/translate.c
> index c744b16345..ae1351ef03 100644
> --- a/target/arm/tcg/translate.c
> +++ b/target/arm/tcg/translate.c
> @@ -5012,6 +5012,68 @@ static bool trans_SMMLSR(DisasContext *s, arg_rrrr *a)
> return op_smmla(s, a, true, true);
> }
>
> +static bool trans_PAC(DisasContext *s, arg_empty *a)
> +{
> + if (!arm_dc_feature(s, ARM_FEATURE_V8_1M)) {
> + return false;
> + }
These are the wrong feature tests. I would bring the
isar_feature_aa32_m_pacbti from 3/3 into this patch and invert the logic
in the same way the a64 does:
if (dc_isar_feature(aa32_m_pacbti, s)) {
/* treat as NOP for now */
return true;
}
return false;
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
next prev parent reply other threads:[~2026-05-27 13:33 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-18 16:13 [PATCH 0/3] target/arm: add support for Cortex-M pointer authentication code Torbjörn SVENSSON
2026-05-18 16:13 ` [PATCH 1/3] target/arm/tcg: define cortex-m85 cpu Torbjörn SVENSSON
2026-05-27 13:21 ` Alex Bennée
2026-05-28 10:22 ` Peter Maydell
2026-05-18 16:14 ` [PATCH 2/3] target/arm/tcg: add PAC related instructions Torbjörn SVENSSON
2026-05-27 13:33 ` Alex Bennée [this message]
2026-05-28 10:40 ` Peter Maydell
2026-05-18 16:14 ` [PATCH 3/3] target/arm: implement v8.1-m PAC support Torbjörn SVENSSON
2026-05-27 13:55 ` Alex Bennée
2026-05-27 16:38 ` Peter Maydell
2026-05-28 10:43 ` Peter Maydell
2026-05-27 7:36 ` [PING] [PATCH 0/3] target/arm: add support for Cortex-M pointer authentication code Torbjorn SVENSSON
2026-05-27 12:58 ` Alex Bennée
2026-05-28 10:50 ` Peter Maydell
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