From: Marc Zyngier <maz@kernel.org>
To: Mark Brown <broonie@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
Oliver Upton <oliver.upton@linux.dev>,
Joey Gouly <joey.gouly@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Shuah Khan <shuah@kernel.org>,
linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org,
kvmarm@lists.linux.dev, linux-kselftest@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v14 4/5] KVM: arm64: Set PSTATE.EXLOCK when entering an exception
Date: Sat, 05 Oct 2024 17:35:52 +0100 [thread overview]
Message-ID: <87bjzyv76f.wl-maz@kernel.org> (raw)
In-Reply-To: <ZwFJvV7lrFStWD-r@finisterre.sirena.org.uk>
On Sat, 05 Oct 2024 15:14:21 +0100,
Mark Brown <broonie@kernel.org> wrote:
>
> On Sat, Oct 05, 2024 at 01:36:09PM +0100, Marc Zyngier wrote:
> > Mark Brown <broonie@kernel.org> wrote:
>
> > > + // PSTATE.EXLOCK is set to 0 upon any exception to a higher
> > > + // EL, or to GCSCR_ELx.EXLOCKEN for an exception to the same
> > > + // exception level. See ARM DDI 0487 RWTXBY, D.1.3.2 in K.a.
> > > + if (kvm_has_gcs(vcpu->kvm) &&
> > > + (target_mode & PSR_EL_MASK) == (mode & PSR_EL_MASK)) {
> > > + u64 gcscr = __vcpu_read_sys_reg(vcpu, GCSCR_EL1);
>
> > No, please. This only works by luck when a guest has AArch32 EL0, and
> > creates more havoc on a NV guest. In general, this PSR_EL_MASK creates
> > more problem than anything else, and doesn't fit the rest of the code.
>
> You say luck, I say careful architecture definition but sure.
I wasn't talking about the architecture, but sure.
>
> > So this needs to:
> > - explicitly only apply to exceptions from AArch64
> > - handle exception from EL2, since this helper already deals with that
>
> > The latter point of course means introducing GCSCR_EL2 (and everything
> > that depends on it, such as the trap handling).
>
> For clarity, which trap handling specifically?
All the traps described in the GCSCR_EL2 documentation -- I see two
control bits described in K.a, all of which needs to be propagated and
their effects handled. Similarly, GCSPR_EL2 needs to be defined.
M.
--
Without deviation from the norm, progress is not possible.
next prev parent reply other threads:[~2024-10-05 16:35 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-05 10:37 [PATCH v14 0/5] KVM: arm64: Provide guest support for GCS Mark Brown
2024-10-05 10:37 ` [PATCH v14 1/5] KVM: arm64: Expose S1PIE to guests Mark Brown
2024-10-05 10:37 ` [PATCH v14 2/5] arm64/gcs: Ensure FGTs for EL1 GCS instructions are disabled Mark Brown
2024-10-05 10:37 ` [PATCH v14 3/5] KVM: arm64: Manage GCS access and registers for guests Mark Brown
2024-10-05 11:34 ` Marc Zyngier
2024-10-05 13:08 ` Mark Brown
2024-10-05 13:18 ` Marc Zyngier
2024-10-05 13:48 ` Mark Brown
2024-10-05 14:02 ` Marc Zyngier
2024-10-05 14:26 ` Mark Brown
2024-10-05 14:33 ` Marc Zyngier
2024-10-05 10:37 ` [PATCH v14 4/5] KVM: arm64: Set PSTATE.EXLOCK when entering an exception Mark Brown
2024-10-05 12:36 ` Marc Zyngier
2024-10-05 14:14 ` Mark Brown
2024-10-05 16:35 ` Marc Zyngier [this message]
2024-10-05 10:37 ` [PATCH v14 5/5] KVM: selftests: arm64: Add GCS registers to get-reg-list Mark Brown
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