[igt-dev] [PATCH i-g-t v3 00/28] Second part of DG2 OA tests

[igt-dev] [PATCH i-g-t v3 00/28] Second part of DG2 OA tests

[Umesh Nerlige Ramappa]

Add tests for changes in perf OA for DG2.This is part 2 of "Add DG2 OA test"

v2:
- Rebase
- Reposting since some patches did no land in the ML

v3:
- Fix author/sign-off name mismatch in one patch

v4:
- Add review comments
- Drop below patches

"i915/perf: Bump timestamp tolerance for DG1"
(Not able to reproduce it with latest drm-tip)

"i915/perf: Add support for 64-bit counters"
"i915/perf: Add a test for non-power-of-2 oa reports"
"i915/perf: Treat ticks as 64 bit"
"i915/perf: Treat timestamp as 64 bit value"
"i915/perf: Fix DG2 A0 report header"
(Separate out 64-bit OA formats from this series)

v5:
- Add patches from lionel for updated metric sets

v6:
- ACM metrics patch message size is large and gets dropped by the email
  server. Break the patch into smaller chunks.

v7:
- Posting part 2 of DG2 IGT OA series

v8:
- Enable sseu-config tests back for gfx12
- Drop patch for rc6-disable as the failure is not seen on DG2 anymore

v9:
- Update R-b for "lib/i915/perf-config: Bump up the soversion"

Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>

Lionel Landwerlin (15):
  lib/i915/perf: implement report accumulation for new format
  tools/i915-perf-recorder: add ability to select device
  lib/i915/perf: fixup report validity
  lib/i915/perf: add a helper to read timestamps
  lib/i915/perf: store bit shifting required for OA timestamps
  lib/i915/perf: indentation fix
  tools/i915-perf-recorder: capture OA & CS frequencies
  tools/i915-perf: make timestamp range easier to compare
  tools/i915-perf: printout CPU clock used
  tools/i915-perf: record remaining perf data on exit
  lib/i915/perf: add a raw timestamp utility
  lib/i915/perf: add helper function to get report reason
  tools/i915-perf: add option to printout reports data
  lib/i915: add new ACM/DG2 format in codegen
  lib/i915/perf: configure OA timestamp shift and mask for ACM

Umesh Nerlige Ramappa (13):
  lib/i915/perf-config: Bump up the soversion
  i915/perf: Check regularly if we are done reading reports
  i915/perf: Fix OA short_reads test
  i915/perf: Check return value from getparam
  i915/perf: Skip sseu-config tests for gfx12.50+
  i915/perf: Account for OA sampling interval in polling test
  i915/perf: Define OA report types and fix oa-formats test
  i915/perf: Use ARRAY_SIZE consistently for num_properties
  i915/perf: Use gt in perf tests and lib
  i915/perf: Explicitly state rendercopy needs for a test
  i915/perf: Skip tests that use rendercopy
  i915/perf: Add OA formats for DG2
  i915/perf: Fix CS timestamp vs OA timstamp mismatch

 include/drm-uapi/i915_drm.h                   |  10 +
 .../perf-configs/perf-metricset-codegen.py    |  13 +
 lib/i915/perf.c                               | 232 ++++++++++++++--
 lib/i915/perf.h                               |  29 +-
 lib/i915/perf_data_reader.c                   |  29 +-
 lib/meson.build                               |   4 +-
 tests/i915/perf.c                             | 251 ++++++++++++++----
 tools/i915-perf/i915_perf_reader.c            | 117 ++++++--
 tools/i915-perf/i915_perf_recorder.c          | 112 +++++++-
 9 files changed, 662 insertions(+), 135 deletions(-)

-- 
2.25.1

[igt-dev] [PATCH i-g-t v3 01/28] lib/i915/perf-config: Bump up the soversion

[Umesh Nerlige Ramappa]

Add soversion update that was missed as part of the below patch:

"lib/i915/perf-config: extend the device info"

Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
---
 lib/meson.build | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/meson.build b/lib/meson.build
index 1fa6d6ee..50ffd8cd 100644
--- a/lib/meson.build
+++ b/lib/meson.build
@@ -321,7 +321,7 @@ lib_igt_i915_perf_build = shared_library(
   dependencies: lib_igt_chipset,
   include_directories : inc,
   install: true,
-  soversion: '1')
+  soversion: '1.3')
 
 lib_igt_i915_perf = declare_dependency(
   link_with : lib_igt_i915_perf_build,
-- 
2.25.1

[igt-dev] [PATCH i-g-t v3 02/28] i915/perf: Check regularly if we are done reading reports

[Umesh Nerlige Ramappa]

If we pass a user buffer as large as the OA buffer, the OA unit will
return all available reports. In the second part of the
buffer-fill/enable-disable tests, we are collecting all reports within a
time window, but we only check the time window in the outer while loop.
We may have read well past that window if OA returns more reports. Fix
this rare failure by checking for the window within the inner for loop.

Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
---
 tests/i915/perf.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/tests/i915/perf.c b/tests/i915/perf.c
index 5502a3fb..51e2dc87 100644
--- a/tests/i915/perf.c
+++ b/tests/i915/perf.c
@@ -2522,6 +2522,9 @@ test_buffer_fill(void)
 						first_timestamp = report[1];
 					last_timestamp = report[1];
 
+					if (((last_timestamp - first_timestamp) * oa_period) < (fill_duration / 2))
+						break;
+
 					if (oa_report_is_periodic(oa_exponent, report)) {
 						memcpy(last_periodic_report, report,
 						       sizeof(last_periodic_report));
@@ -2537,6 +2540,8 @@ test_buffer_fill(void)
 
 		do_ioctl(stream_fd, I915_PERF_IOCTL_DISABLE, 0);
 
+		igt_debug("first ts = %u, last ts = %u\n", first_timestamp, last_timestamp);
+
 		igt_debug("%f < %zu < %f\n",
 			  report_size * n_full_oa_reports * 0.45,
 			  n_periodic_reports * report_size,
@@ -2732,6 +2737,9 @@ test_enable_disable(void)
 						  oa_report_is_periodic(oa_exponent, report),
 						  oa_report_get_ctx_id(report));
 
+					if (((last_timestamp - first_timestamp) * oa_period) < (fill_duration / 2))
+						break;
+
 					if (oa_report_is_periodic(oa_exponent, report)) {
 						memcpy(last_periodic_report, report,
 						       sizeof(last_periodic_report));
@@ -2755,6 +2763,8 @@ test_enable_disable(void)
 
 		do_ioctl(stream_fd, I915_PERF_IOCTL_DISABLE, 0);
 
+		igt_debug("first ts = %u, last ts = %u\n", first_timestamp, last_timestamp);
+
 		igt_debug("%f < %zu < %f\n",
 			  report_size * n_full_oa_reports * 0.45,
 			  n_periodic_reports * report_size,
-- 
2.25.1

[igt-dev] [PATCH i-g-t v3 03/28] i915/perf: Fix OA short_reads test

[Umesh Nerlige Ramappa]

With 5000 ns oa exponent, report lost errors can occur. A report lost
header can be read by the user even when there are no valid OA report
samples, so we get an 8 byte read. This defeats the EFAULT check.

When checking for EFAULT on a sampled report, discard any report lost
errors.

Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
---
 tests/i915/perf.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/tests/i915/perf.c b/tests/i915/perf.c
index 51e2dc87..0b8f6ac8 100644
--- a/tests/i915/perf.c
+++ b/tests/i915/perf.c
@@ -2853,8 +2853,13 @@ test_short_reads(void)
 
 	/* A read that can't return a single record because it would result
 	 * in a fault on buffer overrun should result in an EFAULT error...
+	 *
+	 * Make sure to weed out all report lost errors before verifying EFAULT.
 	 */
-	ret = read(stream_fd, pages + page_size - 16, page_size);
+	header = (void *)(pages + page_size - 16);
+	do {
+		ret = read(stream_fd, header, page_size);
+	} while (ret > 0 && header->type == DRM_I915_PERF_RECORD_OA_REPORT_LOST);
 	igt_assert_eq(ret, -1);
 	igt_assert_eq(errno, EFAULT);
 
-- 
2.25.1

[igt-dev] [PATCH i-g-t v3 04/28] i915/perf: Check return value from getparam

[Umesh Nerlige Ramappa]

In some cases getparam could fail. Check return from getparam and fail
early on.

Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
---
 lib/i915/perf.c | 28 +++++++++++++++-------------
 1 file changed, 15 insertions(+), 13 deletions(-)

diff --git a/lib/i915/perf.c b/lib/i915/perf.c
index 840d77f6..95e33b3c 100644
--- a/lib/i915/perf.c
+++ b/lib/i915/perf.c
@@ -389,19 +389,16 @@ intel_perf_for_devinfo(uint32_t device_id,
 	return perf;
 }
 
-static uint32_t
-getparam(int drm_fd, uint32_t param)
+static int
+getparam(int drm_fd, uint32_t param, uint32_t *val)
 {
-        struct drm_i915_getparam gp;
-        int val = -1;
-
-        memset(&gp, 0, sizeof(gp));
-        gp.param = param;
-        gp.value = &val;
+	struct drm_i915_getparam gp;
 
-	perf_ioctl(drm_fd, DRM_IOCTL_I915_GETPARAM, &gp);
+	memset(&gp, 0, sizeof(gp));
+	gp.param = param;
+	gp.value = (int *)val;
 
-        return val;
+	return perf_ioctl(drm_fd, DRM_IOCTL_I915_GETPARAM, &gp);
 }
 
 static bool
@@ -517,9 +514,9 @@ open_master_sysfs_dir(int drm_fd)
 struct intel_perf *
 intel_perf_for_fd(int drm_fd)
 {
-	uint32_t device_id = getparam(drm_fd, I915_PARAM_CHIPSET_ID);
-	uint32_t device_revision = getparam(drm_fd, I915_PARAM_REVISION);
-	uint32_t timestamp_frequency = getparam(drm_fd, I915_PARAM_CS_TIMESTAMP_FREQUENCY);
+	uint32_t device_id;
+	uint32_t device_revision;
+	uint32_t timestamp_frequency;
 	uint64_t gt_min_freq;
 	uint64_t gt_max_freq;
 	struct drm_i915_query_topology_info *topology;
@@ -536,6 +533,11 @@ intel_perf_for_fd(int drm_fd)
 	}
 	close(sysfs_dir_fd);
 
+	if (getparam(drm_fd, I915_PARAM_CHIPSET_ID, &device_id) ||
+	    getparam(drm_fd, I915_PARAM_REVISION, &device_revision) ||
+	    getparam(drm_fd, I915_PARAM_CS_TIMESTAMP_FREQUENCY, &timestamp_frequency))
+		return NULL;
+
 	topology = query_topology(drm_fd);
 	if (!topology)
 		return NULL;
-- 
2.25.1

[igt-dev] [PATCH i-g-t v3 05/28] i915/perf: Skip sseu-config tests for gfx12.50+

[Umesh Nerlige Ramappa]

On Gen11, the Media driver will need to limit dispatch to only big
subslices (usually half the EUs depending on EU fusing). If media,
render and OA are running in parallel, then OA will lose the NOA config
because half of the EUs will be turned off by media. To avoid this with
concurrent use cases, an sseu config to keep all EUs powered on is
passed to OA in the i915_perf_open_ioctl params. This configuration is
made part of the render contexts, so that it's applied when 3d contexts
are running. Since this is an issue on gen11, skip sseu-config tests on
other platforms.

v2:
- While sseu-config is only applicable gen11, gfx12 is already shipped
  with this, so skip the test only for gfx12.50+

Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
---
 tests/i915/perf.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tests/i915/perf.c b/tests/i915/perf.c
index 0b8f6ac8..8d1e3658 100644
--- a/tests/i915/perf.c
+++ b/tests/i915/perf.c
@@ -5112,6 +5112,7 @@ igt_main
 	igt_subtest_group {
 		igt_fixture {
 			igt_require(i915_perf_revision(drm_fd) >= 4);
+			igt_require(intel_graphics_ver(devid) < IP_VER(12, 50));
 		}
 
 		igt_describe("Verify invalid SSEU opening parameters");
-- 
2.25.1

[igt-dev] [PATCH i-g-t v3 06/28] i915/perf: Account for OA sampling interval in polling test

[Umesh Nerlige Ramappa]

The polling test reads all the reports and then expects EAGAIN on a
subsequent read since it has consumed all available data. This
works well for OA sampling periods in the order of 10s of ms. For
smaller sampling periods like 500 us, we end up reading valid data and
the test fails. Fix the check to account for the OA sampling period.

Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
---
 tests/i915/perf.c | 16 ++++++++++++----
 1 file changed, 12 insertions(+), 4 deletions(-)

diff --git a/tests/i915/perf.c b/tests/i915/perf.c
index 8d1e3658..974f3755 100644
--- a/tests/i915/perf.c
+++ b/tests/i915/perf.c
@@ -2220,14 +2220,22 @@ test_polling(uint64_t requested_oa_period, bool set_kernel_hrtimer, uint64_t ker
 			n_extra_iterations++;
 
 		/* At this point, after consuming pending reports (and hoping
-		 * the scheduler hasn't stopped us for too long we now
-		 * expect EAGAIN on read.
+		 * the scheduler hasn't stopped us for too long) we now expect
+		 * EAGAIN on read. While this works most of the times, there are
+		 * some rare failures when the OA period passed to this test is
+		 * very small (say 500 us) and that results in some valid
+		 * reports here. To weed out those rare occurences we assert
+		 * only if the OA period is >= 40 ms because 40 ms has withstood
+		 * the test of time on most platforms (ref: subtest: polling).
 		 */
 		while ((ret = read(stream_fd, buf, sizeof(buf))) < 0 &&
 		       errno == EINTR)
 			;
-		igt_assert_eq(ret, -1);
-		igt_assert_eq(errno, EAGAIN);
+
+		if (requested_oa_period >= 40000000) {
+			igt_assert_eq(ret, -1);
+			igt_assert_eq(errno, EAGAIN);
+		}
 
 		n++;
 	}
-- 
2.25.1

[igt-dev] [PATCH i-g-t v3 07/28] i915/perf: Define OA report types and fix oa-formats test

[Umesh Nerlige Ramappa]

With newer gen12 platforms, formats used for OAG buffer and
MI_REPORT_PERF_FORMAT differ slightly. This causes issues when the
oa-formats test does a sanity check. Run oa-formats for OAG reports
only.

OAR formats must be tested with the gen12-mi-rpc and
gen12-unprivileged-single-ctx-counters.

v2: Clarify commit message

Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
---
 tests/i915/perf.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/tests/i915/perf.c b/tests/i915/perf.c
index 974f3755..741af078 100644
--- a/tests/i915/perf.c
+++ b/tests/i915/perf.c
@@ -95,6 +95,13 @@ struct accumulator {
 	uint64_t deltas[MAX_RAW_OA_COUNTERS];
 };
 
+enum {
+	OAG,
+	OAR,
+
+	MAX_OA_TYPE,
+};
+
 struct oa_format {
 	const char *name;
 	size_t size;
@@ -108,6 +115,7 @@ struct oa_format {
 	int n_b;
 	int c_off;
 	int n_c;
+	int oa_type;
 };
 
 static struct oa_format hsw_oa_formats[I915_OA_FORMAT_MAX] = {
@@ -1483,6 +1491,9 @@ test_oa_formats(void)
 		if (!format.name) /* sparse, indexed by ID */
 			continue;
 
+		if (format.oa_type != OAG) /* sparse, indexed by ID */
+			continue;
+
 		igt_debug("Checking OA format %s\n", format.name);
 
 		open_and_read_2_oa_reports(i,
-- 
2.25.1

[igt-dev] [PATCH i-g-t v3 08/28] i915/perf: Use ARRAY_SIZE consistently for num_properties

[Umesh Nerlige Ramappa]

Replace all variations of calculating the num_properties with
ARRAY_SIZE.

Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
---
 tests/i915/perf.c | 62 +++++++++++++++++++++++------------------------
 1 file changed, 30 insertions(+), 32 deletions(-)

diff --git a/tests/i915/perf.c b/tests/i915/perf.c
index 741af078..ea4deb85 100644
--- a/tests/i915/perf.c
+++ b/tests/i915/perf.c
@@ -86,8 +86,6 @@ IGT_TEST_DESCRIPTION("Test the i915 perf metrics streaming interface");
 
 #define MAX_OA_BUF_SIZE (16 * 1024 * 1024)
 
-#define NUM_PROPERTIES(p) (sizeof(p) / (2 * sizeof(uint64_t)))
-
 struct accumulator {
 #define MAX_RAW_OA_COUNTERS 62
 	enum drm_i915_oa_format format;
@@ -1025,7 +1023,7 @@ test_system_wide_paranoid(void)
 		struct drm_i915_perf_open_param param = {
 			.flags = I915_PERF_FLAG_FD_CLOEXEC |
 				I915_PERF_FLAG_FD_NONBLOCK,
-			.num_properties = sizeof(properties) / 16,
+			.num_properties = ARRAY_SIZE(properties) / 2,
 			.properties_ptr = to_user_pointer(properties),
 		};
 
@@ -1051,7 +1049,7 @@ test_system_wide_paranoid(void)
 		struct drm_i915_perf_open_param param = {
 			.flags = I915_PERF_FLAG_FD_CLOEXEC |
 				I915_PERF_FLAG_FD_NONBLOCK,
-			.num_properties = sizeof(properties) / 16,
+			.num_properties = ARRAY_SIZE(properties) / 2,
 			.properties_ptr = to_user_pointer(properties),
 		};
 		write_u64_file("/proc/sys/dev/i915/perf_stream_paranoid", 0);
@@ -1082,7 +1080,7 @@ test_invalid_open_flags(void)
 	};
 	struct drm_i915_perf_open_param param = {
 		.flags = ~0, /* Undefined flag bits set! */
-		.num_properties = sizeof(properties) / 16,
+		.num_properties = ARRAY_SIZE(properties) / 2,
 		.properties_ptr = to_user_pointer(properties),
 	};
 
@@ -1104,7 +1102,7 @@ test_invalid_oa_metric_set_id(void)
 	struct drm_i915_perf_open_param param = {
 		.flags = I915_PERF_FLAG_FD_CLOEXEC |
 			I915_PERF_FLAG_FD_NONBLOCK,
-		.num_properties = sizeof(properties) / 16,
+		.num_properties = ARRAY_SIZE(properties) / 2,
 		.properties_ptr = to_user_pointer(properties),
 	};
 
@@ -1138,7 +1136,7 @@ test_invalid_oa_format_id(void)
 	struct drm_i915_perf_open_param param = {
 		.flags = I915_PERF_FLAG_FD_CLOEXEC |
 			I915_PERF_FLAG_FD_NONBLOCK,
-		.num_properties = sizeof(properties) / 16,
+		.num_properties = ARRAY_SIZE(properties) / 2,
 		.properties_ptr = to_user_pointer(properties),
 	};
 
@@ -1170,7 +1168,7 @@ test_missing_sample_flags(void)
 	};
 	struct drm_i915_perf_open_param param = {
 		.flags = I915_PERF_FLAG_FD_CLOEXEC,
-		.num_properties = sizeof(properties) / 16,
+		.num_properties = ARRAY_SIZE(properties) / 2,
 		.properties_ptr = to_user_pointer(properties),
 	};
 
@@ -1310,7 +1308,7 @@ open_and_read_2_oa_reports(int format_id,
 	};
 	struct drm_i915_perf_open_param param = {
 		.flags = I915_PERF_FLAG_FD_CLOEXEC,
-		.num_properties = sizeof(properties) / 16,
+		.num_properties = ARRAY_SIZE(properties) / 2,
 		.properties_ptr = to_user_pointer(properties),
 	};
 
@@ -1777,7 +1775,7 @@ test_invalid_oa_exponent(void)
 	};
 	struct drm_i915_perf_open_param param = {
 		.flags = I915_PERF_FLAG_FD_CLOEXEC,
-		.num_properties = sizeof(properties) / 16,
+		.num_properties = ARRAY_SIZE(properties) / 2,
 		.properties_ptr = to_user_pointer(properties),
 	};
 
@@ -1812,7 +1810,7 @@ test_low_oa_exponent_permissions(void)
 	};
 	struct drm_i915_perf_open_param param = {
 		.flags = I915_PERF_FLAG_FD_CLOEXEC,
-		.num_properties = sizeof(properties) / 16,
+		.num_properties = ARRAY_SIZE(properties) / 2,
 		.properties_ptr = to_user_pointer(properties),
 	};
 	uint64_t oa_period, oa_freq;
@@ -1875,7 +1873,7 @@ test_per_context_mode_unprivileged(void)
 	};
 	struct drm_i915_perf_open_param param = {
 		.flags = I915_PERF_FLAG_FD_CLOEXEC,
-		.num_properties = sizeof(properties) / 16,
+		.num_properties = ARRAY_SIZE(properties) / 2,
 		.properties_ptr = to_user_pointer(properties),
 	};
 
@@ -1951,8 +1949,8 @@ test_blocking(uint64_t requested_oa_period, bool set_kernel_hrtimer, uint64_t ke
 		.flags = I915_PERF_FLAG_FD_CLOEXEC |
 			I915_PERF_FLAG_DISABLED,
 		.num_properties = set_kernel_hrtimer ?
-				  NUM_PROPERTIES(properties) :
-				  NUM_PROPERTIES(properties) - 1,
+				  ARRAY_SIZE(properties) / 2 :
+				  (ARRAY_SIZE(properties) / 2) - 1,
 		.properties_ptr = to_user_pointer(properties),
 	};
 	uint8_t buf[1024 * 1024];
@@ -2111,8 +2109,8 @@ test_polling(uint64_t requested_oa_period, bool set_kernel_hrtimer, uint64_t ker
 			I915_PERF_FLAG_DISABLED |
 			I915_PERF_FLAG_FD_NONBLOCK,
 		.num_properties = set_kernel_hrtimer ?
-				  NUM_PROPERTIES(properties) :
-				  NUM_PROPERTIES(properties) - 1,
+				  ARRAY_SIZE(properties) / 2 :
+				  (ARRAY_SIZE(properties) / 2) - 1,
 		.properties_ptr = to_user_pointer(properties),
 	};
 	uint8_t buf[1024 * 1024];
@@ -2302,7 +2300,7 @@ static void test_polling_small_buf(void)
 		.flags = I915_PERF_FLAG_FD_CLOEXEC |
 			I915_PERF_FLAG_DISABLED |
 			I915_PERF_FLAG_FD_NONBLOCK,
-		.num_properties = NUM_PROPERTIES(properties),
+		.num_properties = ARRAY_SIZE(properties) / 2,
 		.properties_ptr = to_user_pointer(properties),
 	};
 	uint32_t test_duration = 80 * 1000 * 1000;
@@ -2402,7 +2400,7 @@ gen12_test_oa_tlb_invalidate(void)
 	struct drm_i915_perf_open_param param = {
 		.flags = I915_PERF_FLAG_FD_CLOEXEC |
 			I915_PERF_FLAG_DISABLED,
-		.num_properties = sizeof(properties) / 16,
+		.num_properties = ARRAY_SIZE(properties) / 2,
 		.properties_ptr = to_user_pointer(properties),
 	};
 	int num_reports1, num_reports2, num_expected_reports;
@@ -2593,7 +2591,7 @@ test_non_zero_reason(void)
 	};
 	struct drm_i915_perf_open_param param = {
 		.flags = I915_PERF_FLAG_FD_CLOEXEC,
-		.num_properties = sizeof(properties) / 16,
+		.num_properties = ARRAY_SIZE(properties) / 2,
 		.properties_ptr = to_user_pointer(properties),
 	};
 	struct drm_i915_perf_record_header *header;
@@ -2678,7 +2676,7 @@ test_enable_disable(void)
 	struct drm_i915_perf_open_param param = {
 		.flags = I915_PERF_FLAG_FD_CLOEXEC |
 			 I915_PERF_FLAG_DISABLED, /* Verify we start disabled */
-		.num_properties = sizeof(properties) / 16,
+		.num_properties = ARRAY_SIZE(properties) / 2,
 		.properties_ptr = to_user_pointer(properties),
 	};
 	int buf_size = 65536 * (256 + sizeof(struct drm_i915_perf_record_header));
@@ -2827,7 +2825,7 @@ test_short_reads(void)
 	};
 	struct drm_i915_perf_open_param param = {
 		.flags = I915_PERF_FLAG_FD_CLOEXEC,
-		.num_properties = sizeof(properties) / 16,
+		.num_properties = ARRAY_SIZE(properties) / 2,
 		.properties_ptr = to_user_pointer(properties),
 	};
 	size_t record_size = 256 + sizeof(struct drm_i915_perf_record_header);
@@ -2919,7 +2917,7 @@ test_non_sampling_read_error(void)
 	};
 	struct drm_i915_perf_open_param param = {
 		.flags = I915_PERF_FLAG_FD_CLOEXEC,
-		.num_properties = sizeof(properties) / 16,
+		.num_properties = ARRAY_SIZE(properties) / 2,
 		.properties_ptr = to_user_pointer(properties),
 	};
 	int ret;
@@ -2955,7 +2953,7 @@ test_disabled_read_error(void)
 	struct drm_i915_perf_open_param param = {
 		.flags = I915_PERF_FLAG_FD_CLOEXEC |
 			 I915_PERF_FLAG_DISABLED, /* XXX: open disabled */
-		.num_properties = sizeof(properties) / 16,
+		.num_properties = ARRAY_SIZE(properties) / 2,
 		.properties_ptr = to_user_pointer(properties),
 	};
 	uint32_t oa_report0[64];
@@ -3112,7 +3110,7 @@ test_mi_rpc(void)
 	};
 	struct drm_i915_perf_open_param param = {
 		.flags = I915_PERF_FLAG_FD_CLOEXEC,
-		.num_properties = sizeof(properties) / 16,
+		.num_properties = ARRAY_SIZE(properties) / 2,
 		.properties_ptr = to_user_pointer(properties),
 	};
 	struct buf_ops *bops = buf_ops_create(drm_fd);
@@ -3215,7 +3213,7 @@ hsw_test_single_ctx_counters(void)
 	};
 	struct drm_i915_perf_open_param param = {
 		.flags = I915_PERF_FLAG_FD_CLOEXEC,
-		.num_properties = sizeof(properties) / 16,
+		.num_properties = ARRAY_SIZE(properties) / 2,
 		.properties_ptr = to_user_pointer(properties),
 	};
 
@@ -4196,7 +4194,7 @@ test_rc6_disable(void)
 	};
 	struct drm_i915_perf_open_param param = {
 		.flags = I915_PERF_FLAG_FD_CLOEXEC,
-		.num_properties = sizeof(properties) / 16,
+		.num_properties = ARRAY_SIZE(properties) / 2,
 		.properties_ptr = to_user_pointer(properties),
 	};
 	unsigned long rc6_start, rc6_end, rc6_enabled;
@@ -4252,7 +4250,7 @@ test_stress_open_close(void)
 		struct drm_i915_perf_open_param param = {
 			.flags = I915_PERF_FLAG_FD_CLOEXEC |
 			         I915_PERF_FLAG_DISABLED, /* XXX: open disabled */
-			.num_properties = NUM_PROPERTIES(properties),
+			.num_properties = ARRAY_SIZE(properties) / 2,
 			.properties_ptr = to_user_pointer(properties),
 		};
 
@@ -4348,8 +4346,8 @@ test_global_sseu_config_invalid(void)
 	struct drm_i915_perf_open_param param = {
 		.flags = I915_PERF_FLAG_FD_CLOEXEC |
 		I915_PERF_FLAG_DISABLED, /* XXX: open disabled */
-		.num_properties = NUM_PROPERTIES(properties),
-			.properties_ptr = to_user_pointer(properties),
+		.num_properties = ARRAY_SIZE(properties) / 2,
+		.properties_ptr = to_user_pointer(properties),
 	};
 
 	memset(&default_sseu, 0, sizeof(default_sseu));
@@ -4423,8 +4421,8 @@ test_global_sseu_config(void)
 	struct drm_i915_perf_open_param param = {
 		.flags = I915_PERF_FLAG_FD_CLOEXEC |
 		I915_PERF_FLAG_DISABLED, /* XXX: open disabled */
-		.num_properties = NUM_PROPERTIES(properties),
-			.properties_ptr = to_user_pointer(properties),
+		.num_properties = ARRAY_SIZE(properties) / 2,
+		.properties_ptr = to_user_pointer(properties),
 	};
 
 	memset(&default_sseu, 0, sizeof(default_sseu));
@@ -4856,7 +4854,7 @@ test_i915_ref_count(void)
 	};
 	struct drm_i915_perf_open_param param = {
 		.flags = I915_PERF_FLAG_FD_CLOEXEC,
-		.num_properties = sizeof(properties) / 16,
+		.num_properties = ARRAY_SIZE(properties) / 2,
 		.properties_ptr = to_user_pointer(properties),
 	};
 	unsigned baseline, ref_count0, ref_count1;
-- 
2.25.1

[igt-dev] [PATCH i-g-t v3 09/28] i915/perf: Use gt in perf tests and lib

[Umesh Nerlige Ramappa]

Enable perf tests to use gt information for sysfs attributes.

Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
---
 lib/i915/perf.c   | 36 ++++++++++++++++++++++++++++++++++--
 tests/i915/perf.c | 27 ++++++++++++++++++++-------
 2 files changed, 54 insertions(+), 9 deletions(-)

diff --git a/lib/i915/perf.c b/lib/i915/perf.c
index 95e33b3c..4f19a005 100644
--- a/lib/i915/perf.c
+++ b/lib/i915/perf.c
@@ -511,6 +511,35 @@ open_master_sysfs_dir(int drm_fd)
 	return sysfs;
 }
 
+typedef enum {
+	RPS_MIN_FREQ_MHZ,
+	RPS_MAX_FREQ_MHZ,
+
+	RPS_MAX_ATTR,
+} intel_sysfs_attr_id;
+
+static const char *intel_sysfs_attr_name[2][RPS_MAX_ATTR] =
+{
+	{
+		"gt_min_freq_mhz",
+		"gt_max_freq_mhz",
+	},
+	{
+		"gt/gt0/rps_min_freq_mhz",
+		"gt/gt0/rps_max_freq_mhz",
+	},
+};
+
+static const char *
+intel_sysfs_attr_id_to_name(int sysfs_dirfd, intel_sysfs_attr_id id)
+{
+	assert(id < RPS_MAX_ATTR);
+
+	return !faccessat(sysfs_dirfd, "gt", O_RDONLY, 0) ?
+		intel_sysfs_attr_name[1][id] :
+		intel_sysfs_attr_name[0][id];
+}
+
 struct intel_perf *
 intel_perf_for_fd(int drm_fd)
 {
@@ -526,8 +555,11 @@ intel_perf_for_fd(int drm_fd)
 	if (sysfs_dir_fd < 0)
 		return NULL;
 
-	if (!read_sysfs(sysfs_dir_fd, "gt_min_freq_mhz", &gt_min_freq) ||
-	    !read_sysfs(sysfs_dir_fd, "gt_max_freq_mhz", &gt_max_freq)) {
+#define read_sysfs_rps(fd, id, value) \
+	read_sysfs(fd, intel_sysfs_attr_id_to_name(fd, id), value)
+
+	if (!read_sysfs_rps(sysfs_dir_fd, RPS_MIN_FREQ_MHZ, &gt_min_freq) ||
+	    !read_sysfs_rps(sysfs_dir_fd, RPS_MAX_FREQ_MHZ, &gt_max_freq)) {
 		close(sysfs_dir_fd);
 		return NULL;
 	}
diff --git a/tests/i915/perf.c b/tests/i915/perf.c
index ea4deb85..5236a025 100644
--- a/tests/i915/perf.c
+++ b/tests/i915/perf.c
@@ -345,11 +345,11 @@ try_sysfs_read_u64(const char *path, uint64_t *val)
 }
 
 static unsigned long
-sysfs_read(const char *path)
+sysfs_read(enum i915_attr_id id)
 {
 	unsigned long value;
 
-	igt_assert(igt_sysfs_scanf(sysfs, path, "%lu", &value) == 1);
+	igt_assert(igt_sysfs_rps_scanf(sysfs, id, "%lu", &value) == 1);
 
 	return value;
 }
@@ -4177,7 +4177,7 @@ gen12_test_single_ctx_render_target_writes_a_counter(void)
 
 static unsigned long rc6_residency_ms(void)
 {
-	return sysfs_read("power/rc6_residency_ms");
+	return sysfs_read(RC6_RESIDENCY_MS);
 }
 
 static void
@@ -4200,7 +4200,7 @@ test_rc6_disable(void)
 	unsigned long rc6_start, rc6_end, rc6_enabled;
 
 	rc6_enabled = 0;
-	igt_sysfs_scanf(sysfs, "power/rc6_enable", "%lu", &rc6_enabled);
+	igt_sysfs_rps_scanf(sysfs, RC6_ENABLE, "%lu", &rc6_enabled);
 	igt_require(rc6_enabled);
 
 	/* Verify rc6 is functional by measuring residency while idle */
@@ -4837,6 +4837,19 @@ done:
 	return ref_count;
 }
 
+static int perf_sysfs_open(int i915)
+{
+	int dirfd, gt;
+
+	/* use the first available sysfs interface */
+	for_each_sysfs_gt_dirfd(i915, dirfd, gt)
+		break;
+
+	igt_assert(dirfd != -1);
+
+	return dirfd;
+}
+
 /* check that an open i915 perf stream holds a reference on the drm i915 module
  * including in the corner case where the original drm fd has been closed.
  */
@@ -4872,7 +4885,7 @@ test_i915_ref_count(void)
 	drm_fd = __drm_open_driver(DRIVER_INTEL);
 	igt_require_intel(drm_fd);
 	devid = intel_get_drm_devid(drm_fd);
-	sysfs = igt_sysfs_open(drm_fd);
+	sysfs = perf_sysfs_open(drm_fd);
 
 	/* Note: these global variables are only initialized after calling
 	 * init_sys_info()...
@@ -4974,14 +4987,14 @@ igt_main
 		igt_require_gem(drm_fd);
 
 		devid = intel_get_drm_devid(drm_fd);
-		sysfs = igt_sysfs_open(drm_fd);
+		sysfs = perf_sysfs_open(drm_fd);
 
 		igt_require(init_sys_info());
 
 		write_u64_file("/proc/sys/dev/i915/perf_stream_paranoid", 1);
 		write_u64_file("/proc/sys/dev/i915/oa_max_sample_rate", 100000);
 
-		gt_max_freq_mhz = sysfs_read("gt_boost_freq_mhz");
+		gt_max_freq_mhz = sysfs_read(RPS_RP0_FREQ_MHZ);
 
 		render_copy = igt_get_render_copyfunc(devid);
 		igt_require_f(render_copy, "no render-copy function\n");
-- 
2.25.1

[igt-dev] [PATCH i-g-t v3 10/28] i915/perf: Explicitly state rendercopy needs for a test

[Umesh Nerlige Ramappa]

Let tests explicitly require rendercopy before running. This helps in
temporarily blocking these tests until rendercopy is available on new
platforms.

Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
---
 tests/i915/perf.c | 25 ++++++++++++++++++++++---
 1 file changed, 22 insertions(+), 3 deletions(-)

diff --git a/tests/i915/perf.c b/tests/i915/perf.c
index 5236a025..24a6e5bd 100644
--- a/tests/i915/perf.c
+++ b/tests/i915/perf.c
@@ -1545,6 +1545,9 @@ static void load_helper_set_load(enum load load)
 
 static void load_helper_run(enum load load)
 {
+	if (!render_copy)
+		return;
+
 	/*
 	 * FIXME fork helpers won't get cleaned up when started from within a
 	 * subtest, so handle the case where it sticks around a bit too long.
@@ -1577,12 +1580,20 @@ static void load_helper_run(enum load load)
 
 static void load_helper_stop(void)
 {
+	if (!render_copy)
+		return;
+
 	kill(lh.igt_proc.pid, SIGUSR1);
 	igt_assert(igt_wait_helper(&lh.igt_proc) == 0);
 }
 
 static void load_helper_init(void)
 {
+	if (!render_copy) {
+		igt_info("Running test without render_copy\n");
+		return;
+	}
+
 	lh.devid = intel_get_drm_devid(drm_fd);
 
 	/* MI_STORE_DATA can only use GTT address on gen4+/g33 and needs
@@ -1603,7 +1614,12 @@ static void load_helper_init(void)
 
 static void load_helper_fini(void)
 {
-	int i915 = buf_ops_get_fd(lh.bops);
+	int i915;
+
+	if (!render_copy)
+		return;
+
+	i915 = buf_ops_get_fd(lh.bops);
 
 	if (lh.igt_proc.running)
 		load_helper_stop();
@@ -4997,7 +5013,6 @@ igt_main
 		gt_max_freq_mhz = sysfs_read(RPS_RP0_FREQ_MHZ);
 
 		render_copy = igt_get_render_copyfunc(devid);
-		igt_require_f(render_copy, "no render-copy function\n");
 	}
 
 	igt_subtest("non-system-wide-paranoid")
@@ -5100,6 +5115,7 @@ igt_main
 
 	igt_subtest("unprivileged-single-ctx-counters") {
 		igt_require(IS_HASWELL(devid));
+		igt_require_f(render_copy, "no render-copy function\n");
 		hsw_test_single_ctx_counters();
 	}
 
@@ -5113,6 +5129,7 @@ igt_main
 		 * For gen12 implement a separate test that uses only OAR
 		 */
 		igt_require(intel_gen(devid) >= 8 && intel_gen(devid) < 12);
+		igt_require_f(render_copy, "no render-copy function\n");
 		gen8_test_single_ctx_render_target_writes_a_counter();
 	}
 
@@ -5128,8 +5145,10 @@ igt_main
 			gen12_test_oa_tlb_invalidate();
 
 		igt_describe("Measure performance for a specific context using OAR in Gen 12");
-		igt_subtest("gen12-unprivileged-single-ctx-counters")
+		igt_subtest("gen12-unprivileged-single-ctx-counters") {
+			igt_require_f(render_copy, "no render-copy function\n");
 			gen12_test_single_ctx_render_target_writes_a_counter();
+		}
 	}
 
 	igt_subtest("rc6-disable")
-- 
2.25.1

[igt-dev] [PATCH i-g-t v3 11/28] i915/perf: Skip tests that use rendercopy

[Umesh Nerlige Ramappa]

Running tests that require rendercopy sometimes leaves the DUT in an
unsusable state. Further tests fail to run and DUT requires reboot.
Since it affects CI efficiency, skip tests is rendercopy is missing.

Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
---
 tests/i915/perf.c | 17 ++++++++++++++++-
 1 file changed, 16 insertions(+), 1 deletion(-)

diff --git a/tests/i915/perf.c b/tests/i915/perf.c
index 24a6e5bd..7acc5364 100644
--- a/tests/i915/perf.c
+++ b/tests/i915/perf.c
@@ -41,6 +41,7 @@
 #include "i915/gem.h"
 #include "i915/perf.h"
 #include "igt.h"
+#include "igt_perf.h"
 #include "igt_sysfs.h"
 #include "drm.h"
 
@@ -4968,6 +4969,19 @@ static int i915_perf_revision(int fd)
 	return value;
 }
 
+static bool has_class_instance(int i915, uint16_t class, uint16_t instance)
+{
+	int fd;
+
+	fd = perf_i915_open(i915, I915_PMU_ENGINE_BUSY(class, instance));
+	if (fd >= 0) {
+		close(fd);
+		return true;
+	}
+
+	return false;
+}
+
 igt_main
 {
 	igt_fixture {
@@ -5012,7 +5026,8 @@ igt_main
 
 		gt_max_freq_mhz = sysfs_read(RPS_RP0_FREQ_MHZ);
 
-		render_copy = igt_get_render_copyfunc(devid);
+		if (has_class_instance(drm_fd, I915_ENGINE_CLASS_RENDER, 0))
+			render_copy = igt_get_render_copyfunc(devid);
 	}
 
 	igt_subtest("non-system-wide-paranoid")
-- 
2.25.1

[igt-dev] [PATCH i-g-t v3 12/28] i915/perf: Add OA formats for DG2

[Umesh Nerlige Ramappa]

Add OA formats for DG2.

v2:
- 40-bit A counter accumulation was broken due to incorrect DG2 format
  definition. Introduce first_a40 to fix the sanity check.
- Drop 64-bit OA formats
- Set the correct OAR format for mi-rpc

Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> #v1
---
 include/drm-uapi/i915_drm.h |  4 +++
 tests/i915/perf.c           | 50 +++++++++++++++++++++++++++++++------
 2 files changed, 46 insertions(+), 8 deletions(-)

diff --git a/include/drm-uapi/i915_drm.h b/include/drm-uapi/i915_drm.h
index ae9558b3..70700c7d 100644
--- a/include/drm-uapi/i915_drm.h
+++ b/include/drm-uapi/i915_drm.h
@@ -2535,6 +2535,10 @@ enum drm_i915_oa_format {
 	I915_OA_FORMAT_A12_B8_C8,
 	I915_OA_FORMAT_A32u40_A4u32_B8_C8,
 
+	/* DG2 */
+	I915_OAR_FORMAT_A32u40_A4u32_B8_C8,
+	I915_OA_FORMAT_A24u40_A14u32_B8_C8,
+
 	I915_OA_FORMAT_MAX	    /* non-ABI */
 };
 
diff --git a/tests/i915/perf.c b/tests/i915/perf.c
index 7acc5364..a49fc198 100644
--- a/tests/i915/perf.c
+++ b/tests/i915/perf.c
@@ -110,6 +110,7 @@ struct oa_format {
 	int a_off;
 	int n_a;
 	int first_a;
+	int first_a40;
 	int b_off;
 	int n_b;
 	int c_off;
@@ -179,6 +180,26 @@ static struct oa_format gen12_oa_formats[I915_OA_FORMAT_MAX] = {
 		.c_off = 224, .n_c = 8, },
 };
 
+static struct oa_format dg2_oa_formats[I915_OA_FORMAT_MAX] = {
+	[I915_OAR_FORMAT_A32u40_A4u32_B8_C8] = {
+		"A32u40_A4u32_B8_C8", .size = 256,
+		.a40_high_off = 160, .a40_low_off = 16, .n_a40 = 32,
+		.a_off = 144, .n_a = 4, .first_a = 32,
+		.b_off = 192, .n_b = 8,
+		.c_off = 224, .n_c = 8, .oa_type = OAR, },
+	/* This format has A36 and A37 interleaved with high bytes of some A
+	 * counters, so we will accumulate only subset of counters.
+	 */
+	[I915_OA_FORMAT_A24u40_A14u32_B8_C8] = {
+		"A24u40_A14u32_B8_C8", .size = 256,
+		/* u40: A4 - A23 */
+		.a40_high_off = 160, .a40_low_off = 16, .n_a40 = 20, .first_a40 = 4,
+		/* u32: A0 - A3 */
+		.a_off = 16, .n_a = 4,
+		.b_off = 192, .n_b = 8,
+		.c_off = 224, .n_c = 8, .oa_type = OAG, },
+};
+
 static bool hsw_undefined_a_counters[45] = {
 	[4] = true,
 	[6] = true,
@@ -237,6 +258,8 @@ get_oa_format(enum drm_i915_oa_format format)
 {
 	if (IS_HASWELL(devid))
 		return hsw_oa_formats[format];
+	else if (IS_DG2(devid))
+		return dg2_oa_formats[format];
 	else if (IS_GEN12(devid))
 		return gen12_oa_formats[format];
 	else
@@ -509,6 +532,15 @@ oa_report_get_ctx_id(uint32_t *report)
 	return report[2];
 }
 
+static int
+oar_unit_default_format(void)
+{
+	if (IS_DG2(devid))
+		return I915_OAR_FORMAT_A32u40_A4u32_B8_C8;
+
+	return test_set->perf_oa_format;
+}
+
 /*
  * Temporary wrapper to distinguish mappings on !llc platforms,
  * where it seems cache over GEM_MMAP_OFFSET is not flushed before execution.
@@ -802,7 +834,7 @@ gen8_sanity_check_test_oa_reports(const uint32_t *oa_report0,
 	max_delta = clock_delta * intel_perf->devinfo.n_eus;
 
 	/* Gen8+ has some 40bit A counters... */
-	for (int j = 0; j < format.n_a40; j++) {
+	for (int j = format.first_a40; j < format.n_a40 + format.first_a40; j++) {
 		uint64_t value0 = gen8_read_40bit_a_counter(oa_report0, fmt, j);
 		uint64_t value1 = gen8_read_40bit_a_counter(oa_report1, fmt, j);
 		uint64_t delta = gen8_40bit_a_delta(value0, value1);
@@ -1260,7 +1292,7 @@ read_2_oa_reports(int format_id,
 			igt_assert_eq(header->size, sample_size);
 
 			report = (const void *)(header + 1);
-			dump_report(report, 64, "oa-formats");
+			dump_report(report, format_size / 4, "oa-formats");
 
 			igt_debug("read report: reason = %x, timestamp = %x, exponent mask=%x\n",
 				  report[0], report[1], exponent_mask);
@@ -1484,8 +1516,8 @@ test_oa_formats(void)
 {
 	for (int i = 0; i < I915_OA_FORMAT_MAX; i++) {
 		struct oa_format format = get_oa_format(i);
-		uint32_t oa_report0[64];
-		uint32_t oa_report1[64];
+		uint32_t oa_report0[format.size / 4];
+		uint32_t oa_report1[format.size / 4];
 
 		if (!format.name) /* sparse, indexed by ID */
 			continue;
@@ -3016,6 +3048,7 @@ test_disabled_read_error(void)
 static void
 gen12_test_mi_rpc(void)
 {
+	uint64_t fmt = oar_unit_default_format();
 	uint64_t properties[] = {
 		/* On Gen12, MI RPC uses OAR. OAR is configured only for the
 		 * render context that wants to measure the performance. Hence a
@@ -3036,7 +3069,7 @@ gen12_test_mi_rpc(void)
 		 * values.
 		 */
 		DRM_I915_PERF_PROP_OA_METRICS_SET, test_set->perf_oa_metrics_set,
-		DRM_I915_PERF_PROP_OA_FORMAT, test_set->perf_oa_format,
+		DRM_I915_PERF_PROP_OA_FORMAT, fmt,
 	};
 	struct drm_i915_perf_open_param param = {
 		.flags = I915_PERF_FLAG_FD_CLOEXEC,
@@ -3050,7 +3083,7 @@ gen12_test_mi_rpc(void)
 	uint32_t ctx_id = INVALID_CTX_ID;
 	uint32_t *report32;
 	size_t format_size_32;
-	struct oa_format format = get_oa_format(test_set->perf_oa_format);
+	struct oa_format format = get_oa_format(fmt);
 
 	/* Ensure perf_stream_paranoid is set to 1 by default */
 	write_u64_file("/proc/sys/dev/i915/perf_stream_paranoid", 1);
@@ -3865,6 +3898,7 @@ again:
 
 static void gen12_single_ctx_helper(void)
 {
+	uint64_t fmt = oar_unit_default_format();
 	uint64_t properties[] = {
 		/* Have a random value here for the context id, but initialize
 		 * it once you figure out the context ID for the work to be
@@ -3880,7 +3914,7 @@ static void gen12_single_ctx_helper(void)
 		 * values.
 		 */
 		DRM_I915_PERF_PROP_OA_METRICS_SET, test_set->perf_oa_metrics_set,
-		DRM_I915_PERF_PROP_OA_FORMAT, test_set->perf_oa_format,
+		DRM_I915_PERF_PROP_OA_FORMAT, fmt,
 	};
 	struct drm_i915_perf_open_param param = {
 		.flags = I915_PERF_FLAG_FD_CLOEXEC,
@@ -3903,7 +3937,7 @@ static void gen12_single_ctx_helper(void)
 	uint32_t ctx1_id = INVALID_CTX_ID;
 	int ret;
 	struct accumulator accumulator = {
-		.format = test_set->perf_oa_format
+		.format = fmt
 	};
 
 	bops = buf_ops_create(drm_fd);
-- 
2.25.1

[igt-dev] [PATCH i-g-t v3 13/28] i915/perf: Fix CS timestamp vs OA timstamp mismatch

[Umesh Nerlige Ramappa]

CS timestamp can have an additional configuration that shifts the
timestamp value by a specified number of bits. On DG2, this additional
configuration is ignored by OA, so OA timestamps are missing the shift.

Add newly defined interface to get the exact OA timestamp frequency so
that the deltas can be accurately calculated.

Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
---
 include/drm-uapi/i915_drm.h |  6 ++++++
 lib/i915/perf.c             |  6 +++++-
 tests/i915/perf.c           | 25 ++++++++++++++++++++++++-
 3 files changed, 35 insertions(+), 2 deletions(-)

diff --git a/include/drm-uapi/i915_drm.h b/include/drm-uapi/i915_drm.h
index 70700c7d..b71acfba 100644
--- a/include/drm-uapi/i915_drm.h
+++ b/include/drm-uapi/i915_drm.h
@@ -749,6 +749,12 @@ typedef struct drm_i915_irq_wait {
 /* Query if the kernel supports the I915_USERPTR_PROBE flag. */
 #define I915_PARAM_HAS_USERPTR_PROBE 56
 
+/*
+ * Frequency of the timestamps in OA reports. This used to be the same as the CS
+ * timestamp frequency, but differs on some platforms.
+ */
+#define I915_PARAM_OA_TIMESTAMP_FREQUENCY 57
+
 /* Must be kept compact -- no holes and well documented */
 
 typedef struct drm_i915_getparam {
diff --git a/lib/i915/perf.c b/lib/i915/perf.c
index 4f19a005..4d7fe43c 100644
--- a/lib/i915/perf.c
+++ b/lib/i915/perf.c
@@ -566,7 +566,11 @@ intel_perf_for_fd(int drm_fd)
 	close(sysfs_dir_fd);
 
 	if (getparam(drm_fd, I915_PARAM_CHIPSET_ID, &device_id) ||
-	    getparam(drm_fd, I915_PARAM_REVISION, &device_revision) ||
+	    getparam(drm_fd, I915_PARAM_REVISION, &device_revision))
+		return NULL;
+
+	/* if OA_TIMESTAMP_FREQUENCY is not supported, fall back to CS_TIMESTAMP_FREQUENCY */
+	if (getparam(drm_fd, I915_PARAM_OA_TIMESTAMP_FREQUENCY, &timestamp_frequency) &&
 	    getparam(drm_fd, I915_PARAM_CS_TIMESTAMP_FREQUENCY, &timestamp_frequency))
 		return NULL;
 
diff --git a/tests/i915/perf.c b/tests/i915/perf.c
index a49fc198..108255ef 100644
--- a/tests/i915/perf.c
+++ b/tests/i915/perf.c
@@ -442,6 +442,29 @@ gen8_read_report_reason(const uint32_t *report)
 		return "unknown";
 }
 
+static uint32_t
+cs_timestamp_frequency(int fd)
+{
+	struct drm_i915_getparam gp = {};
+	static uint32_t value = 0;
+
+	if (value)
+		return value;
+
+	gp.param = I915_PARAM_CS_TIMESTAMP_FREQUENCY;
+	gp.value = (int *)(&value);
+
+	igt_assert_eq(igt_ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp), 0);
+
+	return value;
+}
+
+static uint64_t
+cs_timebase_scale(uint32_t u32_delta)
+{
+	return ((uint64_t)u32_delta * NSEC_PER_SEC) / cs_timestamp_frequency(drm_fd);
+}
+
 static uint64_t
 timebase_scale(uint32_t u32_delta)
 {
@@ -4142,7 +4165,7 @@ static void gen12_single_ctx_helper(void)
 	/* Sanity check that we can pass the delta to timebase_scale */
 	igt_assert(delta_ts64 < UINT32_MAX);
 	delta_oa32_ns = timebase_scale(delta_oa32);
-	delta_ts64_ns = timebase_scale(delta_ts64);
+	delta_ts64_ns = cs_timebase_scale(delta_ts64);
 
 	igt_debug("oa32 delta = %u, = %uns\n",
 			delta_oa32, (unsigned)delta_oa32_ns);
-- 
2.25.1

[igt-dev] [PATCH i-g-t v3 14/28] lib/i915/perf: implement report accumulation for new format

[Umesh Nerlige Ramappa]

From: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

Available on XEHPSDV+.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
 lib/i915/perf.c | 33 +++++++++++++++++++++++++++++++++
 1 file changed, 33 insertions(+)

diff --git a/lib/i915/perf.c b/lib/i915/perf.c
index 4d7fe43c..cc7dceea 100644
--- a/lib/i915/perf.c
+++ b/lib/i915/perf.c
@@ -778,6 +778,39 @@ void intel_perf_accumulate_reports(struct intel_perf_accumulator *acc,
 	memset(acc, 0, sizeof(*acc));
 
 	switch (oa_format) {
+	case I915_OA_FORMAT_A24u40_A14u32_B8_C8:
+		accumulate_uint32(start + 1, end + 1, deltas + idx++); /* timestamp */
+		accumulate_uint32(start + 3, end + 3, deltas + idx++); /* clock */
+
+		/* 4x 32bit A0-3 counters... */
+		for (i = 0; i < 4; i++)
+			accumulate_uint32(start + 4 + i, end + 4 + i, deltas + idx++);
+
+		/* 20x 40bit A4-23 counters... */
+		for (i = 0; i < 20; i++)
+			accumulate_uint40(i + 4, start, end, deltas + idx++);
+
+		/* 4x 32bit A24-27 counters... */
+		for (i = 0; i < 4; i++)
+			accumulate_uint32(start + 28 + i, end + 28 + i, deltas + idx++);
+
+		/* 4x 40bit A28-31 counters... */
+		for (i = 0; i < 4; i++)
+			accumulate_uint40(i + 28, start, end, deltas + idx++);
+
+		/* 5x 32bit A32-36 counters... */
+		for (i = 0; i < 5; i++)
+			accumulate_uint32(start + 36 + i, end + 36 + i, deltas + idx++);
+
+		/* 1x 32bit A37 counter... */
+		accumulate_uint32(start + 46, end + 46, deltas + idx++);
+
+		/* 8x 32bit B counters + 8x 32bit C counters... */
+		for (i = 0; i < 16; i++)
+			accumulate_uint32(start + 48 + i, end + 48 + i, deltas + idx++);
+		break;
+
+	case I915_OAR_FORMAT_A32u40_A4u32_B8_C8:
 	case I915_OA_FORMAT_A32u40_A4u32_B8_C8:
 		accumulate_uint32(start + 1, end + 1, deltas + idx++); /* timestamp */
 		accumulate_uint32(start + 3, end + 3, deltas + idx++); /* clock */
-- 
2.25.1

[igt-dev] [PATCH i-g-t v3 15/28] tools/i915-perf-recorder: add ability to select device

[Umesh Nerlige Ramappa]

From: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

We're starting to have system with multiple Intel GPUs.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
 tools/i915-perf/i915_perf_recorder.c | 50 ++++++++++++++++++++++++----
 1 file changed, 43 insertions(+), 7 deletions(-)

diff --git a/tools/i915-perf/i915_perf_recorder.c b/tools/i915-perf/i915_perf_recorder.c
index 00195290..7ced7b40 100644
--- a/tools/i915-perf/i915_perf_recorder.c
+++ b/tools/i915-perf/i915_perf_recorder.c
@@ -250,16 +250,37 @@ find_intel_render_node(void)
 	return -1;
 }
 
+static void
+print_intel_devices(void)
+{
+	fprintf(stdout, "Available devices:\n");
+	for (int i = 0; i < 128; i++) {
+		if (read_device_param("card", i, "vendor") == 0x8086) {
+			uint32_t devid = read_device_param("card", i, "device");
+			const struct intel_device_info *devinfo =
+				intel_get_device_info(devid);
+			fprintf(stdout, "   %i: %s (0x%04hx)\n", i,
+				devinfo ? devinfo->codename : "unknwon",
+				devid);
+		}
+	}
+}
+
 static int
-open_render_node(uint32_t *devid)
+open_render_node(uint32_t *devid, int card)
 {
 	char *name;
 	int ret;
 	int fd;
+	int render;
 
-	int render = find_intel_render_node();
-	if (render < 0)
-		return -1;
+	if (card < 0) {
+		render = find_intel_render_node();
+		if (render < 0)
+			return -1;
+	} else {
+		render = 128 + card;
+	}
 
 	ret = asprintf(&name, "/dev/dri/renderD%u", render);
 	assert(ret != -1);
@@ -722,6 +743,9 @@ usage(const char *name)
 		"Recording tool for i915-perf.\n"
 		"\n"
 		"     --help,               -h          Print this screen\n"
+		"     --device,             -d <value>  Device to use\n"
+		"                                       (value=list to list devices\n"
+		"                                        value=1 to use /dev/dri/card1)\n"
 		"     --correlation-period, -c <value>  Time period of timestamp correlation in seconds\n"
 		"                                       (default = 1.0)\n"
 		"     --perf-period,        -p <value>  Time period of i915-perf reports in seconds\n"
@@ -772,6 +796,7 @@ main(int argc, char *argv[])
 {
 	const struct option long_options[] = {
 		{"help",                       no_argument, 0, 'h'},
+		{"device",               required_argument, 0, 'd'},
 		{"correlation-period",   required_argument, 0, 'c'},
 		{"perf-period",          required_argument, 0, 'p'},
 		{"metric",               required_argument, 0, 'm'},
@@ -798,7 +823,7 @@ main(int argc, char *argv[])
 	struct timespec now;
 	uint64_t corr_period_ns, poll_time_ns;
 	uint32_t circular_size = 0;
-	int opt;
+	int opt, dev_node_id = -1;
 	bool list_counters = false;
 	FILE *output = NULL;
 	struct recording_context ctx = {
@@ -812,7 +837,7 @@ main(int argc, char *argv[])
 		.poll_period = 5 * 1000 * 1000,
 	};
 
-	while ((opt = getopt_long(argc, argv, "hc:p:m:Co:s:f:k:P:", long_options, NULL)) != -1) {
+	while ((opt = getopt_long(argc, argv, "hc:d:p:m:Co:s:f:k:P:", long_options, NULL)) != -1) {
 		switch (opt) {
 		case 'h':
 			usage(argv[0]);
@@ -820,6 +845,12 @@ main(int argc, char *argv[])
 		case 'c':
 			corr_period = atof(optarg);
 			break;
+		case 'd':
+			if (!strcmp(optarg, "list"))
+				dev_node_id = -2;
+			else
+				dev_node_id = atoi(optarg);
+			break;
 		case 'p':
 			perf_period = atof(optarg);
 			break;
@@ -865,7 +896,12 @@ main(int argc, char *argv[])
 		}
 	}
 
-	ctx.drm_fd = open_render_node(&ctx.devid);
+	if (dev_node_id == -2) {
+		print_intel_devices();
+		return EXIT_SUCCESS;
+	}
+
+	ctx.drm_fd = open_render_node(&ctx.devid, dev_node_id);
 	if (ctx.drm_fd < 0) {
 		fprintf(stderr, "Unable to open device.\n");
 		return EXIT_FAILURE;
-- 
2.25.1

[igt-dev] [PATCH i-g-t v3 16/28] lib/i915/perf: fixup report validity

[Umesh Nerlige Ramappa]

From: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

It appears that on Gfx12+ there is no more validity bit in the
reports.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
 lib/i915/perf_data_reader.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/lib/i915/perf_data_reader.c b/lib/i915/perf_data_reader.c
index e69189ac..857bcd3a 100644
--- a/lib/i915/perf_data_reader.c
+++ b/lib/i915/perf_data_reader.c
@@ -45,13 +45,14 @@ oa_report_ctx_is_valid(const struct intel_perf_devinfo *devinfo,
 {
 	const uint32_t *report = (const uint32_t *) _report;
 
-	if (devinfo->graphics_ver < 8) {
+	if (devinfo->graphics_ver < 8)
 		return false; /* TODO */
-	} else if (devinfo->graphics_ver == 8) {
+	if (devinfo->graphics_ver >= 12)
+		return true; /* Always valid */
+	if (devinfo->graphics_ver == 8)
 		return report[0] & (1ul << 25);
-	} else if (devinfo->graphics_ver > 8) {
+	if (devinfo->graphics_ver > 8)
 		return report[0] & (1ul << 16);
-	}
 
 	return false;
 }
-- 
2.25.1

[igt-dev] [PATCH i-g-t v3 17/28] lib/i915/perf: add a helper to read timestamps

[Umesh Nerlige Ramappa]

From: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

We expect location/size of the timestamp might move around in the
report.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
 lib/i915/perf.c                    | 21 +++++++++++++++++++++
 lib/i915/perf.h                    |  4 ++++
 lib/i915/perf_data_reader.c        | 14 ++++++--------
 lib/meson.build                    |  4 ++--
 tools/i915-perf/i915_perf_reader.c | 20 ++++++++++++++++++++
 5 files changed, 53 insertions(+), 10 deletions(-)

diff --git a/lib/i915/perf.c b/lib/i915/perf.c
index cc7dceea..f7aff13a 100644
--- a/lib/i915/perf.c
+++ b/lib/i915/perf.c
@@ -839,3 +839,24 @@ void intel_perf_accumulate_reports(struct intel_perf_accumulator *acc,
 	}
 
 }
+
+uint64_t intel_perf_read_record_timestamp(const struct intel_perf *perf,
+					  const struct intel_perf_metric_set *metric_set,
+					  const struct drm_i915_perf_record_header *record)
+{
+       const uint32_t *report32 = (const uint32_t *)(record + 1);
+       uint64_t ts;
+
+       switch (metric_set->perf_oa_format) {
+       case I915_OA_FORMAT_A24u40_A14u32_B8_C8:
+       case I915_OA_FORMAT_A32u40_A4u32_B8_C8:
+       case I915_OA_FORMAT_A45_B8_C8:
+               ts = report32[1];
+               break;
+
+       default:
+               assert(0);
+       }
+
+       return ts;
+}
diff --git a/lib/i915/perf.h b/lib/i915/perf.h
index 4091feb9..88a36ebe 100644
--- a/lib/i915/perf.h
+++ b/lib/i915/perf.h
@@ -324,6 +324,10 @@ void intel_perf_accumulate_reports(struct intel_perf_accumulator *acc,
 				   const struct drm_i915_perf_record_header *record0,
 				   const struct drm_i915_perf_record_header *record1);
 
+uint64_t intel_perf_read_record_timestamp(const struct intel_perf *perf,
+					  const struct intel_perf_metric_set *metric_set,
+					  const struct drm_i915_perf_record_header *record);
+
 #ifdef __cplusplus
 };
 #endif
diff --git a/lib/i915/perf_data_reader.c b/lib/i915/perf_data_reader.c
index 857bcd3a..4d1efe92 100644
--- a/lib/i915/perf_data_reader.c
+++ b/lib/i915/perf_data_reader.c
@@ -65,12 +65,6 @@ oa_report_ctx_id(const struct intel_perf_devinfo *devinfo, const uint8_t *report
 	return ((const uint32_t *) report)[2];
 }
 
-static inline uint64_t
-oa_report_timestamp(const uint8_t *report)
-{
-	return ((const uint32_t *)report)[1];
-}
-
 static void
 append_record(struct intel_perf_data_reader *reader,
 	      const struct drm_i915_perf_record_header *header)
@@ -298,8 +292,12 @@ generate_cpu_events(struct intel_perf_data_reader *reader)
 		last_ctx_id = oa_report_ctx_id(&reader->devinfo, start_report);
 		current_ctx_id = oa_report_ctx_id(&reader->devinfo, end_report);
 
-		gpu_ts_start = oa_report_timestamp(start_report);
-		gpu_ts_end = oa_report_timestamp(end_report);
+		gpu_ts_start = intel_perf_read_record_timestamp(reader->perf,
+								reader->metric_set,
+								last_header);
+		gpu_ts_end = intel_perf_read_record_timestamp(reader->perf,
+							      reader->metric_set,
+							      current_header);
 
 		if (last_ctx_id == current_ctx_id)
 			continue;
diff --git a/lib/meson.build b/lib/meson.build
index 50ffd8cd..747889b9 100644
--- a/lib/meson.build
+++ b/lib/meson.build
@@ -321,7 +321,7 @@ lib_igt_i915_perf_build = shared_library(
   dependencies: lib_igt_chipset,
   include_directories : inc,
   install: true,
-  soversion: '1.3')
+  soversion: '1.4')
 
 lib_igt_i915_perf = declare_dependency(
   link_with : lib_igt_i915_perf_build,
@@ -342,7 +342,7 @@ pkgconf.set('prefix', get_option('prefix'))
 pkgconf.set('exec_prefix', '${prefix}')
 pkgconf.set('libdir', '${prefix}/@0@'.format(get_option('libdir')))
 pkgconf.set('includedir', '${prefix}/@0@'.format(get_option('includedir')))
-pkgconf.set('i915_perf_version', '1.3.0')
+pkgconf.set('i915_perf_version', '1.4.0')
 
 configure_file(
   input : 'i915-perf.pc.in',
diff --git a/tools/i915-perf/i915_perf_reader.c b/tools/i915-perf/i915_perf_reader.c
index e51f5a5d..afd8c39c 100644
--- a/tools/i915-perf/i915_perf_reader.c
+++ b/tools/i915-perf/i915_perf_reader.c
@@ -230,6 +230,26 @@ main(int argc, char *argv[])
 	fprintf(stdout, "Context switches: %u\n", reader.n_timelines);
 	fprintf(stdout, "Timestamp correlation points: %u\n", reader.n_correlations);
 
+	if (reader.n_correlations < 2) {
+		fprintf(stderr, "Less than 2 CPU/GPU timestamp correlation points.\n");
+		return EXIT_FAILURE;
+	}
+
+	fprintf(stdout, "Timestamp correlation CPU range: 0x%016"PRIx64"-0x%016"PRIx64"\n",
+		reader.correlations[0]->cpu_timestamp,
+		reader.correlations[reader.n_correlations - 1]->cpu_timestamp);
+	fprintf(stdout, "Timestamp correlation GPU range: 0x%016"PRIx64"-0x%016"PRIx64"\n",
+		reader.correlations[0]->gpu_timestamp,
+		reader.correlations[reader.n_correlations - 1]->gpu_timestamp);
+
+	fprintf(stdout, "OA data timestamp range: 0x%016"PRIx64"-0x%016"PRIx64"\n",
+		intel_perf_read_record_timestamp(reader.perf,
+						 reader.metric_set,
+						 reader.records[0]),
+		intel_perf_read_record_timestamp(reader.perf,
+						 reader.metric_set,
+						 reader.records[reader.n_records - 1]));
+
 	if (strcmp(reader.metric_set_uuid, reader.metric_set->hw_config_guid)) {
 		fprintf(stdout,
 			"WARNING: Recording used a different HW configuration.\n"
-- 
2.25.1

[igt-dev] [PATCH i-g-t v3 18/28] lib/i915/perf: store bit shifting required for OA timestamps

[Umesh Nerlige Ramappa]

From: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

Some new platforms have the OA timestamps shifted to the right by a
number of bits. This is configurable but since i915 appears to leave
the default values, let's just hardcode this in the device info.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
 lib/i915/perf.c                    | 31 +++++++++++++++++++++++++-----
 lib/i915/perf.h                    | 18 ++++++++++++++++-
 lib/i915/perf_data_reader.c        |  2 +-
 lib/meson.build                    |  4 ++--
 tools/i915-perf/i915_perf_reader.c |  3 ++-
 5 files changed, 48 insertions(+), 10 deletions(-)

diff --git a/lib/i915/perf.c b/lib/i915/perf.c
index f7aff13a..4c1b75ad 100644
--- a/lib/i915/perf.c
+++ b/lib/i915/perf.c
@@ -299,6 +299,10 @@ intel_perf_for_devinfo(uint32_t device_id,
 	/* Valid on most generations except Gen9LP. */
 	perf->devinfo.eu_threads_count = 7;
 
+	/* Most platforms have full 32bit timestamps. */
+	perf->devinfo.oa_timestamp_mask = 0xffffffff;
+	perf->devinfo.oa_timestamp_shift = 0;
+
 	if (devinfo->is_haswell) {
 		intel_perf_load_metrics_hsw(perf);
 	} else if (devinfo->is_broadwell) {
@@ -765,7 +769,8 @@ accumulate_uint40(int a_index,
 }
 
 void intel_perf_accumulate_reports(struct intel_perf_accumulator *acc,
-				   int oa_format,
+				   const struct intel_perf *perf,
+				   const struct intel_perf_metric_set *metric_set,
 				   const struct drm_i915_perf_record_header *record0,
 				   const struct drm_i915_perf_record_header *record1)
 {
@@ -777,9 +782,13 @@ void intel_perf_accumulate_reports(struct intel_perf_accumulator *acc,
 
 	memset(acc, 0, sizeof(*acc));
 
-	switch (oa_format) {
+	switch (metric_set->perf_oa_format) {
 	case I915_OA_FORMAT_A24u40_A14u32_B8_C8:
-		accumulate_uint32(start + 1, end + 1, deltas + idx++); /* timestamp */
+		/* timestamp */
+		if (perf->devinfo.oa_timestamp_shift >= 0)
+			deltas[idx++] += (end[1] - start[1]) << perf->devinfo.oa_timestamp_shift;
+		else
+			deltas[idx++] += (end[1] - start[1]) >> (-perf->devinfo.oa_timestamp_shift);
 		accumulate_uint32(start + 3, end + 3, deltas + idx++); /* clock */
 
 		/* 4x 32bit A0-3 counters... */
@@ -812,7 +821,10 @@ void intel_perf_accumulate_reports(struct intel_perf_accumulator *acc,
 
 	case I915_OAR_FORMAT_A32u40_A4u32_B8_C8:
 	case I915_OA_FORMAT_A32u40_A4u32_B8_C8:
-		accumulate_uint32(start + 1, end + 1, deltas + idx++); /* timestamp */
+		if (perf->devinfo.oa_timestamp_shift >= 0)
+			deltas[idx++] += (end[1] - start[1]) << perf->devinfo.oa_timestamp_shift;
+		else
+			deltas[idx++] += (end[1] - start[1]) >> (-perf->devinfo.oa_timestamp_shift);
 		accumulate_uint32(start + 3, end + 3, deltas + idx++); /* clock */
 
 		/* 32x 40bit A counters... */
@@ -829,7 +841,11 @@ void intel_perf_accumulate_reports(struct intel_perf_accumulator *acc,
 		break;
 
 	case I915_OA_FORMAT_A45_B8_C8:
-		accumulate_uint32(start + 1, end + 1, deltas); /* timestamp */
+		/* timestamp */
+		if (perf->devinfo.oa_timestamp_shift >= 0)
+			deltas[0] += (end[1] - start[1]) << perf->devinfo.oa_timestamp_shift;
+		else
+			deltas[0] += (end[1] - start[1]) >> (-perf->devinfo.oa_timestamp_shift);
 
 		for (i = 0; i < 61; i++)
 			accumulate_uint32(start + 3 + i, end + 3 + i, deltas + 1 + i);
@@ -858,5 +874,10 @@ uint64_t intel_perf_read_record_timestamp(const struct intel_perf *perf,
                assert(0);
        }
 
+       if (perf->devinfo.oa_timestamp_shift >= 0)
+	       ts <<= perf->devinfo.oa_timestamp_shift;
+       else
+	       ts >>= -perf->devinfo.oa_timestamp_shift;
+
        return ts;
 }
diff --git a/lib/i915/perf.h b/lib/i915/perf.h
index 88a36ebe..a0dba342 100644
--- a/lib/i915/perf.h
+++ b/lib/i915/perf.h
@@ -56,6 +56,21 @@ struct intel_perf_devinfo {
 	uint32_t devid;
 	uint32_t graphics_ver;
 	uint32_t revision;
+	/**
+	 * Bit shifting required to put OA report timestamps into
+	 * timestamp_frequency (some HW generations can shift
+	 * timestamp values to the right by a number of bits).
+	 */
+	int32_t  oa_timestamp_shift;
+	/**
+	 * On some platforms only part of the timestamp bits are valid
+	 * (on previous platforms we would get full 32bits, newer
+	 * platforms can have fewer). It's important to know when
+	 * correlating the full 36bits timestamps to the OA report
+	 * timestamps.
+	 */
+	uint64_t  oa_timestamp_mask;
+	/* Frequency of the timestamps in Hz */
 	uint64_t timestamp_frequency;
 	uint64_t gt_min_freq;
 	uint64_t gt_max_freq;
@@ -320,7 +335,8 @@ void intel_perf_add_metric_set(struct intel_perf *perf,
 void intel_perf_load_perf_configs(struct intel_perf *perf, int drm_fd);
 
 void intel_perf_accumulate_reports(struct intel_perf_accumulator *acc,
-				   int oa_format,
+				   const struct intel_perf *perf,
+				   const struct intel_perf_metric_set *metric_set,
 				   const struct drm_i915_perf_record_header *record0,
 				   const struct drm_i915_perf_record_header *record1);
 
diff --git a/lib/i915/perf_data_reader.c b/lib/i915/perf_data_reader.c
index 4d1efe92..fcdd5ed1 100644
--- a/lib/i915/perf_data_reader.c
+++ b/lib/i915/perf_data_reader.c
@@ -209,7 +209,7 @@ correlate_gpu_timestamp(struct intel_perf_data_reader *reader,
 	 * Try to figure what portion of the correlation data the
 	 * 32bit timestamp belongs to.
 	 */
-	uint64_t mask = 0xffffffff;
+	uint64_t mask = reader->perf->devinfo.oa_timestamp_mask;
 	int corr_idx = -1;
 
 	for (uint32_t i = 0; i < reader->n_correlation_chunks; i++) {
diff --git a/lib/meson.build b/lib/meson.build
index 747889b9..6b5b9e04 100644
--- a/lib/meson.build
+++ b/lib/meson.build
@@ -321,7 +321,7 @@ lib_igt_i915_perf_build = shared_library(
   dependencies: lib_igt_chipset,
   include_directories : inc,
   install: true,
-  soversion: '1.4')
+  soversion: '1.5')
 
 lib_igt_i915_perf = declare_dependency(
   link_with : lib_igt_i915_perf_build,
@@ -342,7 +342,7 @@ pkgconf.set('prefix', get_option('prefix'))
 pkgconf.set('exec_prefix', '${prefix}')
 pkgconf.set('libdir', '${prefix}/@0@'.format(get_option('libdir')))
 pkgconf.set('includedir', '${prefix}/@0@'.format(get_option('includedir')))
-pkgconf.set('i915_perf_version', '1.4.0')
+pkgconf.set('i915_perf_version', '1.5.0')
 
 configure_file(
   input : 'i915-perf.pc.in',
diff --git a/tools/i915-perf/i915_perf_reader.c b/tools/i915-perf/i915_perf_reader.c
index afd8c39c..4a2e3df4 100644
--- a/tools/i915-perf/i915_perf_reader.c
+++ b/tools/i915-perf/i915_perf_reader.c
@@ -271,7 +271,8 @@ main(int argc, char *argv[])
 		fprintf(stdout, "hw_id=0x%x %s\n",
 			item->hw_id, item->hw_id == 0xffffffff ? "(idle)" : "");
 
-		intel_perf_accumulate_reports(&accu, reader.metric_set->perf_oa_format,
+		intel_perf_accumulate_reports(&accu,
+					      reader.perf, reader.metric_set,
 					      i915_report0, i915_report1);
 
 		for (uint32_t c = 0; c < n_counters; c++) {
-- 
2.25.1

[igt-dev] [PATCH i-g-t v3 19/28] lib/i915/perf: indentation fix

[Umesh Nerlige Ramappa]

From: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
 lib/i915/perf_data_reader.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/i915/perf_data_reader.c b/lib/i915/perf_data_reader.c
index fcdd5ed1..10e78e63 100644
--- a/lib/i915/perf_data_reader.c
+++ b/lib/i915/perf_data_reader.c
@@ -337,8 +337,8 @@ bool
 intel_perf_data_reader_init(struct intel_perf_data_reader *reader,
 			    int perf_file_fd)
 {
-        struct stat st;
-        if (fstat(perf_file_fd, &st) != 0) {
+	struct stat st;
+	if (fstat(perf_file_fd, &st) != 0) {
 		snprintf(reader->error_msg, sizeof(reader->error_msg),
 			 "Unable to access file (%s)", strerror(errno));
 		return false;
-- 
2.25.1

[igt-dev] [PATCH i-g-t v3 20/28] tools/i915-perf-recorder: capture OA & CS frequencies

[Umesh Nerlige Ramappa]

From: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

CS & OA timestamp don't have the same accuracy, so we need to adjuste
the correlated timestamps (capture from the CS unit) in the recording
to fit the data in the OA reports.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
 tools/i915-perf/i915_perf_recorder.c | 43 ++++++++++++++++++++++++----
 1 file changed, 38 insertions(+), 5 deletions(-)

diff --git a/tools/i915-perf/i915_perf_recorder.c b/tools/i915-perf/i915_perf_recorder.c
index 7ced7b40..72011c87 100644
--- a/tools/i915-perf/i915_perf_recorder.c
+++ b/tools/i915-perf/i915_perf_recorder.c
@@ -328,7 +328,7 @@ perf_ioctl(int fd, unsigned long request, void *arg)
 }
 
 static uint64_t
-get_device_timestamp_frequency(const struct intel_device_info *devinfo, int drm_fd)
+get_device_cs_timestamp_frequency(const struct intel_device_info *devinfo, int drm_fd)
 {
 	drm_i915_getparam_t gp;
 	int timestamp_frequency;
@@ -352,12 +352,44 @@ get_device_timestamp_frequency(const struct intel_device_info *devinfo, int drm_
 	return 12000000;
 }
 
+static uint64_t
+get_device_oa_timestamp_frequency(const struct intel_device_info *devinfo, int drm_fd)
+{
+	drm_i915_getparam_t gp;
+	int timestamp_frequency;
+
+	gp.param = I915_PARAM_OA_TIMESTAMP_FREQUENCY;
+	gp.value = &timestamp_frequency;
+	if (perf_ioctl(drm_fd, DRM_IOCTL_I915_GETPARAM, &gp) == 0)
+		return timestamp_frequency;
+
+	gp.param = I915_PARAM_CS_TIMESTAMP_FREQUENCY;
+	gp.value = &timestamp_frequency;
+	if (perf_ioctl(drm_fd, DRM_IOCTL_I915_GETPARAM, &gp) == 0)
+		return timestamp_frequency;
+
+
+	if (devinfo->graphics_ver > 9) {
+		fprintf(stderr, "Unable to query timestamp frequency from i915, please update kernel.\n");
+		return 0;
+	}
+
+	fprintf(stderr, "Warning: unable to query timestamp frequency from i915, guessing values...\n");
+
+	if (devinfo->graphics_ver <= 8)
+		return 12500000;
+	if (devinfo->is_broxton)
+		return 19200000;
+	return 12000000;
+}
+
 struct recording_context {
 	int drm_fd;
 	int perf_fd;
 
 	uint32_t devid;
-	uint64_t timestamp_frequency;
+	uint64_t oa_timestamp_frequency;
+	uint64_t cs_timestamp_frequency;
 
 	const struct intel_device_info *devinfo;
 
@@ -459,7 +491,7 @@ static bool
 write_header(FILE *output, struct recording_context *ctx)
 {
 	struct intel_perf_record_device_info info = {
-		.timestamp_frequency = ctx->timestamp_frequency,
+		.timestamp_frequency = ctx->oa_timestamp_frequency,
 		.device_id = ctx->perf->devinfo.devid,
 		.device_revision = ctx->perf->devinfo.revision,
 		.gt_min_frequency = ctx->perf->devinfo.gt_min_freq,
@@ -964,7 +996,8 @@ main(int argc, char *argv[])
 
 	intel_perf_load_perf_configs(ctx.perf, ctx.drm_fd);
 
-	ctx.timestamp_frequency = get_device_timestamp_frequency(ctx.devinfo, ctx.drm_fd);
+	ctx.oa_timestamp_frequency = get_device_oa_timestamp_frequency(ctx.devinfo, ctx.drm_fd);
+	ctx.cs_timestamp_frequency = get_device_cs_timestamp_frequency(ctx.devinfo, ctx.drm_fd);
 
 	signal(SIGINT, sigint_handler);
 
@@ -1036,7 +1069,7 @@ main(int argc, char *argv[])
 		goto fail;
 	}
 
-	ctx.oa_exponent = oa_exponent_for_period(ctx.timestamp_frequency, perf_period);
+	ctx.oa_exponent = oa_exponent_for_period(ctx.oa_timestamp_frequency, perf_period);
 	fprintf(stdout, "Opening perf stream with metric_id=%"PRIu64" oa_exponent=%u oa_format=%u\n",
 		ctx.metric_set->perf_oa_metrics_set, ctx.oa_exponent,
 		ctx.metric_set->perf_oa_format);
-- 
2.25.1

[igt-dev] [PATCH i-g-t v3 21/28] tools/i915-perf: make timestamp range easier to compare

[Umesh Nerlige Ramappa]

From: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

With timestamp bit shifting stuff, aligning values in the console is
useful to compare them.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
 tools/i915-perf/i915_perf_reader.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/tools/i915-perf/i915_perf_reader.c b/tools/i915-perf/i915_perf_reader.c
index 4a2e3df4..92e43c19 100644
--- a/tools/i915-perf/i915_perf_reader.c
+++ b/tools/i915-perf/i915_perf_reader.c
@@ -235,14 +235,17 @@ main(int argc, char *argv[])
 		return EXIT_FAILURE;
 	}
 
-	fprintf(stdout, "Timestamp correlation CPU range: 0x%016"PRIx64"-0x%016"PRIx64"\n",
+	fprintf(stdout, "Timestamp correlation CPU range:       0x%016"PRIx64"-0x%016"PRIx64"\n",
 		reader.correlations[0]->cpu_timestamp,
 		reader.correlations[reader.n_correlations - 1]->cpu_timestamp);
-	fprintf(stdout, "Timestamp correlation GPU range: 0x%016"PRIx64"-0x%016"PRIx64"\n",
+	fprintf(stdout, "Timestamp correlation GPU range (64b): 0x%016"PRIx64"-0x%016"PRIx64"\n",
 		reader.correlations[0]->gpu_timestamp,
 		reader.correlations[reader.n_correlations - 1]->gpu_timestamp);
+	fprintf(stdout, "Timestamp correlation GPU range (32b): 0x%016"PRIx64"-0x%016"PRIx64"\n",
+		reader.correlations[0]->gpu_timestamp & 0xffffffff,
+		reader.correlations[reader.n_correlations - 1]->gpu_timestamp & 0xffffffff);
 
-	fprintf(stdout, "OA data timestamp range: 0x%016"PRIx64"-0x%016"PRIx64"\n",
+	fprintf(stdout, "OA data timestamp range:               0x%016"PRIx64"-0x%016"PRIx64"\n",
 		intel_perf_read_record_timestamp(reader.perf,
 						 reader.metric_set,
 						 reader.records[0]),
-- 
2.25.1

[igt-dev] [PATCH i-g-t v3 22/28] tools/i915-perf: printout CPU clock used

[Umesh Nerlige Ramappa]

From: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
 tools/i915-perf/i915_perf_recorder.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/tools/i915-perf/i915_perf_recorder.c b/tools/i915-perf/i915_perf_recorder.c
index 72011c87..f8f9b737 100644
--- a/tools/i915-perf/i915_perf_recorder.c
+++ b/tools/i915-perf/i915_perf_recorder.c
@@ -588,6 +588,17 @@ static uint64_t timespec_diff(struct timespec *begin,
 
 static clock_t correlation_clock_id = CLOCK_MONOTONIC;
 
+static const char *
+get_correlation_clock_name(clock_t clock_id)
+{
+  switch (clock_id) {
+  case CLOCK_BOOTTIME:      return "bootime";
+  case CLOCK_MONOTONIC:     return "monotonic";
+  case CLOCK_MONOTONIC_RAW: return "monotonic_raw";
+  default:                  return "*unknown*";
+  }
+}
+
 static bool
 get_correlation_timestamps(struct intel_perf_record_timestamp_correlation *corr, int drm_fd)
 {
@@ -1069,6 +1080,9 @@ main(int argc, char *argv[])
 		goto fail;
 	}
 
+	fprintf(stdout, "Using correlation clock: %s\n",
+		get_correlation_clock_name(correlation_clock_id));
+
 	ctx.oa_exponent = oa_exponent_for_period(ctx.oa_timestamp_frequency, perf_period);
 	fprintf(stdout, "Opening perf stream with metric_id=%"PRIu64" oa_exponent=%u oa_format=%u\n",
 		ctx.metric_set->perf_oa_metrics_set, ctx.oa_exponent,
-- 
2.25.1

[igt-dev] [PATCH i-g-t v3 23/28] tools/i915-perf: record remaining perf data on exit

[Umesh Nerlige Ramappa]

From: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
 tools/i915-perf/i915_perf_recorder.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/tools/i915-perf/i915_perf_recorder.c b/tools/i915-perf/i915_perf_recorder.c
index f8f9b737..d16f1546 100644
--- a/tools/i915-perf/i915_perf_recorder.c
+++ b/tools/i915-perf/i915_perf_recorder.c
@@ -1144,6 +1144,11 @@ main(int argc, char *argv[])
 
 	fprintf(stdout, "Exiting...\n");
 
+	if (!write_i915_perf_data(ctx.output_stream, ctx.perf_fd)) {
+		fprintf(stderr, "Failed to write i915-perf data: %s\n",
+			strerror(errno));
+	}
+
 	if (!write_correlation_timestamps(ctx.output_stream, ctx.drm_fd)) {
 		fprintf(stderr,
 			"Failed to write final i915 timestamp correlation data: %s\n",
-- 
2.25.1

[igt-dev] [PATCH i-g-t v3 24/28] lib/i915/perf: add a raw timestamp utility

[Umesh Nerlige Ramappa]

From: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

Helpful to figure out the bitshifting needed in OA timestamp.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
 lib/i915/perf.c                    | 21 +++++++++++++++++++++
 lib/i915/perf.h                    |  4 ++++
 tools/i915-perf/i915_perf_reader.c |  7 +++++++
 3 files changed, 32 insertions(+)

diff --git a/lib/i915/perf.c b/lib/i915/perf.c
index 4c1b75ad..2d309e57 100644
--- a/lib/i915/perf.c
+++ b/lib/i915/perf.c
@@ -881,3 +881,24 @@ uint64_t intel_perf_read_record_timestamp(const struct intel_perf *perf,
 
        return ts;
 }
+
+uint64_t intel_perf_read_record_timestamp_raw(const struct intel_perf *perf,
+					  const struct intel_perf_metric_set *metric_set,
+					  const struct drm_i915_perf_record_header *record)
+{
+       const uint32_t *report32 = (const uint32_t *)(record + 1);
+       uint64_t ts;
+
+       switch (metric_set->perf_oa_format) {
+       case I915_OA_FORMAT_A24u40_A14u32_B8_C8:
+       case I915_OA_FORMAT_A32u40_A4u32_B8_C8:
+       case I915_OA_FORMAT_A45_B8_C8:
+               ts = report32[1];
+               break;
+
+       default:
+               assert(0);
+       }
+
+       return ts;
+}
diff --git a/lib/i915/perf.h b/lib/i915/perf.h
index a0dba342..8a2ef9e7 100644
--- a/lib/i915/perf.h
+++ b/lib/i915/perf.h
@@ -344,6 +344,10 @@ uint64_t intel_perf_read_record_timestamp(const struct intel_perf *perf,
 					  const struct intel_perf_metric_set *metric_set,
 					  const struct drm_i915_perf_record_header *record);
 
+uint64_t intel_perf_read_record_timestamp_raw(const struct intel_perf *perf,
+					      const struct intel_perf_metric_set *metric_set,
+					      const struct drm_i915_perf_record_header *record);
+
 #ifdef __cplusplus
 };
 #endif
diff --git a/tools/i915-perf/i915_perf_reader.c b/tools/i915-perf/i915_perf_reader.c
index 92e43c19..9be1a9fc 100644
--- a/tools/i915-perf/i915_perf_reader.c
+++ b/tools/i915-perf/i915_perf_reader.c
@@ -252,6 +252,13 @@ main(int argc, char *argv[])
 		intel_perf_read_record_timestamp(reader.perf,
 						 reader.metric_set,
 						 reader.records[reader.n_records - 1]));
+	fprintf(stdout, "OA raw data timestamp range:           0x%016"PRIx64"-0x%016"PRIx64"\n",
+		intel_perf_read_record_timestamp_raw(reader.perf,
+						     reader.metric_set,
+						     reader.records[0]),
+		intel_perf_read_record_timestamp_raw(reader.perf,
+						     reader.metric_set,
+						     reader.records[reader.n_records - 1]));
 
 	if (strcmp(reader.metric_set_uuid, reader.metric_set->hw_config_guid)) {
 		fprintf(stdout,
-- 
2.25.1

[igt-dev] [PATCH i-g-t v3 25/28] lib/i915/perf: add helper function to get report reason

[Umesh Nerlige Ramappa]

From: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

Useful to inspect reports.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
 lib/i915/perf.c | 54 +++++++++++++++++++++++++++++++++++++++++++++++++
 lib/i915/perf.h |  3 +++
 lib/meson.build |  2 +-
 3 files changed, 58 insertions(+), 1 deletion(-)

diff --git a/lib/i915/perf.c b/lib/i915/perf.c
index 2d309e57..fa291998 100644
--- a/lib/i915/perf.c
+++ b/lib/i915/perf.c
@@ -902,3 +902,57 @@ uint64_t intel_perf_read_record_timestamp_raw(const struct intel_perf *perf,
 
        return ts;
 }
+
+const char *intel_perf_read_report_reason(const struct intel_perf *perf,
+					  const struct drm_i915_perf_record_header *record)
+{
+	const uint32_t *report = (const uint32_t *) (record + 1);
+
+	/* Not really documented on Gfx7/7.5*/
+	if (perf->devinfo.graphics_ver < 8)
+		return "timer";
+
+	/* Gfx8-11 */
+	if (perf->devinfo.graphics_ver < 12) {
+		uint32_t reason = report[0] >> 19;
+		if (reason & (1u << 0))
+			return "timer";
+		if (reason & (1u << 1))
+			return "trigger1";
+		if (reason & (1u << 2))
+			return "trigger2";
+		if (reason & (1u << 3))
+			return "context-switch";
+		if (reason & (1u << 4))
+			return "go-transition";
+
+		if (perf->devinfo.graphics_ver >= 9 &&
+		    reason & (1u << 5))
+			return "clock-ratio-change";
+
+		return "unknown";
+	}
+
+	/* Gfx12 */
+	if (perf->devinfo.graphics_ver <= 12) {
+		uint32_t reason = report[0] >> 19;
+		if (reason & (1u << 0))
+			return "timer";
+		if (reason & (1u << 1))
+			return "trigger1";
+		if (reason & (1u << 2))
+			return "trigger2";
+		if (reason & (1u << 3))
+			return "context-switch";
+		if (reason & (1u << 4))
+			return "go-transition";
+		if (reason & (1u << 5))
+			return "clock-ratio-change";
+		if (reason & (1u << 6))
+			return "mmio-trigger";
+
+		return "unknown";
+	}
+
+	return "unknown";
+}
diff --git a/lib/i915/perf.h b/lib/i915/perf.h
index 8a2ef9e7..e6e60dc9 100644
--- a/lib/i915/perf.h
+++ b/lib/i915/perf.h
@@ -348,6 +348,9 @@ uint64_t intel_perf_read_record_timestamp_raw(const struct intel_perf *perf,
 					      const struct intel_perf_metric_set *metric_set,
 					      const struct drm_i915_perf_record_header *record);
 
+const char *intel_perf_read_report_reason(const struct intel_perf *perf,
+					  const struct drm_i915_perf_record_header *record);
+
 #ifdef __cplusplus
 };
 #endif
diff --git a/lib/meson.build b/lib/meson.build
index 6b5b9e04..4b6d2267 100644
--- a/lib/meson.build
+++ b/lib/meson.build
@@ -342,7 +342,7 @@ pkgconf.set('prefix', get_option('prefix'))
 pkgconf.set('exec_prefix', '${prefix}')
 pkgconf.set('libdir', '${prefix}/@0@'.format(get_option('libdir')))
 pkgconf.set('includedir', '${prefix}/@0@'.format(get_option('includedir')))
-pkgconf.set('i915_perf_version', '1.5.0')
+pkgconf.set('i915_perf_version', '1.5.1')
 
 configure_file(
   input : 'i915-perf.pc.in',
-- 
2.25.1

[igt-dev] [PATCH i-g-t v3 26/28] tools/i915-perf: add option to printout reports data

[Umesh Nerlige Ramappa]

From: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

This is helpful to get an idea of how timelines of reports should be
built.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
 tools/i915-perf/i915_perf_reader.c | 88 ++++++++++++++++++++----------
 1 file changed, 58 insertions(+), 30 deletions(-)

diff --git a/tools/i915-perf/i915_perf_reader.c b/tools/i915-perf/i915_perf_reader.c
index 9be1a9fc..bcd40624 100644
--- a/tools/i915-perf/i915_perf_reader.c
+++ b/tools/i915-perf/i915_perf_reader.c
@@ -53,7 +53,8 @@ usage(void)
 	       "     --help,    -h             Print this screen\n"
 	       "     --counters, -c c1,c2,...  List of counters to display values for.\n"
 	       "                               Use 'all' to display all counters.\n"
-	       "                               Use 'list' to list available counters.\n");
+	       "                               Use 'list' to list available counters.\n"
+	       "     --reports, -r             Print out data per report.\n");
 }
 
 static struct intel_perf_logical_counter *
@@ -165,12 +166,49 @@ get_logical_counters(struct intel_perf_metric_set *metric_set,
 	return counters;
 }
 
+static void
+print_report_deltas(const struct intel_perf_data_reader *reader,
+		    const struct drm_i915_perf_record_header *i915_report0,
+		    const struct drm_i915_perf_record_header *i915_report1,
+		    struct intel_perf_logical_counter **counters,
+		    uint32_t n_counters)
+{
+	struct intel_perf_accumulator accu;
+
+	intel_perf_accumulate_reports(&accu,
+				      reader->perf, reader->metric_set,
+				      i915_report0, i915_report1);
+
+	for (uint32_t c = 0; c < n_counters; c++) {
+		struct intel_perf_logical_counter *counter = counters[c];
+
+		switch (counter->storage) {
+		case INTEL_PERF_LOGICAL_COUNTER_STORAGE_UINT64:
+		case INTEL_PERF_LOGICAL_COUNTER_STORAGE_UINT32:
+		case INTEL_PERF_LOGICAL_COUNTER_STORAGE_BOOL32:
+			fprintf(stdout, "   %s: %" PRIu64 "\n",
+				counter->symbol_name, counter->read_uint64(reader->perf,
+									   reader->metric_set,
+									   accu.deltas));
+			break;
+		case INTEL_PERF_LOGICAL_COUNTER_STORAGE_DOUBLE:
+		case INTEL_PERF_LOGICAL_COUNTER_STORAGE_FLOAT:
+			fprintf(stdout, "   %s: %f\n",
+				counter->symbol_name, counter->read_float(reader->perf,
+									  reader->metric_set,
+									  accu.deltas));
+			break;
+		}
+	}
+}
+
 int
 main(int argc, char *argv[])
 {
 	const struct option long_options[] = {
 		{"help",             no_argument, 0, 'h'},
 		{"counters",   required_argument, 0, 'c'},
+		{"reports",          no_argument, 0, 'r'},
 		{0, 0, 0, 0}
 	};
 	struct intel_perf_data_reader reader;
@@ -179,8 +217,9 @@ main(int argc, char *argv[])
 	const char *counter_names = NULL;
 	int32_t n_counters;
 	int fd, opt;
+	bool print_reports = false;
 
-	while ((opt = getopt_long(argc, argv, "hc:", long_options, NULL)) != -1) {
+	while ((opt = getopt_long(argc, argv, "hc:r", long_options, NULL)) != -1) {
 		switch (opt) {
 		case 'h':
 			usage();
@@ -188,6 +227,9 @@ main(int argc, char *argv[])
 		case 'c':
 			counter_names = optarg;
 			break;
+		case 'r':
+			print_reports = true;
+			break;
 		default:
 			fprintf(stderr, "Internal error: "
 				"unexpected getopt value: %d\n", opt);
@@ -268,11 +310,6 @@ main(int argc, char *argv[])
 
 	for (uint32_t i = 0; i < reader.n_timelines; i++) {
 		const struct intel_perf_timeline_item *item = &reader.timelines[i];
-		const struct drm_i915_perf_record_header *i915_report0 =
-			reader.records[item->record_start];
-		const struct drm_i915_perf_record_header *i915_report1 =
-			reader.records[item->record_end];
-		struct intel_perf_accumulator accu;
 
 		fprintf(stdout, "Time: CPU=0x%016" PRIx64 "-0x%016" PRIx64
 			" GPU=0x%016" PRIx64 "-0x%016" PRIx64"\n",
@@ -281,29 +318,20 @@ main(int argc, char *argv[])
 		fprintf(stdout, "hw_id=0x%x %s\n",
 			item->hw_id, item->hw_id == 0xffffffff ? "(idle)" : "");
 
-		intel_perf_accumulate_reports(&accu,
-					      reader.perf, reader.metric_set,
-					      i915_report0, i915_report1);
-
-		for (uint32_t c = 0; c < n_counters; c++) {
-			struct intel_perf_logical_counter *counter = counters[c];
-
-			switch (counter->storage) {
-			case INTEL_PERF_LOGICAL_COUNTER_STORAGE_UINT64:
-			case INTEL_PERF_LOGICAL_COUNTER_STORAGE_UINT32:
-			case INTEL_PERF_LOGICAL_COUNTER_STORAGE_BOOL32:
-				fprintf(stdout, "   %s: %" PRIu64 "\n",
-					counter->symbol_name, counter->read_uint64(reader.perf,
-										   reader.metric_set,
-										   accu.deltas));
-				break;
-			case INTEL_PERF_LOGICAL_COUNTER_STORAGE_DOUBLE:
-			case INTEL_PERF_LOGICAL_COUNTER_STORAGE_FLOAT:
-				fprintf(stdout, "   %s: %f\n",
-					counter->symbol_name, counter->read_float(reader.perf,
-										  reader.metric_set,
-										  accu.deltas));
-				break;
+		print_report_deltas(&reader,
+				    reader.records[item->record_start],
+				    reader.records[item->record_end],
+				    counters, n_counters);
+
+		if (print_reports) {
+			for (uint32_t r = item->record_start; r < item->record_end; r++) {
+				fprintf(stdout, " report%i = %s\n",
+					r - item->record_start,
+					intel_perf_read_report_reason(reader.perf, reader.records[r]));
+				print_report_deltas(&reader,
+						    reader.records[r],
+						    reader.records[r + 1],
+						    counters, n_counters);
 			}
 		}
 	}
-- 
2.25.1

[igt-dev] [PATCH i-g-t v3 27/28] lib/i915: add new ACM/DG2 format in codegen

[Umesh Nerlige Ramappa]

From: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
 lib/i915/perf-configs/perf-metricset-codegen.py | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/lib/i915/perf-configs/perf-metricset-codegen.py b/lib/i915/perf-configs/perf-metricset-codegen.py
index 00528c31..80b01be5 100644
--- a/lib/i915/perf-configs/perf-metricset-codegen.py
+++ b/lib/i915/perf-configs/perf-metricset-codegen.py
@@ -126,6 +126,19 @@ def generate_metric_sets(args, gen):
                 metric_set->c_offset = metric_set->b_offset + 8;
                 metric_set->perfcnt_offset = metric_set->c_offset + 8;
 
+            """))
+        elif gen.chipset.startswith("acm"):
+            c(textwrap.dedent("""\
+                metric_set->perf_oa_format = I915_OA_FORMAT_A24u40_A14u32_B8_C8;
+
+                metric_set->perf_raw_size = 256;
+                metric_set->gpu_time_offset = 0;
+                metric_set->gpu_clock_offset = 1;
+                metric_set->a_offset = 2;
+                metric_set->b_offset = metric_set->a_offset + 38;
+                metric_set->c_offset = metric_set->b_offset + 8;
+                metric_set->perfcnt_offset = metric_set->c_offset + 8;
+
             """))
         else:
             c(textwrap.dedent("""\
-- 
2.25.1

[igt-dev] [PATCH i-g-t v3 28/28] lib/i915/perf: configure OA timestamp shift and mask for ACM

[Umesh Nerlige Ramappa]

From: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

OA reports have the timestamp value shifted to the right by 1 bits, it
also means we cannot use the top bit for comparison. Configure OA
timestamp shift and mask for ACM.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
 lib/i915/perf.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/lib/i915/perf.c b/lib/i915/perf.c
index fa291998..28f37948 100644
--- a/lib/i915/perf.c
+++ b/lib/i915/perf.c
@@ -377,6 +377,12 @@ intel_perf_for_devinfo(uint32_t device_id,
 		intel_perf_load_metrics_adl(perf);
 	} else if (devinfo->is_dg2) {
 		perf->devinfo.eu_threads_count = 8;
+		/* OA reports have the timestamp value shifted to the
+		 * right by 1 bits, it also means we cannot use the
+		 * top bit for comparison.
+		 */
+		perf->devinfo.oa_timestamp_shift = -1;
+		perf->devinfo.oa_timestamp_mask = 0x7fffffff;
 
 		if (is_acm_gt1(&perf->devinfo))
 			intel_perf_load_metrics_acmgt1(perf);
-- 
2.25.1

[igt-dev] ✗ Fi.CI.BAT: failure for Second part of DG2 OA tests (rev3)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 8065 bytes --]

== Series Details ==

Series: Second part of DG2 OA tests (rev3)
URL   : https://patchwork.freedesktop.org/series/110141/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_12317 -> IGTPW_8011
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with IGTPW_8011 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_8011, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8011/index.html

Participating hosts (40 -> 38)
------------------------------

  Additional (2): fi-kbl-soraka fi-pnv-d510 
  Missing    (4): fi-ctg-p8600 fi-hsw-4770 fi-rkl-11600 fi-cfl-8700k 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_8011:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_selftest@live@gem_contexts:
    - fi-kbl-soraka:      NOTRUN -> [INCOMPLETE][1]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8011/fi-kbl-soraka/igt@i915_selftest@live@gem_contexts.html

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@i915_selftest@live@gt_lrc:
    - {bat-adln-1}:       [PASS][2] -> [INCOMPLETE][3]
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12317/bat-adln-1/igt@i915_selftest@live@gt_lrc.html
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8011/bat-adln-1/igt@i915_selftest@live@gt_lrc.html

  
Known issues
------------

  Here are the changes found in IGTPW_8011 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_gttfill@basic:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][4] ([fdo#109271]) +9 similar issues
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8011/fi-kbl-soraka/igt@gem_exec_gttfill@basic.html

  * igt@gem_huc_copy@huc-copy:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][5] ([fdo#109271] / [i915#2190])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8011/fi-kbl-soraka/igt@gem_huc_copy@huc-copy.html

  * igt@gem_lmem_swapping@basic:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#4613]) +3 similar issues
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8011/fi-kbl-soraka/igt@gem_lmem_swapping@basic.html

  * igt@i915_pm_rpm@basic-pci-d3-state:
    - fi-ilk-650:         NOTRUN -> [SKIP][7] ([fdo#109271]) +19 similar issues
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8011/fi-ilk-650/igt@i915_pm_rpm@basic-pci-d3-state.html

  * igt@i915_selftest@live@gt_heartbeat:
    - fi-kbl-soraka:      NOTRUN -> [DMESG-FAIL][8] ([i915#5334])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8011/fi-kbl-soraka/igt@i915_selftest@live@gt_heartbeat.html

  * igt@i915_selftest@live@gt_pm:
    - fi-kbl-soraka:      NOTRUN -> [DMESG-FAIL][9] ([i915#1886])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8011/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html

  * igt@i915_selftest@live@migrate:
    - bat-adlp-4:         [PASS][10] -> [INCOMPLETE][11] ([i915#7308] / [i915#7348])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12317/bat-adlp-4/igt@i915_selftest@live@migrate.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8011/bat-adlp-4/igt@i915_selftest@live@migrate.html

  * igt@kms_chamelium@common-hpd-after-suspend:
    - fi-icl-u2:          NOTRUN -> [SKIP][12] ([fdo#111827])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8011/fi-icl-u2/igt@kms_chamelium@common-hpd-after-suspend.html

  * igt@kms_chamelium@hdmi-edid-read:
    - fi-ilk-650:         NOTRUN -> [SKIP][13] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8011/fi-ilk-650/igt@kms_chamelium@hdmi-edid-read.html

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][14] ([fdo#109271] / [fdo#111827]) +7 similar issues
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8011/fi-kbl-soraka/igt@kms_chamelium@hdmi-hpd-fast.html

  * igt@kms_psr@primary_page_flip:
    - fi-pnv-d510:        NOTRUN -> [SKIP][15] ([fdo#109271]) +43 similar issues
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8011/fi-pnv-d510/igt@kms_psr@primary_page_flip.html

  * igt@runner@aborted:
    - bat-adlp-4:         NOTRUN -> [FAIL][16] ([i915#4312])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8011/bat-adlp-4/igt@runner@aborted.html

  
#### Possible fixes ####

  * igt@gem_exec_suspend@basic-s0@smem:
    - {bat-rpls-2}:       [DMESG-WARN][17] ([i915#6434]) -> [PASS][18]
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12317/bat-rpls-2/igt@gem_exec_suspend@basic-s0@smem.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8011/bat-rpls-2/igt@gem_exec_suspend@basic-s0@smem.html

  * igt@gem_exec_suspend@basic-s3@smem:
    - {bat-rplp-1}:       [DMESG-WARN][19] ([i915#2867]) -> [PASS][20]
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12317/bat-rplp-1/igt@gem_exec_suspend@basic-s3@smem.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8011/bat-rplp-1/igt@gem_exec_suspend@basic-s3@smem.html

  * igt@i915_selftest@live@gt_pm:
    - fi-icl-u2:          [DMESG-FAIL][21] ([i915#4890]) -> [PASS][22]
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12317/fi-icl-u2/igt@i915_selftest@live@gt_pm.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8011/fi-icl-u2/igt@i915_selftest@live@gt_pm.html

  * igt@i915_selftest@live@migrate:
    - {bat-dg2-11}:       [DMESG-WARN][23] -> [PASS][24]
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12317/bat-dg2-11/igt@i915_selftest@live@migrate.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8011/bat-dg2-11/igt@i915_selftest@live@migrate.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
  [i915#2867]: https://gitlab.freedesktop.org/drm/intel/issues/2867
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#4890]: https://gitlab.freedesktop.org/drm/intel/issues/4890
  [i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
  [i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
  [i915#5537]: https://gitlab.freedesktop.org/drm/intel/issues/5537
  [i915#6257]: https://gitlab.freedesktop.org/drm/intel/issues/6257
  [i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
  [i915#6434]: https://gitlab.freedesktop.org/drm/intel/issues/6434
  [i915#6997]: https://gitlab.freedesktop.org/drm/intel/issues/6997
  [i915#7029]: https://gitlab.freedesktop.org/drm/intel/issues/7029
  [i915#7308]: https://gitlab.freedesktop.org/drm/intel/issues/7308
  [i915#7346]: https://gitlab.freedesktop.org/drm/intel/issues/7346
  [i915#7348]: https://gitlab.freedesktop.org/drm/intel/issues/7348


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_7029 -> IGTPW_8011

  CI-20190529: 20190529
  CI_DRM_12317: 0f9cbc285f7d3d1860f7f903663933f33ff9ae25 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_8011: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8011/index.html
  IGT_7029: c32cb1e614017f14274d335ac571383799e6c786 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git


Testlist changes
----------------

-igt@kms_chamelium@dp-edid-stress-resolution

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8011/index.html

[-- Attachment #2: Type: text/html, Size: 9129 bytes --]

Re: [igt-dev] [PATCH i-g-t v3 00/28] Second part of DG2 OA tests

[Dixit, Ashutosh]

On Fri, 28 Oct 2022 12:52:30 -0700, Umesh Nerlige Ramappa wrote:
>
> Add tests for changes in perf OA for DG2.This is part 2 of "Add DG2 OA
> test"

This is now merged. The only concern is there are these rather larege new
generated files:

2343886 Oct 28 17:55 i915_perf_metrics_acmgt1.c
3737045 Oct 28 17:55 i915_perf_metrics_acmgt2.c
7232473 Oct 28 17:55 i915_perf_metrics_acmgt3.c

which seem to be increasing the compile time a fair bit unless we have
ccache etc. turned on. So just a heads up about that.

Thanks.
--
Ashutosh