From: Marc Zyngier <maz@kernel.org>
To: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
gregkh@linuxfoundation.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, coresight@lists.linaro.org,
mike.leach@linaro.org, leo.yan@linaro.org,
anshuman.khandual@arm.com, Will Deacon <will@kernel.org>,
Mark Rutland <mark.rutland@arm.com>
Subject: Re: [PATCH v5 07/19] arm64: kvm: Enable access to TRBE support for host
Date: Tue, 30 Mar 2021 16:34:45 +0100 [thread overview]
Message-ID: <87blb0r6y2.wl-maz@kernel.org> (raw)
In-Reply-To: <20210330152314.GA2329603@xps15>
On Tue, 30 Mar 2021 16:23:14 +0100,
Mathieu Poirier <mathieu.poirier@linaro.org> wrote:
>
> On Tue, Mar 30, 2021 at 11:38:18AM +0100, Suzuki K Poulose wrote:
> > On 26/03/2021 16:55, Mathieu Poirier wrote:
> > > On Tue, Mar 23, 2021 at 12:06:35PM +0000, Suzuki K Poulose wrote:
> > > > For a nvhe host, the EL2 must allow the EL1&0 translation
> > > > regime for TraceBuffer (MDCR_EL2.E2TB == 0b11). This must
> > > > be saved/restored over a trip to the guest. Also, before
> > > > entering the guest, we must flush any trace data if the
> > > > TRBE was enabled. And we must prohibit the generation
> > > > of trace while we are in EL1 by clearing the TRFCR_EL1.
> > > >
> > > > For vhe, the EL2 must prevent the EL1 access to the Trace
> > > > Buffer.
> > > >
> > > > Cc: Will Deacon <will@kernel.org>
> > > > Cc: Catalin Marinas <catalin.marinas@arm.com>
> > > > Cc: Marc Zyngier <maz@kernel.org>
> > > > Cc: Mark Rutland <mark.rutland@arm.com>
> > > > Cc: Anshuman Khandual <anshuman.khandual@arm.com>
> > > > Acked-by: Mathieu Poirier <mathieu.poirier@linaro.org>
> > > > Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
> > > > ---
> > > > arch/arm64/include/asm/el2_setup.h | 13 +++++++++
> > > > arch/arm64/include/asm/kvm_arm.h | 2 ++
> > > > arch/arm64/include/asm/kvm_host.h | 2 ++
> > > > arch/arm64/kernel/hyp-stub.S | 3 ++-
> > > > arch/arm64/kvm/debug.c | 6 ++---
> > > > arch/arm64/kvm/hyp/nvhe/debug-sr.c | 42 ++++++++++++++++++++++++++++++
> > > > arch/arm64/kvm/hyp/nvhe/switch.c | 1 +
> > > > 7 files changed, 65 insertions(+), 4 deletions(-)
> > > >
> > >
> > > Marc - do you want me to pick up this one?
> >
> > I think the kvmarm tree is the best route for this patch, given the amount
> > of changes the tree is going through, in the areas this patch
> > touches. Or else there would be conflicts with merging. And this patch
> > depends on the patches from this series that were queued.
> >
> > Here is the depency tree :
> >
> > a) kvm-arm fixes for debug (Patch 1, 2) & SPE save-restore fix (queued in
> > v5.12-rc3)
> >
> > b) TRBE defintions and Trace synchronization barrier (Patches 5 & 6)
> >
> > c) kvm-arm TRBE host support (Patch 7)
> >
> > d) TRBE driver support (and the ETE changes)
> >
> >
> > (c) code merge depends on -> (a) + (b)
> > (d) build (no conflicts) depends on -> (b)
> >
> >
> > Now (d) has an indirect dependency on (c) for operational correctness at
> > runtime.
> > So, if :
> >
> > kvmarm tree picks up : b + c
> > coresight tree picksup : b + d
> >
> > and if we could ensure the merge order of the trees are in
> > kvmarm
> > greg-kh (device-misc tree) (coresight goes via this tree)
> >
>
> Greg's char-misc tree is based on the rc releases rather than next. As such it
> is a while before other branches like kvmarm get merged, causing all sort of
> compilation breakage.
>
> > we should be fine.
> >
> > Additionally, we could rip out the Kconfig changes from the TRBE patch
> > and add it only at the rc1, once we verify both the trees are in to make
> > sure the runtime operation dependency is not triggered.
> >
>
> We could also do that but Greg might frown at the tactic, and
> rightly so.
We do that all the times. Otherwise, it is hardly possible to build an
infrastructure that spans across multiple subsystems *and* involves
userspace. I really wouldn't worry about that.
M.
--
Without deviation from the norm, progress is not possible.
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
gregkh@linuxfoundation.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, coresight@lists.linaro.org,
mike.leach@linaro.org, leo.yan@linaro.org,
anshuman.khandual@arm.com, Will Deacon <will@kernel.org>,
Mark Rutland <mark.rutland@arm.com>
Subject: Re: [PATCH v5 07/19] arm64: kvm: Enable access to TRBE support for host
Date: Tue, 30 Mar 2021 16:34:45 +0100 [thread overview]
Message-ID: <87blb0r6y2.wl-maz@kernel.org> (raw)
In-Reply-To: <20210330152314.GA2329603@xps15>
On Tue, 30 Mar 2021 16:23:14 +0100,
Mathieu Poirier <mathieu.poirier@linaro.org> wrote:
>
> On Tue, Mar 30, 2021 at 11:38:18AM +0100, Suzuki K Poulose wrote:
> > On 26/03/2021 16:55, Mathieu Poirier wrote:
> > > On Tue, Mar 23, 2021 at 12:06:35PM +0000, Suzuki K Poulose wrote:
> > > > For a nvhe host, the EL2 must allow the EL1&0 translation
> > > > regime for TraceBuffer (MDCR_EL2.E2TB == 0b11). This must
> > > > be saved/restored over a trip to the guest. Also, before
> > > > entering the guest, we must flush any trace data if the
> > > > TRBE was enabled. And we must prohibit the generation
> > > > of trace while we are in EL1 by clearing the TRFCR_EL1.
> > > >
> > > > For vhe, the EL2 must prevent the EL1 access to the Trace
> > > > Buffer.
> > > >
> > > > Cc: Will Deacon <will@kernel.org>
> > > > Cc: Catalin Marinas <catalin.marinas@arm.com>
> > > > Cc: Marc Zyngier <maz@kernel.org>
> > > > Cc: Mark Rutland <mark.rutland@arm.com>
> > > > Cc: Anshuman Khandual <anshuman.khandual@arm.com>
> > > > Acked-by: Mathieu Poirier <mathieu.poirier@linaro.org>
> > > > Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
> > > > ---
> > > > arch/arm64/include/asm/el2_setup.h | 13 +++++++++
> > > > arch/arm64/include/asm/kvm_arm.h | 2 ++
> > > > arch/arm64/include/asm/kvm_host.h | 2 ++
> > > > arch/arm64/kernel/hyp-stub.S | 3 ++-
> > > > arch/arm64/kvm/debug.c | 6 ++---
> > > > arch/arm64/kvm/hyp/nvhe/debug-sr.c | 42 ++++++++++++++++++++++++++++++
> > > > arch/arm64/kvm/hyp/nvhe/switch.c | 1 +
> > > > 7 files changed, 65 insertions(+), 4 deletions(-)
> > > >
> > >
> > > Marc - do you want me to pick up this one?
> >
> > I think the kvmarm tree is the best route for this patch, given the amount
> > of changes the tree is going through, in the areas this patch
> > touches. Or else there would be conflicts with merging. And this patch
> > depends on the patches from this series that were queued.
> >
> > Here is the depency tree :
> >
> > a) kvm-arm fixes for debug (Patch 1, 2) & SPE save-restore fix (queued in
> > v5.12-rc3)
> >
> > b) TRBE defintions and Trace synchronization barrier (Patches 5 & 6)
> >
> > c) kvm-arm TRBE host support (Patch 7)
> >
> > d) TRBE driver support (and the ETE changes)
> >
> >
> > (c) code merge depends on -> (a) + (b)
> > (d) build (no conflicts) depends on -> (b)
> >
> >
> > Now (d) has an indirect dependency on (c) for operational correctness at
> > runtime.
> > So, if :
> >
> > kvmarm tree picks up : b + c
> > coresight tree picksup : b + d
> >
> > and if we could ensure the merge order of the trees are in
> > kvmarm
> > greg-kh (device-misc tree) (coresight goes via this tree)
> >
>
> Greg's char-misc tree is based on the rc releases rather than next. As such it
> is a while before other branches like kvmarm get merged, causing all sort of
> compilation breakage.
>
> > we should be fine.
> >
> > Additionally, we could rip out the Kconfig changes from the TRBE patch
> > and add it only at the rc1, once we verify both the trees are in to make
> > sure the runtime operation dependency is not triggered.
> >
>
> We could also do that but Greg might frown at the tactic, and
> rightly so.
We do that all the times. Otherwise, it is hardly possible to build an
infrastructure that spans across multiple subsystems *and* involves
userspace. I really wouldn't worry about that.
M.
--
Without deviation from the norm, progress is not possible.
next prev parent reply other threads:[~2021-03-30 15:36 UTC|newest]
Thread overview: 106+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-23 12:06 [PATCH v5 00/19] coresight: Add support for ETE and TRBE Suzuki K Poulose
2021-03-23 12:06 ` Suzuki K Poulose
2021-03-23 12:06 ` [PATCH v5 01/19] [Queued] kvm: arm64: Hide system instruction access to Trace registers Suzuki K Poulose
2021-03-23 12:06 ` Suzuki K Poulose
2021-03-23 12:06 ` [PATCH v5 02/19] [Queued] kvm: arm64: Disable guest access to trace filter controls Suzuki K Poulose
2021-03-23 12:06 ` Suzuki K Poulose
2021-03-23 12:06 ` [PATCH v5 03/19] perf: aux: Add flags for the buffer format Suzuki K Poulose
2021-03-23 12:06 ` Suzuki K Poulose
2021-03-23 12:06 ` [PATCH v5 04/19] perf: aux: Add CoreSight PMU buffer formats Suzuki K Poulose
2021-03-23 12:06 ` Suzuki K Poulose
2021-03-29 16:56 ` Mathieu Poirier
2021-03-29 16:56 ` Mathieu Poirier
2021-04-19 7:46 ` Peter Zijlstra
2021-04-19 7:46 ` Peter Zijlstra
2021-03-23 12:06 ` [PATCH v5 05/19] arm64: Add support for trace synchronization barrier Suzuki K Poulose
2021-03-23 12:06 ` Suzuki K Poulose
2021-03-23 18:21 ` Catalin Marinas
2021-03-23 18:21 ` Catalin Marinas
2021-03-24 9:39 ` Suzuki K Poulose
2021-03-24 9:39 ` Suzuki K Poulose
2021-03-24 13:49 ` Marc Zyngier
2021-03-24 13:49 ` Marc Zyngier
2021-03-24 15:51 ` Suzuki K Poulose
2021-03-24 15:51 ` Suzuki K Poulose
2021-03-24 16:16 ` Marc Zyngier
2021-03-24 16:16 ` Marc Zyngier
2021-03-24 16:25 ` Suzuki K Poulose
2021-03-24 16:25 ` Suzuki K Poulose
2021-03-24 16:30 ` Marc Zyngier
2021-03-24 16:30 ` Marc Zyngier
2021-03-24 17:06 ` Suzuki K Poulose
2021-03-24 17:06 ` Suzuki K Poulose
2021-03-24 17:19 ` Catalin Marinas
2021-03-24 17:19 ` Catalin Marinas
2021-03-24 17:40 ` Marc Zyngier
2021-03-24 17:40 ` Marc Zyngier
2021-03-26 16:31 ` Mathieu Poirier
2021-03-26 16:31 ` Mathieu Poirier
2021-03-23 12:06 ` [PATCH v5 06/19] arm64: Add TRBE definitions Suzuki K Poulose
2021-03-23 12:06 ` Suzuki K Poulose
2021-03-23 12:06 ` [PATCH v5 07/19] arm64: kvm: Enable access to TRBE support for host Suzuki K Poulose
2021-03-23 12:06 ` Suzuki K Poulose
2021-03-26 16:55 ` Mathieu Poirier
2021-03-26 16:55 ` Mathieu Poirier
2021-03-30 10:16 ` Marc Zyngier
2021-03-30 10:16 ` Marc Zyngier
2021-03-30 10:38 ` Suzuki K Poulose
2021-03-30 10:38 ` Suzuki K Poulose
2021-03-30 15:23 ` Mathieu Poirier
2021-03-30 15:23 ` Mathieu Poirier
2021-03-30 15:34 ` Marc Zyngier [this message]
2021-03-30 15:34 ` Marc Zyngier
2021-03-30 15:35 ` Greg KH
2021-03-30 15:35 ` Greg KH
2021-03-30 16:33 ` Mathieu Poirier
2021-03-30 16:33 ` Mathieu Poirier
2021-03-30 16:47 ` Greg KH
2021-03-30 16:47 ` Greg KH
2021-03-30 16:51 ` Mathieu Poirier
2021-03-30 16:51 ` Mathieu Poirier
2021-03-30 10:12 ` Marc Zyngier
2021-03-30 10:12 ` Marc Zyngier
2021-03-30 11:12 ` Suzuki K Poulose
2021-03-30 11:12 ` Suzuki K Poulose
2021-03-30 12:15 ` Marc Zyngier
2021-03-30 12:15 ` Marc Zyngier
2021-03-30 13:34 ` Suzuki K Poulose
2021-03-30 13:34 ` Suzuki K Poulose
2021-03-30 14:00 ` Marc Zyngier
2021-03-30 14:00 ` Marc Zyngier
2021-03-31 15:28 ` Alexandru Elisei
2021-03-31 15:28 ` Alexandru Elisei
2021-03-31 15:37 ` Marc Zyngier
2021-03-31 15:37 ` Marc Zyngier
2021-03-23 12:06 ` [PATCH v5 08/19] coresight: etm4x: Move ETM to prohibited region for disable Suzuki K Poulose
2021-03-23 12:06 ` Suzuki K Poulose
2021-03-23 12:06 ` [PATCH v5 09/19] coresight: etm-perf: Allow an event to use different sinks Suzuki K Poulose
2021-03-23 12:06 ` Suzuki K Poulose
2021-03-23 12:06 ` [PATCH v5 10/19] coresight: Do not scan for graph if none is present Suzuki K Poulose
2021-03-23 12:06 ` Suzuki K Poulose
2021-03-23 12:06 ` [PATCH v5 11/19] coresight: etm4x: Add support for PE OS lock Suzuki K Poulose
2021-03-23 12:06 ` Suzuki K Poulose
2021-03-23 12:06 ` [PATCH v5 12/19] coresight: ete: Add support for ETE tracing Suzuki K Poulose
2021-03-23 12:06 ` Suzuki K Poulose
2021-03-23 12:06 ` [PATCH v5 13/19] dts: bindings: Document device tree bindings for ETE Suzuki K Poulose
2021-03-23 12:06 ` Suzuki K Poulose
2021-03-23 22:46 ` Rob Herring
2021-03-23 22:46 ` Rob Herring
2021-03-23 12:06 ` [PATCH v5 14/19] coresight: etm-perf: Handle stale output handles Suzuki K Poulose
2021-03-23 12:06 ` Suzuki K Poulose
2021-03-23 12:06 ` [PATCH v5 15/19] coresight: core: Add support for dedicated percpu sinks Suzuki K Poulose
2021-03-23 12:06 ` Suzuki K Poulose
2021-03-23 12:06 ` [PATCH v5 16/19] coresight: sink: Add TRBE driver Suzuki K Poulose
2021-03-23 12:06 ` Suzuki K Poulose
2021-03-23 12:06 ` [PATCH v5 17/19] Documentation: coresight: trbe: Sysfs ABI description Suzuki K Poulose
2021-03-23 12:06 ` Suzuki K Poulose
2021-03-23 12:06 ` [PATCH v5 18/19] Documentation: trace: Add documentation for TRBE Suzuki K Poulose
2021-03-23 12:06 ` Suzuki K Poulose
2021-03-23 12:06 ` [PATCH v5 19/19] dts: bindings: Document device tree bindings for Arm TRBE Suzuki K Poulose
2021-03-23 12:06 ` Suzuki K Poulose
2021-03-23 16:33 ` (subset) [PATCH v5 00/19] coresight: Add support for ETE and TRBE Marc Zyngier
2021-03-23 16:33 ` Marc Zyngier
2021-03-23 16:34 ` Marc Zyngier
2021-03-23 16:34 ` Marc Zyngier
2021-03-23 17:05 ` Suzuki K Poulose
2021-03-23 17:05 ` Suzuki K Poulose
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