Re: TLB miss handler code

[Ed L Cashin <ecashin@uga.edu>]

"David S. Miller" <davem@redhat.com> writes:

> So, in nearly 3 days of this thread nobody has discovered
> the arch/sparc64/kernel/{itlb,dtlb}_*.S files yet.
>
> I find this particularly amusing :-)

It is funny, but I bet there are lurkers who know and aren't speaking
up.

Examining those files (although my sparc asm isn't good) it looks like
not all TLB misses go through do_sparc64_fault, which I suppose is
your point.  In fact, it looks like do_sparc64_fault gets invoked only
when the instruction causing the TLB miss is also causing a page
fault.  I had mistakenly assumed that (fault_code & FAULT_CODE_?TLB)
inside of do_sparc64_fault meant it was just a TLB miss.

Rather, if it's just a TLB miss, the fast handler itself takes care of
filling the TLB.  (I'm unfamiliar with the "retry" instruction, but
the comment says "Trap return".)  

I really do not understand how it is getting the pte so fast.  It
looks like it doesn't do any locking but just performs a couple quick
calculations to get the address of the pte.

Incidentally, why are those fast TLB-miss handlers in
arch/sparc64/kernel and not arch/sparc64/mm?

-- 
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