All of lore.kernel.org
 help / color / mirror / Atom feed
From: Gregory CLEMENT <gregory.clement@bootlin.com>
To: Miquel Raynal <miquel.raynal@bootlin.com>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org, Yan Markman <ymarkman@marvell.com>,
	Antoine Tenart <antoine.tenart@bootlin.com>,
	Grzegorz Jaszczyk <jaz@semihalf.com>,
	Maxime Chevallier <maxime.chevallier@bootlin.com>,
	Nadav Haklai <nadavh@marvell.com>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Stefan Chulski <stefanc@marvell.com>,
	Marcin Wojtas <mw@semihalf.com>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 00/21] Add new Marvell CN9130 SoC support
Date: Tue, 08 Oct 2019 14:25:44 +0200	[thread overview]
Message-ID: <87d0f7todz.fsf@FE-laptop> (raw)
In-Reply-To: <20191004142738.7370-1-miquel.raynal@bootlin.com>

Hi Miquel,

> Hello,
>
> This is a respin of the last remaining patchset needed to fully support
> Marvell CN9130 SoCs. The CN9130 is made of one AP807 and one internal
> CP115. There are three development boards that are made of this SoC:
> * CN9130-DB
> * CN9131-DB (with one additional modular CP115 compared to CN9130-DB)
> * CN9132-DB (with two additional modular CP115 compared to CN9130-DB)
>
> This series applies on top of v5.4-rc1 and works thanks to the
> previously merged following series:
> * CP110 COMPHY:
> https://patchwork.kernel.org/cover/11067647/
> * AP806 CPU clocks:
> https://patchwork.kernel.org/cover/11038577/
> * AP807 clocks:
> https://patchwork.kernel.org/cover/11076435/
> * CP115 pinctrl:
> http://patchwork.ozlabs.org/cover/1142107/
>
> As CP110 and CP115 (alternatively, AP806 and AP807) are very similar,
> we first reorganize DT files to create CP11x (and AP80x) generic
> files, before including them from the new specific CP110/CP115
> (AP806/AP807) ones.
>
> A few small improvements/fixes in these files are also carried.
>
> Thanks,
> Miquèl
>
> Changes since v1:
> =================
> * Rebased on top of v5.4-rc1.
> * Rob's Reviewed-by tag on the first bindings patch (03).
> * Used the AP_NAME macro instead of hardcoding ap806 in the DT which
>   turns generic (spotted by Gregory).
> * Converted Marvell SoC compatible bindings to yaml (patch 16) as
>   requested by Rob. Add Gregory as the file maintainer.
>
>
> Ben Peled (1):
>   dt-bindings: ap80x: replace AP806 with AP80x
>
> Grzegorz Jaszczyk (7):
>   arm64: dts: marvell: Add AP806-dual cache description
>   arm64: dts: marvell: Add AP806-quad cache description
>   arm64: dts: marvell: Add AP807-quad cache description
>   dt-bindings: marvell: Declare the CN913x SoC compatibles
>   arm64: dts: marvell: Add support for Marvell CN9130-DB
>   arm64: dts: marvell: Add support for Marvell CN9131-DB
>   arm64: dts: marvell: Add support for Marvell CN9132-DB
>
> Konstantin Porotchkin (1):
>   arm64: dts: marvell: Prepare the introduction of AP807 based SoCs
>
> Miquel Raynal (12):
>   arm64: dts: marvell: Enumerate the first AP806 syscon
>   arm64: dts: marvell: Add AP806-dual missing CPU clocks
>   MAINTAINERS: Add new Marvell CN9130-based files to track
>   arm64: dts: marvell: Move clocks to AP806 specific file
>   arm64: dts: marvell: Add support for AP807/AP807-quad
>   arm64: dts: marvell: Fix CP110 NAND controller node multi-line comment
>     alignment
>   arm64: dts: marvell: Prepare the introduction of CP115
>   arm64: dts: marvell: Drop PCIe I/O ranges from CP11x file
>   arm64: dts: marvell: Externalize PCIe macros from CP11x file
>   arm64: dts: marvell: Add support for CP115
>   dt-bindings: marvell: Convert the SoC compatibles description to YAML
>   arm64: dts: marvell: Add support for Marvell CN9130 SoC support


All series applied on mvebu/dt64

Thanks,

Gregory


>
>  ...roller.txt => ap80x-system-controller.txt} |  14 +-
>  .../bindings/arm/marvell/armada-7k-8k.txt     |  24 -
>  .../bindings/arm/marvell/armada-7k-8k.yaml    |  61 ++
>  MAINTAINERS                                   |   3 +-
>  arch/arm64/boot/dts/marvell/Makefile          |   3 +
>  arch/arm64/boot/dts/marvell/armada-70x0.dtsi  |  28 +-
>  .../boot/dts/marvell/armada-8040-mcbin.dtsi   |   3 +-
>  arch/arm64/boot/dts/marvell/armada-80x0.dtsi  |  56 +-
>  .../boot/dts/marvell/armada-ap806-dual.dtsi   |  23 +
>  .../boot/dts/marvell/armada-ap806-quad.dtsi   |  42 ++
>  arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 456 +-------------
>  .../boot/dts/marvell/armada-ap807-quad.dtsi   |  93 +++
>  arch/arm64/boot/dts/marvell/armada-ap807.dtsi |  29 +
>  arch/arm64/boot/dts/marvell/armada-ap80x.dtsi | 444 ++++++++++++++
>  .../arm64/boot/dts/marvell/armada-common.dtsi |   4 +-
>  arch/arm64/boot/dts/marvell/armada-cp110.dtsi | 575 +-----------------
>  arch/arm64/boot/dts/marvell/armada-cp115.dtsi |  12 +
>  arch/arm64/boot/dts/marvell/armada-cp11x.dtsi | 568 +++++++++++++++++
>  arch/arm64/boot/dts/marvell/cn9130-db.dts     | 403 ++++++++++++
>  arch/arm64/boot/dts/marvell/cn9130.dtsi       |  37 ++
>  arch/arm64/boot/dts/marvell/cn9131-db.dts     | 202 ++++++
>  arch/arm64/boot/dts/marvell/cn9132-db.dts     | 221 +++++++
>  22 files changed, 2210 insertions(+), 1091 deletions(-)
>  rename Documentation/devicetree/bindings/arm/marvell/{ap806-system-controller.txt => ap80x-system-controller.txt} (91%)
>  delete mode 100644 Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.txt
>  create mode 100644 Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml
>  create mode 100644 arch/arm64/boot/dts/marvell/armada-ap807-quad.dtsi
>  create mode 100644 arch/arm64/boot/dts/marvell/armada-ap807.dtsi
>  create mode 100644 arch/arm64/boot/dts/marvell/armada-ap80x.dtsi
>  create mode 100644 arch/arm64/boot/dts/marvell/armada-cp115.dtsi
>  create mode 100644 arch/arm64/boot/dts/marvell/armada-cp11x.dtsi
>  create mode 100644 arch/arm64/boot/dts/marvell/cn9130-db.dts
>  create mode 100644 arch/arm64/boot/dts/marvell/cn9130.dtsi
>  create mode 100644 arch/arm64/boot/dts/marvell/cn9131-db.dts
>  create mode 100644 arch/arm64/boot/dts/marvell/cn9132-db.dts
>
> -- 
> 2.20.1
>

-- 
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Gregory CLEMENT <gregory.clement@bootlin.com>
To: Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org, Yan Markman <ymarkman@marvell.com>,
	Antoine Tenart <antoine.tenart@bootlin.com>,
	Grzegorz Jaszczyk <jaz@semihalf.com>,
	Maxime Chevallier <maxime.chevallier@bootlin.com>,
	Nadav Haklai <nadavh@marvell.com>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Stefan Chulski <stefanc@marvell.com>,
	Marcin Wojtas <mw@semihalf.com>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 00/21] Add new Marvell CN9130 SoC support
Date: Tue, 08 Oct 2019 14:25:44 +0200	[thread overview]
Message-ID: <87d0f7todz.fsf@FE-laptop> (raw)
In-Reply-To: <20191004142738.7370-1-miquel.raynal@bootlin.com>

Hi Miquel,

> Hello,
>
> This is a respin of the last remaining patchset needed to fully support
> Marvell CN9130 SoCs. The CN9130 is made of one AP807 and one internal
> CP115. There are three development boards that are made of this SoC:
> * CN9130-DB
> * CN9131-DB (with one additional modular CP115 compared to CN9130-DB)
> * CN9132-DB (with two additional modular CP115 compared to CN9130-DB)
>
> This series applies on top of v5.4-rc1 and works thanks to the
> previously merged following series:
> * CP110 COMPHY:
> https://patchwork.kernel.org/cover/11067647/
> * AP806 CPU clocks:
> https://patchwork.kernel.org/cover/11038577/
> * AP807 clocks:
> https://patchwork.kernel.org/cover/11076435/
> * CP115 pinctrl:
> http://patchwork.ozlabs.org/cover/1142107/
>
> As CP110 and CP115 (alternatively, AP806 and AP807) are very similar,
> we first reorganize DT files to create CP11x (and AP80x) generic
> files, before including them from the new specific CP110/CP115
> (AP806/AP807) ones.
>
> A few small improvements/fixes in these files are also carried.
>
> Thanks,
> Miquèl
>
> Changes since v1:
> =================
> * Rebased on top of v5.4-rc1.
> * Rob's Reviewed-by tag on the first bindings patch (03).
> * Used the AP_NAME macro instead of hardcoding ap806 in the DT which
>   turns generic (spotted by Gregory).
> * Converted Marvell SoC compatible bindings to yaml (patch 16) as
>   requested by Rob. Add Gregory as the file maintainer.
>
>
> Ben Peled (1):
>   dt-bindings: ap80x: replace AP806 with AP80x
>
> Grzegorz Jaszczyk (7):
>   arm64: dts: marvell: Add AP806-dual cache description
>   arm64: dts: marvell: Add AP806-quad cache description
>   arm64: dts: marvell: Add AP807-quad cache description
>   dt-bindings: marvell: Declare the CN913x SoC compatibles
>   arm64: dts: marvell: Add support for Marvell CN9130-DB
>   arm64: dts: marvell: Add support for Marvell CN9131-DB
>   arm64: dts: marvell: Add support for Marvell CN9132-DB
>
> Konstantin Porotchkin (1):
>   arm64: dts: marvell: Prepare the introduction of AP807 based SoCs
>
> Miquel Raynal (12):
>   arm64: dts: marvell: Enumerate the first AP806 syscon
>   arm64: dts: marvell: Add AP806-dual missing CPU clocks
>   MAINTAINERS: Add new Marvell CN9130-based files to track
>   arm64: dts: marvell: Move clocks to AP806 specific file
>   arm64: dts: marvell: Add support for AP807/AP807-quad
>   arm64: dts: marvell: Fix CP110 NAND controller node multi-line comment
>     alignment
>   arm64: dts: marvell: Prepare the introduction of CP115
>   arm64: dts: marvell: Drop PCIe I/O ranges from CP11x file
>   arm64: dts: marvell: Externalize PCIe macros from CP11x file
>   arm64: dts: marvell: Add support for CP115
>   dt-bindings: marvell: Convert the SoC compatibles description to YAML
>   arm64: dts: marvell: Add support for Marvell CN9130 SoC support


All series applied on mvebu/dt64

Thanks,

Gregory


>
>  ...roller.txt => ap80x-system-controller.txt} |  14 +-
>  .../bindings/arm/marvell/armada-7k-8k.txt     |  24 -
>  .../bindings/arm/marvell/armada-7k-8k.yaml    |  61 ++
>  MAINTAINERS                                   |   3 +-
>  arch/arm64/boot/dts/marvell/Makefile          |   3 +
>  arch/arm64/boot/dts/marvell/armada-70x0.dtsi  |  28 +-
>  .../boot/dts/marvell/armada-8040-mcbin.dtsi   |   3 +-
>  arch/arm64/boot/dts/marvell/armada-80x0.dtsi  |  56 +-
>  .../boot/dts/marvell/armada-ap806-dual.dtsi   |  23 +
>  .../boot/dts/marvell/armada-ap806-quad.dtsi   |  42 ++
>  arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 456 +-------------
>  .../boot/dts/marvell/armada-ap807-quad.dtsi   |  93 +++
>  arch/arm64/boot/dts/marvell/armada-ap807.dtsi |  29 +
>  arch/arm64/boot/dts/marvell/armada-ap80x.dtsi | 444 ++++++++++++++
>  .../arm64/boot/dts/marvell/armada-common.dtsi |   4 +-
>  arch/arm64/boot/dts/marvell/armada-cp110.dtsi | 575 +-----------------
>  arch/arm64/boot/dts/marvell/armada-cp115.dtsi |  12 +
>  arch/arm64/boot/dts/marvell/armada-cp11x.dtsi | 568 +++++++++++++++++
>  arch/arm64/boot/dts/marvell/cn9130-db.dts     | 403 ++++++++++++
>  arch/arm64/boot/dts/marvell/cn9130.dtsi       |  37 ++
>  arch/arm64/boot/dts/marvell/cn9131-db.dts     | 202 ++++++
>  arch/arm64/boot/dts/marvell/cn9132-db.dts     | 221 +++++++
>  22 files changed, 2210 insertions(+), 1091 deletions(-)
>  rename Documentation/devicetree/bindings/arm/marvell/{ap806-system-controller.txt => ap80x-system-controller.txt} (91%)
>  delete mode 100644 Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.txt
>  create mode 100644 Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml
>  create mode 100644 arch/arm64/boot/dts/marvell/armada-ap807-quad.dtsi
>  create mode 100644 arch/arm64/boot/dts/marvell/armada-ap807.dtsi
>  create mode 100644 arch/arm64/boot/dts/marvell/armada-ap80x.dtsi
>  create mode 100644 arch/arm64/boot/dts/marvell/armada-cp115.dtsi
>  create mode 100644 arch/arm64/boot/dts/marvell/armada-cp11x.dtsi
>  create mode 100644 arch/arm64/boot/dts/marvell/cn9130-db.dts
>  create mode 100644 arch/arm64/boot/dts/marvell/cn9130.dtsi
>  create mode 100644 arch/arm64/boot/dts/marvell/cn9131-db.dts
>  create mode 100644 arch/arm64/boot/dts/marvell/cn9132-db.dts
>
> -- 
> 2.20.1
>

-- 
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2019-10-08 12:26 UTC|newest]

Thread overview: 49+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-04 14:27 [PATCH v2 00/21] Add new Marvell CN9130 SoC support Miquel Raynal
2019-10-04 14:27 ` [PATCH v2 01/21] arm64: dts: marvell: Enumerate the first AP806 syscon Miquel Raynal
2019-10-04 14:27   ` Miquel Raynal
2019-10-04 14:27 ` [PATCH v2 02/21] arm64: dts: marvell: Add AP806-dual missing CPU clocks Miquel Raynal
2019-10-04 14:27   ` Miquel Raynal
2019-10-04 14:27 ` [PATCH v2 03/21] dt-bindings: ap80x: replace AP806 with AP80x Miquel Raynal
2019-10-04 14:27   ` Miquel Raynal
2019-10-04 14:27 ` [PATCH v2 04/21] MAINTAINERS: Add new Marvell CN9130-based files to track Miquel Raynal
2019-10-04 14:27   ` Miquel Raynal
2019-10-04 14:27 ` [PATCH v2 05/21] arm64: dts: marvell: Prepare the introduction of AP807 based SoCs Miquel Raynal
2019-10-04 14:27   ` Miquel Raynal
2019-10-04 14:27 ` [PATCH v2 06/21] arm64: dts: marvell: Move clocks to AP806 specific file Miquel Raynal
2019-10-04 14:27   ` Miquel Raynal
2019-10-04 14:27 ` [PATCH v2 07/21] arm64: dts: marvell: Add support for AP807/AP807-quad Miquel Raynal
2019-10-04 14:27   ` Miquel Raynal
2019-10-04 14:27 ` [PATCH v2 08/21] arm64: dts: marvell: Add AP806-dual cache description Miquel Raynal
2019-10-04 14:27   ` Miquel Raynal
2019-10-04 14:27 ` [PATCH v2 09/21] arm64: dts: marvell: Add AP806-quad " Miquel Raynal
2019-10-04 14:27   ` Miquel Raynal
2019-10-04 14:27 ` [PATCH v2 10/21] arm64: dts: marvell: Add AP807-quad " Miquel Raynal
2019-10-04 14:27   ` Miquel Raynal
2019-10-04 14:27 ` [PATCH v2 11/21] arm64: dts: marvell: Fix CP110 NAND controller node multi-line comment alignment Miquel Raynal
2019-10-04 14:27   ` Miquel Raynal
2019-10-04 14:27 ` [PATCH v2 12/21] arm64: dts: marvell: Prepare the introduction of CP115 Miquel Raynal
2019-10-04 14:27   ` Miquel Raynal
2019-10-04 14:27 ` [PATCH v2 13/21] arm64: dts: marvell: Drop PCIe I/O ranges from CP11x file Miquel Raynal
2019-10-04 14:27   ` Miquel Raynal
2019-10-04 14:27 ` [PATCH v2 14/21] arm64: dts: marvell: Externalize PCIe macros " Miquel Raynal
2019-10-04 14:27   ` Miquel Raynal
2019-10-04 14:27 ` [PATCH v2 15/21] arm64: dts: marvell: Add support for CP115 Miquel Raynal
2019-10-04 14:27   ` Miquel Raynal
2019-10-04 14:27 ` [PATCH v2 16/21] dt-bindings: marvell: Convert the SoC compatibles description to YAML Miquel Raynal
2019-10-04 14:27   ` Miquel Raynal
2019-10-04 16:13   ` Rob Herring
2019-10-04 16:13     ` Rob Herring
2019-10-04 14:27 ` [PATCH v2 17/21] dt-bindings: marvell: Declare the CN913x SoC compatibles Miquel Raynal
2019-10-04 14:27   ` Miquel Raynal
2019-10-04 16:14   ` Rob Herring
2019-10-04 16:14     ` Rob Herring
2019-10-04 14:27 ` [PATCH v2 18/21] arm64: dts: marvell: Add support for Marvell CN9130 SoC support Miquel Raynal
2019-10-04 14:27   ` Miquel Raynal
2019-10-04 14:27 ` [PATCH v2 19/21] arm64: dts: marvell: Add support for Marvell CN9130-DB Miquel Raynal
2019-10-04 14:27   ` Miquel Raynal
2019-10-04 14:27 ` [PATCH v2 20/21] arm64: dts: marvell: Add support for Marvell CN9131-DB Miquel Raynal
2019-10-04 14:27   ` Miquel Raynal
2019-10-04 14:27 ` [PATCH v2 21/21] arm64: dts: marvell: Add support for Marvell CN9132-DB Miquel Raynal
2019-10-04 14:27   ` Miquel Raynal
2019-10-08 12:25 ` Gregory CLEMENT [this message]
2019-10-08 12:25   ` [PATCH v2 00/21] Add new Marvell CN9130 SoC support Gregory CLEMENT

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=87d0f7todz.fsf@FE-laptop \
    --to=gregory.clement@bootlin.com \
    --cc=antoine.tenart@bootlin.com \
    --cc=devicetree@vger.kernel.org \
    --cc=jaz@semihalf.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=mark.rutland@arm.com \
    --cc=maxime.chevallier@bootlin.com \
    --cc=miquel.raynal@bootlin.com \
    --cc=mw@semihalf.com \
    --cc=nadavh@marvell.com \
    --cc=robh+dt@kernel.org \
    --cc=stefanc@marvell.com \
    --cc=thomas.petazzoni@bootlin.com \
    --cc=ymarkman@marvell.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.