From: Felipe Balbi <balbi-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
To: Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>,
William Wu <william.wu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
Cc: gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org,
linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
briannorris-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org,
dianders-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org,
kever.yang-TNX95d0MmH7DzftRWevZcw@public.gmane.org,
huangtao-TNX95d0MmH7DzftRWevZcw@public.gmane.org,
frank.wang-TNX95d0MmH7DzftRWevZcw@public.gmane.org,
eddie.cai-TNX95d0MmH7DzftRWevZcw@public.gmane.org,
John.Youn-HKixBCOQz3hWk0Htik3J/w@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-usb-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
sergei.shtylyov-M4DtvfQ/ZS1MRgGoP+s0PdBPR1lH4CV8@public.gmane.org,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
mark.rutland-5wv7dgnIgG8@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH v6 3/5] usb: dwc3: add phyif_utmi_quirk
Date: Fri, 08 Jul 2016 16:29:44 +0300 [thread overview]
Message-ID: <87d1moi7g7.fsf@linux.intel.com> (raw)
In-Reply-To: <2213342.0Nx5tnEW8p@phil>
[-- Attachment #1: Type: text/plain, Size: 4819 bytes --]
Hi,
Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org> writes:
> Am Donnerstag, 7. Juli 2016, 10:54:24 schrieb William Wu:
>> Add a quirk to configure the core to support the
>> UTMI+ PHY with an 8- or 16-bit interface. UTMI+ PHY
>> interface is hardware property, and it's platform
>> dependent. Normall, the PHYIf can be configured
>> during coreconsultant. But for some specific usb
>> cores(e.g. rk3399 soc dwc3), the default PHYIf
>> configuration value is fault, so we need to
>> reconfigure it by software.
>>
>> And refer to the dwc3 databook, the GUSB2PHYCFG.USBTRDTIM
>> must be set to the corresponding value according to
>> the UTMI+ PHY interface.
>>
>> Signed-off-by: William Wu <william.wu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
>> ---
> [...]
>> diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt
>> b/Documentation/devicetree/bindings/usb/dwc3.txt index 020b0e9..8d7317d
>> 100644
>> --- a/Documentation/devicetree/bindings/usb/dwc3.txt
>> +++ b/Documentation/devicetree/bindings/usb/dwc3.txt
>> @@ -42,6 +42,10 @@ Optional properties:
>> - snps,dis-u2-freeclk-exists-quirk: when set, clear the
>> u2_freeclk_exists in GUSB2PHYCFG, specify that USB2 PHY doesn't provide
>> a free-running PHY clock.
>> + - snps,phyif-utmi-quirk: when set core will set phyif UTMI+ interface.
>> + - snps,phyif-utmi: the value to configure the core to support a UTMI+
>> PHY + with an 8- or 16-bit interface. Value 0 select 8-bit
>> + interface, value 1 select 16-bit interface.
>
> maybe
> snps,phyif-utmi-width = <8> or <16>;
>
> devicetree is about describing the hardware, not the things that get written
> to registers :-) . The conversion from the described width to the register
> value can easily be done in the driver.
>
>
> Also I don't think you need two properties for this. If the snps,phyif-utmi
> property is specified it indicates that you want to manually set the width
> and if it is absent you want to use the IC default. All functions reading
> property-values indicate if the property is missing.
>
> But it looks like there is already a precendence in
> snps,tx_de_emphasis(_quirk), so maybe Felipe has a different opinion here?
>
>
>
>> - snps,is-utmi-l1-suspend: true when DWC3 asserts output signal
>> utmi_l1_suspend_n, false when asserts utmi_sleep_n
>> - snps,hird-threshold: HIRD threshold
>> diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
>> index 0b7bfd2..94036b1 100644
>> --- a/drivers/usb/dwc3/core.c
>> +++ b/drivers/usb/dwc3/core.c
>> @@ -408,6 +408,7 @@ static void dwc3_cache_hwparams(struct dwc3 *dwc)
>> static int dwc3_phy_setup(struct dwc3 *dwc)
>> {
>> u32 reg;
>> + u32 usbtrdtim;
>> int ret;
>>
>> reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0));
>> @@ -503,6 +504,15 @@ static int dwc3_phy_setup(struct dwc3 *dwc)
>> if (dwc->dis_u2_freeclk_exists_quirk)
>> reg &= ~DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS;
>>
>> + if (dwc->phyif_utmi_quirk) {
>> + reg &= ~(DWC3_GUSB2PHYCFG_PHYIF_MASK |
>> + DWC3_GUSB2PHYCFG_USBTRDTIM_MASK);
>> + usbtrdtim = dwc->phyif_utmi ? USBTRDTIM_UTMI_16_BIT :
>> + USBTRDTIM_UTMI_8_BIT;
>> + reg |= DWC3_GUSB2PHYCFG_PHYIF(dwc->phyif_utmi) |
>> + DWC3_GUSB2PHYCFG_USBTRDTIM(usbtrdtim);
>> + }
>> +
>> dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
>>
>> return 0;
>> @@ -834,6 +844,7 @@ static int dwc3_probe(struct platform_device *pdev)
>> struct resource *res;
>> struct dwc3 *dwc;
>> u8 lpm_nyet_threshold;
>> + u8 phyif_utmi;
>> u8 tx_de_emphasis;
>> u8 hird_threshold;
>>
>> @@ -880,6 +891,9 @@ static int dwc3_probe(struct platform_device *pdev)
>> /* default to highest possible threshold */
>> lpm_nyet_threshold = 0xff;
>>
>> + /* default to UTMI+ 8-bit interface */
>> + phyif_utmi = 0;
>> +
>> /* default to -3.5dB de-emphasis */
>> tx_de_emphasis = 1;
>>
>> @@ -929,6 +943,10 @@ static int dwc3_probe(struct platform_device *pdev)
>> "snps,dis_rxdet_inp3_quirk");
>> dwc->dis_u2_freeclk_exists_quirk = device_property_read_bool(dev,
>> "snps,dis-u2-freeclk-exists-quirk");
>> + dwc->phyif_utmi_quirk = device_property_read_bool(dev,
>> + "snps,phyif-utmi-quirk");
>> + device_property_read_u8(dev, "snps,phyif-utmi",
>> + &phyif_utmi);
>
>
> As described above device_property_read_u8 will return an error if the
> property is not present, so you could fill your dwc->phyif_utmi_quirk from
> that:
>
> ret = device_property_read_u8(dev, "snps,phyif-utmi",
> &phyif_utmi);
> dwc->phyif_utmi_quirk = (ret == 0) ? true : false;
I like this much better :-) Unfortunately can't fix tx_deemphasis due to
backwards compatibility :-s
--
balbi
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WARNING: multiple messages have this Message-ID (diff)
From: Felipe Balbi <balbi@kernel.org>
To: Heiko Stuebner <heiko@sntech.de>, William Wu <william.wu@rock-chips.com>
Cc: gregkh@linuxfoundation.org, linux-rockchip@lists.infradead.org,
briannorris@google.com, dianders@google.com,
kever.yang@rock-chips.com, huangtao@rock-chips.com,
frank.wang@rock-chips.com, eddie.cai@rock-chips.com,
John.Youn@synopsys.com, linux-kernel@vger.kernel.org,
linux-usb@vger.kernel.org, sergei.shtylyov@cogentembedded.com,
robh+dt@kernel.org, mark.rutland@arm.com,
devicetree@vger.kernel.org
Subject: Re: [PATCH v6 3/5] usb: dwc3: add phyif_utmi_quirk
Date: Fri, 08 Jul 2016 16:29:44 +0300 [thread overview]
Message-ID: <87d1moi7g7.fsf@linux.intel.com> (raw)
In-Reply-To: <2213342.0Nx5tnEW8p@phil>
[-- Attachment #1: Type: text/plain, Size: 4764 bytes --]
Hi,
Heiko Stuebner <heiko@sntech.de> writes:
> Am Donnerstag, 7. Juli 2016, 10:54:24 schrieb William Wu:
>> Add a quirk to configure the core to support the
>> UTMI+ PHY with an 8- or 16-bit interface. UTMI+ PHY
>> interface is hardware property, and it's platform
>> dependent. Normall, the PHYIf can be configured
>> during coreconsultant. But for some specific usb
>> cores(e.g. rk3399 soc dwc3), the default PHYIf
>> configuration value is fault, so we need to
>> reconfigure it by software.
>>
>> And refer to the dwc3 databook, the GUSB2PHYCFG.USBTRDTIM
>> must be set to the corresponding value according to
>> the UTMI+ PHY interface.
>>
>> Signed-off-by: William Wu <william.wu@rock-chips.com>
>> ---
> [...]
>> diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt
>> b/Documentation/devicetree/bindings/usb/dwc3.txt index 020b0e9..8d7317d
>> 100644
>> --- a/Documentation/devicetree/bindings/usb/dwc3.txt
>> +++ b/Documentation/devicetree/bindings/usb/dwc3.txt
>> @@ -42,6 +42,10 @@ Optional properties:
>> - snps,dis-u2-freeclk-exists-quirk: when set, clear the
>> u2_freeclk_exists in GUSB2PHYCFG, specify that USB2 PHY doesn't provide
>> a free-running PHY clock.
>> + - snps,phyif-utmi-quirk: when set core will set phyif UTMI+ interface.
>> + - snps,phyif-utmi: the value to configure the core to support a UTMI+
>> PHY + with an 8- or 16-bit interface. Value 0 select 8-bit
>> + interface, value 1 select 16-bit interface.
>
> maybe
> snps,phyif-utmi-width = <8> or <16>;
>
> devicetree is about describing the hardware, not the things that get written
> to registers :-) . The conversion from the described width to the register
> value can easily be done in the driver.
>
>
> Also I don't think you need two properties for this. If the snps,phyif-utmi
> property is specified it indicates that you want to manually set the width
> and if it is absent you want to use the IC default. All functions reading
> property-values indicate if the property is missing.
>
> But it looks like there is already a precendence in
> snps,tx_de_emphasis(_quirk), so maybe Felipe has a different opinion here?
>
>
>
>> - snps,is-utmi-l1-suspend: true when DWC3 asserts output signal
>> utmi_l1_suspend_n, false when asserts utmi_sleep_n
>> - snps,hird-threshold: HIRD threshold
>> diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
>> index 0b7bfd2..94036b1 100644
>> --- a/drivers/usb/dwc3/core.c
>> +++ b/drivers/usb/dwc3/core.c
>> @@ -408,6 +408,7 @@ static void dwc3_cache_hwparams(struct dwc3 *dwc)
>> static int dwc3_phy_setup(struct dwc3 *dwc)
>> {
>> u32 reg;
>> + u32 usbtrdtim;
>> int ret;
>>
>> reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0));
>> @@ -503,6 +504,15 @@ static int dwc3_phy_setup(struct dwc3 *dwc)
>> if (dwc->dis_u2_freeclk_exists_quirk)
>> reg &= ~DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS;
>>
>> + if (dwc->phyif_utmi_quirk) {
>> + reg &= ~(DWC3_GUSB2PHYCFG_PHYIF_MASK |
>> + DWC3_GUSB2PHYCFG_USBTRDTIM_MASK);
>> + usbtrdtim = dwc->phyif_utmi ? USBTRDTIM_UTMI_16_BIT :
>> + USBTRDTIM_UTMI_8_BIT;
>> + reg |= DWC3_GUSB2PHYCFG_PHYIF(dwc->phyif_utmi) |
>> + DWC3_GUSB2PHYCFG_USBTRDTIM(usbtrdtim);
>> + }
>> +
>> dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
>>
>> return 0;
>> @@ -834,6 +844,7 @@ static int dwc3_probe(struct platform_device *pdev)
>> struct resource *res;
>> struct dwc3 *dwc;
>> u8 lpm_nyet_threshold;
>> + u8 phyif_utmi;
>> u8 tx_de_emphasis;
>> u8 hird_threshold;
>>
>> @@ -880,6 +891,9 @@ static int dwc3_probe(struct platform_device *pdev)
>> /* default to highest possible threshold */
>> lpm_nyet_threshold = 0xff;
>>
>> + /* default to UTMI+ 8-bit interface */
>> + phyif_utmi = 0;
>> +
>> /* default to -3.5dB de-emphasis */
>> tx_de_emphasis = 1;
>>
>> @@ -929,6 +943,10 @@ static int dwc3_probe(struct platform_device *pdev)
>> "snps,dis_rxdet_inp3_quirk");
>> dwc->dis_u2_freeclk_exists_quirk = device_property_read_bool(dev,
>> "snps,dis-u2-freeclk-exists-quirk");
>> + dwc->phyif_utmi_quirk = device_property_read_bool(dev,
>> + "snps,phyif-utmi-quirk");
>> + device_property_read_u8(dev, "snps,phyif-utmi",
>> + &phyif_utmi);
>
>
> As described above device_property_read_u8 will return an error if the
> property is not present, so you could fill your dwc->phyif_utmi_quirk from
> that:
>
> ret = device_property_read_u8(dev, "snps,phyif-utmi",
> &phyif_utmi);
> dwc->phyif_utmi_quirk = (ret == 0) ? true : false;
I like this much better :-) Unfortunately can't fix tx_deemphasis due to
backwards compatibility :-s
--
balbi
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next prev parent reply other threads:[~2016-07-08 13:29 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-07 2:54 [PATCH v6 0/5] support rockchip dwc3 driver William Wu
[not found] ` <1467860066-15142-1-git-send-email-william.wu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2016-07-07 2:54 ` [PATCH v6 1/5] usb: dwc3: of-simple: add compatible for rockchip rk3399 William Wu
2016-07-07 2:54 ` William Wu
2016-07-07 2:54 ` [PATCH v6 2/5] usb: dwc3: add dis_u2_freeclk_exists_quirk William Wu
2016-07-07 2:54 ` William Wu
2016-07-11 14:47 ` Rob Herring
2016-07-07 2:54 ` [PATCH v6 3/5] usb: dwc3: add phyif_utmi_quirk William Wu
2016-07-07 2:54 ` William Wu
[not found] ` <1467860066-15142-4-git-send-email-william.wu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2016-07-08 12:33 ` Heiko Stuebner
2016-07-08 12:33 ` Heiko Stuebner
2016-07-08 13:29 ` Felipe Balbi [this message]
2016-07-08 13:29 ` Felipe Balbi
2016-07-09 3:38 ` William.wu
[not found] ` <f5daa697-3125-cfbf-7318-d4900f666362-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2016-07-09 23:47 ` Heiko Stuebner
2016-07-09 23:47 ` Heiko Stuebner
2016-07-13 3:21 ` William.wu
2016-07-13 3:21 ` William.wu
2016-07-11 14:54 ` Rob Herring
2016-07-13 3:39 ` William.wu
2016-07-13 3:39 ` William.wu
2016-07-11 14:58 ` Rob Herring
2016-07-11 14:58 ` Rob Herring
2016-07-13 4:02 ` William.wu
2016-07-13 4:02 ` William.wu
2016-07-07 2:54 ` [PATCH v6 4/5] usb: dwc3: add dis_del_phy_power_chg_quirk William Wu
2016-07-07 2:54 ` William Wu
2016-07-11 15:11 ` Rob Herring
2016-07-07 2:58 ` [PATCH v6 5/5] usb: dwc3: rockchip: add devicetree bindings documentation William Wu
2016-07-07 2:58 ` William Wu
[not found] ` <1467860324-15341-1-git-send-email-william.wu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2016-07-11 15:13 ` Rob Herring
2016-07-11 15:13 ` Rob Herring
2016-07-13 4:05 ` William.wu
2016-07-13 4:05 ` William.wu
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