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From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Cheng Ming Lin <linchengming884@gmail.com>
Cc: Tudor Ambarus <tudor.ambarus@linaro.org>,
	 Pratyush Yadav <pratyush@kernel.org>,
	 Michael Walle <mwalle@kernel.org>,
	 Richard Weinberger <richard@nod.at>,
	 Vignesh Raghavendra <vigneshr@ti.com>,
	Jakub Czapiga <czapiga@google.com>,
	 linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org,
	 alvinzhou@mxic.com.tw,
	 Cheng Ming Lin <chengminglin@mxic.com.tw>
Subject: Re: [PATCH] mtd: spi-nor: core: Fix false positive in Read CR capability check
Date: Tue, 24 Feb 2026 09:24:15 +0100	[thread overview]
Message-ID: <87ecmar1lc.fsf@bootlin.com> (raw)
In-Reply-To: <20260224025550.1102660-1-linchengming884@gmail.com> (Cheng Ming Lin's message of "Tue, 24 Feb 2026 10:55:50 +0800")

Hi Cheng Ming,

On 24/02/2026 at 10:55:50 +08, Cheng Ming Lin <linchengming884@gmail.com> wrote:

> From: Cheng Ming Lin <chengminglin@mxic.com.tw>
>
> The current code uses spi_nor_spimem_check_op() to check if the SPI
> controller supports the Read CR operation. However, this leads to a
> false positive where capable controllers are wrongly flagged with
> SNOR_F_NO_READ_CR.
>
> SPI_NOR_RDCR_OP defines an operation without an address phase
> (addr.nbytes = 0, addr.buswidth = 0). When this operation is passed
> to spi_nor_spimem_check_op(), the function overwrites op->addr.nbytes
> to 3 or 4 to test addressing capabilities (as it was originally designed
> for data read/write ops).
>
> This modified operation is then rejected by spi_mem_check_op() in the
> core spi-mem.c because it has a non-zero address length but a zero address
> buswidth, which is an invalid combination.
>
> Fix this by bypassing spi_nor_spimem_check_op() for register operations.
> Instead, directly call spi_mem_supports_op() to test the exact operation
> without altering its address phase.
>
> Fixes: 5008c3ec3f89 ("mtd: spi-nor: core: Check read CR support")
> Signed-off-by: Cheng Ming Lin <chengminglin@mxic.com.tw>

That is indeed a problem, I already sent a patch for that but there is a
bit of turnover in the spi-nor team. It hasn't been acked so I didn't
took it through the final MR. The problem now exists in 7.0-rc1, see:

https://lore.kernel.org/linux-mtd/20260108121430.1096844-1-miquel.raynal@bootlin.com/

> ---
>  drivers/mtd/spi-nor/core.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
> index 8ffeb41c3e08..13201908a69f 100644
> --- a/drivers/mtd/spi-nor/core.c
> +++ b/drivers/mtd/spi-nor/core.c
> @@ -2466,7 +2466,7 @@ spi_nor_spimem_adjust_hwcaps(struct spi_nor *nor, u32 *hwcaps)
>  
>  		spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);
>  
> -		if (spi_nor_spimem_check_op(nor, &op))
> +		if (!spi_mem_supports_op(nor->spimem, &op))
>  			nor->flags |= SNOR_F_NO_READ_CR;
>  	}
>  }

______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

WARNING: multiple messages have this Message-ID (diff)
From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Cheng Ming Lin <linchengming884@gmail.com>
Cc: Tudor Ambarus <tudor.ambarus@linaro.org>,
	 Pratyush Yadav <pratyush@kernel.org>,
	 Michael Walle <mwalle@kernel.org>,
	 Richard Weinberger <richard@nod.at>,
	 Vignesh Raghavendra <vigneshr@ti.com>,
	Jakub Czapiga <czapiga@google.com>,
	 linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org,
	 alvinzhou@mxic.com.tw,
	 Cheng Ming Lin <chengminglin@mxic.com.tw>
Subject: Re: [PATCH] mtd: spi-nor: core: Fix false positive in Read CR capability check
Date: Tue, 24 Feb 2026 09:24:15 +0100	[thread overview]
Message-ID: <87ecmar1lc.fsf@bootlin.com> (raw)
In-Reply-To: <20260224025550.1102660-1-linchengming884@gmail.com> (Cheng Ming Lin's message of "Tue, 24 Feb 2026 10:55:50 +0800")

Hi Cheng Ming,

On 24/02/2026 at 10:55:50 +08, Cheng Ming Lin <linchengming884@gmail.com> wrote:

> From: Cheng Ming Lin <chengminglin@mxic.com.tw>
>
> The current code uses spi_nor_spimem_check_op() to check if the SPI
> controller supports the Read CR operation. However, this leads to a
> false positive where capable controllers are wrongly flagged with
> SNOR_F_NO_READ_CR.
>
> SPI_NOR_RDCR_OP defines an operation without an address phase
> (addr.nbytes = 0, addr.buswidth = 0). When this operation is passed
> to spi_nor_spimem_check_op(), the function overwrites op->addr.nbytes
> to 3 or 4 to test addressing capabilities (as it was originally designed
> for data read/write ops).
>
> This modified operation is then rejected by spi_mem_check_op() in the
> core spi-mem.c because it has a non-zero address length but a zero address
> buswidth, which is an invalid combination.
>
> Fix this by bypassing spi_nor_spimem_check_op() for register operations.
> Instead, directly call spi_mem_supports_op() to test the exact operation
> without altering its address phase.
>
> Fixes: 5008c3ec3f89 ("mtd: spi-nor: core: Check read CR support")
> Signed-off-by: Cheng Ming Lin <chengminglin@mxic.com.tw>

That is indeed a problem, I already sent a patch for that but there is a
bit of turnover in the spi-nor team. It hasn't been acked so I didn't
took it through the final MR. The problem now exists in 7.0-rc1, see:

https://lore.kernel.org/linux-mtd/20260108121430.1096844-1-miquel.raynal@bootlin.com/

> ---
>  drivers/mtd/spi-nor/core.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
> index 8ffeb41c3e08..13201908a69f 100644
> --- a/drivers/mtd/spi-nor/core.c
> +++ b/drivers/mtd/spi-nor/core.c
> @@ -2466,7 +2466,7 @@ spi_nor_spimem_adjust_hwcaps(struct spi_nor *nor, u32 *hwcaps)
>  
>  		spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);
>  
> -		if (spi_nor_spimem_check_op(nor, &op))
> +		if (!spi_mem_supports_op(nor->spimem, &op))
>  			nor->flags |= SNOR_F_NO_READ_CR;
>  	}
>  }

  reply	other threads:[~2026-02-24  8:24 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-24  2:55 [PATCH] mtd: spi-nor: core: Fix false positive in Read CR capability check Cheng Ming Lin
2026-02-24  2:55 ` Cheng Ming Lin
2026-02-24  8:24 ` Miquel Raynal [this message]
2026-02-24  8:24   ` Miquel Raynal
2026-02-24  8:32   ` Cheng Ming Lin
2026-02-24  8:32     ` Cheng Ming Lin

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