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From: Thomas Gleixner <tglx@linutronix.de>
To: Xianwei Zhao via B4 Relay
	<devnull+xianwei.zhao.amlogic.com@kernel.org>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Neil Armstrong <neil.armstrong@linaro.org>,
	Kevin Hilman <khilman@baylibre.com>,
	Jerome Brunet <jbrunet@baylibre.com>,
	Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
	Heiner Kallweit <hkallweit1@gmail.com>
Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-amlogic@lists.infradead.org,
	Xianwei Zhao <xianwei.zhao@amlogic.com>
Subject: Re: [PATCH v4 2/4] irqchip: Add support for Amlogic A4 and A5 SoCs
Date: Mon, 10 Mar 2025 18:58:53 +0100	[thread overview]
Message-ID: <87ecz422ea.ffs@tglx> (raw)
In-Reply-To: <20250307-irqchip-gpio-a4-a5-v4-2-d03a9424151b@amlogic.com>

On Fri, Mar 07 2025 at 16:49, Xianwei Zhao via wrote:
>  
>  	if (type == IRQ_TYPE_EDGE_BOTH) {
>  		val |= BIT(ctl->params->edge_both_offset + idx);

Not new, but this really should be 'val = ...'

> -		meson_gpio_irq_update_bits(ctl, REG_EDGE_POL_S4,
> +		meson_gpio_irq_update_bits(ctl, params->edge_pol_reg,
>  					   BIT(ctl->params->edge_both_offset + idx), val);

and this BIT() calculation is obviously redundant as it is the same as @val.

Would be nice to have that cleaned up.

With that fixed:

Reviewed-by: Thomas Gleixner <tglx@linutronix.de>

_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic

WARNING: multiple messages have this Message-ID (diff)
From: Thomas Gleixner <tglx@linutronix.de>
To: Xianwei Zhao via B4 Relay
	<devnull+xianwei.zhao.amlogic.com@kernel.org>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Neil Armstrong <neil.armstrong@linaro.org>,
	Kevin Hilman <khilman@baylibre.com>,
	Jerome Brunet <jbrunet@baylibre.com>,
	Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
	Heiner Kallweit <hkallweit1@gmail.com>
Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-amlogic@lists.infradead.org,
	Xianwei Zhao <xianwei.zhao@amlogic.com>
Subject: Re: [PATCH v4 2/4] irqchip: Add support for Amlogic A4 and A5 SoCs
Date: Mon, 10 Mar 2025 18:58:53 +0100	[thread overview]
Message-ID: <87ecz422ea.ffs@tglx> (raw)
In-Reply-To: <20250307-irqchip-gpio-a4-a5-v4-2-d03a9424151b@amlogic.com>

On Fri, Mar 07 2025 at 16:49, Xianwei Zhao via wrote:
>  
>  	if (type == IRQ_TYPE_EDGE_BOTH) {
>  		val |= BIT(ctl->params->edge_both_offset + idx);

Not new, but this really should be 'val = ...'

> -		meson_gpio_irq_update_bits(ctl, REG_EDGE_POL_S4,
> +		meson_gpio_irq_update_bits(ctl, params->edge_pol_reg,
>  					   BIT(ctl->params->edge_both_offset + idx), val);

and this BIT() calculation is obviously redundant as it is the same as @val.

Would be nice to have that cleaned up.

With that fixed:

Reviewed-by: Thomas Gleixner <tglx@linutronix.de>


  reply	other threads:[~2025-03-10 18:00 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-07  8:49 [PATCH v4 0/4] Add GPIO interrupt support for Amlogic A4 and A5 SoCs Xianwei Zhao
2025-03-07  8:49 ` Xianwei Zhao via B4 Relay
2025-03-07  8:49 ` Xianwei Zhao via B4 Relay
2025-03-07  8:49 ` [PATCH v4 1/4] dt-bindings: interrupt-controller: Add " Xianwei Zhao
2025-03-07  8:49   ` Xianwei Zhao via B4 Relay
2025-03-07  8:49   ` Xianwei Zhao via B4 Relay
2025-03-07 15:37   ` Conor Dooley
2025-03-07 15:37     ` Conor Dooley
2025-03-07  8:49 ` [PATCH v4 2/4] irqchip: " Xianwei Zhao
2025-03-07  8:49   ` Xianwei Zhao via B4 Relay
2025-03-07  8:49   ` Xianwei Zhao via B4 Relay
2025-03-10 17:58   ` Thomas Gleixner [this message]
2025-03-10 17:58     ` Thomas Gleixner
2025-03-07  8:49 ` [PATCH v4 3/4] arm64: dts: Add gpio_intc node for Amlogic A4 SoCs Xianwei Zhao
2025-03-07  8:49   ` Xianwei Zhao via B4 Relay
2025-03-07  8:49   ` Xianwei Zhao via B4 Relay
2025-03-07  8:49 ` [PATCH v4 4/4] arm64: dts: Add gpio_intc node for Amlogic A5 SoCs Xianwei Zhao
2025-03-07  8:49   ` Xianwei Zhao via B4 Relay
2025-03-07  8:49   ` Xianwei Zhao via B4 Relay
2025-03-10 17:56 ` [PATCH v4 0/4] Add GPIO interrupt support for Amlogic A4 and " Thomas Gleixner
2025-03-10 17:56   ` Thomas Gleixner
2025-03-17  7:34   ` Neil Armstrong
2025-03-17  7:34     ` Neil Armstrong

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