From: Jani Nikula <jani.nikula@intel.com>
To: kernel test robot <lkp@intel.com>, dri-devel@lists.freedesktop.org
Cc: kbuild-all@lists.01.org, Leo Li <sunpeng.li@amd.com>,
intel-gfx@lists.freedesktop.org,
Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>,
amd-gfx@lists.freedesktop.org,
Harry Wentland <harry.wentland@amd.com>,
ville.syrjala@linux.intel.com
Subject: Re: [Intel-gfx] [PATCH v2 03/11] drm/edid: slightly restructure timing and non-timing descriptor structs
Date: Mon, 28 Mar 2022 16:20:44 +0300 [thread overview]
Message-ID: <87ee2mdxhv.fsf@intel.com> (raw)
In-Reply-To: <202203281926.AthxJpnK-lkp@intel.com>
I think I'm just going to revert back to my original plan of leaving the
struct restructuring to another time in the future.
BR,
Jani.
On Mon, 28 Mar 2022, kernel test robot <lkp@intel.com> wrote:
> Hi Jani,
>
> I love your patch! Perhaps something to improve:
>
> [auto build test WARNING on drm/drm-next]
> [also build test WARNING on drm-intel/for-linux-next drm-tip/drm-tip v5.17 next-20220328]
> [If your patch is applied to the wrong git tree, kindly drop us a note.
> And when submitting patch, we suggest to use '--base' as documented in
> https://git-scm.com/docs/git-format-patch]
>
> url: https://github.com/intel-lab-lkp/linux/commits/Jani-Nikula/drm-edid-constify-EDID-parsing-with-some-fixes/20220328-171858
> base: git://anongit.freedesktop.org/drm/drm drm-next
> config: x86_64-randconfig-a003-20220328 (https://download.01.org/0day-ci/archive/20220328/202203281926.AthxJpnK-lkp@intel.com/config)
> compiler: gcc-9 (Ubuntu 9.4.0-1ubuntu1~20.04.1) 9.4.0
> reproduce (this is a W=1 build):
> # https://github.com/intel-lab-lkp/linux/commit/f538c9296c54ce8f878432153584a68939ffc111
> git remote add linux-review https://github.com/intel-lab-lkp/linux
> git fetch --no-tags linux-review Jani-Nikula/drm-edid-constify-EDID-parsing-with-some-fixes/20220328-171858
> git checkout f538c9296c54ce8f878432153584a68939ffc111
> # save the config file to linux build tree
> mkdir build_dir
> make W=1 O=build_dir ARCH=x86_64 SHELL=/bin/bash drivers/gpu/drm/tiny/
>
> If you fix the issue, kindly add following tag as appropriate
> Reported-by: kernel test robot <lkp@intel.com>
>
> All warnings (new ones prefixed by >>):
>
> drivers/gpu/drm/tiny/gm12u320.c:478:4: error: 'struct detailed_timing' has no member named 'pixel_clock'
> 478 | .pixel_clock = 3383,
> | ^~~~~~~~~~~
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
> 464 | static struct edid gm12u320_edid = {
> | ^
> ......
> 478 | .pixel_clock = 3383,
> | {{ }}
> 479 | /* hactive = 848, hblank = 256 */
> 480 | .data.pixel_data.hactive_lo = 0x50,
> | }}
> 481 | .data.pixel_data.hblank_lo = 0x00,
> | }}
> 482 | .data.pixel_data.hactive_hblank_hi = 0x31,
> | }}
> 483 | /* vactive = 480, vblank = 28 */
> 484 | .data.pixel_data.vactive_lo = 0xe0,
> | }}
> 485 | .data.pixel_data.vblank_lo = 0x1c,
> | }}
> 486 | .data.pixel_data.vactive_vblank_hi = 0x10,
> | }}
> 487 | /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
> 488 | .data.pixel_data.hsync_offset_lo = 0x28,
> | }}
> 489 | .data.pixel_data.hsync_pulse_width_lo = 0x80,
> | }}
> 490 | .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
> | }}
> 491 | .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
> | }}
> ......
> 494 | }, {
> | }}
> drivers/gpu/drm/tiny/gm12u320.c:495:4: error: 'struct detailed_timing' has no member named 'pixel_clock'
> 495 | .pixel_clock = 0,
> | ^~~~~~~~~~~
> drivers/gpu/drm/tiny/gm12u320.c:496:9: error: 'union <anonymous>' has no member named 'other_data'
> 496 | .data.other_data.type = 0xfd, /* Monitor ranges */
> | ^~~~~~~~~~
> drivers/gpu/drm/tiny/gm12u320.c:496:27: warning: initialized field overwritten [-Woverride-init]
> 496 | .data.other_data.type = 0xfd, /* Monitor ranges */
> | ^~~~
> drivers/gpu/drm/tiny/gm12u320.c:496:27: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
> drivers/gpu/drm/tiny/gm12u320.c:497:9: error: 'union <anonymous>' has no member named 'other_data'
> 497 | .data.other_data.data.range.min_vfreq = 59,
> | ^~~~~~~~~~
> drivers/gpu/drm/tiny/gm12u320.c:497:43: warning: initialized field overwritten [-Woverride-init]
> 497 | .data.other_data.data.range.min_vfreq = 59,
> | ^~
> drivers/gpu/drm/tiny/gm12u320.c:497:43: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
> drivers/gpu/drm/tiny/gm12u320.c:498:9: error: 'union <anonymous>' has no member named 'other_data'
> 498 | .data.other_data.data.range.max_vfreq = 61,
> | ^~~~~~~~~~
> drivers/gpu/drm/tiny/gm12u320.c:498:43: warning: initialized field overwritten [-Woverride-init]
> 498 | .data.other_data.data.range.max_vfreq = 61,
> | ^~
> drivers/gpu/drm/tiny/gm12u320.c:498:43: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
> drivers/gpu/drm/tiny/gm12u320.c:499:9: error: 'union <anonymous>' has no member named 'other_data'
> 499 | .data.other_data.data.range.min_hfreq_khz = 29,
> | ^~~~~~~~~~
> drivers/gpu/drm/tiny/gm12u320.c:499:47: warning: initialized field overwritten [-Woverride-init]
> 499 | .data.other_data.data.range.min_hfreq_khz = 29,
> | ^~
> drivers/gpu/drm/tiny/gm12u320.c:499:47: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
> drivers/gpu/drm/tiny/gm12u320.c:500:9: error: 'union <anonymous>' has no member named 'other_data'
> 500 | .data.other_data.data.range.max_hfreq_khz = 32,
> | ^~~~~~~~~~
> drivers/gpu/drm/tiny/gm12u320.c:500:47: warning: initialized field overwritten [-Woverride-init]
> 500 | .data.other_data.data.range.max_hfreq_khz = 32,
> | ^~
> drivers/gpu/drm/tiny/gm12u320.c:500:47: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
> drivers/gpu/drm/tiny/gm12u320.c:501:9: error: 'union <anonymous>' has no member named 'other_data'
> 501 | .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
> | ^~~~~~~~~~
> drivers/gpu/drm/tiny/gm12u320.c:501:49: warning: initialized field overwritten [-Woverride-init]
> 501 | .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
> | ^
> drivers/gpu/drm/tiny/gm12u320.c:501:49: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
> drivers/gpu/drm/tiny/gm12u320.c:502:9: error: 'union <anonymous>' has no member named 'other_data'
> 502 | .data.other_data.data.range.flags = 0,
> | ^~~~~~~~~~
> drivers/gpu/drm/tiny/gm12u320.c:502:39: warning: initialized field overwritten [-Woverride-init]
> 502 | .data.other_data.data.range.flags = 0,
> | ^
> drivers/gpu/drm/tiny/gm12u320.c:502:39: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
> drivers/gpu/drm/tiny/gm12u320.c:503:9: error: 'union <anonymous>' has no member named 'other_data'
> 503 | .data.other_data.data.range.formula.cvt = {
> | ^~~~~~~~~~
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
> 464 | static struct edid gm12u320_edid = {
> | ^
> ......
> 478 | .pixel_clock = 3383,
> | {{ }}
> 479 | /* hactive = 848, hblank = 256 */
> 480 | .data.pixel_data.hactive_lo = 0x50,
> | }}
> 481 | .data.pixel_data.hblank_lo = 0x00,
> | }}
> 482 | .data.pixel_data.hactive_hblank_hi = 0x31,
> | }}
> 483 | /* vactive = 480, vblank = 28 */
> 484 | .data.pixel_data.vactive_lo = 0xe0,
> | }}
> 485 | .data.pixel_data.vblank_lo = 0x1c,
> | }}
> 486 | .data.pixel_data.vactive_vblank_hi = 0x10,
> | }}
> 487 | /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
> 488 | .data.pixel_data.hsync_offset_lo = 0x28,
> | }}
> 489 | .data.pixel_data.hsync_pulse_width_lo = 0x80,
> | }}
> 490 | .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
> | }}
> 491 | .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
> | }}
> ......
> 494 | }, {
> | }}
> 495 | .pixel_clock = 0,
> | -
> | {{0}}
> 496 | .data.other_data.type = 0xfd, /* Monitor ranges */
> | { }}
> 497 | .data.other_data.data.range.min_vfreq = 59,
> | { }}
> 498 | .data.other_data.data.range.max_vfreq = 61,
> | { }}
> 499 | .data.other_data.data.range.min_hfreq_khz = 29,
> | { }}
> 500 | .data.other_data.data.range.max_hfreq_khz = 32,
> | { }}
> 501 | .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
> | {}}
> 502 | .data.other_data.data.range.flags = 0,
> | {}}
> drivers/gpu/drm/tiny/gm12u320.c:503:45: warning: initialized field overwritten [-Woverride-init]
> 503 | .data.other_data.data.range.formula.cvt = {
> | ^
> drivers/gpu/drm/tiny/gm12u320.c:503:45: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data')
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
> 464 | static struct edid gm12u320_edid = {
> | ^
> ......
> 478 | .pixel_clock = 3383,
> | {{ }}
> 479 | /* hactive = 848, hblank = 256 */
> 480 | .data.pixel_data.hactive_lo = 0x50,
> | }}
> 481 | .data.pixel_data.hblank_lo = 0x00,
> | }}
> 482 | .data.pixel_data.hactive_hblank_hi = 0x31,
> | }}
> 483 | /* vactive = 480, vblank = 28 */
> 484 | .data.pixel_data.vactive_lo = 0xe0,
> | }}
> 485 | .data.pixel_data.vblank_lo = 0x1c,
> | }}
> 486 | .data.pixel_data.vactive_vblank_hi = 0x10,
> | }}
> 487 | /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
> 488 | .data.pixel_data.hsync_offset_lo = 0x28,
> | }}
> 489 | .data.pixel_data.hsync_pulse_width_lo = 0x80,
> | }}
> 490 | .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
> | }}
> 491 | .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
> | }}
> ......
> 494 | }, {
> | }}
> 495 | .pixel_clock = 0,
> | -
> | {{0}}
> 496 | .data.other_data.type = 0xfd, /* Monitor ranges */
> | { }}
> 497 | .data.other_data.data.range.min_vfreq = 59,
> | { }}
> 498 | .data.other_data.data.range.max_vfreq = 61,
> | { }}
> 499 | .data.other_data.data.range.min_hfreq_khz = 29,
> | { }}
> 500 | .data.other_data.data.range.max_hfreq_khz = 32,
> | { }}
> 501 | .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
> | {}}
> 502 | .data.other_data.data.range.flags = 0,
> | {}}
> ......
> 505 | }, {
> | }
> drivers/gpu/drm/tiny/gm12u320.c:506:4: error: 'struct detailed_timing' has no member named 'pixel_clock'
> 506 | .pixel_clock = 0,
> | ^~~~~~~~~~~
> drivers/gpu/drm/tiny/gm12u320.c:507:9: error: 'union <anonymous>' has no member named 'other_data'
> 507 | .data.other_data.type = 0xfc, /* Model string */
> | ^~~~~~~~~~
> drivers/gpu/drm/tiny/gm12u320.c:507:27: warning: initialized field overwritten [-Woverride-init]
> 507 | .data.other_data.type = 0xfc, /* Model string */
> | ^~~~
> drivers/gpu/drm/tiny/gm12u320.c:507:27: note: (near initialization for 'gm12u320_edid.detailed_timings[2].data.pixel_data.pixel_clock')
> drivers/gpu/drm/tiny/gm12u320.c:508:9: error: 'union <anonymous>' has no member named 'other_data'
> 508 | .data.other_data.data.str.str = {
> | ^~~~~~~~~~
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
> 464 | static struct edid gm12u320_edid = {
> | ^
> ......
> 478 | .pixel_clock = 3383,
> | {{ }}
> 479 | /* hactive = 848, hblank = 256 */
> 480 | .data.pixel_data.hactive_lo = 0x50,
> | }}
> 481 | .data.pixel_data.hblank_lo = 0x00,
> | }}
> 482 | .data.pixel_data.hactive_hblank_hi = 0x31,
> | }}
> 483 | /* vactive = 480, vblank = 28 */
> 484 | .data.pixel_data.vactive_lo = 0xe0,
> | }}
> 485 | .data.pixel_data.vblank_lo = 0x1c,
> | }}
> 486 | .data.pixel_data.vactive_vblank_hi = 0x10,
> | }}
> 487 | /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
> 488 | .data.pixel_data.hsync_offset_lo = 0x28,
> | }}
> 489 | .data.pixel_data.hsync_pulse_width_lo = 0x80,
> | }}
> 490 | .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
> | }}
> 491 | .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
> | }}
> ......
> 494 | }, {
> | }}
> 495 | .pixel_clock = 0,
> | -
> | {{0}}
> 496 | .data.other_data.type = 0xfd, /* Monitor ranges */
> | { }}
> 497 | .data.other_data.data.range.min_vfreq = 59,
> | { }}
> 498 | .data.other_data.data.range.max_vfreq = 61,
> | { }}
> 499 | .data.other_data.data.range.min_hfreq_khz = 29,
> | { }}
> 500 | .data.other_data.data.range.max_hfreq_khz = 32,
> | { }}
> 501 | .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
> | {}}
> 502 | .data.other_data.data.range.flags = 0,
> | {}}
> ......
> 505 | }, {
> | }
> 506 | .pixel_clock = 0,
> | -
> | {{0}}
> 507 | .data.other_data.type = 0xfc, /* Model string */
> | { }}
> drivers/gpu/drm/tiny/gm12u320.c:508:35: warning: initialized field overwritten [-Woverride-init]
> 508 | .data.other_data.data.str.str = {
> | ^
> drivers/gpu/drm/tiny/gm12u320.c:508:35: note: (near initialization for 'gm12u320_edid.detailed_timings[2].data.pixel_data')
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
> 464 | static struct edid gm12u320_edid = {
> | ^
> ......
> 478 | .pixel_clock = 3383,
> | {{ }}
> 479 | /* hactive = 848, hblank = 256 */
> 480 | .data.pixel_data.hactive_lo = 0x50,
> | }}
> 481 | .data.pixel_data.hblank_lo = 0x00,
> | }}
> 482 | .data.pixel_data.hactive_hblank_hi = 0x31,
> | }}
> 483 | /* vactive = 480, vblank = 28 */
> 484 | .data.pixel_data.vactive_lo = 0xe0,
> | }}
> 485 | .data.pixel_data.vblank_lo = 0x1c,
> | }}
> 486 | .data.pixel_data.vactive_vblank_hi = 0x10,
> | }}
> 487 | /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
> 488 | .data.pixel_data.hsync_offset_lo = 0x28,
> | }}
> 489 | .data.pixel_data.hsync_pulse_width_lo = 0x80,
> | }}
> 490 | .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
> | }}
> 491 | .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
> | }}
> ......
> 494 | }, {
> | }}
> 495 | .pixel_clock = 0,
> | -
> | {{0}}
> 496 | .data.other_data.type = 0xfd, /* Monitor ranges */
> | { }}
> 497 | .data.other_data.data.range.min_vfreq = 59,
> | { }}
> 498 | .data.other_data.data.range.max_vfreq = 61,
> | { }}
> 499 | .data.other_data.data.range.min_hfreq_khz = 29,
> | { }}
> 500 | .data.other_data.data.range.max_hfreq_khz = 32,
> | { }}
> 501 | .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
> | {}}
> 502 | .data.other_data.data.range.flags = 0,
> | {}}
> ......
> 505 | }, {
> | }
> 506 | .pixel_clock = 0,
> | -
> | {{0}}
> 507 | .data.other_data.type = 0xfc, /* Model string */
> | { }}
> ......
> 511 | }, {
> | }
> drivers/gpu/drm/tiny/gm12u320.c:512:4: error: 'struct detailed_timing' has no member named 'pixel_clock'
> 512 | .pixel_clock = 0,
> | ^~~~~~~~~~~
> drivers/gpu/drm/tiny/gm12u320.c:513:9: error: 'union <anonymous>' has no member named 'other_data'
> 513 | .data.other_data.type = 0xfe, /* Unspecified text / padding */
> | ^~~~~~~~~~
> drivers/gpu/drm/tiny/gm12u320.c:513:27: warning: initialized field overwritten [-Woverride-init]
> 513 | .data.other_data.type = 0xfe, /* Unspecified text / padding */
> | ^~~~
> drivers/gpu/drm/tiny/gm12u320.c:513:27: note: (near initialization for 'gm12u320_edid.detailed_timings[3].data.pixel_data.pixel_clock')
> drivers/gpu/drm/tiny/gm12u320.c:514:9: error: 'union <anonymous>' has no member named 'other_data'
> 514 | .data.other_data.data.str.str = {
> | ^~~~~~~~~~
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
> 464 | static struct edid gm12u320_edid = {
> | ^
> ......
> 478 | .pixel_clock = 3383,
> | {{ }}
> 479 | /* hactive = 848, hblank = 256 */
> 480 | .data.pixel_data.hactive_lo = 0x50,
> | }}
> 481 | .data.pixel_data.hblank_lo = 0x00,
> | }}
> 482 | .data.pixel_data.hactive_hblank_hi = 0x31,
> | }}
> 483 | /* vactive = 480, vblank = 28 */
> 484 | .data.pixel_data.vactive_lo = 0xe0,
> | }}
> 485 | .data.pixel_data.vblank_lo = 0x1c,
> | }}
> 486 | .data.pixel_data.vactive_vblank_hi = 0x10,
> | }}
> 487 | /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
> 488 | .data.pixel_data.hsync_offset_lo = 0x28,
> | }}
> 489 | .data.pixel_data.hsync_pulse_width_lo = 0x80,
> | }}
> 490 | .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
> | }}
> 491 | .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
> | }}
> ......
> 494 | }, {
> | }}
> 495 | .pixel_clock = 0,
> | -
> | {{0}}
> 496 | .data.other_data.type = 0xfd, /* Monitor ranges */
> | { }}
> 497 | .data.other_data.data.range.min_vfreq = 59,
> | { }}
> 498 | .data.other_data.data.range.max_vfreq = 61,
> | { }}
> 499 | .data.other_data.data.range.min_hfreq_khz = 29,
> | { }}
> 500 | .data.other_data.data.range.max_hfreq_khz = 32,
> | { }}
> 501 | .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
> | {}}
> 502 | .data.other_data.data.range.flags = 0,
> | {}}
> ......
> 505 | }, {
> | }
> 506 | .pixel_clock = 0,
> | -
> | {{0}}
> 507 | .data.other_data.type = 0xfc, /* Model string */
> | { }}
> ......
> 511 | }, {
> | }
> 512 | .pixel_clock = 0,
> | -
> | {{0}}
> 513 | .data.other_data.type = 0xfe, /* Unspecified text / padding */
> | { }}
> drivers/gpu/drm/tiny/gm12u320.c:514:35: warning: initialized field overwritten [-Woverride-init]
> 514 | .data.other_data.data.str.str = {
> | ^
> drivers/gpu/drm/tiny/gm12u320.c:514:35: note: (near initialization for 'gm12u320_edid.detailed_timings[3].data.pixel_data')
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
> 464 | static struct edid gm12u320_edid = {
> | ^
> ......
> 478 | .pixel_clock = 3383,
> | {{ }}
> 479 | /* hactive = 848, hblank = 256 */
> 480 | .data.pixel_data.hactive_lo = 0x50,
> | }}
> 481 | .data.pixel_data.hblank_lo = 0x00,
> | }}
> 482 | .data.pixel_data.hactive_hblank_hi = 0x31,
> | }}
> 483 | /* vactive = 480, vblank = 28 */
> 484 | .data.pixel_data.vactive_lo = 0xe0,
> | }}
> 485 | .data.pixel_data.vblank_lo = 0x1c,
> | }}
> 486 | .data.pixel_data.vactive_vblank_hi = 0x10,
> | }}
> 487 | /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
> 488 | .data.pixel_data.hsync_offset_lo = 0x28,
> | }}
> 489 | .data.pixel_data.hsync_pulse_width_lo = 0x80,
> | }}
> 490 | .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
> | }}
> 491 | .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
> | }}
> ......
> 494 | }, {
> | }}
> 495 | .pixel_clock = 0,
> | -
> | {{0}}
> 496 | .data.other_data.type = 0xfd, /* Monitor ranges */
> | { }}
> 497 | .data.other_data.data.range.min_vfreq = 59,
> | { }}
> 498 | .data.other_data.data.range.max_vfreq = 61,
> | { }}
> 499 | .data.other_data.data.range.min_hfreq_khz = 29,
> | { }}
> 500 | .data.other_data.data.range.max_hfreq_khz = 32,
> | { }}
> 501 | .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
> | {}}
> 502 | .data.other_data.data.range.flags = 0,
> | {}}
> ......
> 505 | }, {
> | }
> 506 | .pixel_clock = 0,
> | -
> | {{0}}
> 507 | .data.other_data.type = 0xfc, /* Model string */
> | { }}
> ......
> 511 | }, {
> | }
> 512 | .pixel_clock = 0,
> | -
> | {{0}}
> 513 | .data.other_data.type = 0xfe, /* Unspecified text / padding */
> | { }}
> ......
> 517 | } },
> | }
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
> 464 | static struct edid gm12u320_edid = {
> | ^
> ......
> 478 | .pixel_clock = 3383,
> | {{ }}
> 479 | /* hactive = 848, hblank = 256 */
> 480 | .data.pixel_data.hactive_lo = 0x50,
> | }}
> 481 | .data.pixel_data.hblank_lo = 0x00,
> | }}
> 482 | .data.pixel_data.hactive_hblank_hi = 0x31,
> | }}
> 483 | /* vactive = 480, vblank = 28 */
> 484 | .data.pixel_data.vactive_lo = 0xe0,
> | }}
> 485 | .data.pixel_data.vblank_lo = 0x1c,
> | }}
> 486 | .data.pixel_data.vactive_vblank_hi = 0x10,
> | }}
> 487 | /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
> 488 | .data.pixel_data.hsync_offset_lo = 0x28,
> | }}
> 489 | .data.pixel_data.hsync_pulse_width_lo = 0x80,
> | }}
> 490 | .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
> | }}
> 491 | .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
> | }}
> ......
> 494 | }, {
> | }}
> 495 | .pixel_clock = 0,
> | -
> | {{0}}
> 496 | .data.other_data.type = 0xfd, /* Monitor ranges */
> | { }}
> 497 | .data.other_data.data.range.min_vfreq = 59,
> | { }}
> 498 | .data.other_data.data.range.max_vfreq = 61,
> | { }}
> 499 | .data.other_data.data.range.min_hfreq_khz = 29,
> | { }}
> 500 | .data.other_data.data.range.max_hfreq_khz = 32,
> | { }}
> 501 | .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
> | {}}
> 502 | .data.other_data.data.range.flags = 0,
> | {}}
> ......
> 505 | }, {
> | }
> 506 | .pixel_clock = 0,
> | -
> | {{0}}
> 507 | .data.other_data.type = 0xfc, /* Model string */
> | { }}
> ......
> 511 | }, {
> | }
> 512 | .pixel_clock = 0,
> | -
> | {{0}}
> 513 | .data.other_data.type = 0xfe, /* Unspecified text / padding */
> | { }}
> ......
> 517 | } },
> | }
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
> 464 | static struct edid gm12u320_edid = {
> | ^
> ......
> 478 | .pixel_clock = 3383,
> | {{ }}
> 479 | /* hactive = 848, hblank = 256 */
> 480 | .data.pixel_data.hactive_lo = 0x50,
> | }}
> 481 | .data.pixel_data.hblank_lo = 0x00,
> | }}
> 482 | .data.pixel_data.hactive_hblank_hi = 0x31,
> | }}
> 483 | /* vactive = 480, vblank = 28 */
> 484 | .data.pixel_data.vactive_lo = 0xe0,
> | }}
> 485 | .data.pixel_data.vblank_lo = 0x1c,
> | }}
> 486 | .data.pixel_data.vactive_vblank_hi = 0x10,
> | }}
> 487 | /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
> 488 | .data.pixel_data.hsync_offset_lo = 0x28,
> | }}
> 489 | .data.pixel_data.hsync_pulse_width_lo = 0x80,
> | }}
> 490 | .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
> | }}
> 491 | .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
> | }}
> ......
> 494 | }, {
> | }}
> 495 | .pixel_clock = 0,
> | -
> | {{0}}
> 496 | .data.other_data.type = 0xfd, /* Monitor ranges */
> | { }}
> 497 | .data.other_data.data.range.min_vfreq = 59,
> | { }}
> 498 | .data.other_data.data.range.max_vfreq = 61,
> | { }}
> 499 | .data.other_data.data.range.min_hfreq_khz = 29,
> | { }}
> 500 | .data.other_data.data.range.max_hfreq_khz = 32,
> | { }}
> 501 | .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
> | {}}
> 502 | .data.other_data.data.range.flags = 0,
> | {}}
> ......
> 505 | }, {
> | }
> 506 | .pixel_clock = 0,
> | -
> | {{0}}
> 507 | .data.other_data.type = 0xfc, /* Model string */
> | { }}
> ......
> 511 | }, {
> | }
> 512 | .pixel_clock = 0,
> | -
> | {{0}}
> 513 | .data.other_data.type = 0xfe, /* Unspecified text / padding */
> | { }}
> ......
> 517 | } },
> | }
>
>
> vim +464 drivers/gpu/drm/tiny/gm12u320.c
>
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 457
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 458 /*
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 459 * We use fake EDID info so that userspace know that it is dealing with
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 460 * an Acer projector, rather then listing this as an "unknown" monitor.
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 461 * Note this assumes this driver is only ever used with the Acer C120, if we
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 462 * add support for other devices the vendor and model should be parameterized.
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 463 */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 @464 static struct edid gm12u320_edid = {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 465 .header = { 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 },
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 466 .mfg_id = { 0x04, 0x72 }, /* "ACR" */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 467 .prod_code = { 0x20, 0xc1 }, /* C120h */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 468 .serial = 0xaa55aa55,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 469 .mfg_week = 1,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 470 .mfg_year = 16,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 471 .version = 1, /* EDID 1.3 */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 472 .revision = 3, /* EDID 1.3 */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 473 .input = 0x08, /* Analog input */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 474 .features = 0x0a, /* Pref timing in DTD 1 */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 475 .standard_timings = { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 },
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 476 { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } },
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 477 .detailed_timings = { {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 478 .pixel_clock = 3383,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 479 /* hactive = 848, hblank = 256 */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 480 .data.pixel_data.hactive_lo = 0x50,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 481 .data.pixel_data.hblank_lo = 0x00,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 482 .data.pixel_data.hactive_hblank_hi = 0x31,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 483 /* vactive = 480, vblank = 28 */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 484 .data.pixel_data.vactive_lo = 0xe0,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 485 .data.pixel_data.vblank_lo = 0x1c,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 486 .data.pixel_data.vactive_vblank_hi = 0x10,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 487 /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 488 .data.pixel_data.hsync_offset_lo = 0x28,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 489 .data.pixel_data.hsync_pulse_width_lo = 0x80,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 490 .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 491 .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 492 /* Digital separate syncs, hsync+, vsync+ */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 493 .data.pixel_data.misc = 0x1e,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 494 }, {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 495 .pixel_clock = 0,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 496 .data.other_data.type = 0xfd, /* Monitor ranges */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 497 .data.other_data.data.range.min_vfreq = 59,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 498 .data.other_data.data.range.max_vfreq = 61,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 499 .data.other_data.data.range.min_hfreq_khz = 29,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 500 .data.other_data.data.range.max_hfreq_khz = 32,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 501 .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 502 .data.other_data.data.range.flags = 0,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 503 .data.other_data.data.range.formula.cvt = {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 504 0xa0, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20 },
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 505 }, {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 506 .pixel_clock = 0,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 507 .data.other_data.type = 0xfc, /* Model string */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 508 .data.other_data.data.str.str = {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 509 'P', 'r', 'o', 'j', 'e', 'c', 't', 'o', 'r', '\n',
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 510 ' ', ' ', ' ' },
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 511 }, {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 512 .pixel_clock = 0,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 513 .data.other_data.type = 0xfe, /* Unspecified text / padding */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 514 .data.other_data.data.str.str = {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 515 '\n', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ',
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 516 ' ', ' ', ' ' },
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 517 } },
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 518 .checksum = 0x13,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 519 };
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 520
--
Jani Nikula, Intel Open Source Graphics Center
WARNING: multiple messages have this Message-ID (diff)
From: Jani Nikula <jani.nikula@intel.com>
To: kernel test robot <lkp@intel.com>, dri-devel@lists.freedesktop.org
Cc: kbuild-all@lists.01.org, Leo Li <sunpeng.li@amd.com>,
intel-gfx@lists.freedesktop.org,
Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>,
amd-gfx@lists.freedesktop.org,
Harry Wentland <harry.wentland@amd.com>
Subject: Re: [Intel-gfx] [PATCH v2 03/11] drm/edid: slightly restructure timing and non-timing descriptor structs
Date: Mon, 28 Mar 2022 16:20:44 +0300 [thread overview]
Message-ID: <87ee2mdxhv.fsf@intel.com> (raw)
In-Reply-To: <202203281926.AthxJpnK-lkp@intel.com>
I think I'm just going to revert back to my original plan of leaving the
struct restructuring to another time in the future.
BR,
Jani.
On Mon, 28 Mar 2022, kernel test robot <lkp@intel.com> wrote:
> Hi Jani,
>
> I love your patch! Perhaps something to improve:
>
> [auto build test WARNING on drm/drm-next]
> [also build test WARNING on drm-intel/for-linux-next drm-tip/drm-tip v5.17 next-20220328]
> [If your patch is applied to the wrong git tree, kindly drop us a note.
> And when submitting patch, we suggest to use '--base' as documented in
> https://git-scm.com/docs/git-format-patch]
>
> url: https://github.com/intel-lab-lkp/linux/commits/Jani-Nikula/drm-edid-constify-EDID-parsing-with-some-fixes/20220328-171858
> base: git://anongit.freedesktop.org/drm/drm drm-next
> config: x86_64-randconfig-a003-20220328 (https://download.01.org/0day-ci/archive/20220328/202203281926.AthxJpnK-lkp@intel.com/config)
> compiler: gcc-9 (Ubuntu 9.4.0-1ubuntu1~20.04.1) 9.4.0
> reproduce (this is a W=1 build):
> # https://github.com/intel-lab-lkp/linux/commit/f538c9296c54ce8f878432153584a68939ffc111
> git remote add linux-review https://github.com/intel-lab-lkp/linux
> git fetch --no-tags linux-review Jani-Nikula/drm-edid-constify-EDID-parsing-with-some-fixes/20220328-171858
> git checkout f538c9296c54ce8f878432153584a68939ffc111
> # save the config file to linux build tree
> mkdir build_dir
> make W=1 O=build_dir ARCH=x86_64 SHELL=/bin/bash drivers/gpu/drm/tiny/
>
> If you fix the issue, kindly add following tag as appropriate
> Reported-by: kernel test robot <lkp@intel.com>
>
> All warnings (new ones prefixed by >>):
>
> drivers/gpu/drm/tiny/gm12u320.c:478:4: error: 'struct detailed_timing' has no member named 'pixel_clock'
> 478 | .pixel_clock = 3383,
> | ^~~~~~~~~~~
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
> 464 | static struct edid gm12u320_edid = {
> | ^
> ......
> 478 | .pixel_clock = 3383,
> | {{ }}
> 479 | /* hactive = 848, hblank = 256 */
> 480 | .data.pixel_data.hactive_lo = 0x50,
> | }}
> 481 | .data.pixel_data.hblank_lo = 0x00,
> | }}
> 482 | .data.pixel_data.hactive_hblank_hi = 0x31,
> | }}
> 483 | /* vactive = 480, vblank = 28 */
> 484 | .data.pixel_data.vactive_lo = 0xe0,
> | }}
> 485 | .data.pixel_data.vblank_lo = 0x1c,
> | }}
> 486 | .data.pixel_data.vactive_vblank_hi = 0x10,
> | }}
> 487 | /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
> 488 | .data.pixel_data.hsync_offset_lo = 0x28,
> | }}
> 489 | .data.pixel_data.hsync_pulse_width_lo = 0x80,
> | }}
> 490 | .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
> | }}
> 491 | .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
> | }}
> ......
> 494 | }, {
> | }}
> drivers/gpu/drm/tiny/gm12u320.c:495:4: error: 'struct detailed_timing' has no member named 'pixel_clock'
> 495 | .pixel_clock = 0,
> | ^~~~~~~~~~~
> drivers/gpu/drm/tiny/gm12u320.c:496:9: error: 'union <anonymous>' has no member named 'other_data'
> 496 | .data.other_data.type = 0xfd, /* Monitor ranges */
> | ^~~~~~~~~~
> drivers/gpu/drm/tiny/gm12u320.c:496:27: warning: initialized field overwritten [-Woverride-init]
> 496 | .data.other_data.type = 0xfd, /* Monitor ranges */
> | ^~~~
> drivers/gpu/drm/tiny/gm12u320.c:496:27: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
> drivers/gpu/drm/tiny/gm12u320.c:497:9: error: 'union <anonymous>' has no member named 'other_data'
> 497 | .data.other_data.data.range.min_vfreq = 59,
> | ^~~~~~~~~~
> drivers/gpu/drm/tiny/gm12u320.c:497:43: warning: initialized field overwritten [-Woverride-init]
> 497 | .data.other_data.data.range.min_vfreq = 59,
> | ^~
> drivers/gpu/drm/tiny/gm12u320.c:497:43: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
> drivers/gpu/drm/tiny/gm12u320.c:498:9: error: 'union <anonymous>' has no member named 'other_data'
> 498 | .data.other_data.data.range.max_vfreq = 61,
> | ^~~~~~~~~~
> drivers/gpu/drm/tiny/gm12u320.c:498:43: warning: initialized field overwritten [-Woverride-init]
> 498 | .data.other_data.data.range.max_vfreq = 61,
> | ^~
> drivers/gpu/drm/tiny/gm12u320.c:498:43: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
> drivers/gpu/drm/tiny/gm12u320.c:499:9: error: 'union <anonymous>' has no member named 'other_data'
> 499 | .data.other_data.data.range.min_hfreq_khz = 29,
> | ^~~~~~~~~~
> drivers/gpu/drm/tiny/gm12u320.c:499:47: warning: initialized field overwritten [-Woverride-init]
> 499 | .data.other_data.data.range.min_hfreq_khz = 29,
> | ^~
> drivers/gpu/drm/tiny/gm12u320.c:499:47: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
> drivers/gpu/drm/tiny/gm12u320.c:500:9: error: 'union <anonymous>' has no member named 'other_data'
> 500 | .data.other_data.data.range.max_hfreq_khz = 32,
> | ^~~~~~~~~~
> drivers/gpu/drm/tiny/gm12u320.c:500:47: warning: initialized field overwritten [-Woverride-init]
> 500 | .data.other_data.data.range.max_hfreq_khz = 32,
> | ^~
> drivers/gpu/drm/tiny/gm12u320.c:500:47: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
> drivers/gpu/drm/tiny/gm12u320.c:501:9: error: 'union <anonymous>' has no member named 'other_data'
> 501 | .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
> | ^~~~~~~~~~
> drivers/gpu/drm/tiny/gm12u320.c:501:49: warning: initialized field overwritten [-Woverride-init]
> 501 | .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
> | ^
> drivers/gpu/drm/tiny/gm12u320.c:501:49: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
> drivers/gpu/drm/tiny/gm12u320.c:502:9: error: 'union <anonymous>' has no member named 'other_data'
> 502 | .data.other_data.data.range.flags = 0,
> | ^~~~~~~~~~
> drivers/gpu/drm/tiny/gm12u320.c:502:39: warning: initialized field overwritten [-Woverride-init]
> 502 | .data.other_data.data.range.flags = 0,
> | ^
> drivers/gpu/drm/tiny/gm12u320.c:502:39: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
> drivers/gpu/drm/tiny/gm12u320.c:503:9: error: 'union <anonymous>' has no member named 'other_data'
> 503 | .data.other_data.data.range.formula.cvt = {
> | ^~~~~~~~~~
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
> 464 | static struct edid gm12u320_edid = {
> | ^
> ......
> 478 | .pixel_clock = 3383,
> | {{ }}
> 479 | /* hactive = 848, hblank = 256 */
> 480 | .data.pixel_data.hactive_lo = 0x50,
> | }}
> 481 | .data.pixel_data.hblank_lo = 0x00,
> | }}
> 482 | .data.pixel_data.hactive_hblank_hi = 0x31,
> | }}
> 483 | /* vactive = 480, vblank = 28 */
> 484 | .data.pixel_data.vactive_lo = 0xe0,
> | }}
> 485 | .data.pixel_data.vblank_lo = 0x1c,
> | }}
> 486 | .data.pixel_data.vactive_vblank_hi = 0x10,
> | }}
> 487 | /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
> 488 | .data.pixel_data.hsync_offset_lo = 0x28,
> | }}
> 489 | .data.pixel_data.hsync_pulse_width_lo = 0x80,
> | }}
> 490 | .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
> | }}
> 491 | .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
> | }}
> ......
> 494 | }, {
> | }}
> 495 | .pixel_clock = 0,
> | -
> | {{0}}
> 496 | .data.other_data.type = 0xfd, /* Monitor ranges */
> | { }}
> 497 | .data.other_data.data.range.min_vfreq = 59,
> | { }}
> 498 | .data.other_data.data.range.max_vfreq = 61,
> | { }}
> 499 | .data.other_data.data.range.min_hfreq_khz = 29,
> | { }}
> 500 | .data.other_data.data.range.max_hfreq_khz = 32,
> | { }}
> 501 | .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
> | {}}
> 502 | .data.other_data.data.range.flags = 0,
> | {}}
> drivers/gpu/drm/tiny/gm12u320.c:503:45: warning: initialized field overwritten [-Woverride-init]
> 503 | .data.other_data.data.range.formula.cvt = {
> | ^
> drivers/gpu/drm/tiny/gm12u320.c:503:45: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data')
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
> 464 | static struct edid gm12u320_edid = {
> | ^
> ......
> 478 | .pixel_clock = 3383,
> | {{ }}
> 479 | /* hactive = 848, hblank = 256 */
> 480 | .data.pixel_data.hactive_lo = 0x50,
> | }}
> 481 | .data.pixel_data.hblank_lo = 0x00,
> | }}
> 482 | .data.pixel_data.hactive_hblank_hi = 0x31,
> | }}
> 483 | /* vactive = 480, vblank = 28 */
> 484 | .data.pixel_data.vactive_lo = 0xe0,
> | }}
> 485 | .data.pixel_data.vblank_lo = 0x1c,
> | }}
> 486 | .data.pixel_data.vactive_vblank_hi = 0x10,
> | }}
> 487 | /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
> 488 | .data.pixel_data.hsync_offset_lo = 0x28,
> | }}
> 489 | .data.pixel_data.hsync_pulse_width_lo = 0x80,
> | }}
> 490 | .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
> | }}
> 491 | .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
> | }}
> ......
> 494 | }, {
> | }}
> 495 | .pixel_clock = 0,
> | -
> | {{0}}
> 496 | .data.other_data.type = 0xfd, /* Monitor ranges */
> | { }}
> 497 | .data.other_data.data.range.min_vfreq = 59,
> | { }}
> 498 | .data.other_data.data.range.max_vfreq = 61,
> | { }}
> 499 | .data.other_data.data.range.min_hfreq_khz = 29,
> | { }}
> 500 | .data.other_data.data.range.max_hfreq_khz = 32,
> | { }}
> 501 | .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
> | {}}
> 502 | .data.other_data.data.range.flags = 0,
> | {}}
> ......
> 505 | }, {
> | }
> drivers/gpu/drm/tiny/gm12u320.c:506:4: error: 'struct detailed_timing' has no member named 'pixel_clock'
> 506 | .pixel_clock = 0,
> | ^~~~~~~~~~~
> drivers/gpu/drm/tiny/gm12u320.c:507:9: error: 'union <anonymous>' has no member named 'other_data'
> 507 | .data.other_data.type = 0xfc, /* Model string */
> | ^~~~~~~~~~
> drivers/gpu/drm/tiny/gm12u320.c:507:27: warning: initialized field overwritten [-Woverride-init]
> 507 | .data.other_data.type = 0xfc, /* Model string */
> | ^~~~
> drivers/gpu/drm/tiny/gm12u320.c:507:27: note: (near initialization for 'gm12u320_edid.detailed_timings[2].data.pixel_data.pixel_clock')
> drivers/gpu/drm/tiny/gm12u320.c:508:9: error: 'union <anonymous>' has no member named 'other_data'
> 508 | .data.other_data.data.str.str = {
> | ^~~~~~~~~~
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
> 464 | static struct edid gm12u320_edid = {
> | ^
> ......
> 478 | .pixel_clock = 3383,
> | {{ }}
> 479 | /* hactive = 848, hblank = 256 */
> 480 | .data.pixel_data.hactive_lo = 0x50,
> | }}
> 481 | .data.pixel_data.hblank_lo = 0x00,
> | }}
> 482 | .data.pixel_data.hactive_hblank_hi = 0x31,
> | }}
> 483 | /* vactive = 480, vblank = 28 */
> 484 | .data.pixel_data.vactive_lo = 0xe0,
> | }}
> 485 | .data.pixel_data.vblank_lo = 0x1c,
> | }}
> 486 | .data.pixel_data.vactive_vblank_hi = 0x10,
> | }}
> 487 | /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
> 488 | .data.pixel_data.hsync_offset_lo = 0x28,
> | }}
> 489 | .data.pixel_data.hsync_pulse_width_lo = 0x80,
> | }}
> 490 | .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
> | }}
> 491 | .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
> | }}
> ......
> 494 | }, {
> | }}
> 495 | .pixel_clock = 0,
> | -
> | {{0}}
> 496 | .data.other_data.type = 0xfd, /* Monitor ranges */
> | { }}
> 497 | .data.other_data.data.range.min_vfreq = 59,
> | { }}
> 498 | .data.other_data.data.range.max_vfreq = 61,
> | { }}
> 499 | .data.other_data.data.range.min_hfreq_khz = 29,
> | { }}
> 500 | .data.other_data.data.range.max_hfreq_khz = 32,
> | { }}
> 501 | .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
> | {}}
> 502 | .data.other_data.data.range.flags = 0,
> | {}}
> ......
> 505 | }, {
> | }
> 506 | .pixel_clock = 0,
> | -
> | {{0}}
> 507 | .data.other_data.type = 0xfc, /* Model string */
> | { }}
> drivers/gpu/drm/tiny/gm12u320.c:508:35: warning: initialized field overwritten [-Woverride-init]
> 508 | .data.other_data.data.str.str = {
> | ^
> drivers/gpu/drm/tiny/gm12u320.c:508:35: note: (near initialization for 'gm12u320_edid.detailed_timings[2].data.pixel_data')
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
> 464 | static struct edid gm12u320_edid = {
> | ^
> ......
> 478 | .pixel_clock = 3383,
> | {{ }}
> 479 | /* hactive = 848, hblank = 256 */
> 480 | .data.pixel_data.hactive_lo = 0x50,
> | }}
> 481 | .data.pixel_data.hblank_lo = 0x00,
> | }}
> 482 | .data.pixel_data.hactive_hblank_hi = 0x31,
> | }}
> 483 | /* vactive = 480, vblank = 28 */
> 484 | .data.pixel_data.vactive_lo = 0xe0,
> | }}
> 485 | .data.pixel_data.vblank_lo = 0x1c,
> | }}
> 486 | .data.pixel_data.vactive_vblank_hi = 0x10,
> | }}
> 487 | /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
> 488 | .data.pixel_data.hsync_offset_lo = 0x28,
> | }}
> 489 | .data.pixel_data.hsync_pulse_width_lo = 0x80,
> | }}
> 490 | .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
> | }}
> 491 | .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
> | }}
> ......
> 494 | }, {
> | }}
> 495 | .pixel_clock = 0,
> | -
> | {{0}}
> 496 | .data.other_data.type = 0xfd, /* Monitor ranges */
> | { }}
> 497 | .data.other_data.data.range.min_vfreq = 59,
> | { }}
> 498 | .data.other_data.data.range.max_vfreq = 61,
> | { }}
> 499 | .data.other_data.data.range.min_hfreq_khz = 29,
> | { }}
> 500 | .data.other_data.data.range.max_hfreq_khz = 32,
> | { }}
> 501 | .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
> | {}}
> 502 | .data.other_data.data.range.flags = 0,
> | {}}
> ......
> 505 | }, {
> | }
> 506 | .pixel_clock = 0,
> | -
> | {{0}}
> 507 | .data.other_data.type = 0xfc, /* Model string */
> | { }}
> ......
> 511 | }, {
> | }
> drivers/gpu/drm/tiny/gm12u320.c:512:4: error: 'struct detailed_timing' has no member named 'pixel_clock'
> 512 | .pixel_clock = 0,
> | ^~~~~~~~~~~
> drivers/gpu/drm/tiny/gm12u320.c:513:9: error: 'union <anonymous>' has no member named 'other_data'
> 513 | .data.other_data.type = 0xfe, /* Unspecified text / padding */
> | ^~~~~~~~~~
> drivers/gpu/drm/tiny/gm12u320.c:513:27: warning: initialized field overwritten [-Woverride-init]
> 513 | .data.other_data.type = 0xfe, /* Unspecified text / padding */
> | ^~~~
> drivers/gpu/drm/tiny/gm12u320.c:513:27: note: (near initialization for 'gm12u320_edid.detailed_timings[3].data.pixel_data.pixel_clock')
> drivers/gpu/drm/tiny/gm12u320.c:514:9: error: 'union <anonymous>' has no member named 'other_data'
> 514 | .data.other_data.data.str.str = {
> | ^~~~~~~~~~
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
> 464 | static struct edid gm12u320_edid = {
> | ^
> ......
> 478 | .pixel_clock = 3383,
> | {{ }}
> 479 | /* hactive = 848, hblank = 256 */
> 480 | .data.pixel_data.hactive_lo = 0x50,
> | }}
> 481 | .data.pixel_data.hblank_lo = 0x00,
> | }}
> 482 | .data.pixel_data.hactive_hblank_hi = 0x31,
> | }}
> 483 | /* vactive = 480, vblank = 28 */
> 484 | .data.pixel_data.vactive_lo = 0xe0,
> | }}
> 485 | .data.pixel_data.vblank_lo = 0x1c,
> | }}
> 486 | .data.pixel_data.vactive_vblank_hi = 0x10,
> | }}
> 487 | /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
> 488 | .data.pixel_data.hsync_offset_lo = 0x28,
> | }}
> 489 | .data.pixel_data.hsync_pulse_width_lo = 0x80,
> | }}
> 490 | .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
> | }}
> 491 | .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
> | }}
> ......
> 494 | }, {
> | }}
> 495 | .pixel_clock = 0,
> | -
> | {{0}}
> 496 | .data.other_data.type = 0xfd, /* Monitor ranges */
> | { }}
> 497 | .data.other_data.data.range.min_vfreq = 59,
> | { }}
> 498 | .data.other_data.data.range.max_vfreq = 61,
> | { }}
> 499 | .data.other_data.data.range.min_hfreq_khz = 29,
> | { }}
> 500 | .data.other_data.data.range.max_hfreq_khz = 32,
> | { }}
> 501 | .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
> | {}}
> 502 | .data.other_data.data.range.flags = 0,
> | {}}
> ......
> 505 | }, {
> | }
> 506 | .pixel_clock = 0,
> | -
> | {{0}}
> 507 | .data.other_data.type = 0xfc, /* Model string */
> | { }}
> ......
> 511 | }, {
> | }
> 512 | .pixel_clock = 0,
> | -
> | {{0}}
> 513 | .data.other_data.type = 0xfe, /* Unspecified text / padding */
> | { }}
> drivers/gpu/drm/tiny/gm12u320.c:514:35: warning: initialized field overwritten [-Woverride-init]
> 514 | .data.other_data.data.str.str = {
> | ^
> drivers/gpu/drm/tiny/gm12u320.c:514:35: note: (near initialization for 'gm12u320_edid.detailed_timings[3].data.pixel_data')
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
> 464 | static struct edid gm12u320_edid = {
> | ^
> ......
> 478 | .pixel_clock = 3383,
> | {{ }}
> 479 | /* hactive = 848, hblank = 256 */
> 480 | .data.pixel_data.hactive_lo = 0x50,
> | }}
> 481 | .data.pixel_data.hblank_lo = 0x00,
> | }}
> 482 | .data.pixel_data.hactive_hblank_hi = 0x31,
> | }}
> 483 | /* vactive = 480, vblank = 28 */
> 484 | .data.pixel_data.vactive_lo = 0xe0,
> | }}
> 485 | .data.pixel_data.vblank_lo = 0x1c,
> | }}
> 486 | .data.pixel_data.vactive_vblank_hi = 0x10,
> | }}
> 487 | /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
> 488 | .data.pixel_data.hsync_offset_lo = 0x28,
> | }}
> 489 | .data.pixel_data.hsync_pulse_width_lo = 0x80,
> | }}
> 490 | .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
> | }}
> 491 | .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
> | }}
> ......
> 494 | }, {
> | }}
> 495 | .pixel_clock = 0,
> | -
> | {{0}}
> 496 | .data.other_data.type = 0xfd, /* Monitor ranges */
> | { }}
> 497 | .data.other_data.data.range.min_vfreq = 59,
> | { }}
> 498 | .data.other_data.data.range.max_vfreq = 61,
> | { }}
> 499 | .data.other_data.data.range.min_hfreq_khz = 29,
> | { }}
> 500 | .data.other_data.data.range.max_hfreq_khz = 32,
> | { }}
> 501 | .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
> | {}}
> 502 | .data.other_data.data.range.flags = 0,
> | {}}
> ......
> 505 | }, {
> | }
> 506 | .pixel_clock = 0,
> | -
> | {{0}}
> 507 | .data.other_data.type = 0xfc, /* Model string */
> | { }}
> ......
> 511 | }, {
> | }
> 512 | .pixel_clock = 0,
> | -
> | {{0}}
> 513 | .data.other_data.type = 0xfe, /* Unspecified text / padding */
> | { }}
> ......
> 517 | } },
> | }
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
> 464 | static struct edid gm12u320_edid = {
> | ^
> ......
> 478 | .pixel_clock = 3383,
> | {{ }}
> 479 | /* hactive = 848, hblank = 256 */
> 480 | .data.pixel_data.hactive_lo = 0x50,
> | }}
> 481 | .data.pixel_data.hblank_lo = 0x00,
> | }}
> 482 | .data.pixel_data.hactive_hblank_hi = 0x31,
> | }}
> 483 | /* vactive = 480, vblank = 28 */
> 484 | .data.pixel_data.vactive_lo = 0xe0,
> | }}
> 485 | .data.pixel_data.vblank_lo = 0x1c,
> | }}
> 486 | .data.pixel_data.vactive_vblank_hi = 0x10,
> | }}
> 487 | /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
> 488 | .data.pixel_data.hsync_offset_lo = 0x28,
> | }}
> 489 | .data.pixel_data.hsync_pulse_width_lo = 0x80,
> | }}
> 490 | .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
> | }}
> 491 | .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
> | }}
> ......
> 494 | }, {
> | }}
> 495 | .pixel_clock = 0,
> | -
> | {{0}}
> 496 | .data.other_data.type = 0xfd, /* Monitor ranges */
> | { }}
> 497 | .data.other_data.data.range.min_vfreq = 59,
> | { }}
> 498 | .data.other_data.data.range.max_vfreq = 61,
> | { }}
> 499 | .data.other_data.data.range.min_hfreq_khz = 29,
> | { }}
> 500 | .data.other_data.data.range.max_hfreq_khz = 32,
> | { }}
> 501 | .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
> | {}}
> 502 | .data.other_data.data.range.flags = 0,
> | {}}
> ......
> 505 | }, {
> | }
> 506 | .pixel_clock = 0,
> | -
> | {{0}}
> 507 | .data.other_data.type = 0xfc, /* Model string */
> | { }}
> ......
> 511 | }, {
> | }
> 512 | .pixel_clock = 0,
> | -
> | {{0}}
> 513 | .data.other_data.type = 0xfe, /* Unspecified text / padding */
> | { }}
> ......
> 517 | } },
> | }
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
> 464 | static struct edid gm12u320_edid = {
> | ^
> ......
> 478 | .pixel_clock = 3383,
> | {{ }}
> 479 | /* hactive = 848, hblank = 256 */
> 480 | .data.pixel_data.hactive_lo = 0x50,
> | }}
> 481 | .data.pixel_data.hblank_lo = 0x00,
> | }}
> 482 | .data.pixel_data.hactive_hblank_hi = 0x31,
> | }}
> 483 | /* vactive = 480, vblank = 28 */
> 484 | .data.pixel_data.vactive_lo = 0xe0,
> | }}
> 485 | .data.pixel_data.vblank_lo = 0x1c,
> | }}
> 486 | .data.pixel_data.vactive_vblank_hi = 0x10,
> | }}
> 487 | /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
> 488 | .data.pixel_data.hsync_offset_lo = 0x28,
> | }}
> 489 | .data.pixel_data.hsync_pulse_width_lo = 0x80,
> | }}
> 490 | .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
> | }}
> 491 | .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
> | }}
> ......
> 494 | }, {
> | }}
> 495 | .pixel_clock = 0,
> | -
> | {{0}}
> 496 | .data.other_data.type = 0xfd, /* Monitor ranges */
> | { }}
> 497 | .data.other_data.data.range.min_vfreq = 59,
> | { }}
> 498 | .data.other_data.data.range.max_vfreq = 61,
> | { }}
> 499 | .data.other_data.data.range.min_hfreq_khz = 29,
> | { }}
> 500 | .data.other_data.data.range.max_hfreq_khz = 32,
> | { }}
> 501 | .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
> | {}}
> 502 | .data.other_data.data.range.flags = 0,
> | {}}
> ......
> 505 | }, {
> | }
> 506 | .pixel_clock = 0,
> | -
> | {{0}}
> 507 | .data.other_data.type = 0xfc, /* Model string */
> | { }}
> ......
> 511 | }, {
> | }
> 512 | .pixel_clock = 0,
> | -
> | {{0}}
> 513 | .data.other_data.type = 0xfe, /* Unspecified text / padding */
> | { }}
> ......
> 517 | } },
> | }
>
>
> vim +464 drivers/gpu/drm/tiny/gm12u320.c
>
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 457
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 458 /*
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 459 * We use fake EDID info so that userspace know that it is dealing with
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 460 * an Acer projector, rather then listing this as an "unknown" monitor.
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 461 * Note this assumes this driver is only ever used with the Acer C120, if we
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 462 * add support for other devices the vendor and model should be parameterized.
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 463 */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 @464 static struct edid gm12u320_edid = {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 465 .header = { 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 },
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 466 .mfg_id = { 0x04, 0x72 }, /* "ACR" */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 467 .prod_code = { 0x20, 0xc1 }, /* C120h */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 468 .serial = 0xaa55aa55,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 469 .mfg_week = 1,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 470 .mfg_year = 16,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 471 .version = 1, /* EDID 1.3 */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 472 .revision = 3, /* EDID 1.3 */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 473 .input = 0x08, /* Analog input */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 474 .features = 0x0a, /* Pref timing in DTD 1 */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 475 .standard_timings = { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 },
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 476 { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } },
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 477 .detailed_timings = { {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 478 .pixel_clock = 3383,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 479 /* hactive = 848, hblank = 256 */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 480 .data.pixel_data.hactive_lo = 0x50,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 481 .data.pixel_data.hblank_lo = 0x00,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 482 .data.pixel_data.hactive_hblank_hi = 0x31,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 483 /* vactive = 480, vblank = 28 */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 484 .data.pixel_data.vactive_lo = 0xe0,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 485 .data.pixel_data.vblank_lo = 0x1c,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 486 .data.pixel_data.vactive_vblank_hi = 0x10,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 487 /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 488 .data.pixel_data.hsync_offset_lo = 0x28,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 489 .data.pixel_data.hsync_pulse_width_lo = 0x80,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 490 .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 491 .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 492 /* Digital separate syncs, hsync+, vsync+ */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 493 .data.pixel_data.misc = 0x1e,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 494 }, {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 495 .pixel_clock = 0,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 496 .data.other_data.type = 0xfd, /* Monitor ranges */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 497 .data.other_data.data.range.min_vfreq = 59,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 498 .data.other_data.data.range.max_vfreq = 61,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 499 .data.other_data.data.range.min_hfreq_khz = 29,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 500 .data.other_data.data.range.max_hfreq_khz = 32,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 501 .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 502 .data.other_data.data.range.flags = 0,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 503 .data.other_data.data.range.formula.cvt = {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 504 0xa0, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20 },
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 505 }, {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 506 .pixel_clock = 0,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 507 .data.other_data.type = 0xfc, /* Model string */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 508 .data.other_data.data.str.str = {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 509 'P', 'r', 'o', 'j', 'e', 'c', 't', 'o', 'r', '\n',
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 510 ' ', ' ', ' ' },
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 511 }, {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 512 .pixel_clock = 0,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 513 .data.other_data.type = 0xfe, /* Unspecified text / padding */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 514 .data.other_data.data.str.str = {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 515 '\n', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ',
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 516 ' ', ' ', ' ' },
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 517 } },
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 518 .checksum = 0x13,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 519 };
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 520
--
Jani Nikula, Intel Open Source Graphics Center
WARNING: multiple messages have this Message-ID (diff)
From: Jani Nikula <jani.nikula@intel.com>
To: kernel test robot <lkp@intel.com>, dri-devel@lists.freedesktop.org
Cc: kbuild-all@lists.01.org, Leo Li <sunpeng.li@amd.com>,
intel-gfx@lists.freedesktop.org,
Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>,
amd-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v2 03/11] drm/edid: slightly restructure timing and non-timing descriptor structs
Date: Mon, 28 Mar 2022 16:20:44 +0300 [thread overview]
Message-ID: <87ee2mdxhv.fsf@intel.com> (raw)
In-Reply-To: <202203281926.AthxJpnK-lkp@intel.com>
I think I'm just going to revert back to my original plan of leaving the
struct restructuring to another time in the future.
BR,
Jani.
On Mon, 28 Mar 2022, kernel test robot <lkp@intel.com> wrote:
> Hi Jani,
>
> I love your patch! Perhaps something to improve:
>
> [auto build test WARNING on drm/drm-next]
> [also build test WARNING on drm-intel/for-linux-next drm-tip/drm-tip v5.17 next-20220328]
> [If your patch is applied to the wrong git tree, kindly drop us a note.
> And when submitting patch, we suggest to use '--base' as documented in
> https://git-scm.com/docs/git-format-patch]
>
> url: https://github.com/intel-lab-lkp/linux/commits/Jani-Nikula/drm-edid-constify-EDID-parsing-with-some-fixes/20220328-171858
> base: git://anongit.freedesktop.org/drm/drm drm-next
> config: x86_64-randconfig-a003-20220328 (https://download.01.org/0day-ci/archive/20220328/202203281926.AthxJpnK-lkp@intel.com/config)
> compiler: gcc-9 (Ubuntu 9.4.0-1ubuntu1~20.04.1) 9.4.0
> reproduce (this is a W=1 build):
> # https://github.com/intel-lab-lkp/linux/commit/f538c9296c54ce8f878432153584a68939ffc111
> git remote add linux-review https://github.com/intel-lab-lkp/linux
> git fetch --no-tags linux-review Jani-Nikula/drm-edid-constify-EDID-parsing-with-some-fixes/20220328-171858
> git checkout f538c9296c54ce8f878432153584a68939ffc111
> # save the config file to linux build tree
> mkdir build_dir
> make W=1 O=build_dir ARCH=x86_64 SHELL=/bin/bash drivers/gpu/drm/tiny/
>
> If you fix the issue, kindly add following tag as appropriate
> Reported-by: kernel test robot <lkp@intel.com>
>
> All warnings (new ones prefixed by >>):
>
> drivers/gpu/drm/tiny/gm12u320.c:478:4: error: 'struct detailed_timing' has no member named 'pixel_clock'
> 478 | .pixel_clock = 3383,
> | ^~~~~~~~~~~
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
> 464 | static struct edid gm12u320_edid = {
> | ^
> ......
> 478 | .pixel_clock = 3383,
> | {{ }}
> 479 | /* hactive = 848, hblank = 256 */
> 480 | .data.pixel_data.hactive_lo = 0x50,
> | }}
> 481 | .data.pixel_data.hblank_lo = 0x00,
> | }}
> 482 | .data.pixel_data.hactive_hblank_hi = 0x31,
> | }}
> 483 | /* vactive = 480, vblank = 28 */
> 484 | .data.pixel_data.vactive_lo = 0xe0,
> | }}
> 485 | .data.pixel_data.vblank_lo = 0x1c,
> | }}
> 486 | .data.pixel_data.vactive_vblank_hi = 0x10,
> | }}
> 487 | /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
> 488 | .data.pixel_data.hsync_offset_lo = 0x28,
> | }}
> 489 | .data.pixel_data.hsync_pulse_width_lo = 0x80,
> | }}
> 490 | .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
> | }}
> 491 | .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
> | }}
> ......
> 494 | }, {
> | }}
> drivers/gpu/drm/tiny/gm12u320.c:495:4: error: 'struct detailed_timing' has no member named 'pixel_clock'
> 495 | .pixel_clock = 0,
> | ^~~~~~~~~~~
> drivers/gpu/drm/tiny/gm12u320.c:496:9: error: 'union <anonymous>' has no member named 'other_data'
> 496 | .data.other_data.type = 0xfd, /* Monitor ranges */
> | ^~~~~~~~~~
> drivers/gpu/drm/tiny/gm12u320.c:496:27: warning: initialized field overwritten [-Woverride-init]
> 496 | .data.other_data.type = 0xfd, /* Monitor ranges */
> | ^~~~
> drivers/gpu/drm/tiny/gm12u320.c:496:27: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
> drivers/gpu/drm/tiny/gm12u320.c:497:9: error: 'union <anonymous>' has no member named 'other_data'
> 497 | .data.other_data.data.range.min_vfreq = 59,
> | ^~~~~~~~~~
> drivers/gpu/drm/tiny/gm12u320.c:497:43: warning: initialized field overwritten [-Woverride-init]
> 497 | .data.other_data.data.range.min_vfreq = 59,
> | ^~
> drivers/gpu/drm/tiny/gm12u320.c:497:43: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
> drivers/gpu/drm/tiny/gm12u320.c:498:9: error: 'union <anonymous>' has no member named 'other_data'
> 498 | .data.other_data.data.range.max_vfreq = 61,
> | ^~~~~~~~~~
> drivers/gpu/drm/tiny/gm12u320.c:498:43: warning: initialized field overwritten [-Woverride-init]
> 498 | .data.other_data.data.range.max_vfreq = 61,
> | ^~
> drivers/gpu/drm/tiny/gm12u320.c:498:43: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
> drivers/gpu/drm/tiny/gm12u320.c:499:9: error: 'union <anonymous>' has no member named 'other_data'
> 499 | .data.other_data.data.range.min_hfreq_khz = 29,
> | ^~~~~~~~~~
> drivers/gpu/drm/tiny/gm12u320.c:499:47: warning: initialized field overwritten [-Woverride-init]
> 499 | .data.other_data.data.range.min_hfreq_khz = 29,
> | ^~
> drivers/gpu/drm/tiny/gm12u320.c:499:47: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
> drivers/gpu/drm/tiny/gm12u320.c:500:9: error: 'union <anonymous>' has no member named 'other_data'
> 500 | .data.other_data.data.range.max_hfreq_khz = 32,
> | ^~~~~~~~~~
> drivers/gpu/drm/tiny/gm12u320.c:500:47: warning: initialized field overwritten [-Woverride-init]
> 500 | .data.other_data.data.range.max_hfreq_khz = 32,
> | ^~
> drivers/gpu/drm/tiny/gm12u320.c:500:47: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
> drivers/gpu/drm/tiny/gm12u320.c:501:9: error: 'union <anonymous>' has no member named 'other_data'
> 501 | .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
> | ^~~~~~~~~~
> drivers/gpu/drm/tiny/gm12u320.c:501:49: warning: initialized field overwritten [-Woverride-init]
> 501 | .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
> | ^
> drivers/gpu/drm/tiny/gm12u320.c:501:49: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
> drivers/gpu/drm/tiny/gm12u320.c:502:9: error: 'union <anonymous>' has no member named 'other_data'
> 502 | .data.other_data.data.range.flags = 0,
> | ^~~~~~~~~~
> drivers/gpu/drm/tiny/gm12u320.c:502:39: warning: initialized field overwritten [-Woverride-init]
> 502 | .data.other_data.data.range.flags = 0,
> | ^
> drivers/gpu/drm/tiny/gm12u320.c:502:39: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
> drivers/gpu/drm/tiny/gm12u320.c:503:9: error: 'union <anonymous>' has no member named 'other_data'
> 503 | .data.other_data.data.range.formula.cvt = {
> | ^~~~~~~~~~
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
> 464 | static struct edid gm12u320_edid = {
> | ^
> ......
> 478 | .pixel_clock = 3383,
> | {{ }}
> 479 | /* hactive = 848, hblank = 256 */
> 480 | .data.pixel_data.hactive_lo = 0x50,
> | }}
> 481 | .data.pixel_data.hblank_lo = 0x00,
> | }}
> 482 | .data.pixel_data.hactive_hblank_hi = 0x31,
> | }}
> 483 | /* vactive = 480, vblank = 28 */
> 484 | .data.pixel_data.vactive_lo = 0xe0,
> | }}
> 485 | .data.pixel_data.vblank_lo = 0x1c,
> | }}
> 486 | .data.pixel_data.vactive_vblank_hi = 0x10,
> | }}
> 487 | /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
> 488 | .data.pixel_data.hsync_offset_lo = 0x28,
> | }}
> 489 | .data.pixel_data.hsync_pulse_width_lo = 0x80,
> | }}
> 490 | .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
> | }}
> 491 | .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
> | }}
> ......
> 494 | }, {
> | }}
> 495 | .pixel_clock = 0,
> | -
> | {{0}}
> 496 | .data.other_data.type = 0xfd, /* Monitor ranges */
> | { }}
> 497 | .data.other_data.data.range.min_vfreq = 59,
> | { }}
> 498 | .data.other_data.data.range.max_vfreq = 61,
> | { }}
> 499 | .data.other_data.data.range.min_hfreq_khz = 29,
> | { }}
> 500 | .data.other_data.data.range.max_hfreq_khz = 32,
> | { }}
> 501 | .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
> | {}}
> 502 | .data.other_data.data.range.flags = 0,
> | {}}
> drivers/gpu/drm/tiny/gm12u320.c:503:45: warning: initialized field overwritten [-Woverride-init]
> 503 | .data.other_data.data.range.formula.cvt = {
> | ^
> drivers/gpu/drm/tiny/gm12u320.c:503:45: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data')
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
> 464 | static struct edid gm12u320_edid = {
> | ^
> ......
> 478 | .pixel_clock = 3383,
> | {{ }}
> 479 | /* hactive = 848, hblank = 256 */
> 480 | .data.pixel_data.hactive_lo = 0x50,
> | }}
> 481 | .data.pixel_data.hblank_lo = 0x00,
> | }}
> 482 | .data.pixel_data.hactive_hblank_hi = 0x31,
> | }}
> 483 | /* vactive = 480, vblank = 28 */
> 484 | .data.pixel_data.vactive_lo = 0xe0,
> | }}
> 485 | .data.pixel_data.vblank_lo = 0x1c,
> | }}
> 486 | .data.pixel_data.vactive_vblank_hi = 0x10,
> | }}
> 487 | /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
> 488 | .data.pixel_data.hsync_offset_lo = 0x28,
> | }}
> 489 | .data.pixel_data.hsync_pulse_width_lo = 0x80,
> | }}
> 490 | .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
> | }}
> 491 | .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
> | }}
> ......
> 494 | }, {
> | }}
> 495 | .pixel_clock = 0,
> | -
> | {{0}}
> 496 | .data.other_data.type = 0xfd, /* Monitor ranges */
> | { }}
> 497 | .data.other_data.data.range.min_vfreq = 59,
> | { }}
> 498 | .data.other_data.data.range.max_vfreq = 61,
> | { }}
> 499 | .data.other_data.data.range.min_hfreq_khz = 29,
> | { }}
> 500 | .data.other_data.data.range.max_hfreq_khz = 32,
> | { }}
> 501 | .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
> | {}}
> 502 | .data.other_data.data.range.flags = 0,
> | {}}
> ......
> 505 | }, {
> | }
> drivers/gpu/drm/tiny/gm12u320.c:506:4: error: 'struct detailed_timing' has no member named 'pixel_clock'
> 506 | .pixel_clock = 0,
> | ^~~~~~~~~~~
> drivers/gpu/drm/tiny/gm12u320.c:507:9: error: 'union <anonymous>' has no member named 'other_data'
> 507 | .data.other_data.type = 0xfc, /* Model string */
> | ^~~~~~~~~~
> drivers/gpu/drm/tiny/gm12u320.c:507:27: warning: initialized field overwritten [-Woverride-init]
> 507 | .data.other_data.type = 0xfc, /* Model string */
> | ^~~~
> drivers/gpu/drm/tiny/gm12u320.c:507:27: note: (near initialization for 'gm12u320_edid.detailed_timings[2].data.pixel_data.pixel_clock')
> drivers/gpu/drm/tiny/gm12u320.c:508:9: error: 'union <anonymous>' has no member named 'other_data'
> 508 | .data.other_data.data.str.str = {
> | ^~~~~~~~~~
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
> 464 | static struct edid gm12u320_edid = {
> | ^
> ......
> 478 | .pixel_clock = 3383,
> | {{ }}
> 479 | /* hactive = 848, hblank = 256 */
> 480 | .data.pixel_data.hactive_lo = 0x50,
> | }}
> 481 | .data.pixel_data.hblank_lo = 0x00,
> | }}
> 482 | .data.pixel_data.hactive_hblank_hi = 0x31,
> | }}
> 483 | /* vactive = 480, vblank = 28 */
> 484 | .data.pixel_data.vactive_lo = 0xe0,
> | }}
> 485 | .data.pixel_data.vblank_lo = 0x1c,
> | }}
> 486 | .data.pixel_data.vactive_vblank_hi = 0x10,
> | }}
> 487 | /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
> 488 | .data.pixel_data.hsync_offset_lo = 0x28,
> | }}
> 489 | .data.pixel_data.hsync_pulse_width_lo = 0x80,
> | }}
> 490 | .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
> | }}
> 491 | .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
> | }}
> ......
> 494 | }, {
> | }}
> 495 | .pixel_clock = 0,
> | -
> | {{0}}
> 496 | .data.other_data.type = 0xfd, /* Monitor ranges */
> | { }}
> 497 | .data.other_data.data.range.min_vfreq = 59,
> | { }}
> 498 | .data.other_data.data.range.max_vfreq = 61,
> | { }}
> 499 | .data.other_data.data.range.min_hfreq_khz = 29,
> | { }}
> 500 | .data.other_data.data.range.max_hfreq_khz = 32,
> | { }}
> 501 | .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
> | {}}
> 502 | .data.other_data.data.range.flags = 0,
> | {}}
> ......
> 505 | }, {
> | }
> 506 | .pixel_clock = 0,
> | -
> | {{0}}
> 507 | .data.other_data.type = 0xfc, /* Model string */
> | { }}
> drivers/gpu/drm/tiny/gm12u320.c:508:35: warning: initialized field overwritten [-Woverride-init]
> 508 | .data.other_data.data.str.str = {
> | ^
> drivers/gpu/drm/tiny/gm12u320.c:508:35: note: (near initialization for 'gm12u320_edid.detailed_timings[2].data.pixel_data')
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
> 464 | static struct edid gm12u320_edid = {
> | ^
> ......
> 478 | .pixel_clock = 3383,
> | {{ }}
> 479 | /* hactive = 848, hblank = 256 */
> 480 | .data.pixel_data.hactive_lo = 0x50,
> | }}
> 481 | .data.pixel_data.hblank_lo = 0x00,
> | }}
> 482 | .data.pixel_data.hactive_hblank_hi = 0x31,
> | }}
> 483 | /* vactive = 480, vblank = 28 */
> 484 | .data.pixel_data.vactive_lo = 0xe0,
> | }}
> 485 | .data.pixel_data.vblank_lo = 0x1c,
> | }}
> 486 | .data.pixel_data.vactive_vblank_hi = 0x10,
> | }}
> 487 | /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
> 488 | .data.pixel_data.hsync_offset_lo = 0x28,
> | }}
> 489 | .data.pixel_data.hsync_pulse_width_lo = 0x80,
> | }}
> 490 | .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
> | }}
> 491 | .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
> | }}
> ......
> 494 | }, {
> | }}
> 495 | .pixel_clock = 0,
> | -
> | {{0}}
> 496 | .data.other_data.type = 0xfd, /* Monitor ranges */
> | { }}
> 497 | .data.other_data.data.range.min_vfreq = 59,
> | { }}
> 498 | .data.other_data.data.range.max_vfreq = 61,
> | { }}
> 499 | .data.other_data.data.range.min_hfreq_khz = 29,
> | { }}
> 500 | .data.other_data.data.range.max_hfreq_khz = 32,
> | { }}
> 501 | .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
> | {}}
> 502 | .data.other_data.data.range.flags = 0,
> | {}}
> ......
> 505 | }, {
> | }
> 506 | .pixel_clock = 0,
> | -
> | {{0}}
> 507 | .data.other_data.type = 0xfc, /* Model string */
> | { }}
> ......
> 511 | }, {
> | }
> drivers/gpu/drm/tiny/gm12u320.c:512:4: error: 'struct detailed_timing' has no member named 'pixel_clock'
> 512 | .pixel_clock = 0,
> | ^~~~~~~~~~~
> drivers/gpu/drm/tiny/gm12u320.c:513:9: error: 'union <anonymous>' has no member named 'other_data'
> 513 | .data.other_data.type = 0xfe, /* Unspecified text / padding */
> | ^~~~~~~~~~
> drivers/gpu/drm/tiny/gm12u320.c:513:27: warning: initialized field overwritten [-Woverride-init]
> 513 | .data.other_data.type = 0xfe, /* Unspecified text / padding */
> | ^~~~
> drivers/gpu/drm/tiny/gm12u320.c:513:27: note: (near initialization for 'gm12u320_edid.detailed_timings[3].data.pixel_data.pixel_clock')
> drivers/gpu/drm/tiny/gm12u320.c:514:9: error: 'union <anonymous>' has no member named 'other_data'
> 514 | .data.other_data.data.str.str = {
> | ^~~~~~~~~~
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
> 464 | static struct edid gm12u320_edid = {
> | ^
> ......
> 478 | .pixel_clock = 3383,
> | {{ }}
> 479 | /* hactive = 848, hblank = 256 */
> 480 | .data.pixel_data.hactive_lo = 0x50,
> | }}
> 481 | .data.pixel_data.hblank_lo = 0x00,
> | }}
> 482 | .data.pixel_data.hactive_hblank_hi = 0x31,
> | }}
> 483 | /* vactive = 480, vblank = 28 */
> 484 | .data.pixel_data.vactive_lo = 0xe0,
> | }}
> 485 | .data.pixel_data.vblank_lo = 0x1c,
> | }}
> 486 | .data.pixel_data.vactive_vblank_hi = 0x10,
> | }}
> 487 | /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
> 488 | .data.pixel_data.hsync_offset_lo = 0x28,
> | }}
> 489 | .data.pixel_data.hsync_pulse_width_lo = 0x80,
> | }}
> 490 | .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
> | }}
> 491 | .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
> | }}
> ......
> 494 | }, {
> | }}
> 495 | .pixel_clock = 0,
> | -
> | {{0}}
> 496 | .data.other_data.type = 0xfd, /* Monitor ranges */
> | { }}
> 497 | .data.other_data.data.range.min_vfreq = 59,
> | { }}
> 498 | .data.other_data.data.range.max_vfreq = 61,
> | { }}
> 499 | .data.other_data.data.range.min_hfreq_khz = 29,
> | { }}
> 500 | .data.other_data.data.range.max_hfreq_khz = 32,
> | { }}
> 501 | .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
> | {}}
> 502 | .data.other_data.data.range.flags = 0,
> | {}}
> ......
> 505 | }, {
> | }
> 506 | .pixel_clock = 0,
> | -
> | {{0}}
> 507 | .data.other_data.type = 0xfc, /* Model string */
> | { }}
> ......
> 511 | }, {
> | }
> 512 | .pixel_clock = 0,
> | -
> | {{0}}
> 513 | .data.other_data.type = 0xfe, /* Unspecified text / padding */
> | { }}
> drivers/gpu/drm/tiny/gm12u320.c:514:35: warning: initialized field overwritten [-Woverride-init]
> 514 | .data.other_data.data.str.str = {
> | ^
> drivers/gpu/drm/tiny/gm12u320.c:514:35: note: (near initialization for 'gm12u320_edid.detailed_timings[3].data.pixel_data')
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
> 464 | static struct edid gm12u320_edid = {
> | ^
> ......
> 478 | .pixel_clock = 3383,
> | {{ }}
> 479 | /* hactive = 848, hblank = 256 */
> 480 | .data.pixel_data.hactive_lo = 0x50,
> | }}
> 481 | .data.pixel_data.hblank_lo = 0x00,
> | }}
> 482 | .data.pixel_data.hactive_hblank_hi = 0x31,
> | }}
> 483 | /* vactive = 480, vblank = 28 */
> 484 | .data.pixel_data.vactive_lo = 0xe0,
> | }}
> 485 | .data.pixel_data.vblank_lo = 0x1c,
> | }}
> 486 | .data.pixel_data.vactive_vblank_hi = 0x10,
> | }}
> 487 | /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
> 488 | .data.pixel_data.hsync_offset_lo = 0x28,
> | }}
> 489 | .data.pixel_data.hsync_pulse_width_lo = 0x80,
> | }}
> 490 | .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
> | }}
> 491 | .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
> | }}
> ......
> 494 | }, {
> | }}
> 495 | .pixel_clock = 0,
> | -
> | {{0}}
> 496 | .data.other_data.type = 0xfd, /* Monitor ranges */
> | { }}
> 497 | .data.other_data.data.range.min_vfreq = 59,
> | { }}
> 498 | .data.other_data.data.range.max_vfreq = 61,
> | { }}
> 499 | .data.other_data.data.range.min_hfreq_khz = 29,
> | { }}
> 500 | .data.other_data.data.range.max_hfreq_khz = 32,
> | { }}
> 501 | .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
> | {}}
> 502 | .data.other_data.data.range.flags = 0,
> | {}}
> ......
> 505 | }, {
> | }
> 506 | .pixel_clock = 0,
> | -
> | {{0}}
> 507 | .data.other_data.type = 0xfc, /* Model string */
> | { }}
> ......
> 511 | }, {
> | }
> 512 | .pixel_clock = 0,
> | -
> | {{0}}
> 513 | .data.other_data.type = 0xfe, /* Unspecified text / padding */
> | { }}
> ......
> 517 | } },
> | }
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
> 464 | static struct edid gm12u320_edid = {
> | ^
> ......
> 478 | .pixel_clock = 3383,
> | {{ }}
> 479 | /* hactive = 848, hblank = 256 */
> 480 | .data.pixel_data.hactive_lo = 0x50,
> | }}
> 481 | .data.pixel_data.hblank_lo = 0x00,
> | }}
> 482 | .data.pixel_data.hactive_hblank_hi = 0x31,
> | }}
> 483 | /* vactive = 480, vblank = 28 */
> 484 | .data.pixel_data.vactive_lo = 0xe0,
> | }}
> 485 | .data.pixel_data.vblank_lo = 0x1c,
> | }}
> 486 | .data.pixel_data.vactive_vblank_hi = 0x10,
> | }}
> 487 | /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
> 488 | .data.pixel_data.hsync_offset_lo = 0x28,
> | }}
> 489 | .data.pixel_data.hsync_pulse_width_lo = 0x80,
> | }}
> 490 | .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
> | }}
> 491 | .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
> | }}
> ......
> 494 | }, {
> | }}
> 495 | .pixel_clock = 0,
> | -
> | {{0}}
> 496 | .data.other_data.type = 0xfd, /* Monitor ranges */
> | { }}
> 497 | .data.other_data.data.range.min_vfreq = 59,
> | { }}
> 498 | .data.other_data.data.range.max_vfreq = 61,
> | { }}
> 499 | .data.other_data.data.range.min_hfreq_khz = 29,
> | { }}
> 500 | .data.other_data.data.range.max_hfreq_khz = 32,
> | { }}
> 501 | .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
> | {}}
> 502 | .data.other_data.data.range.flags = 0,
> | {}}
> ......
> 505 | }, {
> | }
> 506 | .pixel_clock = 0,
> | -
> | {{0}}
> 507 | .data.other_data.type = 0xfc, /* Model string */
> | { }}
> ......
> 511 | }, {
> | }
> 512 | .pixel_clock = 0,
> | -
> | {{0}}
> 513 | .data.other_data.type = 0xfe, /* Unspecified text / padding */
> | { }}
> ......
> 517 | } },
> | }
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
> 464 | static struct edid gm12u320_edid = {
> | ^
> ......
> 478 | .pixel_clock = 3383,
> | {{ }}
> 479 | /* hactive = 848, hblank = 256 */
> 480 | .data.pixel_data.hactive_lo = 0x50,
> | }}
> 481 | .data.pixel_data.hblank_lo = 0x00,
> | }}
> 482 | .data.pixel_data.hactive_hblank_hi = 0x31,
> | }}
> 483 | /* vactive = 480, vblank = 28 */
> 484 | .data.pixel_data.vactive_lo = 0xe0,
> | }}
> 485 | .data.pixel_data.vblank_lo = 0x1c,
> | }}
> 486 | .data.pixel_data.vactive_vblank_hi = 0x10,
> | }}
> 487 | /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
> 488 | .data.pixel_data.hsync_offset_lo = 0x28,
> | }}
> 489 | .data.pixel_data.hsync_pulse_width_lo = 0x80,
> | }}
> 490 | .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
> | }}
> 491 | .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
> | }}
> ......
> 494 | }, {
> | }}
> 495 | .pixel_clock = 0,
> | -
> | {{0}}
> 496 | .data.other_data.type = 0xfd, /* Monitor ranges */
> | { }}
> 497 | .data.other_data.data.range.min_vfreq = 59,
> | { }}
> 498 | .data.other_data.data.range.max_vfreq = 61,
> | { }}
> 499 | .data.other_data.data.range.min_hfreq_khz = 29,
> | { }}
> 500 | .data.other_data.data.range.max_hfreq_khz = 32,
> | { }}
> 501 | .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
> | {}}
> 502 | .data.other_data.data.range.flags = 0,
> | {}}
> ......
> 505 | }, {
> | }
> 506 | .pixel_clock = 0,
> | -
> | {{0}}
> 507 | .data.other_data.type = 0xfc, /* Model string */
> | { }}
> ......
> 511 | }, {
> | }
> 512 | .pixel_clock = 0,
> | -
> | {{0}}
> 513 | .data.other_data.type = 0xfe, /* Unspecified text / padding */
> | { }}
> ......
> 517 | } },
> | }
>
>
> vim +464 drivers/gpu/drm/tiny/gm12u320.c
>
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 457
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 458 /*
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 459 * We use fake EDID info so that userspace know that it is dealing with
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 460 * an Acer projector, rather then listing this as an "unknown" monitor.
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 461 * Note this assumes this driver is only ever used with the Acer C120, if we
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 462 * add support for other devices the vendor and model should be parameterized.
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 463 */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 @464 static struct edid gm12u320_edid = {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 465 .header = { 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 },
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 466 .mfg_id = { 0x04, 0x72 }, /* "ACR" */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 467 .prod_code = { 0x20, 0xc1 }, /* C120h */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 468 .serial = 0xaa55aa55,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 469 .mfg_week = 1,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 470 .mfg_year = 16,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 471 .version = 1, /* EDID 1.3 */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 472 .revision = 3, /* EDID 1.3 */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 473 .input = 0x08, /* Analog input */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 474 .features = 0x0a, /* Pref timing in DTD 1 */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 475 .standard_timings = { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 },
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 476 { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } },
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 477 .detailed_timings = { {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 478 .pixel_clock = 3383,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 479 /* hactive = 848, hblank = 256 */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 480 .data.pixel_data.hactive_lo = 0x50,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 481 .data.pixel_data.hblank_lo = 0x00,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 482 .data.pixel_data.hactive_hblank_hi = 0x31,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 483 /* vactive = 480, vblank = 28 */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 484 .data.pixel_data.vactive_lo = 0xe0,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 485 .data.pixel_data.vblank_lo = 0x1c,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 486 .data.pixel_data.vactive_vblank_hi = 0x10,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 487 /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 488 .data.pixel_data.hsync_offset_lo = 0x28,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 489 .data.pixel_data.hsync_pulse_width_lo = 0x80,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 490 .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 491 .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 492 /* Digital separate syncs, hsync+, vsync+ */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 493 .data.pixel_data.misc = 0x1e,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 494 }, {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 495 .pixel_clock = 0,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 496 .data.other_data.type = 0xfd, /* Monitor ranges */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 497 .data.other_data.data.range.min_vfreq = 59,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 498 .data.other_data.data.range.max_vfreq = 61,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 499 .data.other_data.data.range.min_hfreq_khz = 29,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 500 .data.other_data.data.range.max_hfreq_khz = 32,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 501 .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 502 .data.other_data.data.range.flags = 0,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 503 .data.other_data.data.range.formula.cvt = {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 504 0xa0, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20 },
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 505 }, {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 506 .pixel_clock = 0,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 507 .data.other_data.type = 0xfc, /* Model string */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 508 .data.other_data.data.str.str = {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 509 'P', 'r', 'o', 'j', 'e', 'c', 't', 'o', 'r', '\n',
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 510 ' ', ' ', ' ' },
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 511 }, {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 512 .pixel_clock = 0,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 513 .data.other_data.type = 0xfe, /* Unspecified text / padding */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 514 .data.other_data.data.str.str = {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 515 '\n', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ',
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 516 ' ', ' ', ' ' },
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 517 } },
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 518 .checksum = 0x13,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 519 };
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 520
--
Jani Nikula, Intel Open Source Graphics Center
next prev parent reply other threads:[~2022-03-29 7:42 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-28 9:17 [Intel-gfx] [PATCH v2 00/11] drm/edid: constify EDID parsing, with some fixes Jani Nikula
2022-03-28 9:17 ` Jani Nikula
2022-03-28 9:17 ` [Intel-gfx] [PATCH v2 01/11] drm/edid: don't modify EDID while parsing Jani Nikula
2022-03-28 9:17 ` Jani Nikula
2022-03-28 9:17 ` [Intel-gfx] [PATCH v2 02/11] drm/edid: fix reduced blanking support check Jani Nikula
2022-03-28 9:17 ` Jani Nikula
2022-03-28 16:31 ` [Intel-gfx] " Ville Syrjälä
2022-03-28 16:31 ` Ville Syrjälä
2022-03-28 9:17 ` [Intel-gfx] [PATCH v2 03/11] drm/edid: slightly restructure timing and non-timing descriptor structs Jani Nikula
2022-03-28 9:17 ` Jani Nikula
2022-03-28 9:44 ` Jani Nikula
2022-03-28 9:44 ` Jani Nikula
2022-03-28 9:44 ` [Intel-gfx] " Jani Nikula
2022-03-28 11:45 ` kernel test robot
2022-03-28 13:20 ` Jani Nikula [this message]
2022-03-28 13:20 ` Jani Nikula
2022-03-28 13:20 ` Jani Nikula
2022-03-28 12:26 ` kernel test robot
2022-03-28 12:26 ` kernel test robot
2022-03-28 12:46 ` kernel test robot
2022-03-28 9:17 ` [Intel-gfx] [PATCH v2 04/11] drm/edid: pass a timing pointer to is_display_descriptor() Jani Nikula
2022-03-28 9:17 ` Jani Nikula
2022-03-28 9:17 ` [Intel-gfx] [PATCH v2 05/11] drm/edid: use struct detailed_timing member access in is_rb() Jani Nikula
2022-03-28 9:17 ` Jani Nikula
2022-03-28 9:17 ` [Intel-gfx] [PATCH v2 06/11] drm/edid: use struct detailed_data_monitor_range member access in gtf2 functions Jani Nikula
2022-03-28 9:17 ` Jani Nikula
2022-03-28 9:17 ` [Intel-gfx] [PATCH v2 07/11] drm/edid: constify struct detailed_timing in lower level parsing Jani Nikula
2022-03-28 9:17 ` Jani Nikula
2022-03-28 9:17 ` [Intel-gfx] [PATCH v2 08/11] drm/edid: constify struct detailed_timing in parsing callbacks Jani Nikula
2022-03-28 9:17 ` Jani Nikula
2022-03-28 9:17 ` [Intel-gfx] [PATCH v2 09/11] drm/edid: constify struct edid passed to detailed blocks Jani Nikula
2022-03-28 9:17 ` Jani Nikula
2022-03-28 9:17 ` [Intel-gfx] [PATCH v2 10/11] drm/edid: constify struct edid passed around in callbacks and closure Jani Nikula
2022-03-28 9:17 ` Jani Nikula
2022-03-28 9:17 ` [Intel-gfx] [PATCH v2 11/11] drm/edid: add more general struct edid constness in the interfaces Jani Nikula
2022-03-28 9:17 ` Jani Nikula
2022-03-28 13:26 ` [Intel-gfx] [PATCH v2 00/11] drm/edid: constify EDID parsing, with some fixes Jani Nikula
2022-03-28 13:26 ` Jani Nikula
2022-03-28 14:47 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2022-03-28 14:53 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2022-03-28 15:13 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-03-28 17:47 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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