* [Intel-gfx] [PATCH v2] drm/i915: Fix HAS_LSPCON macro for platforms between GEN9 and GEN10
@ 2021-02-08 10:43 Ankit Nautiyal
2021-02-08 10:56 ` Ankit Nautiyal
2021-02-08 16:10 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Fix HAS_LSPCON macro for platforms between GEN9 and GEN10 (rev2) Patchwork
0 siblings, 2 replies; 5+ messages in thread
From: Ankit Nautiyal @ 2021-02-08 10:43 UTC (permalink / raw)
To: intel-gfx
Legacy LSPCON chip from MCA and Parade is only used for platforms
between GEN9 and GEN10. Fixing the HAS_LSPCON macro to reflect the same.
v2: Fixed the prefix to append drm (Jani N).
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 4fc9a8691873..fd04fc434ca6 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1763,7 +1763,7 @@ tgl_stepping_get(struct drm_i915_private *dev_priv)
#define HAS_GMCH(dev_priv) (INTEL_INFO(dev_priv)->display.has_gmch)
-#define HAS_LSPCON(dev_priv) (INTEL_GEN(dev_priv) >= 9)
+#define HAS_LSPCON(dev_priv) (IS_GEN_RANGE(dev_priv, 9, 10))
/* DPF == dynamic parity feature */
#define HAS_L3_DPF(dev_priv) (INTEL_INFO(dev_priv)->has_l3_dpf)
--
2.29.2
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^ permalink raw reply related [flat|nested] 5+ messages in thread
* [Intel-gfx] [PATCH v2] drm/i915: Fix HAS_LSPCON macro for platforms between GEN9 and GEN10
2021-02-08 10:43 [Intel-gfx] [PATCH v2] drm/i915: Fix HAS_LSPCON macro for platforms between GEN9 and GEN10 Ankit Nautiyal
@ 2021-02-08 10:56 ` Ankit Nautiyal
2021-02-08 11:13 ` Jani Nikula
2021-02-08 16:10 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Fix HAS_LSPCON macro for platforms between GEN9 and GEN10 (rev2) Patchwork
1 sibling, 1 reply; 5+ messages in thread
From: Ankit Nautiyal @ 2021-02-08 10:56 UTC (permalink / raw)
To: intel-gfx
Legacy LSPCON chip from MCA and Parade is only used for platforms
between GEN9 and GEN10. Fixing the HAS_LSPCON macro to reflect the same.
v2: Added the missing 'drm/' to subject (Jani N).
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 4fc9a8691873..fd04fc434ca6 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1763,7 +1763,7 @@ tgl_stepping_get(struct drm_i915_private *dev_priv)
#define HAS_GMCH(dev_priv) (INTEL_INFO(dev_priv)->display.has_gmch)
-#define HAS_LSPCON(dev_priv) (INTEL_GEN(dev_priv) >= 9)
+#define HAS_LSPCON(dev_priv) (IS_GEN_RANGE(dev_priv, 9, 10))
/* DPF == dynamic parity feature */
#define HAS_L3_DPF(dev_priv) (INTEL_INFO(dev_priv)->has_l3_dpf)
--
2.29.2
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^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [Intel-gfx] [PATCH v2] drm/i915: Fix HAS_LSPCON macro for platforms between GEN9 and GEN10
2021-02-08 10:56 ` Ankit Nautiyal
@ 2021-02-08 11:13 ` Jani Nikula
2021-02-08 11:34 ` Nautiyal, Ankit K
0 siblings, 1 reply; 5+ messages in thread
From: Jani Nikula @ 2021-02-08 11:13 UTC (permalink / raw)
To: Ankit Nautiyal, intel-gfx
On Mon, 08 Feb 2021, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
> Legacy LSPCON chip from MCA and Parade is only used for platforms
> between GEN9 and GEN10. Fixing the HAS_LSPCON macro to reflect the same.
>
> v2: Added the missing 'drm/' to subject (Jani N).
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> Acked-by: Jani Nikula <jani.nikula@intel.com>
Never mind, I pushed the earlier patch and fixed the prefix while
applying.
In general, there's no need to resend for tiny edits in commit log that
can be done while applying.
BR,
Jani.
> ---
> drivers/gpu/drm/i915/i915_drv.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 4fc9a8691873..fd04fc434ca6 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1763,7 +1763,7 @@ tgl_stepping_get(struct drm_i915_private *dev_priv)
>
> #define HAS_GMCH(dev_priv) (INTEL_INFO(dev_priv)->display.has_gmch)
>
> -#define HAS_LSPCON(dev_priv) (INTEL_GEN(dev_priv) >= 9)
> +#define HAS_LSPCON(dev_priv) (IS_GEN_RANGE(dev_priv, 9, 10))
>
> /* DPF == dynamic parity feature */
> #define HAS_L3_DPF(dev_priv) (INTEL_INFO(dev_priv)->has_l3_dpf)
--
Jani Nikula, Intel Open Source Graphics Center
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^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [Intel-gfx] [PATCH v2] drm/i915: Fix HAS_LSPCON macro for platforms between GEN9 and GEN10
2021-02-08 11:13 ` Jani Nikula
@ 2021-02-08 11:34 ` Nautiyal, Ankit K
0 siblings, 0 replies; 5+ messages in thread
From: Nautiyal, Ankit K @ 2021-02-08 11:34 UTC (permalink / raw)
To: Jani Nikula, intel-gfx
On 2/8/2021 4:43 PM, Jani Nikula wrote:
> On Mon, 08 Feb 2021, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
>> Legacy LSPCON chip from MCA and Parade is only used for platforms
>> between GEN9 and GEN10. Fixing the HAS_LSPCON macro to reflect the same.
>>
>> v2: Added the missing 'drm/' to subject (Jani N).
>>
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> Acked-by: Jani Nikula <jani.nikula@intel.com>
> Never mind, I pushed the earlier patch and fixed the prefix while
> applying.
>
> In general, there's no need to resend for tiny edits in commit log that
> can be done while applying.
>
> BR,
> Jani.
>
Noted. Thanks Jani for yet again fixing the patch.
Regards,
Ankit
>> ---
>> drivers/gpu/drm/i915/i915_drv.h | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>> index 4fc9a8691873..fd04fc434ca6 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.h
>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>> @@ -1763,7 +1763,7 @@ tgl_stepping_get(struct drm_i915_private *dev_priv)
>>
>> #define HAS_GMCH(dev_priv) (INTEL_INFO(dev_priv)->display.has_gmch)
>>
>> -#define HAS_LSPCON(dev_priv) (INTEL_GEN(dev_priv) >= 9)
>> +#define HAS_LSPCON(dev_priv) (IS_GEN_RANGE(dev_priv, 9, 10))
>>
>> /* DPF == dynamic parity feature */
>> #define HAS_L3_DPF(dev_priv) (INTEL_INFO(dev_priv)->has_l3_dpf)
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Fix HAS_LSPCON macro for platforms between GEN9 and GEN10 (rev2)
2021-02-08 10:43 [Intel-gfx] [PATCH v2] drm/i915: Fix HAS_LSPCON macro for platforms between GEN9 and GEN10 Ankit Nautiyal
2021-02-08 10:56 ` Ankit Nautiyal
@ 2021-02-08 16:10 ` Patchwork
1 sibling, 0 replies; 5+ messages in thread
From: Patchwork @ 2021-02-08 16:10 UTC (permalink / raw)
To: Nautiyal, Ankit K; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 485 bytes --]
== Series Details ==
Series: drm/i915: Fix HAS_LSPCON macro for platforms between GEN9 and GEN10 (rev2)
URL : https://patchwork.freedesktop.org/series/86842/
State : failure
== Summary ==
Applying: drm/i915: Fix HAS_LSPCON macro for platforms between GEN9 and GEN10
Using index info to reconstruct a base tree...
M drivers/gpu/drm/i915/i915_drv.h
Falling back to patching base and 3-way merge...
Auto-merging drivers/gpu/drm/i915/i915_drv.h
No changes -- Patch already applied.
[-- Attachment #1.2: Type: text/html, Size: 985 bytes --]
[-- Attachment #2: Type: text/plain, Size: 160 bytes --]
_______________________________________________
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^ permalink raw reply [flat|nested] 5+ messages in thread
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2021-02-08 10:43 [Intel-gfx] [PATCH v2] drm/i915: Fix HAS_LSPCON macro for platforms between GEN9 and GEN10 Ankit Nautiyal
2021-02-08 10:56 ` Ankit Nautiyal
2021-02-08 11:13 ` Jani Nikula
2021-02-08 11:34 ` Nautiyal, Ankit K
2021-02-08 16:10 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Fix HAS_LSPCON macro for platforms between GEN9 and GEN10 (rev2) Patchwork
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