* [RFC 1/2] drm/i915: add display uncore helpers @ 2019-10-29 10:51 ` Jani Nikula 0 siblings, 0 replies; 16+ messages in thread From: Jani Nikula @ 2019-10-29 10:51 UTC (permalink / raw) To: intel-gfx; +Cc: Jani Nikula, Lucas De Marchi Add convenience helpers for the most common uncore operations with struct drm_i915_private * as context rather than struct intel_uncore *. The goal is to replace all instances of I915_READ(), I915_POSTING_READ(), and I915_WRITE() in display/ with these, to finally be able to get rid of the implicit dev_priv local parameter use. The idea is that any non-u32 reads or writes are special enough that they can use the intel_uncore_* functions directly. Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> --- Let the name bikeshedding commence! Some options are: - intel_de_read, intel_de_write (this patch, de for display engine) - intel_display_read, intel_display_write (too long I think) - intel_read, intel_write - i915_read, i915_write - display_read, display_write - ? Here's a draft cocci patch that could be used on display/ subdir, en masse: @@ expression REG, OFFSET; @@ - I915_READ(REG) + intel_de_read(dev_priv, REG) @@ expression REG, OFFSET; @@ - I915_POSTING_READ(REG) + intel_de_posting_read(dev_priv, REG) @@ expression REG, OFFSET; @@ - I915_WRITE(REG, OFFSET) + intel_de_write(dev_priv, REG, OFFSET) Conveniently, we *know* dev_priv is everywhere the change is needed. This enables us to make the s/dev_priv/i915/ rename on top. We also need to discuss whether it's better to separate the steps to two (even if in the same patch series) or if it's better to add the dev_priv parameter as i915 directly. --- .../drm/i915/display/intel_display_uncore.h | 36 +++++++++++++++++++ 1 file changed, 36 insertions(+) create mode 100644 drivers/gpu/drm/i915/display/intel_display_uncore.h diff --git a/drivers/gpu/drm/i915/display/intel_display_uncore.h b/drivers/gpu/drm/i915/display/intel_display_uncore.h new file mode 100644 index 000000000000..e6c8c56fb0f9 --- /dev/null +++ b/drivers/gpu/drm/i915/display/intel_display_uncore.h @@ -0,0 +1,36 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright © 2019 Intel Corporation + */ + +#ifndef __INTEL_DISPLAY_UNCORE_H__ +#define __INTEL_DISPLAY_UNCORE_H__ + +#include "i915_drv.h" +#include "i915_reg.h" +#include "intel_uncore.h" + +static inline u32 intel_de_read(struct drm_i915_private *i915, i915_reg_t reg) +{ + return intel_uncore_read(&i915->uncore, reg); +} + +static inline void intel_de_posting_read(struct drm_i915_private *i915, + i915_reg_t reg) +{ + intel_uncore_posting_read(&i915->uncore, reg); +} + +static inline void intel_de_write(struct drm_i915_private *i915, i915_reg_t reg, + u32 val) +{ + intel_uncore_write(&i915->uncore, reg, val); +} + +static inline void intel_de_rmw(struct drm_i915_private *i915, i915_reg_t reg, + u32 clear, u32 set) +{ + intel_uncore_rmw(&i915->uncore, reg, clear, set); +} + +#endif /* __INTEL_DISPLAY_UNCORE_H__ */ -- 2.20.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 16+ messages in thread
* [Intel-gfx] [RFC 1/2] drm/i915: add display uncore helpers @ 2019-10-29 10:51 ` Jani Nikula 0 siblings, 0 replies; 16+ messages in thread From: Jani Nikula @ 2019-10-29 10:51 UTC (permalink / raw) To: intel-gfx; +Cc: Jani Nikula, Lucas De Marchi Add convenience helpers for the most common uncore operations with struct drm_i915_private * as context rather than struct intel_uncore *. The goal is to replace all instances of I915_READ(), I915_POSTING_READ(), and I915_WRITE() in display/ with these, to finally be able to get rid of the implicit dev_priv local parameter use. The idea is that any non-u32 reads or writes are special enough that they can use the intel_uncore_* functions directly. Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> --- Let the name bikeshedding commence! Some options are: - intel_de_read, intel_de_write (this patch, de for display engine) - intel_display_read, intel_display_write (too long I think) - intel_read, intel_write - i915_read, i915_write - display_read, display_write - ? Here's a draft cocci patch that could be used on display/ subdir, en masse: @@ expression REG, OFFSET; @@ - I915_READ(REG) + intel_de_read(dev_priv, REG) @@ expression REG, OFFSET; @@ - I915_POSTING_READ(REG) + intel_de_posting_read(dev_priv, REG) @@ expression REG, OFFSET; @@ - I915_WRITE(REG, OFFSET) + intel_de_write(dev_priv, REG, OFFSET) Conveniently, we *know* dev_priv is everywhere the change is needed. This enables us to make the s/dev_priv/i915/ rename on top. We also need to discuss whether it's better to separate the steps to two (even if in the same patch series) or if it's better to add the dev_priv parameter as i915 directly. --- .../drm/i915/display/intel_display_uncore.h | 36 +++++++++++++++++++ 1 file changed, 36 insertions(+) create mode 100644 drivers/gpu/drm/i915/display/intel_display_uncore.h diff --git a/drivers/gpu/drm/i915/display/intel_display_uncore.h b/drivers/gpu/drm/i915/display/intel_display_uncore.h new file mode 100644 index 000000000000..e6c8c56fb0f9 --- /dev/null +++ b/drivers/gpu/drm/i915/display/intel_display_uncore.h @@ -0,0 +1,36 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright © 2019 Intel Corporation + */ + +#ifndef __INTEL_DISPLAY_UNCORE_H__ +#define __INTEL_DISPLAY_UNCORE_H__ + +#include "i915_drv.h" +#include "i915_reg.h" +#include "intel_uncore.h" + +static inline u32 intel_de_read(struct drm_i915_private *i915, i915_reg_t reg) +{ + return intel_uncore_read(&i915->uncore, reg); +} + +static inline void intel_de_posting_read(struct drm_i915_private *i915, + i915_reg_t reg) +{ + intel_uncore_posting_read(&i915->uncore, reg); +} + +static inline void intel_de_write(struct drm_i915_private *i915, i915_reg_t reg, + u32 val) +{ + intel_uncore_write(&i915->uncore, reg, val); +} + +static inline void intel_de_rmw(struct drm_i915_private *i915, i915_reg_t reg, + u32 clear, u32 set) +{ + intel_uncore_rmw(&i915->uncore, reg, clear, set); +} + +#endif /* __INTEL_DISPLAY_UNCORE_H__ */ -- 2.20.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 16+ messages in thread
* [RFC 2/2] drm/i915/audio: replace I915_*() calls with the new intel_de_*() calls @ 2019-10-29 10:51 ` Jani Nikula 0 siblings, 0 replies; 16+ messages in thread From: Jani Nikula @ 2019-10-29 10:51 UTC (permalink / raw) To: intel-gfx; +Cc: Jani Nikula Not for merging, for demo only. Signed-off-by: Jani Nikula <jani.nikula@intel.com> --- drivers/gpu/drm/i915/display/intel_audio.c | 113 +++++++++++---------- 1 file changed, 59 insertions(+), 54 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_audio.c b/drivers/gpu/drm/i915/display/intel_audio.c index 85e6b2bbb34f..46d7bd977510 100644 --- a/drivers/gpu/drm/i915/display/intel_audio.c +++ b/drivers/gpu/drm/i915/display/intel_audio.c @@ -32,6 +32,7 @@ #include "intel_audio.h" #include "intel_display_types.h" #include "intel_lpe_audio.h" +#include "intel_display_uncore.h" /** * DOC: High Definition Audio over HDMI and Display Port @@ -291,18 +292,18 @@ static bool intel_eld_uptodate(struct drm_connector *connector, u32 tmp; int i; - tmp = I915_READ(reg_eldv); + tmp = intel_de_read(dev_priv, reg_eldv); tmp &= bits_eldv; if (!tmp) return false; - tmp = I915_READ(reg_elda); + tmp = intel_de_read(dev_priv, reg_elda); tmp &= ~bits_elda; - I915_WRITE(reg_elda, tmp); + intel_de_write(dev_priv, reg_elda, tmp); for (i = 0; i < drm_eld_size(eld) / 4; i++) - if (I915_READ(reg_edid) != *((const u32 *)eld + i)) + if (intel_de_read(dev_priv, reg_edid) != *((const u32 *)eld + i)) return false; return true; @@ -317,16 +318,16 @@ static void g4x_audio_codec_disable(struct intel_encoder *encoder, DRM_DEBUG_KMS("Disable audio codec\n"); - tmp = I915_READ(G4X_AUD_VID_DID); + tmp = intel_de_read(dev_priv, G4X_AUD_VID_DID); if (tmp == INTEL_AUDIO_DEVBLC || tmp == INTEL_AUDIO_DEVCL) eldv = G4X_ELDV_DEVCL_DEVBLC; else eldv = G4X_ELDV_DEVCTG; /* Invalidate ELD */ - tmp = I915_READ(G4X_AUD_CNTL_ST); + tmp = intel_de_read(dev_priv, G4X_AUD_CNTL_ST); tmp &= ~eldv; - I915_WRITE(G4X_AUD_CNTL_ST, tmp); + intel_de_write(dev_priv, G4X_AUD_CNTL_ST, tmp); } static void g4x_audio_codec_enable(struct intel_encoder *encoder, @@ -342,7 +343,7 @@ static void g4x_audio_codec_enable(struct intel_encoder *encoder, DRM_DEBUG_KMS("Enable audio codec, %u bytes ELD\n", drm_eld_size(eld)); - tmp = I915_READ(G4X_AUD_VID_DID); + tmp = intel_de_read(dev_priv, G4X_AUD_VID_DID); if (tmp == INTEL_AUDIO_DEVBLC || tmp == INTEL_AUDIO_DEVCL) eldv = G4X_ELDV_DEVCL_DEVBLC; else @@ -354,19 +355,20 @@ static void g4x_audio_codec_enable(struct intel_encoder *encoder, G4X_HDMIW_HDMIEDID)) return; - tmp = I915_READ(G4X_AUD_CNTL_ST); + tmp = intel_de_read(dev_priv, G4X_AUD_CNTL_ST); tmp &= ~(eldv | G4X_ELD_ADDR_MASK); len = (tmp >> 9) & 0x1f; /* ELD buffer size */ - I915_WRITE(G4X_AUD_CNTL_ST, tmp); + intel_de_write(dev_priv, G4X_AUD_CNTL_ST, tmp); len = min(drm_eld_size(eld) / 4, len); DRM_DEBUG_DRIVER("ELD size %d\n", len); for (i = 0; i < len; i++) - I915_WRITE(G4X_HDMIW_HDMIEDID, *((const u32 *)eld + i)); + intel_de_write(dev_priv, G4X_HDMIW_HDMIEDID, + *((const u32 *)eld + i)); - tmp = I915_READ(G4X_AUD_CNTL_ST); + tmp = intel_de_read(dev_priv, G4X_AUD_CNTL_ST); tmp |= eldv; - I915_WRITE(G4X_AUD_CNTL_ST, tmp); + intel_de_write(dev_priv, G4X_AUD_CNTL_ST, tmp); } static void @@ -388,7 +390,7 @@ hsw_dp_audio_config_update(struct intel_encoder *encoder, else DRM_DEBUG_KMS("using automatic Maud, Naud\n"); - tmp = I915_READ(HSW_AUD_CFG(cpu_transcoder)); + tmp = intel_de_read(dev_priv, HSW_AUD_CFG(cpu_transcoder)); tmp &= ~AUD_CONFIG_N_VALUE_INDEX; tmp &= ~AUD_CONFIG_PIXEL_CLOCK_HDMI_MASK; tmp &= ~AUD_CONFIG_N_PROG_ENABLE; @@ -400,9 +402,9 @@ hsw_dp_audio_config_update(struct intel_encoder *encoder, tmp |= AUD_CONFIG_N_PROG_ENABLE; } - I915_WRITE(HSW_AUD_CFG(cpu_transcoder), tmp); + intel_de_write(dev_priv, HSW_AUD_CFG(cpu_transcoder), tmp); - tmp = I915_READ(HSW_AUD_M_CTS_ENABLE(cpu_transcoder)); + tmp = intel_de_read(dev_priv, HSW_AUD_M_CTS_ENABLE(cpu_transcoder)); tmp &= ~AUD_CONFIG_M_MASK; tmp &= ~AUD_M_CTS_M_VALUE_INDEX; tmp &= ~AUD_M_CTS_M_PROG_ENABLE; @@ -413,7 +415,7 @@ hsw_dp_audio_config_update(struct intel_encoder *encoder, tmp |= AUD_M_CTS_M_PROG_ENABLE; } - I915_WRITE(HSW_AUD_M_CTS_ENABLE(cpu_transcoder), tmp); + intel_de_write(dev_priv, HSW_AUD_M_CTS_ENABLE(cpu_transcoder), tmp); } static void @@ -429,7 +431,7 @@ hsw_hdmi_audio_config_update(struct intel_encoder *encoder, rate = acomp ? acomp->aud_sample_rate[port] : 0; - tmp = I915_READ(HSW_AUD_CFG(cpu_transcoder)); + tmp = intel_de_read(dev_priv, HSW_AUD_CFG(cpu_transcoder)); tmp &= ~AUD_CONFIG_N_VALUE_INDEX; tmp &= ~AUD_CONFIG_PIXEL_CLOCK_HDMI_MASK; tmp &= ~AUD_CONFIG_N_PROG_ENABLE; @@ -446,16 +448,16 @@ hsw_hdmi_audio_config_update(struct intel_encoder *encoder, DRM_DEBUG_KMS("using automatic N\n"); } - I915_WRITE(HSW_AUD_CFG(cpu_transcoder), tmp); + intel_de_write(dev_priv, HSW_AUD_CFG(cpu_transcoder), tmp); /* * Let's disable "Enable CTS or M Prog bit" * and let HW calculate the value */ - tmp = I915_READ(HSW_AUD_M_CTS_ENABLE(cpu_transcoder)); + tmp = intel_de_read(dev_priv, HSW_AUD_M_CTS_ENABLE(cpu_transcoder)); tmp &= ~AUD_M_CTS_M_PROG_ENABLE; tmp &= ~AUD_M_CTS_M_VALUE_INDEX; - I915_WRITE(HSW_AUD_M_CTS_ENABLE(cpu_transcoder), tmp); + intel_de_write(dev_priv, HSW_AUD_M_CTS_ENABLE(cpu_transcoder), tmp); } static void @@ -482,20 +484,20 @@ static void hsw_audio_codec_disable(struct intel_encoder *encoder, mutex_lock(&dev_priv->av_mutex); /* Disable timestamps */ - tmp = I915_READ(HSW_AUD_CFG(cpu_transcoder)); + tmp = intel_de_read(dev_priv, HSW_AUD_CFG(cpu_transcoder)); tmp &= ~AUD_CONFIG_N_VALUE_INDEX; tmp |= AUD_CONFIG_N_PROG_ENABLE; tmp &= ~AUD_CONFIG_UPPER_N_MASK; tmp &= ~AUD_CONFIG_LOWER_N_MASK; if (intel_crtc_has_dp_encoder(old_crtc_state)) tmp |= AUD_CONFIG_N_VALUE_INDEX; - I915_WRITE(HSW_AUD_CFG(cpu_transcoder), tmp); + intel_de_write(dev_priv, HSW_AUD_CFG(cpu_transcoder), tmp); /* Invalidate ELD */ - tmp = I915_READ(HSW_AUD_PIN_ELD_CP_VLD); + tmp = intel_de_read(dev_priv, HSW_AUD_PIN_ELD_CP_VLD); tmp &= ~AUDIO_ELD_VALID(cpu_transcoder); tmp &= ~AUDIO_OUTPUT_ENABLE(cpu_transcoder); - I915_WRITE(HSW_AUD_PIN_ELD_CP_VLD, tmp); + intel_de_write(dev_priv, HSW_AUD_PIN_ELD_CP_VLD, tmp); mutex_unlock(&dev_priv->av_mutex); } @@ -517,10 +519,10 @@ static void hsw_audio_codec_enable(struct intel_encoder *encoder, mutex_lock(&dev_priv->av_mutex); /* Enable audio presence detect, invalidate ELD */ - tmp = I915_READ(HSW_AUD_PIN_ELD_CP_VLD); + tmp = intel_de_read(dev_priv, HSW_AUD_PIN_ELD_CP_VLD); tmp |= AUDIO_OUTPUT_ENABLE(cpu_transcoder); tmp &= ~AUDIO_ELD_VALID(cpu_transcoder); - I915_WRITE(HSW_AUD_PIN_ELD_CP_VLD, tmp); + intel_de_write(dev_priv, HSW_AUD_PIN_ELD_CP_VLD, tmp); /* * FIXME: We're supposed to wait for vblank here, but we have vblanks @@ -530,19 +532,20 @@ static void hsw_audio_codec_enable(struct intel_encoder *encoder, */ /* Reset ELD write address */ - tmp = I915_READ(HSW_AUD_DIP_ELD_CTRL(cpu_transcoder)); + tmp = intel_de_read(dev_priv, HSW_AUD_DIP_ELD_CTRL(cpu_transcoder)); tmp &= ~IBX_ELD_ADDRESS_MASK; - I915_WRITE(HSW_AUD_DIP_ELD_CTRL(cpu_transcoder), tmp); + intel_de_write(dev_priv, HSW_AUD_DIP_ELD_CTRL(cpu_transcoder), tmp); /* Up to 84 bytes of hw ELD buffer */ len = min(drm_eld_size(eld), 84); for (i = 0; i < len / 4; i++) - I915_WRITE(HSW_AUD_EDID_DATA(cpu_transcoder), *((const u32 *)eld + i)); + intel_de_write(dev_priv, HSW_AUD_EDID_DATA(cpu_transcoder), + *((const u32 *)eld + i)); /* ELD valid */ - tmp = I915_READ(HSW_AUD_PIN_ELD_CP_VLD); + tmp = intel_de_read(dev_priv, HSW_AUD_PIN_ELD_CP_VLD); tmp |= AUDIO_ELD_VALID(cpu_transcoder); - I915_WRITE(HSW_AUD_PIN_ELD_CP_VLD, tmp); + intel_de_write(dev_priv, HSW_AUD_PIN_ELD_CP_VLD, tmp); /* Enable timestamps */ hsw_audio_config_update(encoder, crtc_state); @@ -580,21 +583,21 @@ static void ilk_audio_codec_disable(struct intel_encoder *encoder, } /* Disable timestamps */ - tmp = I915_READ(aud_config); + tmp = intel_de_read(dev_priv, aud_config); tmp &= ~AUD_CONFIG_N_VALUE_INDEX; tmp |= AUD_CONFIG_N_PROG_ENABLE; tmp &= ~AUD_CONFIG_UPPER_N_MASK; tmp &= ~AUD_CONFIG_LOWER_N_MASK; if (intel_crtc_has_dp_encoder(old_crtc_state)) tmp |= AUD_CONFIG_N_VALUE_INDEX; - I915_WRITE(aud_config, tmp); + intel_de_write(dev_priv, aud_config, tmp); eldv = IBX_ELD_VALID(port); /* Invalidate ELD */ - tmp = I915_READ(aud_cntrl_st2); + tmp = intel_de_read(dev_priv, aud_cntrl_st2); tmp &= ~eldv; - I915_WRITE(aud_cntrl_st2, tmp); + intel_de_write(dev_priv, aud_cntrl_st2, tmp); } static void ilk_audio_codec_enable(struct intel_encoder *encoder, @@ -646,27 +649,28 @@ static void ilk_audio_codec_enable(struct intel_encoder *encoder, eldv = IBX_ELD_VALID(port); /* Invalidate ELD */ - tmp = I915_READ(aud_cntrl_st2); + tmp = intel_de_read(dev_priv, aud_cntrl_st2); tmp &= ~eldv; - I915_WRITE(aud_cntrl_st2, tmp); + intel_de_write(dev_priv, aud_cntrl_st2, tmp); /* Reset ELD write address */ - tmp = I915_READ(aud_cntl_st); + tmp = intel_de_read(dev_priv, aud_cntl_st); tmp &= ~IBX_ELD_ADDRESS_MASK; - I915_WRITE(aud_cntl_st, tmp); + intel_de_write(dev_priv, aud_cntl_st, tmp); /* Up to 84 bytes of hw ELD buffer */ len = min(drm_eld_size(eld), 84); for (i = 0; i < len / 4; i++) - I915_WRITE(hdmiw_hdmiedid, *((const u32 *)eld + i)); + intel_de_write(dev_priv, hdmiw_hdmiedid, + *((const u32 *)eld + i)); /* ELD valid */ - tmp = I915_READ(aud_cntrl_st2); + tmp = intel_de_read(dev_priv, aud_cntrl_st2); tmp |= eldv; - I915_WRITE(aud_cntrl_st2, tmp); + intel_de_write(dev_priv, aud_cntrl_st2, tmp); /* Enable timestamps */ - tmp = I915_READ(aud_config); + tmp = intel_de_read(dev_priv, aud_config); tmp &= ~AUD_CONFIG_N_VALUE_INDEX; tmp &= ~AUD_CONFIG_N_PROG_ENABLE; tmp &= ~AUD_CONFIG_PIXEL_CLOCK_HDMI_MASK; @@ -674,7 +678,7 @@ static void ilk_audio_codec_enable(struct intel_encoder *encoder, tmp |= AUD_CONFIG_N_VALUE_INDEX; else tmp |= audio_config_hdmi_pixel_clock(crtc_state); - I915_WRITE(aud_config, tmp); + intel_de_write(dev_priv, aud_config, tmp); } /** @@ -850,7 +854,8 @@ static unsigned long i915_audio_component_get_power(struct device *kdev) if (dev_priv->audio_power_refcount++ == 0) { if (IS_TIGERLAKE(dev_priv) || IS_ICELAKE(dev_priv)) { - I915_WRITE(AUD_FREQ_CNTRL, dev_priv->audio_freq_cntrl); + intel_de_write(dev_priv, AUD_FREQ_CNTRL, + dev_priv->audio_freq_cntrl); DRM_DEBUG_KMS("restored AUD_FREQ_CNTRL to 0x%x\n", dev_priv->audio_freq_cntrl); } @@ -860,9 +865,8 @@ static unsigned long i915_audio_component_get_power(struct device *kdev) glk_force_audio_cdclk(dev_priv, true); if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) - I915_WRITE(AUD_PIN_BUF_CTL, - (I915_READ(AUD_PIN_BUF_CTL) | - AUD_PIN_BUF_ENABLE)); + intel_de_write(dev_priv, AUD_PIN_BUF_CTL, + (intel_de_read(dev_priv, AUD_PIN_BUF_CTL) | AUD_PIN_BUF_ENABLE)); } return ret; @@ -897,15 +901,15 @@ static void i915_audio_component_codec_wake_override(struct device *kdev, * Enable/disable generating the codec wake signal, overriding the * internal logic to generate the codec wake to controller. */ - tmp = I915_READ(HSW_AUD_CHICKENBIT); + tmp = intel_de_read(dev_priv, HSW_AUD_CHICKENBIT); tmp &= ~SKL_AUD_CODEC_WAKE_SIGNAL; - I915_WRITE(HSW_AUD_CHICKENBIT, tmp); + intel_de_write(dev_priv, HSW_AUD_CHICKENBIT, tmp); usleep_range(1000, 1500); if (enable) { - tmp = I915_READ(HSW_AUD_CHICKENBIT); + tmp = intel_de_read(dev_priv, HSW_AUD_CHICKENBIT); tmp |= SKL_AUD_CODEC_WAKE_SIGNAL; - I915_WRITE(HSW_AUD_CHICKENBIT, tmp); + intel_de_write(dev_priv, HSW_AUD_CHICKENBIT, tmp); usleep_range(1000, 1500); } @@ -1125,7 +1129,8 @@ static void i915_audio_component_init(struct drm_i915_private *dev_priv) } if (IS_TIGERLAKE(dev_priv) || IS_ICELAKE(dev_priv)) { - dev_priv->audio_freq_cntrl = I915_READ(AUD_FREQ_CNTRL); + dev_priv->audio_freq_cntrl = intel_de_read(dev_priv, + AUD_FREQ_CNTRL); DRM_DEBUG_KMS("init value of AUD_FREQ_CNTRL of 0x%x\n", dev_priv->audio_freq_cntrl); } -- 2.20.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 16+ messages in thread
* [Intel-gfx] [RFC 2/2] drm/i915/audio: replace I915_*() calls with the new intel_de_*() calls @ 2019-10-29 10:51 ` Jani Nikula 0 siblings, 0 replies; 16+ messages in thread From: Jani Nikula @ 2019-10-29 10:51 UTC (permalink / raw) To: intel-gfx; +Cc: Jani Nikula Not for merging, for demo only. Signed-off-by: Jani Nikula <jani.nikula@intel.com> --- drivers/gpu/drm/i915/display/intel_audio.c | 113 +++++++++++---------- 1 file changed, 59 insertions(+), 54 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_audio.c b/drivers/gpu/drm/i915/display/intel_audio.c index 85e6b2bbb34f..46d7bd977510 100644 --- a/drivers/gpu/drm/i915/display/intel_audio.c +++ b/drivers/gpu/drm/i915/display/intel_audio.c @@ -32,6 +32,7 @@ #include "intel_audio.h" #include "intel_display_types.h" #include "intel_lpe_audio.h" +#include "intel_display_uncore.h" /** * DOC: High Definition Audio over HDMI and Display Port @@ -291,18 +292,18 @@ static bool intel_eld_uptodate(struct drm_connector *connector, u32 tmp; int i; - tmp = I915_READ(reg_eldv); + tmp = intel_de_read(dev_priv, reg_eldv); tmp &= bits_eldv; if (!tmp) return false; - tmp = I915_READ(reg_elda); + tmp = intel_de_read(dev_priv, reg_elda); tmp &= ~bits_elda; - I915_WRITE(reg_elda, tmp); + intel_de_write(dev_priv, reg_elda, tmp); for (i = 0; i < drm_eld_size(eld) / 4; i++) - if (I915_READ(reg_edid) != *((const u32 *)eld + i)) + if (intel_de_read(dev_priv, reg_edid) != *((const u32 *)eld + i)) return false; return true; @@ -317,16 +318,16 @@ static void g4x_audio_codec_disable(struct intel_encoder *encoder, DRM_DEBUG_KMS("Disable audio codec\n"); - tmp = I915_READ(G4X_AUD_VID_DID); + tmp = intel_de_read(dev_priv, G4X_AUD_VID_DID); if (tmp == INTEL_AUDIO_DEVBLC || tmp == INTEL_AUDIO_DEVCL) eldv = G4X_ELDV_DEVCL_DEVBLC; else eldv = G4X_ELDV_DEVCTG; /* Invalidate ELD */ - tmp = I915_READ(G4X_AUD_CNTL_ST); + tmp = intel_de_read(dev_priv, G4X_AUD_CNTL_ST); tmp &= ~eldv; - I915_WRITE(G4X_AUD_CNTL_ST, tmp); + intel_de_write(dev_priv, G4X_AUD_CNTL_ST, tmp); } static void g4x_audio_codec_enable(struct intel_encoder *encoder, @@ -342,7 +343,7 @@ static void g4x_audio_codec_enable(struct intel_encoder *encoder, DRM_DEBUG_KMS("Enable audio codec, %u bytes ELD\n", drm_eld_size(eld)); - tmp = I915_READ(G4X_AUD_VID_DID); + tmp = intel_de_read(dev_priv, G4X_AUD_VID_DID); if (tmp == INTEL_AUDIO_DEVBLC || tmp == INTEL_AUDIO_DEVCL) eldv = G4X_ELDV_DEVCL_DEVBLC; else @@ -354,19 +355,20 @@ static void g4x_audio_codec_enable(struct intel_encoder *encoder, G4X_HDMIW_HDMIEDID)) return; - tmp = I915_READ(G4X_AUD_CNTL_ST); + tmp = intel_de_read(dev_priv, G4X_AUD_CNTL_ST); tmp &= ~(eldv | G4X_ELD_ADDR_MASK); len = (tmp >> 9) & 0x1f; /* ELD buffer size */ - I915_WRITE(G4X_AUD_CNTL_ST, tmp); + intel_de_write(dev_priv, G4X_AUD_CNTL_ST, tmp); len = min(drm_eld_size(eld) / 4, len); DRM_DEBUG_DRIVER("ELD size %d\n", len); for (i = 0; i < len; i++) - I915_WRITE(G4X_HDMIW_HDMIEDID, *((const u32 *)eld + i)); + intel_de_write(dev_priv, G4X_HDMIW_HDMIEDID, + *((const u32 *)eld + i)); - tmp = I915_READ(G4X_AUD_CNTL_ST); + tmp = intel_de_read(dev_priv, G4X_AUD_CNTL_ST); tmp |= eldv; - I915_WRITE(G4X_AUD_CNTL_ST, tmp); + intel_de_write(dev_priv, G4X_AUD_CNTL_ST, tmp); } static void @@ -388,7 +390,7 @@ hsw_dp_audio_config_update(struct intel_encoder *encoder, else DRM_DEBUG_KMS("using automatic Maud, Naud\n"); - tmp = I915_READ(HSW_AUD_CFG(cpu_transcoder)); + tmp = intel_de_read(dev_priv, HSW_AUD_CFG(cpu_transcoder)); tmp &= ~AUD_CONFIG_N_VALUE_INDEX; tmp &= ~AUD_CONFIG_PIXEL_CLOCK_HDMI_MASK; tmp &= ~AUD_CONFIG_N_PROG_ENABLE; @@ -400,9 +402,9 @@ hsw_dp_audio_config_update(struct intel_encoder *encoder, tmp |= AUD_CONFIG_N_PROG_ENABLE; } - I915_WRITE(HSW_AUD_CFG(cpu_transcoder), tmp); + intel_de_write(dev_priv, HSW_AUD_CFG(cpu_transcoder), tmp); - tmp = I915_READ(HSW_AUD_M_CTS_ENABLE(cpu_transcoder)); + tmp = intel_de_read(dev_priv, HSW_AUD_M_CTS_ENABLE(cpu_transcoder)); tmp &= ~AUD_CONFIG_M_MASK; tmp &= ~AUD_M_CTS_M_VALUE_INDEX; tmp &= ~AUD_M_CTS_M_PROG_ENABLE; @@ -413,7 +415,7 @@ hsw_dp_audio_config_update(struct intel_encoder *encoder, tmp |= AUD_M_CTS_M_PROG_ENABLE; } - I915_WRITE(HSW_AUD_M_CTS_ENABLE(cpu_transcoder), tmp); + intel_de_write(dev_priv, HSW_AUD_M_CTS_ENABLE(cpu_transcoder), tmp); } static void @@ -429,7 +431,7 @@ hsw_hdmi_audio_config_update(struct intel_encoder *encoder, rate = acomp ? acomp->aud_sample_rate[port] : 0; - tmp = I915_READ(HSW_AUD_CFG(cpu_transcoder)); + tmp = intel_de_read(dev_priv, HSW_AUD_CFG(cpu_transcoder)); tmp &= ~AUD_CONFIG_N_VALUE_INDEX; tmp &= ~AUD_CONFIG_PIXEL_CLOCK_HDMI_MASK; tmp &= ~AUD_CONFIG_N_PROG_ENABLE; @@ -446,16 +448,16 @@ hsw_hdmi_audio_config_update(struct intel_encoder *encoder, DRM_DEBUG_KMS("using automatic N\n"); } - I915_WRITE(HSW_AUD_CFG(cpu_transcoder), tmp); + intel_de_write(dev_priv, HSW_AUD_CFG(cpu_transcoder), tmp); /* * Let's disable "Enable CTS or M Prog bit" * and let HW calculate the value */ - tmp = I915_READ(HSW_AUD_M_CTS_ENABLE(cpu_transcoder)); + tmp = intel_de_read(dev_priv, HSW_AUD_M_CTS_ENABLE(cpu_transcoder)); tmp &= ~AUD_M_CTS_M_PROG_ENABLE; tmp &= ~AUD_M_CTS_M_VALUE_INDEX; - I915_WRITE(HSW_AUD_M_CTS_ENABLE(cpu_transcoder), tmp); + intel_de_write(dev_priv, HSW_AUD_M_CTS_ENABLE(cpu_transcoder), tmp); } static void @@ -482,20 +484,20 @@ static void hsw_audio_codec_disable(struct intel_encoder *encoder, mutex_lock(&dev_priv->av_mutex); /* Disable timestamps */ - tmp = I915_READ(HSW_AUD_CFG(cpu_transcoder)); + tmp = intel_de_read(dev_priv, HSW_AUD_CFG(cpu_transcoder)); tmp &= ~AUD_CONFIG_N_VALUE_INDEX; tmp |= AUD_CONFIG_N_PROG_ENABLE; tmp &= ~AUD_CONFIG_UPPER_N_MASK; tmp &= ~AUD_CONFIG_LOWER_N_MASK; if (intel_crtc_has_dp_encoder(old_crtc_state)) tmp |= AUD_CONFIG_N_VALUE_INDEX; - I915_WRITE(HSW_AUD_CFG(cpu_transcoder), tmp); + intel_de_write(dev_priv, HSW_AUD_CFG(cpu_transcoder), tmp); /* Invalidate ELD */ - tmp = I915_READ(HSW_AUD_PIN_ELD_CP_VLD); + tmp = intel_de_read(dev_priv, HSW_AUD_PIN_ELD_CP_VLD); tmp &= ~AUDIO_ELD_VALID(cpu_transcoder); tmp &= ~AUDIO_OUTPUT_ENABLE(cpu_transcoder); - I915_WRITE(HSW_AUD_PIN_ELD_CP_VLD, tmp); + intel_de_write(dev_priv, HSW_AUD_PIN_ELD_CP_VLD, tmp); mutex_unlock(&dev_priv->av_mutex); } @@ -517,10 +519,10 @@ static void hsw_audio_codec_enable(struct intel_encoder *encoder, mutex_lock(&dev_priv->av_mutex); /* Enable audio presence detect, invalidate ELD */ - tmp = I915_READ(HSW_AUD_PIN_ELD_CP_VLD); + tmp = intel_de_read(dev_priv, HSW_AUD_PIN_ELD_CP_VLD); tmp |= AUDIO_OUTPUT_ENABLE(cpu_transcoder); tmp &= ~AUDIO_ELD_VALID(cpu_transcoder); - I915_WRITE(HSW_AUD_PIN_ELD_CP_VLD, tmp); + intel_de_write(dev_priv, HSW_AUD_PIN_ELD_CP_VLD, tmp); /* * FIXME: We're supposed to wait for vblank here, but we have vblanks @@ -530,19 +532,20 @@ static void hsw_audio_codec_enable(struct intel_encoder *encoder, */ /* Reset ELD write address */ - tmp = I915_READ(HSW_AUD_DIP_ELD_CTRL(cpu_transcoder)); + tmp = intel_de_read(dev_priv, HSW_AUD_DIP_ELD_CTRL(cpu_transcoder)); tmp &= ~IBX_ELD_ADDRESS_MASK; - I915_WRITE(HSW_AUD_DIP_ELD_CTRL(cpu_transcoder), tmp); + intel_de_write(dev_priv, HSW_AUD_DIP_ELD_CTRL(cpu_transcoder), tmp); /* Up to 84 bytes of hw ELD buffer */ len = min(drm_eld_size(eld), 84); for (i = 0; i < len / 4; i++) - I915_WRITE(HSW_AUD_EDID_DATA(cpu_transcoder), *((const u32 *)eld + i)); + intel_de_write(dev_priv, HSW_AUD_EDID_DATA(cpu_transcoder), + *((const u32 *)eld + i)); /* ELD valid */ - tmp = I915_READ(HSW_AUD_PIN_ELD_CP_VLD); + tmp = intel_de_read(dev_priv, HSW_AUD_PIN_ELD_CP_VLD); tmp |= AUDIO_ELD_VALID(cpu_transcoder); - I915_WRITE(HSW_AUD_PIN_ELD_CP_VLD, tmp); + intel_de_write(dev_priv, HSW_AUD_PIN_ELD_CP_VLD, tmp); /* Enable timestamps */ hsw_audio_config_update(encoder, crtc_state); @@ -580,21 +583,21 @@ static void ilk_audio_codec_disable(struct intel_encoder *encoder, } /* Disable timestamps */ - tmp = I915_READ(aud_config); + tmp = intel_de_read(dev_priv, aud_config); tmp &= ~AUD_CONFIG_N_VALUE_INDEX; tmp |= AUD_CONFIG_N_PROG_ENABLE; tmp &= ~AUD_CONFIG_UPPER_N_MASK; tmp &= ~AUD_CONFIG_LOWER_N_MASK; if (intel_crtc_has_dp_encoder(old_crtc_state)) tmp |= AUD_CONFIG_N_VALUE_INDEX; - I915_WRITE(aud_config, tmp); + intel_de_write(dev_priv, aud_config, tmp); eldv = IBX_ELD_VALID(port); /* Invalidate ELD */ - tmp = I915_READ(aud_cntrl_st2); + tmp = intel_de_read(dev_priv, aud_cntrl_st2); tmp &= ~eldv; - I915_WRITE(aud_cntrl_st2, tmp); + intel_de_write(dev_priv, aud_cntrl_st2, tmp); } static void ilk_audio_codec_enable(struct intel_encoder *encoder, @@ -646,27 +649,28 @@ static void ilk_audio_codec_enable(struct intel_encoder *encoder, eldv = IBX_ELD_VALID(port); /* Invalidate ELD */ - tmp = I915_READ(aud_cntrl_st2); + tmp = intel_de_read(dev_priv, aud_cntrl_st2); tmp &= ~eldv; - I915_WRITE(aud_cntrl_st2, tmp); + intel_de_write(dev_priv, aud_cntrl_st2, tmp); /* Reset ELD write address */ - tmp = I915_READ(aud_cntl_st); + tmp = intel_de_read(dev_priv, aud_cntl_st); tmp &= ~IBX_ELD_ADDRESS_MASK; - I915_WRITE(aud_cntl_st, tmp); + intel_de_write(dev_priv, aud_cntl_st, tmp); /* Up to 84 bytes of hw ELD buffer */ len = min(drm_eld_size(eld), 84); for (i = 0; i < len / 4; i++) - I915_WRITE(hdmiw_hdmiedid, *((const u32 *)eld + i)); + intel_de_write(dev_priv, hdmiw_hdmiedid, + *((const u32 *)eld + i)); /* ELD valid */ - tmp = I915_READ(aud_cntrl_st2); + tmp = intel_de_read(dev_priv, aud_cntrl_st2); tmp |= eldv; - I915_WRITE(aud_cntrl_st2, tmp); + intel_de_write(dev_priv, aud_cntrl_st2, tmp); /* Enable timestamps */ - tmp = I915_READ(aud_config); + tmp = intel_de_read(dev_priv, aud_config); tmp &= ~AUD_CONFIG_N_VALUE_INDEX; tmp &= ~AUD_CONFIG_N_PROG_ENABLE; tmp &= ~AUD_CONFIG_PIXEL_CLOCK_HDMI_MASK; @@ -674,7 +678,7 @@ static void ilk_audio_codec_enable(struct intel_encoder *encoder, tmp |= AUD_CONFIG_N_VALUE_INDEX; else tmp |= audio_config_hdmi_pixel_clock(crtc_state); - I915_WRITE(aud_config, tmp); + intel_de_write(dev_priv, aud_config, tmp); } /** @@ -850,7 +854,8 @@ static unsigned long i915_audio_component_get_power(struct device *kdev) if (dev_priv->audio_power_refcount++ == 0) { if (IS_TIGERLAKE(dev_priv) || IS_ICELAKE(dev_priv)) { - I915_WRITE(AUD_FREQ_CNTRL, dev_priv->audio_freq_cntrl); + intel_de_write(dev_priv, AUD_FREQ_CNTRL, + dev_priv->audio_freq_cntrl); DRM_DEBUG_KMS("restored AUD_FREQ_CNTRL to 0x%x\n", dev_priv->audio_freq_cntrl); } @@ -860,9 +865,8 @@ static unsigned long i915_audio_component_get_power(struct device *kdev) glk_force_audio_cdclk(dev_priv, true); if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) - I915_WRITE(AUD_PIN_BUF_CTL, - (I915_READ(AUD_PIN_BUF_CTL) | - AUD_PIN_BUF_ENABLE)); + intel_de_write(dev_priv, AUD_PIN_BUF_CTL, + (intel_de_read(dev_priv, AUD_PIN_BUF_CTL) | AUD_PIN_BUF_ENABLE)); } return ret; @@ -897,15 +901,15 @@ static void i915_audio_component_codec_wake_override(struct device *kdev, * Enable/disable generating the codec wake signal, overriding the * internal logic to generate the codec wake to controller. */ - tmp = I915_READ(HSW_AUD_CHICKENBIT); + tmp = intel_de_read(dev_priv, HSW_AUD_CHICKENBIT); tmp &= ~SKL_AUD_CODEC_WAKE_SIGNAL; - I915_WRITE(HSW_AUD_CHICKENBIT, tmp); + intel_de_write(dev_priv, HSW_AUD_CHICKENBIT, tmp); usleep_range(1000, 1500); if (enable) { - tmp = I915_READ(HSW_AUD_CHICKENBIT); + tmp = intel_de_read(dev_priv, HSW_AUD_CHICKENBIT); tmp |= SKL_AUD_CODEC_WAKE_SIGNAL; - I915_WRITE(HSW_AUD_CHICKENBIT, tmp); + intel_de_write(dev_priv, HSW_AUD_CHICKENBIT, tmp); usleep_range(1000, 1500); } @@ -1125,7 +1129,8 @@ static void i915_audio_component_init(struct drm_i915_private *dev_priv) } if (IS_TIGERLAKE(dev_priv) || IS_ICELAKE(dev_priv)) { - dev_priv->audio_freq_cntrl = I915_READ(AUD_FREQ_CNTRL); + dev_priv->audio_freq_cntrl = intel_de_read(dev_priv, + AUD_FREQ_CNTRL); DRM_DEBUG_KMS("init value of AUD_FREQ_CNTRL of 0x%x\n", dev_priv->audio_freq_cntrl); } -- 2.20.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 16+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for series starting with [RFC,1/2] drm/i915: add display uncore helpers @ 2019-10-29 14:26 ` Patchwork 0 siblings, 0 replies; 16+ messages in thread From: Patchwork @ 2019-10-29 14:26 UTC (permalink / raw) To: Jani Nikula; +Cc: intel-gfx == Series Details == Series: series starting with [RFC,1/2] drm/i915: add display uncore helpers URL : https://patchwork.freedesktop.org/series/68713/ State : warning == Summary == $ dim checkpatch origin/drm-tip dfb3731d13b1 drm/i915: add display uncore helpers -:28: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #28: new file mode 100644 total: 0 errors, 1 warnings, 0 checks, 36 lines checked 2f185690934e drm/i915/audio: replace I915_*() calls with the new intel_de_*() calls -:314: WARNING:LONG_LINE: line over 100 characters #314: FILE: drivers/gpu/drm/i915/display/intel_audio.c:869: + (intel_de_read(dev_priv, AUD_PIN_BUF_CTL) | AUD_PIN_BUF_ENABLE)); total: 0 errors, 1 warnings, 0 checks, 313 lines checked _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 16+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [RFC,1/2] drm/i915: add display uncore helpers @ 2019-10-29 14:26 ` Patchwork 0 siblings, 0 replies; 16+ messages in thread From: Patchwork @ 2019-10-29 14:26 UTC (permalink / raw) To: Jani Nikula; +Cc: intel-gfx == Series Details == Series: series starting with [RFC,1/2] drm/i915: add display uncore helpers URL : https://patchwork.freedesktop.org/series/68713/ State : warning == Summary == $ dim checkpatch origin/drm-tip dfb3731d13b1 drm/i915: add display uncore helpers -:28: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #28: new file mode 100644 total: 0 errors, 1 warnings, 0 checks, 36 lines checked 2f185690934e drm/i915/audio: replace I915_*() calls with the new intel_de_*() calls -:314: WARNING:LONG_LINE: line over 100 characters #314: FILE: drivers/gpu/drm/i915/display/intel_audio.c:869: + (intel_de_read(dev_priv, AUD_PIN_BUF_CTL) | AUD_PIN_BUF_ENABLE)); total: 0 errors, 1 warnings, 0 checks, 313 lines checked _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 16+ messages in thread
* ✓ Fi.CI.BAT: success for series starting with [RFC,1/2] drm/i915: add display uncore helpers @ 2019-10-29 16:02 ` Patchwork 0 siblings, 0 replies; 16+ messages in thread From: Patchwork @ 2019-10-29 16:02 UTC (permalink / raw) To: Jani Nikula; +Cc: intel-gfx == Series Details == Series: series starting with [RFC,1/2] drm/i915: add display uncore helpers URL : https://patchwork.freedesktop.org/series/68713/ State : success == Summary == CI Bug Log - changes from CI_DRM_7211 -> Patchwork_15049 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/index.html Known issues ------------ Here are the changes found in Patchwork_15049 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_mmap_gtt@basic: - fi-icl-u3: [PASS][1] -> [DMESG-WARN][2] ([fdo#107724]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/fi-icl-u3/igt@gem_mmap_gtt@basic.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/fi-icl-u3/igt@gem_mmap_gtt@basic.html #### Possible fixes #### * igt@gem_ringfill@basic-default-forked: - fi-icl-u3: [DMESG-WARN][3] ([fdo#107724]) -> [PASS][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/fi-icl-u3/igt@gem_ringfill@basic-default-forked.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/fi-icl-u3/igt@gem_ringfill@basic-default-forked.html * igt@i915_selftest@live_hangcheck: - {fi-icl-guc}: [INCOMPLETE][5] ([fdo#107713] / [fdo#108569]) -> [PASS][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/fi-icl-guc/igt@i915_selftest@live_hangcheck.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/fi-icl-guc/igt@i915_selftest@live_hangcheck.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713 [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724 [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569 Participating hosts (51 -> 43) ------------------------------ Additional (1): fi-kbl-soraka Missing (9): fi-ilk-m540 fi-tgl-u fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-tgl-y fi-byt-clapper fi-bdw-samus Build changes ------------- * CI: CI-20190529 -> None * Linux: CI_DRM_7211 -> Patchwork_15049 CI-20190529: 20190529 CI_DRM_7211: 14d687e92e966b48dd74091352a07b825c13eb46 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5249: aee019cec9d7f3002371f6ddf102cb67d9976b71 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_15049: 2f185690934ef3ffed64c7f0b09b5acda74ae9de @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 2f185690934e drm/i915/audio: replace I915_*() calls with the new intel_de_*() calls dfb3731d13b1 drm/i915: add display uncore helpers == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/index.html _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 16+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [RFC,1/2] drm/i915: add display uncore helpers @ 2019-10-29 16:02 ` Patchwork 0 siblings, 0 replies; 16+ messages in thread From: Patchwork @ 2019-10-29 16:02 UTC (permalink / raw) To: Jani Nikula; +Cc: intel-gfx == Series Details == Series: series starting with [RFC,1/2] drm/i915: add display uncore helpers URL : https://patchwork.freedesktop.org/series/68713/ State : success == Summary == CI Bug Log - changes from CI_DRM_7211 -> Patchwork_15049 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/index.html Known issues ------------ Here are the changes found in Patchwork_15049 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_mmap_gtt@basic: - fi-icl-u3: [PASS][1] -> [DMESG-WARN][2] ([fdo#107724]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/fi-icl-u3/igt@gem_mmap_gtt@basic.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/fi-icl-u3/igt@gem_mmap_gtt@basic.html #### Possible fixes #### * igt@gem_ringfill@basic-default-forked: - fi-icl-u3: [DMESG-WARN][3] ([fdo#107724]) -> [PASS][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/fi-icl-u3/igt@gem_ringfill@basic-default-forked.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/fi-icl-u3/igt@gem_ringfill@basic-default-forked.html * igt@i915_selftest@live_hangcheck: - {fi-icl-guc}: [INCOMPLETE][5] ([fdo#107713] / [fdo#108569]) -> [PASS][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/fi-icl-guc/igt@i915_selftest@live_hangcheck.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/fi-icl-guc/igt@i915_selftest@live_hangcheck.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713 [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724 [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569 Participating hosts (51 -> 43) ------------------------------ Additional (1): fi-kbl-soraka Missing (9): fi-ilk-m540 fi-tgl-u fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-tgl-y fi-byt-clapper fi-bdw-samus Build changes ------------- * CI: CI-20190529 -> None * Linux: CI_DRM_7211 -> Patchwork_15049 CI-20190529: 20190529 CI_DRM_7211: 14d687e92e966b48dd74091352a07b825c13eb46 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5249: aee019cec9d7f3002371f6ddf102cb67d9976b71 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_15049: 2f185690934ef3ffed64c7f0b09b5acda74ae9de @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 2f185690934e drm/i915/audio: replace I915_*() calls with the new intel_de_*() calls dfb3731d13b1 drm/i915: add display uncore helpers == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/index.html _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [RFC 1/2] drm/i915: add display uncore helpers @ 2019-10-29 21:20 ` Daniele Ceraolo Spurio 0 siblings, 0 replies; 16+ messages in thread From: Daniele Ceraolo Spurio @ 2019-10-29 21:20 UTC (permalink / raw) To: Jani Nikula, intel-gfx; +Cc: Lucas De Marchi On 10/29/19 3:51 AM, Jani Nikula wrote: > Add convenience helpers for the most common uncore operations with > struct drm_i915_private * as context rather than struct intel_uncore *. > > The goal is to replace all instances of I915_READ(), > I915_POSTING_READ(), and I915_WRITE() in display/ with these, to finally > be able to get rid of the implicit dev_priv local parameter use. > > The idea is that any non-u32 reads or writes are special enough that > they can use the intel_uncore_* functions directly. > > Cc: Chris Wilson <chris@chris-wilson.co.uk> > Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> > Cc: Lucas De Marchi <lucas.demarchi@intel.com> > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > Signed-off-by: Jani Nikula <jani.nikula@intel.com> > > --- > > Let the name bikeshedding commence! Some options are: > > - intel_de_read, intel_de_write (this patch, de for display engine) +1 for this. it also matches the intel_de_wait_for_register/set/clear macros, which we could probably move in this file as well. Daniele > - intel_display_read, intel_display_write (too long I think) > - intel_read, intel_write > - i915_read, i915_write > - display_read, display_write > - ? > > Here's a draft cocci patch that could be used on display/ subdir, en > masse: > > @@ > expression REG, OFFSET; > @@ > - I915_READ(REG) > + intel_de_read(dev_priv, REG) > > @@ > expression REG, OFFSET; > @@ > - I915_POSTING_READ(REG) > + intel_de_posting_read(dev_priv, REG) > > @@ > expression REG, OFFSET; > @@ > - I915_WRITE(REG, OFFSET) > + intel_de_write(dev_priv, REG, OFFSET) > > Conveniently, we *know* dev_priv is everywhere the change is needed. > > This enables us to make the s/dev_priv/i915/ rename on top. We also need > to discuss whether it's better to separate the steps to two (even if in > the same patch series) or if it's better to add the dev_priv parameter > as i915 directly. > --- > .../drm/i915/display/intel_display_uncore.h | 36 +++++++++++++++++++ > 1 file changed, 36 insertions(+) > create mode 100644 drivers/gpu/drm/i915/display/intel_display_uncore.h > > diff --git a/drivers/gpu/drm/i915/display/intel_display_uncore.h b/drivers/gpu/drm/i915/display/intel_display_uncore.h > new file mode 100644 > index 000000000000..e6c8c56fb0f9 > --- /dev/null > +++ b/drivers/gpu/drm/i915/display/intel_display_uncore.h > @@ -0,0 +1,36 @@ > +/* SPDX-License-Identifier: MIT */ > +/* > + * Copyright © 2019 Intel Corporation > + */ > + > +#ifndef __INTEL_DISPLAY_UNCORE_H__ > +#define __INTEL_DISPLAY_UNCORE_H__ > + > +#include "i915_drv.h" > +#include "i915_reg.h" > +#include "intel_uncore.h" > + > +static inline u32 intel_de_read(struct drm_i915_private *i915, i915_reg_t reg) > +{ > + return intel_uncore_read(&i915->uncore, reg); > +} > + > +static inline void intel_de_posting_read(struct drm_i915_private *i915, > + i915_reg_t reg) > +{ > + intel_uncore_posting_read(&i915->uncore, reg); > +} > + > +static inline void intel_de_write(struct drm_i915_private *i915, i915_reg_t reg, > + u32 val) > +{ > + intel_uncore_write(&i915->uncore, reg, val); > +} > + > +static inline void intel_de_rmw(struct drm_i915_private *i915, i915_reg_t reg, > + u32 clear, u32 set) > +{ > + intel_uncore_rmw(&i915->uncore, reg, clear, set); > +} > + > +#endif /* __INTEL_DISPLAY_UNCORE_H__ */ > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [RFC 1/2] drm/i915: add display uncore helpers @ 2019-10-29 21:20 ` Daniele Ceraolo Spurio 0 siblings, 0 replies; 16+ messages in thread From: Daniele Ceraolo Spurio @ 2019-10-29 21:20 UTC (permalink / raw) To: Jani Nikula, intel-gfx; +Cc: Lucas De Marchi On 10/29/19 3:51 AM, Jani Nikula wrote: > Add convenience helpers for the most common uncore operations with > struct drm_i915_private * as context rather than struct intel_uncore *. > > The goal is to replace all instances of I915_READ(), > I915_POSTING_READ(), and I915_WRITE() in display/ with these, to finally > be able to get rid of the implicit dev_priv local parameter use. > > The idea is that any non-u32 reads or writes are special enough that > they can use the intel_uncore_* functions directly. > > Cc: Chris Wilson <chris@chris-wilson.co.uk> > Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> > Cc: Lucas De Marchi <lucas.demarchi@intel.com> > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > Signed-off-by: Jani Nikula <jani.nikula@intel.com> > > --- > > Let the name bikeshedding commence! Some options are: > > - intel_de_read, intel_de_write (this patch, de for display engine) +1 for this. it also matches the intel_de_wait_for_register/set/clear macros, which we could probably move in this file as well. Daniele > - intel_display_read, intel_display_write (too long I think) > - intel_read, intel_write > - i915_read, i915_write > - display_read, display_write > - ? > > Here's a draft cocci patch that could be used on display/ subdir, en > masse: > > @@ > expression REG, OFFSET; > @@ > - I915_READ(REG) > + intel_de_read(dev_priv, REG) > > @@ > expression REG, OFFSET; > @@ > - I915_POSTING_READ(REG) > + intel_de_posting_read(dev_priv, REG) > > @@ > expression REG, OFFSET; > @@ > - I915_WRITE(REG, OFFSET) > + intel_de_write(dev_priv, REG, OFFSET) > > Conveniently, we *know* dev_priv is everywhere the change is needed. > > This enables us to make the s/dev_priv/i915/ rename on top. We also need > to discuss whether it's better to separate the steps to two (even if in > the same patch series) or if it's better to add the dev_priv parameter > as i915 directly. > --- > .../drm/i915/display/intel_display_uncore.h | 36 +++++++++++++++++++ > 1 file changed, 36 insertions(+) > create mode 100644 drivers/gpu/drm/i915/display/intel_display_uncore.h > > diff --git a/drivers/gpu/drm/i915/display/intel_display_uncore.h b/drivers/gpu/drm/i915/display/intel_display_uncore.h > new file mode 100644 > index 000000000000..e6c8c56fb0f9 > --- /dev/null > +++ b/drivers/gpu/drm/i915/display/intel_display_uncore.h > @@ -0,0 +1,36 @@ > +/* SPDX-License-Identifier: MIT */ > +/* > + * Copyright © 2019 Intel Corporation > + */ > + > +#ifndef __INTEL_DISPLAY_UNCORE_H__ > +#define __INTEL_DISPLAY_UNCORE_H__ > + > +#include "i915_drv.h" > +#include "i915_reg.h" > +#include "intel_uncore.h" > + > +static inline u32 intel_de_read(struct drm_i915_private *i915, i915_reg_t reg) > +{ > + return intel_uncore_read(&i915->uncore, reg); > +} > + > +static inline void intel_de_posting_read(struct drm_i915_private *i915, > + i915_reg_t reg) > +{ > + intel_uncore_posting_read(&i915->uncore, reg); > +} > + > +static inline void intel_de_write(struct drm_i915_private *i915, i915_reg_t reg, > + u32 val) > +{ > + intel_uncore_write(&i915->uncore, reg, val); > +} > + > +static inline void intel_de_rmw(struct drm_i915_private *i915, i915_reg_t reg, > + u32 clear, u32 set) > +{ > + intel_uncore_rmw(&i915->uncore, reg, clear, set); > +} > + > +#endif /* __INTEL_DISPLAY_UNCORE_H__ */ > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 16+ messages in thread
* ✓ Fi.CI.IGT: success for series starting with [RFC,1/2] drm/i915: add display uncore helpers @ 2019-10-30 5:09 ` Patchwork 0 siblings, 0 replies; 16+ messages in thread From: Patchwork @ 2019-10-30 5:09 UTC (permalink / raw) To: Jani Nikula; +Cc: intel-gfx == Series Details == Series: series starting with [RFC,1/2] drm/i915: add display uncore helpers URL : https://patchwork.freedesktop.org/series/68713/ State : success == Summary == CI Bug Log - changes from CI_DRM_7211_full -> Patchwork_15049_full ==================================================== Summary ------- **SUCCESS** No regressions found. Possible new issues ------------------- Here are the unknown changes that may have been introduced in Patchwork_15049_full: ### IGT changes ### #### Suppressed #### The following results come from untrusted machines, tests, or statuses. They do not affect the overall result. * igt@gem_busy@extended-semaphore-vecs0: - {shard-tglb}: [PASS][1] -> [INCOMPLETE][2] +2 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-tglb7/igt@gem_busy@extended-semaphore-vecs0.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-tglb3/igt@gem_busy@extended-semaphore-vecs0.html * {igt@gem_exec_suspend@basic-s0}: - {shard-tglb}: NOTRUN -> [INCOMPLETE][3] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-tglb2/igt@gem_exec_suspend@basic-s0.html * igt@perf@invalid-oa-exponent: - {shard-tglb}: NOTRUN -> [SKIP][4] [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-tglb7/igt@perf@invalid-oa-exponent.html Known issues ------------ Here are the changes found in Patchwork_15049_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_ctx_isolation@rcs0-s3: - shard-skl: [PASS][5] -> [INCOMPLETE][6] ([fdo#104108]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-skl1/igt@gem_ctx_isolation@rcs0-s3.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-skl10/igt@gem_ctx_isolation@rcs0-s3.html * igt@gem_ctx_shared@exec-single-timeline-bsd: - shard-iclb: [PASS][7] -> [SKIP][8] ([fdo#110841]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-iclb6/igt@gem_ctx_shared@exec-single-timeline-bsd.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-iclb1/igt@gem_ctx_shared@exec-single-timeline-bsd.html * igt@gem_exec_schedule@promotion-bsd1: - shard-iclb: [PASS][9] -> [SKIP][10] ([fdo#109276]) +11 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-iclb2/igt@gem_exec_schedule@promotion-bsd1.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-iclb6/igt@gem_exec_schedule@promotion-bsd1.html * igt@gem_exec_schedule@reorder-wide-bsd: - shard-iclb: [PASS][11] -> [SKIP][12] ([fdo#112146]) +3 similar issues [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-iclb6/igt@gem_exec_schedule@reorder-wide-bsd.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-iclb1/igt@gem_exec_schedule@reorder-wide-bsd.html * igt@gem_userptr_blits@dmabuf-sync: - shard-hsw: [PASS][13] -> [DMESG-WARN][14] ([fdo#111870]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-hsw7/igt@gem_userptr_blits@dmabuf-sync.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-hsw5/igt@gem_userptr_blits@dmabuf-sync.html * igt@gem_userptr_blits@sync-unmap-after-close: - shard-snb: [PASS][15] -> [DMESG-WARN][16] ([fdo#111870]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-snb7/igt@gem_userptr_blits@sync-unmap-after-close.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-snb6/igt@gem_userptr_blits@sync-unmap-after-close.html * igt@gem_workarounds@suspend-resume: - shard-apl: [PASS][17] -> [DMESG-WARN][18] ([fdo#108566]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-apl2/igt@gem_workarounds@suspend-resume.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-apl1/igt@gem_workarounds@suspend-resume.html * igt@i915_selftest@live_hangcheck: - shard-snb: [PASS][19] -> [INCOMPLETE][20] ([fdo#105411]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-snb7/igt@i915_selftest@live_hangcheck.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-snb5/igt@i915_selftest@live_hangcheck.html * igt@kms_color@pipe-a-ctm-0-75: - shard-skl: [PASS][21] -> [DMESG-WARN][22] ([fdo#106107]) +1 similar issue [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-skl9/igt@kms_color@pipe-a-ctm-0-75.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-skl8/igt@kms_color@pipe-a-ctm-0-75.html * igt@kms_flip@flip-vs-expired-vblank: - shard-skl: [PASS][23] -> [FAIL][24] ([fdo#105363]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-skl1/igt@kms_flip@flip-vs-expired-vblank.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-skl4/igt@kms_flip@flip-vs-expired-vblank.html - shard-glk: [PASS][25] -> [FAIL][26] ([fdo#105363]) +1 similar issue [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-glk1/igt@kms_flip@flip-vs-expired-vblank.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-glk3/igt@kms_flip@flip-vs-expired-vblank.html * igt@kms_frontbuffer_tracking@fbc-indfb-scaledprimary: - shard-iclb: [PASS][27] -> [FAIL][28] ([fdo#103167]) +3 similar issues [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-indfb-scaledprimary.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-iclb4/igt@kms_frontbuffer_tracking@fbc-indfb-scaledprimary.html * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes: - shard-kbl: [PASS][29] -> [DMESG-WARN][30] ([fdo#108566]) +5 similar issues [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-kbl7/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-kbl6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc: - shard-skl: [PASS][31] -> [FAIL][32] ([fdo#108145]) [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-skl1/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-skl9/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html * igt@kms_psr@psr2_sprite_plane_move: - shard-iclb: [PASS][33] -> [SKIP][34] ([fdo#109441]) +1 similar issue [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-iclb6/igt@kms_psr@psr2_sprite_plane_move.html * igt@perf_pmu@init-busy-vcs1: - shard-iclb: [PASS][35] -> [SKIP][36] ([fdo#112080]) +7 similar issues [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-iclb1/igt@perf_pmu@init-busy-vcs1.html [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-iclb3/igt@perf_pmu@init-busy-vcs1.html #### Possible fixes #### * igt@gem_ctx_isolation@vcs1-none: - shard-iclb: [SKIP][37] ([fdo#109276] / [fdo#112080]) -> [PASS][38] +1 similar issue [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-iclb7/igt@gem_ctx_isolation@vcs1-none.html [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-iclb4/igt@gem_ctx_isolation@vcs1-none.html * igt@gem_eio@in-flight-suspend: - shard-skl: [INCOMPLETE][39] ([fdo#104108]) -> [PASS][40] [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-skl10/igt@gem_eio@in-flight-suspend.html [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-skl10/igt@gem_eio@in-flight-suspend.html * igt@gem_exec_nop@basic-sequential: - {shard-tglb}: [INCOMPLETE][41] ([fdo#111747]) -> [PASS][42] [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-tglb6/igt@gem_exec_nop@basic-sequential.html [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-tglb2/igt@gem_exec_nop@basic-sequential.html * igt@gem_exec_schedule@wide-bsd: - shard-iclb: [SKIP][43] ([fdo#112146]) -> [PASS][44] +2 similar issues [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-iclb4/igt@gem_exec_schedule@wide-bsd.html [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-iclb8/igt@gem_exec_schedule@wide-bsd.html * igt@gem_exec_schedule@wide-bsd2: - shard-kbl: [INCOMPLETE][45] ([fdo#103665]) -> [PASS][46] [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-kbl7/igt@gem_exec_schedule@wide-bsd2.html [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-kbl7/igt@gem_exec_schedule@wide-bsd2.html * igt@gem_persistent_relocs@forked-thrash-inactive: - shard-iclb: [INCOMPLETE][47] ([fdo#107713] / [fdo#112068 ]) -> [PASS][48] [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-iclb2/igt@gem_persistent_relocs@forked-thrash-inactive.html [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-iclb2/igt@gem_persistent_relocs@forked-thrash-inactive.html * igt@gem_persistent_relocs@forked-thrashing: - shard-hsw: [FAIL][49] ([fdo#112037]) -> [PASS][50] +1 similar issue [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-hsw7/igt@gem_persistent_relocs@forked-thrashing.html [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-hsw6/igt@gem_persistent_relocs@forked-thrashing.html * igt@gem_softpin@noreloc-s3: - shard-apl: [DMESG-WARN][51] ([fdo#108566]) -> [PASS][52] +1 similar issue [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-apl1/igt@gem_softpin@noreloc-s3.html [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-apl2/igt@gem_softpin@noreloc-s3.html * igt@gem_sync@basic-store-each: - shard-iclb: [INCOMPLETE][53] ([fdo#107713] / [fdo#109100]) -> [PASS][54] [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-iclb7/igt@gem_sync@basic-store-each.html [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-iclb4/igt@gem_sync@basic-store-each.html * igt@gem_userptr_blits@dmabuf-sync: - shard-snb: [DMESG-WARN][55] ([fdo#111870]) -> [PASS][56] [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-snb1/igt@gem_userptr_blits@dmabuf-sync.html [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-snb5/igt@gem_userptr_blits@dmabuf-sync.html * igt@gem_userptr_blits@sync-unmap-after-close: - shard-hsw: [DMESG-WARN][57] ([fdo#111870]) -> [PASS][58] +1 similar issue [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-hsw1/igt@gem_userptr_blits@sync-unmap-after-close.html [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-hsw7/igt@gem_userptr_blits@sync-unmap-after-close.html * {igt@i915_pm_dc@dc6-dpms}: - shard-iclb: [FAIL][59] ([fdo#110548]) -> [PASS][60] [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-iclb3/igt@i915_pm_dc@dc6-dpms.html [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-iclb7/igt@i915_pm_dc@dc6-dpms.html * igt@kms_color@pipe-a-ctm-0-5: - shard-skl: [DMESG-WARN][61] ([fdo#106107]) -> [PASS][62] [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-skl4/igt@kms_color@pipe-a-ctm-0-5.html [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-skl9/igt@kms_color@pipe-a-ctm-0-5.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size: - shard-skl: [FAIL][63] ([fdo#102670]) -> [PASS][64] [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-skl6/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-skl4/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html * igt@kms_flip@2x-flip-vs-expired-vblank: - shard-glk: [FAIL][65] ([fdo#105363]) -> [PASS][66] [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-glk3/igt@kms_flip@2x-flip-vs-expired-vblank.html [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-glk6/igt@kms_flip@2x-flip-vs-expired-vblank.html * igt@kms_flip@flip-vs-suspend: - shard-skl: [INCOMPLETE][67] ([fdo#109507]) -> [PASS][68] [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-skl9/igt@kms_flip@flip-vs-suspend.html [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-skl6/igt@kms_flip@flip-vs-suspend.html * igt@kms_flip@flip-vs-suspend-interruptible: - shard-hsw: [INCOMPLETE][69] ([fdo#103540]) -> [PASS][70] [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-hsw1/igt@kms_flip@flip-vs-suspend-interruptible.html [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-hsw5/igt@kms_flip@flip-vs-suspend-interruptible.html * igt@kms_frontbuffer_tracking@basic: - shard-iclb: [FAIL][71] ([fdo#103167]) -> [PASS][72] +2 similar issues [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-iclb6/igt@kms_frontbuffer_tracking@basic.html [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-iclb1/igt@kms_frontbuffer_tracking@basic.html * igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-cpu: - {shard-tglb}: [FAIL][73] ([fdo#103167]) -> [PASS][74] +1 similar issue [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-tglb8/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-cpu.html [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-tglb3/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-cpu.html * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min: - shard-skl: [FAIL][75] ([fdo#108145]) -> [PASS][76] [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-skl7/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-skl7/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html * igt@kms_plane_lowres@pipe-a-tiling-x: - shard-iclb: [FAIL][77] ([fdo#103166]) -> [PASS][78] [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-iclb6/igt@kms_plane_lowres@pipe-a-tiling-x.html [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-iclb6/igt@kms_plane_lowres@pipe-a-tiling-x.html * igt@kms_psr@psr2_cursor_blt: - shard-iclb: [SKIP][79] ([fdo#109441]) -> [PASS][80] +1 similar issue [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-iclb1/igt@kms_psr@psr2_cursor_blt.html [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-iclb2/igt@kms_psr@psr2_cursor_blt.html * igt@kms_setmode@basic: - shard-apl: [FAIL][81] ([fdo#99912]) -> [PASS][82] [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-apl7/igt@kms_setmode@basic.html [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-apl4/igt@kms_setmode@basic.html * igt@kms_vblank@pipe-a-ts-continuation-suspend: - shard-kbl: [DMESG-WARN][83] ([fdo#108566]) -> [PASS][84] +3 similar issues [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-kbl4/igt@kms_vblank@pipe-a-ts-continuation-suspend.html [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-kbl7/igt@kms_vblank@pipe-a-ts-continuation-suspend.html * igt@perf_pmu@busy-no-semaphores-vcs1: - shard-iclb: [SKIP][85] ([fdo#112080]) -> [PASS][86] +6 similar issues [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-iclb8/igt@perf_pmu@busy-no-semaphores-vcs1.html [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-iclb2/igt@perf_pmu@busy-no-semaphores-vcs1.html * igt@perf_pmu@enable-race-vecs0: - shard-apl: [INCOMPLETE][87] ([fdo#103927]) -> [PASS][88] +1 similar issue [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-apl4/igt@perf_pmu@enable-race-vecs0.html [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-apl3/igt@perf_pmu@enable-race-vecs0.html * igt@prime_vgem@fence-wait-bsd2: - shard-iclb: [SKIP][89] ([fdo#109276]) -> [PASS][90] +10 similar issues [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-iclb8/igt@prime_vgem@fence-wait-bsd2.html [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-iclb2/igt@prime_vgem@fence-wait-bsd2.html * igt@prime_vgem@sync-vebox: - shard-iclb: [INCOMPLETE][91] ([fdo#107713]) -> [PASS][92] [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-iclb2/igt@prime_vgem@sync-vebox.html [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-iclb6/igt@prime_vgem@sync-vebox.html * igt@tools_test@tools_test: - shard-snb: [SKIP][93] ([fdo#109271]) -> [PASS][94] +1 similar issue [93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-snb7/igt@tools_test@tools_test.html [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-snb6/igt@tools_test@tools_test.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo# 112000 ]: https://bugs.freedesktop.org/show_bug.cgi?id= 112000 [fdo#102670]: https://bugs.freedesktop.org/show_bug.cgi?id=102670 [fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166 [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167 [fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540 [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665 [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927 [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108 [fdo#104782]: https://bugs.freedesktop.org/show_bug.cgi?id=104782 [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363 [fdo#105411]: https://bugs.freedesktop.org/show_bug.cgi?id=105411 [fdo#106107]: https://bugs.freedesktop.org/show_bug.cgi?id=106107 [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713 [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145 [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566 [fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276 [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441 [fdo#109507]: https://bugs.freedesktop.org/show_bug.cgi?id=109507 [fdo#110548]: https://bugs.freedesktop.org/show_bug.cgi?id=110548 [fdo#110841]: https://bugs.freedesktop.org/show_bug.cgi?id=110841 [fdo#111646]: https://bugs.freedesktop.org/show_bug.cgi?id=111646 [fdo#111671]: https://bugs.freedesktop.org/show_bug.cgi?id=111671 [fdo#111703]: https://bugs.freedesktop.org/show_bug.cgi?id=111703 [fdo#111747]: https://bugs.freedesktop.org/show_bug.cgi?id=111747 [fdo#111781]: https://bugs.freedesktop.org/show_bug.cgi?id=111781 [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825 [fdo#111832]: https://bugs.freedesktop.org/show_bug.cgi?id=111832 [fdo#111850]: https://bugs.freedesktop.org/show_bug.cgi?id=111850 [fdo#111870]: https://bugs.freedesktop.org/show_bug.cgi?id=111870 [fdo#111884]: https://bugs.freedesktop.org/show_bug.cgi?id=111884 [fdo#112001]: https://bugs.freedesktop.org/show_bug.cgi?id=112001 [fdo#112037]: https://bugs.freedesktop.org/show_bug.cgi?id=112037 [fdo#112068 ]: https://bugs.freedesktop.org/show_bug.cgi?id=112068 [fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/index.html _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 16+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [RFC,1/2] drm/i915: add display uncore helpers @ 2019-10-30 5:09 ` Patchwork 0 siblings, 0 replies; 16+ messages in thread From: Patchwork @ 2019-10-30 5:09 UTC (permalink / raw) To: Jani Nikula; +Cc: intel-gfx == Series Details == Series: series starting with [RFC,1/2] drm/i915: add display uncore helpers URL : https://patchwork.freedesktop.org/series/68713/ State : success == Summary == CI Bug Log - changes from CI_DRM_7211_full -> Patchwork_15049_full ==================================================== Summary ------- **SUCCESS** No regressions found. Possible new issues ------------------- Here are the unknown changes that may have been introduced in Patchwork_15049_full: ### IGT changes ### #### Suppressed #### The following results come from untrusted machines, tests, or statuses. They do not affect the overall result. * igt@gem_busy@extended-semaphore-vecs0: - {shard-tglb}: [PASS][1] -> [INCOMPLETE][2] +2 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-tglb7/igt@gem_busy@extended-semaphore-vecs0.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-tglb3/igt@gem_busy@extended-semaphore-vecs0.html * {igt@gem_exec_suspend@basic-s0}: - {shard-tglb}: NOTRUN -> [INCOMPLETE][3] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-tglb2/igt@gem_exec_suspend@basic-s0.html * igt@perf@invalid-oa-exponent: - {shard-tglb}: NOTRUN -> [SKIP][4] [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-tglb7/igt@perf@invalid-oa-exponent.html Known issues ------------ Here are the changes found in Patchwork_15049_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_ctx_isolation@rcs0-s3: - shard-skl: [PASS][5] -> [INCOMPLETE][6] ([fdo#104108]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-skl1/igt@gem_ctx_isolation@rcs0-s3.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-skl10/igt@gem_ctx_isolation@rcs0-s3.html * igt@gem_ctx_shared@exec-single-timeline-bsd: - shard-iclb: [PASS][7] -> [SKIP][8] ([fdo#110841]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-iclb6/igt@gem_ctx_shared@exec-single-timeline-bsd.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-iclb1/igt@gem_ctx_shared@exec-single-timeline-bsd.html * igt@gem_exec_schedule@promotion-bsd1: - shard-iclb: [PASS][9] -> [SKIP][10] ([fdo#109276]) +11 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-iclb2/igt@gem_exec_schedule@promotion-bsd1.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-iclb6/igt@gem_exec_schedule@promotion-bsd1.html * igt@gem_exec_schedule@reorder-wide-bsd: - shard-iclb: [PASS][11] -> [SKIP][12] ([fdo#112146]) +3 similar issues [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-iclb6/igt@gem_exec_schedule@reorder-wide-bsd.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-iclb1/igt@gem_exec_schedule@reorder-wide-bsd.html * igt@gem_userptr_blits@dmabuf-sync: - shard-hsw: [PASS][13] -> [DMESG-WARN][14] ([fdo#111870]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-hsw7/igt@gem_userptr_blits@dmabuf-sync.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-hsw5/igt@gem_userptr_blits@dmabuf-sync.html * igt@gem_userptr_blits@sync-unmap-after-close: - shard-snb: [PASS][15] -> [DMESG-WARN][16] ([fdo#111870]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-snb7/igt@gem_userptr_blits@sync-unmap-after-close.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-snb6/igt@gem_userptr_blits@sync-unmap-after-close.html * igt@gem_workarounds@suspend-resume: - shard-apl: [PASS][17] -> [DMESG-WARN][18] ([fdo#108566]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-apl2/igt@gem_workarounds@suspend-resume.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-apl1/igt@gem_workarounds@suspend-resume.html * igt@i915_selftest@live_hangcheck: - shard-snb: [PASS][19] -> [INCOMPLETE][20] ([fdo#105411]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-snb7/igt@i915_selftest@live_hangcheck.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-snb5/igt@i915_selftest@live_hangcheck.html * igt@kms_color@pipe-a-ctm-0-75: - shard-skl: [PASS][21] -> [DMESG-WARN][22] ([fdo#106107]) +1 similar issue [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-skl9/igt@kms_color@pipe-a-ctm-0-75.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-skl8/igt@kms_color@pipe-a-ctm-0-75.html * igt@kms_flip@flip-vs-expired-vblank: - shard-skl: [PASS][23] -> [FAIL][24] ([fdo#105363]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-skl1/igt@kms_flip@flip-vs-expired-vblank.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-skl4/igt@kms_flip@flip-vs-expired-vblank.html - shard-glk: [PASS][25] -> [FAIL][26] ([fdo#105363]) +1 similar issue [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-glk1/igt@kms_flip@flip-vs-expired-vblank.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-glk3/igt@kms_flip@flip-vs-expired-vblank.html * igt@kms_frontbuffer_tracking@fbc-indfb-scaledprimary: - shard-iclb: [PASS][27] -> [FAIL][28] ([fdo#103167]) +3 similar issues [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-indfb-scaledprimary.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-iclb4/igt@kms_frontbuffer_tracking@fbc-indfb-scaledprimary.html * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes: - shard-kbl: [PASS][29] -> [DMESG-WARN][30] ([fdo#108566]) +5 similar issues [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-kbl7/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-kbl6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc: - shard-skl: [PASS][31] -> [FAIL][32] ([fdo#108145]) [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-skl1/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-skl9/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html * igt@kms_psr@psr2_sprite_plane_move: - shard-iclb: [PASS][33] -> [SKIP][34] ([fdo#109441]) +1 similar issue [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-iclb6/igt@kms_psr@psr2_sprite_plane_move.html * igt@perf_pmu@init-busy-vcs1: - shard-iclb: [PASS][35] -> [SKIP][36] ([fdo#112080]) +7 similar issues [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-iclb1/igt@perf_pmu@init-busy-vcs1.html [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-iclb3/igt@perf_pmu@init-busy-vcs1.html #### Possible fixes #### * igt@gem_ctx_isolation@vcs1-none: - shard-iclb: [SKIP][37] ([fdo#109276] / [fdo#112080]) -> [PASS][38] +1 similar issue [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-iclb7/igt@gem_ctx_isolation@vcs1-none.html [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-iclb4/igt@gem_ctx_isolation@vcs1-none.html * igt@gem_eio@in-flight-suspend: - shard-skl: [INCOMPLETE][39] ([fdo#104108]) -> [PASS][40] [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-skl10/igt@gem_eio@in-flight-suspend.html [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-skl10/igt@gem_eio@in-flight-suspend.html * igt@gem_exec_nop@basic-sequential: - {shard-tglb}: [INCOMPLETE][41] ([fdo#111747]) -> [PASS][42] [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-tglb6/igt@gem_exec_nop@basic-sequential.html [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-tglb2/igt@gem_exec_nop@basic-sequential.html * igt@gem_exec_schedule@wide-bsd: - shard-iclb: [SKIP][43] ([fdo#112146]) -> [PASS][44] +2 similar issues [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-iclb4/igt@gem_exec_schedule@wide-bsd.html [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-iclb8/igt@gem_exec_schedule@wide-bsd.html * igt@gem_exec_schedule@wide-bsd2: - shard-kbl: [INCOMPLETE][45] ([fdo#103665]) -> [PASS][46] [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-kbl7/igt@gem_exec_schedule@wide-bsd2.html [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-kbl7/igt@gem_exec_schedule@wide-bsd2.html * igt@gem_persistent_relocs@forked-thrash-inactive: - shard-iclb: [INCOMPLETE][47] ([fdo#107713] / [fdo#112068 ]) -> [PASS][48] [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-iclb2/igt@gem_persistent_relocs@forked-thrash-inactive.html [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-iclb2/igt@gem_persistent_relocs@forked-thrash-inactive.html * igt@gem_persistent_relocs@forked-thrashing: - shard-hsw: [FAIL][49] ([fdo#112037]) -> [PASS][50] +1 similar issue [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-hsw7/igt@gem_persistent_relocs@forked-thrashing.html [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-hsw6/igt@gem_persistent_relocs@forked-thrashing.html * igt@gem_softpin@noreloc-s3: - shard-apl: [DMESG-WARN][51] ([fdo#108566]) -> [PASS][52] +1 similar issue [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-apl1/igt@gem_softpin@noreloc-s3.html [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-apl2/igt@gem_softpin@noreloc-s3.html * igt@gem_sync@basic-store-each: - shard-iclb: [INCOMPLETE][53] ([fdo#107713] / [fdo#109100]) -> [PASS][54] [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-iclb7/igt@gem_sync@basic-store-each.html [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-iclb4/igt@gem_sync@basic-store-each.html * igt@gem_userptr_blits@dmabuf-sync: - shard-snb: [DMESG-WARN][55] ([fdo#111870]) -> [PASS][56] [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-snb1/igt@gem_userptr_blits@dmabuf-sync.html [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-snb5/igt@gem_userptr_blits@dmabuf-sync.html * igt@gem_userptr_blits@sync-unmap-after-close: - shard-hsw: [DMESG-WARN][57] ([fdo#111870]) -> [PASS][58] +1 similar issue [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-hsw1/igt@gem_userptr_blits@sync-unmap-after-close.html [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-hsw7/igt@gem_userptr_blits@sync-unmap-after-close.html * {igt@i915_pm_dc@dc6-dpms}: - shard-iclb: [FAIL][59] ([fdo#110548]) -> [PASS][60] [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-iclb3/igt@i915_pm_dc@dc6-dpms.html [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-iclb7/igt@i915_pm_dc@dc6-dpms.html * igt@kms_color@pipe-a-ctm-0-5: - shard-skl: [DMESG-WARN][61] ([fdo#106107]) -> [PASS][62] [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-skl4/igt@kms_color@pipe-a-ctm-0-5.html [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-skl9/igt@kms_color@pipe-a-ctm-0-5.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size: - shard-skl: [FAIL][63] ([fdo#102670]) -> [PASS][64] [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-skl6/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-skl4/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html * igt@kms_flip@2x-flip-vs-expired-vblank: - shard-glk: [FAIL][65] ([fdo#105363]) -> [PASS][66] [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-glk3/igt@kms_flip@2x-flip-vs-expired-vblank.html [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-glk6/igt@kms_flip@2x-flip-vs-expired-vblank.html * igt@kms_flip@flip-vs-suspend: - shard-skl: [INCOMPLETE][67] ([fdo#109507]) -> [PASS][68] [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-skl9/igt@kms_flip@flip-vs-suspend.html [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-skl6/igt@kms_flip@flip-vs-suspend.html * igt@kms_flip@flip-vs-suspend-interruptible: - shard-hsw: [INCOMPLETE][69] ([fdo#103540]) -> [PASS][70] [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-hsw1/igt@kms_flip@flip-vs-suspend-interruptible.html [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-hsw5/igt@kms_flip@flip-vs-suspend-interruptible.html * igt@kms_frontbuffer_tracking@basic: - shard-iclb: [FAIL][71] ([fdo#103167]) -> [PASS][72] +2 similar issues [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-iclb6/igt@kms_frontbuffer_tracking@basic.html [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-iclb1/igt@kms_frontbuffer_tracking@basic.html * igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-cpu: - {shard-tglb}: [FAIL][73] ([fdo#103167]) -> [PASS][74] +1 similar issue [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-tglb8/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-cpu.html [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-tglb3/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-cpu.html * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min: - shard-skl: [FAIL][75] ([fdo#108145]) -> [PASS][76] [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-skl7/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-skl7/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html * igt@kms_plane_lowres@pipe-a-tiling-x: - shard-iclb: [FAIL][77] ([fdo#103166]) -> [PASS][78] [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-iclb6/igt@kms_plane_lowres@pipe-a-tiling-x.html [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-iclb6/igt@kms_plane_lowres@pipe-a-tiling-x.html * igt@kms_psr@psr2_cursor_blt: - shard-iclb: [SKIP][79] ([fdo#109441]) -> [PASS][80] +1 similar issue [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-iclb1/igt@kms_psr@psr2_cursor_blt.html [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-iclb2/igt@kms_psr@psr2_cursor_blt.html * igt@kms_setmode@basic: - shard-apl: [FAIL][81] ([fdo#99912]) -> [PASS][82] [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-apl7/igt@kms_setmode@basic.html [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-apl4/igt@kms_setmode@basic.html * igt@kms_vblank@pipe-a-ts-continuation-suspend: - shard-kbl: [DMESG-WARN][83] ([fdo#108566]) -> [PASS][84] +3 similar issues [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-kbl4/igt@kms_vblank@pipe-a-ts-continuation-suspend.html [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-kbl7/igt@kms_vblank@pipe-a-ts-continuation-suspend.html * igt@perf_pmu@busy-no-semaphores-vcs1: - shard-iclb: [SKIP][85] ([fdo#112080]) -> [PASS][86] +6 similar issues [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-iclb8/igt@perf_pmu@busy-no-semaphores-vcs1.html [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-iclb2/igt@perf_pmu@busy-no-semaphores-vcs1.html * igt@perf_pmu@enable-race-vecs0: - shard-apl: [INCOMPLETE][87] ([fdo#103927]) -> [PASS][88] +1 similar issue [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-apl4/igt@perf_pmu@enable-race-vecs0.html [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-apl3/igt@perf_pmu@enable-race-vecs0.html * igt@prime_vgem@fence-wait-bsd2: - shard-iclb: [SKIP][89] ([fdo#109276]) -> [PASS][90] +10 similar issues [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-iclb8/igt@prime_vgem@fence-wait-bsd2.html [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-iclb2/igt@prime_vgem@fence-wait-bsd2.html * igt@prime_vgem@sync-vebox: - shard-iclb: [INCOMPLETE][91] ([fdo#107713]) -> [PASS][92] [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-iclb2/igt@prime_vgem@sync-vebox.html [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-iclb6/igt@prime_vgem@sync-vebox.html * igt@tools_test@tools_test: - shard-snb: [SKIP][93] ([fdo#109271]) -> [PASS][94] +1 similar issue [93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-snb7/igt@tools_test@tools_test.html [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/shard-snb6/igt@tools_test@tools_test.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo# 112000 ]: https://bugs.freedesktop.org/show_bug.cgi?id= 112000 [fdo#102670]: https://bugs.freedesktop.org/show_bug.cgi?id=102670 [fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166 [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167 [fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540 [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665 [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927 [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108 [fdo#104782]: https://bugs.freedesktop.org/show_bug.cgi?id=104782 [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363 [fdo#105411]: https://bugs.freedesktop.org/show_bug.cgi?id=105411 [fdo#106107]: https://bugs.freedesktop.org/show_bug.cgi?id=106107 [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713 [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145 [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566 [fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276 [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441 [fdo#109507]: https://bugs.freedesktop.org/show_bug.cgi?id=109507 [fdo#110548]: https://bugs.freedesktop.org/show_bug.cgi?id=110548 [fdo#110841]: https://bugs.freedesktop.org/show_bug.cgi?id=110841 [fdo#111646]: https://bugs.freedesktop.org/show_bug.cgi?id=111646 [fdo#111671]: https://bugs.freedesktop.org/show_bug.cgi?id=111671 [fdo#111703]: https://bugs.freedesktop.org/show_bug.cgi?id=111703 [fdo#111747]: https://bugs.freedesktop.org/show_bug.cgi?id=111747 [fdo#111781]: https://bugs.freedesktop.org/show_bug.cgi?id=111781 [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825 [fdo#111832]: https://bugs.freedesktop.org/show_bug.cgi?id=111832 [fdo#111850]: https://bugs.freedesktop.org/show_bug.cgi?id=111850 [fdo#111870]: https://bugs.freedesktop.org/show_bug.cgi?id=111870 [fdo#111884]: https://bugs.freedesktop.org/show_bug.cgi?id=111884 [fdo#112001]: https://bugs.freedesktop.org/show_bug.cgi?id=112001 [fdo#112037]: https://bugs.freedesktop.org/show_bug.cgi?id=112037 [fdo#112068 ]: https://bugs.freedesktop.org/show_bug.cgi?id=112068 [fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15049/index.html _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [RFC 1/2] drm/i915: add display uncore helpers @ 2019-11-05 12:41 ` Joonas Lahtinen 0 siblings, 0 replies; 16+ messages in thread From: Joonas Lahtinen @ 2019-11-05 12:41 UTC (permalink / raw) To: intel-gfx; +Cc: Jani Nikula, Lucas De Marchi Quoting Jani Nikula (2019-10-29 12:51:55) > Add convenience helpers for the most common uncore operations with > struct drm_i915_private * as context rather than struct intel_uncore *. > > The goal is to replace all instances of I915_READ(), > I915_POSTING_READ(), and I915_WRITE() in display/ with these, to finally > be able to get rid of the implicit dev_priv local parameter use. > > The idea is that any non-u32 reads or writes are special enough that > they can use the intel_uncore_* functions directly. > > Cc: Chris Wilson <chris@chris-wilson.co.uk> > Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> > Cc: Lucas De Marchi <lucas.demarchi@intel.com> > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > Signed-off-by: Jani Nikula <jani.nikula@intel.com> <SNIP> > +++ b/drivers/gpu/drm/i915/display/intel_display_uncore.h > @@ -0,0 +1,36 @@ > +/* SPDX-License-Identifier: MIT */ > +/* > + * Copyright © 2019 Intel Corporation > + */ > + > +#ifndef __INTEL_DISPLAY_UNCORE_H__ > +#define __INTEL_DISPLAY_UNCORE_H__ intel_de_uncore.c/.h for easier finding? > + > +#include "i915_drv.h" > +#include "i915_reg.h" > +#include "intel_uncore.h" > + > +static inline u32 intel_de_read(struct drm_i915_private *i915, i915_reg_t reg) I think it'd be good a opportunity to pass struct intel_de{,_uncore} as a parameter, and start grouping DE stuff underneath it? It'll of course be much bigger change. Regards, Joonas _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [RFC 1/2] drm/i915: add display uncore helpers @ 2019-11-05 12:41 ` Joonas Lahtinen 0 siblings, 0 replies; 16+ messages in thread From: Joonas Lahtinen @ 2019-11-05 12:41 UTC (permalink / raw) To: Jani Nikula, intel-gfx; +Cc: Jani Nikula, Lucas De Marchi Quoting Jani Nikula (2019-10-29 12:51:55) > Add convenience helpers for the most common uncore operations with > struct drm_i915_private * as context rather than struct intel_uncore *. > > The goal is to replace all instances of I915_READ(), > I915_POSTING_READ(), and I915_WRITE() in display/ with these, to finally > be able to get rid of the implicit dev_priv local parameter use. > > The idea is that any non-u32 reads or writes are special enough that > they can use the intel_uncore_* functions directly. > > Cc: Chris Wilson <chris@chris-wilson.co.uk> > Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> > Cc: Lucas De Marchi <lucas.demarchi@intel.com> > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > Signed-off-by: Jani Nikula <jani.nikula@intel.com> <SNIP> > +++ b/drivers/gpu/drm/i915/display/intel_display_uncore.h > @@ -0,0 +1,36 @@ > +/* SPDX-License-Identifier: MIT */ > +/* > + * Copyright © 2019 Intel Corporation > + */ > + > +#ifndef __INTEL_DISPLAY_UNCORE_H__ > +#define __INTEL_DISPLAY_UNCORE_H__ intel_de_uncore.c/.h for easier finding? > + > +#include "i915_drv.h" > +#include "i915_reg.h" > +#include "intel_uncore.h" > + > +static inline u32 intel_de_read(struct drm_i915_private *i915, i915_reg_t reg) I think it'd be good a opportunity to pass struct intel_de{,_uncore} as a parameter, and start grouping DE stuff underneath it? It'll of course be much bigger change. Regards, Joonas _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [RFC 1/2] drm/i915: add display uncore helpers @ 2019-11-05 13:33 ` Jani Nikula 0 siblings, 0 replies; 16+ messages in thread From: Jani Nikula @ 2019-11-05 13:33 UTC (permalink / raw) To: Joonas Lahtinen, intel-gfx; +Cc: Lucas De Marchi On Tue, 05 Nov 2019, Joonas Lahtinen <joonas.lahtinen@linux.intel.com> wrote: > Quoting Jani Nikula (2019-10-29 12:51:55) >> Add convenience helpers for the most common uncore operations with >> struct drm_i915_private * as context rather than struct intel_uncore *. >> >> The goal is to replace all instances of I915_READ(), >> I915_POSTING_READ(), and I915_WRITE() in display/ with these, to finally >> be able to get rid of the implicit dev_priv local parameter use. >> >> The idea is that any non-u32 reads or writes are special enough that >> they can use the intel_uncore_* functions directly. >> >> Cc: Chris Wilson <chris@chris-wilson.co.uk> >> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> >> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> >> Cc: Lucas De Marchi <lucas.demarchi@intel.com> >> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> >> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> >> Signed-off-by: Jani Nikula <jani.nikula@intel.com> > > <SNIP> > >> +++ b/drivers/gpu/drm/i915/display/intel_display_uncore.h >> @@ -0,0 +1,36 @@ >> +/* SPDX-License-Identifier: MIT */ >> +/* >> + * Copyright © 2019 Intel Corporation >> + */ >> + >> +#ifndef __INTEL_DISPLAY_UNCORE_H__ >> +#define __INTEL_DISPLAY_UNCORE_H__ > > intel_de_uncore.c/.h for easier finding? > >> + >> +#include "i915_drv.h" >> +#include "i915_reg.h" >> +#include "intel_uncore.h" >> + >> +static inline u32 intel_de_read(struct drm_i915_private *i915, i915_reg_t reg) > > I think it'd be good a opportunity to pass struct intel_de{,_uncore} > as a parameter, and start grouping DE stuff underneath it? > > It'll of course be much bigger change. One of the main points here was that for display code passing struct drm_i915_private * should be the easiest thing to do. If there's a need to group stuff within i915, fine, but no need to pass that here. BR, Jani. -- Jani Nikula, Intel Open Source Graphics Center _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [RFC 1/2] drm/i915: add display uncore helpers @ 2019-11-05 13:33 ` Jani Nikula 0 siblings, 0 replies; 16+ messages in thread From: Jani Nikula @ 2019-11-05 13:33 UTC (permalink / raw) To: Joonas Lahtinen, intel-gfx; +Cc: Lucas De Marchi On Tue, 05 Nov 2019, Joonas Lahtinen <joonas.lahtinen@linux.intel.com> wrote: > Quoting Jani Nikula (2019-10-29 12:51:55) >> Add convenience helpers for the most common uncore operations with >> struct drm_i915_private * as context rather than struct intel_uncore *. >> >> The goal is to replace all instances of I915_READ(), >> I915_POSTING_READ(), and I915_WRITE() in display/ with these, to finally >> be able to get rid of the implicit dev_priv local parameter use. >> >> The idea is that any non-u32 reads or writes are special enough that >> they can use the intel_uncore_* functions directly. >> >> Cc: Chris Wilson <chris@chris-wilson.co.uk> >> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> >> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> >> Cc: Lucas De Marchi <lucas.demarchi@intel.com> >> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> >> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> >> Signed-off-by: Jani Nikula <jani.nikula@intel.com> > > <SNIP> > >> +++ b/drivers/gpu/drm/i915/display/intel_display_uncore.h >> @@ -0,0 +1,36 @@ >> +/* SPDX-License-Identifier: MIT */ >> +/* >> + * Copyright © 2019 Intel Corporation >> + */ >> + >> +#ifndef __INTEL_DISPLAY_UNCORE_H__ >> +#define __INTEL_DISPLAY_UNCORE_H__ > > intel_de_uncore.c/.h for easier finding? > >> + >> +#include "i915_drv.h" >> +#include "i915_reg.h" >> +#include "intel_uncore.h" >> + >> +static inline u32 intel_de_read(struct drm_i915_private *i915, i915_reg_t reg) > > I think it'd be good a opportunity to pass struct intel_de{,_uncore} > as a parameter, and start grouping DE stuff underneath it? > > It'll of course be much bigger change. One of the main points here was that for display code passing struct drm_i915_private * should be the easiest thing to do. If there's a need to group stuff within i915, fine, but no need to pass that here. BR, Jani. -- Jani Nikula, Intel Open Source Graphics Center _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 16+ messages in thread
end of thread, other threads:[~2019-11-05 13:33 UTC | newest] Thread overview: 16+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2019-10-29 10:51 [RFC 1/2] drm/i915: add display uncore helpers Jani Nikula 2019-10-29 10:51 ` [Intel-gfx] " Jani Nikula 2019-10-29 10:51 ` [RFC 2/2] drm/i915/audio: replace I915_*() calls with the new intel_de_*() calls Jani Nikula 2019-10-29 10:51 ` [Intel-gfx] " Jani Nikula 2019-10-29 14:26 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [RFC,1/2] drm/i915: add display uncore helpers Patchwork 2019-10-29 14:26 ` [Intel-gfx] " Patchwork 2019-10-29 16:02 ` ✓ Fi.CI.BAT: success " Patchwork 2019-10-29 16:02 ` [Intel-gfx] " Patchwork 2019-10-29 21:20 ` [RFC 1/2] " Daniele Ceraolo Spurio 2019-10-29 21:20 ` [Intel-gfx] " Daniele Ceraolo Spurio 2019-10-30 5:09 ` ✓ Fi.CI.IGT: success for series starting with [RFC,1/2] " Patchwork 2019-10-30 5:09 ` [Intel-gfx] " Patchwork 2019-11-05 12:41 ` [RFC 1/2] " Joonas Lahtinen 2019-11-05 12:41 ` [Intel-gfx] " Joonas Lahtinen 2019-11-05 13:33 ` Jani Nikula 2019-11-05 13:33 ` [Intel-gfx] " Jani Nikula
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