From: "Alex Bennée" <alex.bennee@linaro.org>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: qemu-devel@nongnu.org, Paolo Bonzini <pbonzini@redhat.com>
Subject: Re: [RFC PATCH] target/i386: terminate a tcg block on gen_RDMSR
Date: Fri, 30 Oct 2026 12:54:22 +0000 [thread overview]
Message-ID: <87fqxn8i2p.fsf@draig.linaro.org> (raw)
In-Reply-To: <451d1cfb-a94e-40c1-bb10-a768c5701f9b@linaro.org> (Richard Henderson's message of "Fri, 30 Oct 2026 06:37:07 -0500")
Richard Henderson <richard.henderson@linaro.org> writes:
> On 10/29/26 12:17, Alex Bennée wrote:
>> End the block the same way that gen_WRMSR does so an IO access under
>> icount. While this fixes this particular case I suspect there are more
>> IO like accesses the x86 TCG front-end should take care off.
>> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/4779
>> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
>> ---
>> target/i386/tcg/emit.c.inc | 1 +
>> 1 file changed, 1 insertion(+)
>> diff --git a/target/i386/tcg/emit.c.inc b/target/i386/tcg/emit.c.inc
>> index ed56edf8a3a..911bce5f539 100644
>> --- a/target/i386/tcg/emit.c.inc
>> +++ b/target/i386/tcg/emit.c.inc
>> @@ -3783,6 +3783,7 @@ static void gen_RDMSR(DisasContext *s, X86DecodedInsn *decode)
>> gen_update_cc_op(s);
>> gen_update_eip_cur(s);
>> gen_helper_rdmsr(tcg_env);
>> + s->base.is_jmp = DISAS_EOB_NEXT;
>> }
>> #else
>> #define gen_RDMSR gen_unreachable
>
> You've done nothing to update state. I think you want
>
> translator_io_start(&s->base);
>
> which will go though DISAS_TOO_MANY.
Should WRMSR do the same? If not why is it different?
>
>
> r~
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
next prev parent reply other threads:[~2026-10-30 12:54 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-29 17:17 [RFC PATCH] target/i386: terminate a tcg block on gen_RDMSR Alex Bennée
2026-10-30 11:37 ` Richard Henderson
2026-10-30 12:54 ` Alex Bennée [this message]
2026-10-30 13:48 ` Richard Henderson
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