[PATCH] drm/i915/tgl: Disable preemption while being debugged

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* [PATCH] drm/i915/tgl: Disable preemption while being debugged
@ 2019-09-12 13:18 Chris Wilson
  2019-09-12 13:23 ` [PATCH v2] " Chris Wilson
  2019-09-12 18:21 ` ✗ Fi.CI.BAT: failure for drm/i915/tgl: Disable preemption while being debugged (rev2) Patchwork
  0 siblings, 2 replies; 6+ messages in thread
From: Chris Wilson @ 2019-09-12 13:18 UTC (permalink / raw)
  To: intel-gfx

We see failures where the context continues executing past a
preemption event, eventually leading to situations where a request has
executed before we have event submitted it to HW! It seems like tgl is
ignoring our RING_TAIL updates, but more likely is that there is a
missing update required for our semaphore waits around preemption.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_pci.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index b3cc8560696b..2ca34a5cf7d3 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -798,6 +798,7 @@ static const struct intel_device_info intel_tigerlake_12_info = {
 	.engine_mask =
 		BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2),
 	.has_rc6 = false, /* XXX disabled for debugging */
+	.has_logical_ring_preemption = false, /* XXX disabled for debugging */
 };
 
 #undef GEN
-- 
2.23.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH v2] drm/i915/tgl: Disable preemption while being debugged
  2019-09-12 13:18 [PATCH] drm/i915/tgl: Disable preemption while being debugged Chris Wilson
@ 2019-09-12 13:23 ` Chris Wilson
  2019-09-12 13:59   ` Mika Kuoppala
  2019-09-12 18:45   ` Daniele Ceraolo Spurio
  2019-09-12 18:21 ` ✗ Fi.CI.BAT: failure for drm/i915/tgl: Disable preemption while being debugged (rev2) Patchwork
  1 sibling, 2 replies; 6+ messages in thread
From: Chris Wilson @ 2019-09-12 13:23 UTC (permalink / raw)
  To: intel-gfx

We see failures where the context continues executing past a
preemption event, eventually leading to situations where a request has
executed before we have event submitted it to HW! It seems like tgl is
ignoring our RING_TAIL updates, but more likely is that there is a
missing update required for our semaphore waits around preemption.

v2: And disable internal semaphore usage

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
 drivers/gpu/drm/i915/gt/intel_lrc.c | 3 +++
 drivers/gpu/drm/i915/i915_pci.c     | 1 +
 2 files changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 47d766ccea71..a3f0e4999744 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -2939,6 +2939,9 @@ void intel_execlists_set_default_submission(struct intel_engine_cs *engine)
 			engine->flags |= I915_ENGINE_HAS_PREEMPTION;
 	}
 
+	if (INTEL_GEN(engine->i915) >= 12) /* XXX disabled for debugging */
+		engine->flags &= ~I915_ENGINE_HAS_SEMAPHORES;
+
 	if (engine->class != COPY_ENGINE_CLASS && INTEL_GEN(engine->i915) >= 12)
 		engine->flags |= I915_ENGINE_HAS_RELATIVE_MMIO;
 }
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index b3cc8560696b..2ca34a5cf7d3 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -798,6 +798,7 @@ static const struct intel_device_info intel_tigerlake_12_info = {
 	.engine_mask =
 		BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2),
 	.has_rc6 = false, /* XXX disabled for debugging */
+	.has_logical_ring_preemption = false, /* XXX disabled for debugging */
 };
 
 #undef GEN
-- 
2.23.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* Re: [PATCH v2] drm/i915/tgl: Disable preemption while being debugged
  2019-09-12 13:23 ` [PATCH v2] " Chris Wilson
@ 2019-09-12 13:59   ` Mika Kuoppala
  2019-09-12 18:45   ` Daniele Ceraolo Spurio
  1 sibling, 0 replies; 6+ messages in thread
From: Mika Kuoppala @ 2019-09-12 13:59 UTC (permalink / raw)
  To: Chris Wilson, intel-gfx

Chris Wilson <chris@chris-wilson.co.uk> writes:

> We see failures where the context continues executing past a
> preemption event, eventually leading to situations where a request has
> executed before we have event submitted it to HW! It seems like tgl is
> ignoring our RING_TAIL updates, but more likely is that there is a
> missing update required for our semaphore waits around preemption.
>
> v2: And disable internal semaphore usage
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>

Acked-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/gt/intel_lrc.c | 3 +++
>  drivers/gpu/drm/i915/i915_pci.c     | 1 +
>  2 files changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
> index 47d766ccea71..a3f0e4999744 100644
> --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
> @@ -2939,6 +2939,9 @@ void intel_execlists_set_default_submission(struct intel_engine_cs *engine)
>  			engine->flags |= I915_ENGINE_HAS_PREEMPTION;
>  	}
>  
> +	if (INTEL_GEN(engine->i915) >= 12) /* XXX disabled for debugging */
> +		engine->flags &= ~I915_ENGINE_HAS_SEMAPHORES;
> +
>  	if (engine->class != COPY_ENGINE_CLASS && INTEL_GEN(engine->i915) >= 12)
>  		engine->flags |= I915_ENGINE_HAS_RELATIVE_MMIO;
>  }
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index b3cc8560696b..2ca34a5cf7d3 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -798,6 +798,7 @@ static const struct intel_device_info intel_tigerlake_12_info = {
>  	.engine_mask =
>  		BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2),
>  	.has_rc6 = false, /* XXX disabled for debugging */
> +	.has_logical_ring_preemption = false, /* XXX disabled for debugging */
>  };
>  
>  #undef GEN
> -- 
> 2.23.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH v2] drm/i915/tgl: Disable preemption while being debugged
  2019-09-12 13:23 ` [PATCH v2] " Chris Wilson
  2019-09-12 13:59   ` Mika Kuoppala
@ 2019-09-12 18:45   ` Daniele Ceraolo Spurio
  2019-09-12 19:43     ` Chris Wilson
  1 sibling, 1 reply; 6+ messages in thread
From: Daniele Ceraolo Spurio @ 2019-09-12 18:45 UTC (permalink / raw)
  To: Chris Wilson, intel-gfx



On 9/12/19 6:23 AM, Chris Wilson wrote:
> We see failures where the context continues executing past a
> preemption event, eventually leading to situations where a request has
> executed before we have event submitted it to HW! It seems like tgl is

AFAIK on TGL the CS can detect tail updates in the image of a running 
context even if the lrc hasn't been resubmitted via the elsp. Could that 
be related to the early execution of requests? I haven't looked at the 
failure logs, so forgive me if I'm completely off-mark :)

Daniele

> ignoring our RING_TAIL updates, but more likely is that there is a
> missing update required for our semaphore waits around preemption.
> 
> v2: And disable internal semaphore usage
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> ---
>   drivers/gpu/drm/i915/gt/intel_lrc.c | 3 +++
>   drivers/gpu/drm/i915/i915_pci.c     | 1 +
>   2 files changed, 4 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
> index 47d766ccea71..a3f0e4999744 100644
> --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
> @@ -2939,6 +2939,9 @@ void intel_execlists_set_default_submission(struct intel_engine_cs *engine)
>   			engine->flags |= I915_ENGINE_HAS_PREEMPTION;
>   	}
>   
> +	if (INTEL_GEN(engine->i915) >= 12) /* XXX disabled for debugging */
> +		engine->flags &= ~I915_ENGINE_HAS_SEMAPHORES;
> +
>   	if (engine->class != COPY_ENGINE_CLASS && INTEL_GEN(engine->i915) >= 12)
>   		engine->flags |= I915_ENGINE_HAS_RELATIVE_MMIO;
>   }
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index b3cc8560696b..2ca34a5cf7d3 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -798,6 +798,7 @@ static const struct intel_device_info intel_tigerlake_12_info = {
>   	.engine_mask =
>   		BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2),
>   	.has_rc6 = false, /* XXX disabled for debugging */
> +	.has_logical_ring_preemption = false, /* XXX disabled for debugging */
>   };
>   
>   #undef GEN
> 
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH v2] drm/i915/tgl: Disable preemption while being debugged
  2019-09-12 18:45   ` Daniele Ceraolo Spurio
@ 2019-09-12 19:43     ` Chris Wilson
  0 siblings, 0 replies; 6+ messages in thread
From: Chris Wilson @ 2019-09-12 19:43 UTC (permalink / raw)
  To: Daniele Ceraolo Spurio, intel-gfx

Quoting Daniele Ceraolo Spurio (2019-09-12 19:45:27)
> 
> 
> On 9/12/19 6:23 AM, Chris Wilson wrote:
> > We see failures where the context continues executing past a
> > preemption event, eventually leading to situations where a request has
> > executed before we have event submitted it to HW! It seems like tgl is
> 
> AFAIK on TGL the CS can detect tail updates in the image of a running 
> context even if the lrc hasn't been resubmitted via the elsp. Could that 
> be related to the early execution of requests? I haven't looked at the 
> failure logs, so forgive me if I'm completely off-mark :)

We only update the CTX_RING_TAIL just prior to [re]submitting the
context. But fun and games ensue around preemption where we often have
to rewind the RING_TAIL. Still we should never push it behind
RING_HEAD (so long as our semaphore is solid), so it should never be
able to go past any of the previous RING_TAIL updates we made.

At the moment, I'm just focusing on trimming back the features until we
have a solid platform and then we will be better place to be able to look
at what is going wrong.
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread

* ✗ Fi.CI.BAT: failure for drm/i915/tgl: Disable preemption while being debugged (rev2)
  2019-09-12 13:18 [PATCH] drm/i915/tgl: Disable preemption while being debugged Chris Wilson
  2019-09-12 13:23 ` [PATCH v2] " Chris Wilson
@ 2019-09-12 18:21 ` Patchwork
  1 sibling, 0 replies; 6+ messages in thread
From: Patchwork @ 2019-09-12 18:21 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx

== Series Details ==

Series: drm/i915/tgl: Disable preemption while being debugged (rev2)
URL   : https://patchwork.freedesktop.org/series/66607/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_6882 -> Patchwork_14383
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_14383 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_14383, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14383/

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_14383:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_selftest@live_hangcheck:
    - fi-kbl-guc:         [PASS][1] -> [DMESG-FAIL][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6882/fi-kbl-guc/igt@i915_selftest@live_hangcheck.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14383/fi-kbl-guc/igt@i915_selftest@live_hangcheck.html

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@i915_pm_rpm@basic-pci-d3-state:
    - {fi-tgl-u}:         NOTRUN -> [SKIP][3]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14383/fi-tgl-u/igt@i915_pm_rpm@basic-pci-d3-state.html

  * igt@i915_pm_rpm@basic-rte:
    - {fi-tgl-u}:         NOTRUN -> [FAIL][4]
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14383/fi-tgl-u/igt@i915_pm_rpm@basic-rte.html

  
Known issues
------------

  Here are the changes found in Patchwork_14383 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@prime_self_import@basic-llseek-size:
    - fi-icl-u3:          [PASS][5] -> [DMESG-WARN][6] ([fdo#107724]) +2 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6882/fi-icl-u3/igt@prime_self_import@basic-llseek-size.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14383/fi-icl-u3/igt@prime_self_import@basic-llseek-size.html

  
#### Possible fixes ####

  * igt@gem_sync@basic-store-each:
    - {fi-tgl-u}:         [INCOMPLETE][7] ([fdo#111647]) -> [PASS][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6882/fi-tgl-u/igt@gem_sync@basic-store-each.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14383/fi-tgl-u/igt@gem_sync@basic-store-each.html

  * igt@i915_module_load@reload-with-fault-injection:
    - {fi-icl-u4}:        [DMESG-WARN][9] ([fdo#106107] / [fdo#106350]) -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6882/fi-icl-u4/igt@i915_module_load@reload-with-fault-injection.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14383/fi-icl-u4/igt@i915_module_load@reload-with-fault-injection.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
    - fi-blb-e6850:       [INCOMPLETE][11] ([fdo#107718]) -> [PASS][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6882/fi-blb-e6850/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14383/fi-blb-e6850/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html

  * igt@prime_vgem@basic-fence-mmap:
    - fi-icl-u3:          [DMESG-WARN][13] ([fdo#107724]) -> [PASS][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6882/fi-icl-u3/igt@prime_vgem@basic-fence-mmap.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14383/fi-icl-u3/igt@prime_vgem@basic-fence-mmap.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#106107]: https://bugs.freedesktop.org/show_bug.cgi?id=106107
  [fdo#106350]: https://bugs.freedesktop.org/show_bug.cgi?id=106350
  [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#111647]: https://bugs.freedesktop.org/show_bug.cgi?id=111647


Participating hosts (55 -> 47)
------------------------------

  Missing    (8): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-pnv-d510 fi-icl-y fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_6882 -> Patchwork_14383

  CI-20190529: 20190529
  CI_DRM_6882: a7f950bbf06a55e6a47934b2891ef595f97165d4 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5178: efb4539494d94f03374874d3b61bd04ef3802aaa @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_14383: cf55679c12de6e371bd9d7213b9f701b3632e562 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

cf55679c12de drm/i915/tgl: Disable preemption while being debugged

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14383/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2019-09-12 19:43 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2019-09-12 13:18 [PATCH] drm/i915/tgl: Disable preemption while being debugged Chris Wilson
2019-09-12 13:23 ` [PATCH v2] " Chris Wilson
2019-09-12 13:59   ` Mika Kuoppala
2019-09-12 18:45   ` Daniele Ceraolo Spurio
2019-09-12 19:43     ` Chris Wilson
2019-09-12 18:21 ` ✗ Fi.CI.BAT: failure for drm/i915/tgl: Disable preemption while being debugged (rev2) Patchwork

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