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From: Andreas Schwab <schwab@linux-m68k.org>
To: Christoph Hellwig <hch@infradead.org>
Cc: me@carlosedp.com, Palmer Dabbelt <palmer@sifive.com>,
	linux-kernel@vger.kernel.org, joel@sing.id.au,
	Paul Walmsley <paul.walmsley@sifive.com>,
	linux-riscv@lists.infradead.org, marco@decred.org
Subject: Re: [PATCH] RISC-V: Break load reservations during switch_to
Date: Thu, 06 Jun 2019 21:32:01 +0200	[thread overview]
Message-ID: <87ftom4ij2.fsf@igel.home> (raw)
In-Reply-To: <20190606090518.GB1369@infradead.org> (Christoph Hellwig's message of "Thu, 6 Jun 2019 02:05:18 -0700")

On Jun 06 2019, Christoph Hellwig <hch@infradead.org> wrote:

> On Wed, Jun 05, 2019 at 04:17:35PM -0700, Palmer Dabbelt wrote:
>>  	REG_S ra,  TASK_THREAD_RA_RA(a3)
>> +	/*
>> +	 * The Linux ABI allows programs to depend on load reservations being
>> +	 * broken on context switches, but the ISA doesn't require that the
>> +	 * hardware ever breaks a load reservation.  The only way to break a
>> +	 * load reservation is with a store conditional, so we emit one here.
>> +	 * Since nothing ever takes a load reservation on TASK_THREAD_RA_RA we
>> +	 * know this will always fail, but just to be on the safe side this
>> +	 * writes the same value that was unconditionally written by the
>> +	 * previous instruction.
>> +	 */
>> +#if (TASK_THREAD_RA_RA != 0)
>
> I don't think this check works as intended.  TASK_THREAD_RA_RA is a
> parameterized macro,

Is it?  Just because it is used before an open paren doesn't mean that
the macro takes a parameter.

Andreas.

-- 
Andreas Schwab, schwab@linux-m68k.org
GPG Key fingerprint = 7578 EB47 D4E5 4D69 2510  2552 DF73 E780 A9DA AEC1
"And now for something completely different."

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WARNING: multiple messages have this Message-ID (diff)
From: Andreas Schwab <schwab@linux-m68k.org>
To: Christoph Hellwig <hch@infradead.org>
Cc: Palmer Dabbelt <palmer@sifive.com>,
	linux-riscv@lists.infradead.org,
	Paul Walmsley <paul.walmsley@sifive.com>,
	marco@decred.org, me@carlosedp.com, joel@sing.id.au,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH] RISC-V: Break load reservations during switch_to
Date: Thu, 06 Jun 2019 21:32:01 +0200	[thread overview]
Message-ID: <87ftom4ij2.fsf@igel.home> (raw)
In-Reply-To: <20190606090518.GB1369@infradead.org> (Christoph Hellwig's message of "Thu, 6 Jun 2019 02:05:18 -0700")

On Jun 06 2019, Christoph Hellwig <hch@infradead.org> wrote:

> On Wed, Jun 05, 2019 at 04:17:35PM -0700, Palmer Dabbelt wrote:
>>  	REG_S ra,  TASK_THREAD_RA_RA(a3)
>> +	/*
>> +	 * The Linux ABI allows programs to depend on load reservations being
>> +	 * broken on context switches, but the ISA doesn't require that the
>> +	 * hardware ever breaks a load reservation.  The only way to break a
>> +	 * load reservation is with a store conditional, so we emit one here.
>> +	 * Since nothing ever takes a load reservation on TASK_THREAD_RA_RA we
>> +	 * know this will always fail, but just to be on the safe side this
>> +	 * writes the same value that was unconditionally written by the
>> +	 * previous instruction.
>> +	 */
>> +#if (TASK_THREAD_RA_RA != 0)
>
> I don't think this check works as intended.  TASK_THREAD_RA_RA is a
> parameterized macro,

Is it?  Just because it is used before an open paren doesn't mean that
the macro takes a parameter.

Andreas.

-- 
Andreas Schwab, schwab@linux-m68k.org
GPG Key fingerprint = 7578 EB47 D4E5 4D69 2510  2552 DF73 E780 A9DA AEC1
"And now for something completely different."

  parent reply	other threads:[~2019-06-06 19:32 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-05 23:17 [PATCH] RISC-V: Break load reservations during switch_to Palmer Dabbelt
2019-06-05 23:17 ` Palmer Dabbelt
2019-06-06  8:37 ` Marco Peereboom
2019-06-06  8:37   ` Marco Peereboom
2019-06-06  9:05 ` Christoph Hellwig
2019-06-06  9:05   ` Christoph Hellwig
2019-06-06 19:10   ` Palmer Dabbelt
2019-06-06 19:10     ` Palmer Dabbelt
2019-06-06 19:32   ` Andreas Schwab [this message]
2019-06-06 19:32     ` Andreas Schwab
2019-06-07 22:12     ` Palmer Dabbelt
2019-06-07 22:12       ` Palmer Dabbelt

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