Re: [PATCH 1/6] powerpc: port 64 bits pgtable_cache to 32 bits

["Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>]

christophe leroy <christophe.leroy@c-s.fr> writes:

> Le 14/08/2016 =C3=A0 16:17, Aneesh Kumar K.V a =C3=A9crit :
>> Christophe Leroy <christophe.leroy@c-s.fr> writes:
>>
>>> Today powerpc64 uses a set of pgtable_caches while powerpc32 uses
>>> standard pages when using 4k pages and a single pgtable_cache
>>> if using other size pages. In addition powerpc32 uses another cache
>>> when handling huge pages.
>>>
>>> In preparation of implementing huge pages on the 8xx, this patch
>>> replaces the specific powerpc32 handling by the 64 bits approach.
>>
>> Why is this needed ? Can you also summarize the page size used and the
>> hugepage format you are planning to use ? . What are the page sizes
>> supported by 8xx ? Also is the new code copy of existing powerpc64 4k
>> page size code ?
>
> 8xx supports two huge page sizes: 8M and 512k.
> As PGD entries points on 4M page tables, it means we are in an=20
> eterogenous situation:
> 1/ when using 8M huge pages, we are in the same situation as what is=20
> done for the BOOK3S (which supports 16M, 256M and 1G), that is several=20
> PDG entries pointing to a single PTE entry.

what is done for FSL BOOK3E ?


> 2/ when using 512k huge pages, we are in the same situation as whan is=20
> done for the BOOK3E: a PGD entry points to the hugepage table that=20
> handles several huge pages (in our case 8 huge pages)
>

what is done for Book3s with 4K linux page size. ?


So the idea here is to allocate different hugepte table based on
hugepage size requested and hence the need to switch from hugpte-cache
to a more generic PGT_CACHE ?

> The code from init_64 have been moved to a new file named init-common in=
=20
> order to be used by init_32 too.
> The code from the 64 bits .h has been copied into the 32 bits .h (indeed=
=20
> it's been copied twice as the .h are now duplicated into nohash and=20
> book3s versions)


That explanation made it a lot easy to follow the patch. Can we capture
that in commit message too. Also Do we support hugepage with both 4k and
16K linux page size ?. I guess we do because 8xx only do a two level
linux page table ?=20

>
> [...]
>
>>> diff --git a/arch/powerpc/mm/hugetlbpage.c b/arch/powerpc/mm/hugetlbpag=
e.c
>>> index 7372ee1..9164a77 100644
>>> --- a/arch/powerpc/mm/hugetlbpage.c
>>> +++ b/arch/powerpc/mm/hugetlbpage.c
>>> @@ -68,7 +68,7 @@ static int __hugepte_alloc(struct mm_struct *mm, huge=
pd_t *hpdp,
>>>  #ifdef CONFIG_PPC_FSL_BOOK3E
>>>  	int i;
>>>  	int num_hugepd =3D 1 << (pshift - pdshift);
>>> -	cachep =3D hugepte_cache;
>>> +	cachep =3D PGT_CACHE(1);
>>>  #else
>>>  	cachep =3D PGT_CACHE(pdshift - pshift);
>>>  #endif
>>
>> Can you explain the usage of PGT_CACHE(1) ?
>
> [...]
>
>>
>> I still didn't quiet follow why we are replacing
>>
>>  -	hugepte_cache =3D  kmem_cache_create("hugepte-cache", sizeof(pte_t),
>>  -					   HUGEPD_SHIFT_MASK + 1, 0, NULL);
>>  +	pgtable_cache_add(1, NULL);
>>
>
> Euh ... Indeed I wanted something to replace hugepte_cache. But it looks=
=20
> like it should be something like PGT_CACHE(0) for 32 bits targets having=
=20
> 32 bits PTEs and PGT_CACHE(1) for 32 bits targets having 64 bits PTEs.=20
> But PGT_CACHE(0) doesn't exist (yet).
>
> Looking once more, that might not really be needed I think. I'll rework=20
> it and see what I can achieve.
>

Thanks
-aneesh