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From: gregory.clement@free-electrons.com (Gregory CLEMENT)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 1/2] ARM: dma-mapping: Don't use outer_flush_range when the L2C is coherent
Date: Wed, 30 Sep 2015 11:28:07 +0200	[thread overview]
Message-ID: <87fv1wqms8.fsf@free-electrons.com> (raw)
In-Reply-To: <20150929171054.GN21513@n2100.arm.linux.org.uk> (Russell King's message of "Tue, 29 Sep 2015 18:10:54 +0100")

Hi Russell,

 On mar., sept. 29 2015, Russell King - ARM Linux <linux@arm.linux.org.uk> wrote:

> On Tue, Sep 29, 2015 at 06:50:57PM +0200, Gregory CLEMENT wrote:
>> When a L2 cache controller is used in a system that provides hardware
>
> You're talking about L2 cache here, but you're also masking out the L1
> cache maintanence (dmac_*) too.  It's my understanding that we don't
> yet support coherency to L1 yet.

Do you suggest to not masking the dmac_* operation ?

Initially I tought that L1 and L2 cache maintanence operation were more
or less linked but I might mix up.

Thanks,

Gregory

-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

WARNING: multiple messages have this Message-ID (diff)
From: Gregory CLEMENT <gregory.clement@free-electrons.com>
To: Russell King - ARM Linux <linux@arm.linux.org.uk>
Cc: Catalin Marinas <catalin.marinas@arm.com>,
	Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>,
	Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
	Thomas Petazzoni <thomas.petazzoni@free-electrons.com>,
	Ezequiel Garcia <ezequiel.garcia@free-electrons.com>,
	linux-arm-kernel@lists.infradead.org,
	Maxime Ripard <maxime.ripard@free-electrons.com>,
	Boris BREZILLON <boris.brezillon@free-electrons.com>,
	Lior Amsalem <alior@marvell.com>,
	Tawfik Bayouk <tawfik@marvell.com>,
	Nadav Haklai <nadavh@marvell.com>,
	stable@vger.kernel.org
Subject: Re: [PATCH v4 1/2] ARM: dma-mapping: Don't use outer_flush_range when the L2C is coherent
Date: Wed, 30 Sep 2015 11:28:07 +0200	[thread overview]
Message-ID: <87fv1wqms8.fsf@free-electrons.com> (raw)
In-Reply-To: <20150929171054.GN21513@n2100.arm.linux.org.uk> (Russell King's message of "Tue, 29 Sep 2015 18:10:54 +0100")

Hi Russell,

 On mar., sept. 29 2015, Russell King - ARM Linux <linux@arm.linux.org.uk> wrote:

> On Tue, Sep 29, 2015 at 06:50:57PM +0200, Gregory CLEMENT wrote:
>> When a L2 cache controller is used in a system that provides hardware
>
> You're talking about L2 cache here, but you're also masking out the L1
> cache maintanence (dmac_*) too.  It's my understanding that we don't
> yet support coherency to L1 yet.

Do you suggest to not masking the dmac_* operation ?

Initially I tought that L1 and L2 cache maintanence operation were more
or less linked but I might mix up.

Thanks,

Gregory

-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

  parent reply	other threads:[~2015-09-30  9:28 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-09-29 16:50 [PATCH v4 0/2] Fix dma mapping when the cache is coherent Gregory CLEMENT
2015-09-29 16:50 ` [PATCH v4 1/2] ARM: dma-mapping: Don't use outer_flush_range when the L2C " Gregory CLEMENT
2015-09-29 16:50   ` Gregory CLEMENT
2015-09-29 17:10   ` Russell King - ARM Linux
2015-09-29 17:10     ` Russell King - ARM Linux
2015-09-29 17:30     ` Thomas Petazzoni
2015-09-29 17:30       ` Thomas Petazzoni
2015-09-29 17:48       ` Russell King - ARM Linux
2015-09-29 17:48         ` Russell King - ARM Linux
2015-09-29 17:55         ` Thomas Petazzoni
2015-09-29 17:55           ` Thomas Petazzoni
2015-09-30  9:28     ` Gregory CLEMENT [this message]
2015-09-30  9:28       ` Gregory CLEMENT
2015-09-29 16:50 ` [PATCH v4 2/2] ARM: dma-mapping: Fix the coherent case when iommu is used Gregory CLEMENT

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