* [PATCH 2/4] softfloat: fix floatx80 pseudo-denormal addition / subtraction
@ 2020-05-01 0:38 Joseph Myers
2020-05-01 18:56 ` Alex Bennée
0 siblings, 1 reply; 3+ messages in thread
From: Joseph Myers @ 2020-05-01 0:38 UTC (permalink / raw)
To: qemu-devel
The softfloat function addFloatx80Sigs, used for addition of values
with the same sign and subtraction of values with opposite sign, fails
to handle the case where the two values both have biased exponent zero
and there is a carry resulting from adding the significands, which can
occur if one or both values are pseudo-denormals (biased exponent
zero, explicit integer bit 1). Add a check for that case, so making
the results match those seen on x86 hardware for pseudo-denormals.
Signed-off-by: Joseph Myers <joseph@codesourcery.com>
---
fpu/softfloat.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index ac116c70b8..6094d267b5 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -5866,6 +5866,12 @@ static floatx80 addFloatx80Sigs(floatx80 a, floatx80 b, flag zSign,
zSig1 = 0;
zSig0 = aSig + bSig;
if ( aExp == 0 ) {
+ if ((aSig | bSig) & UINT64_C(0x8000000000000000) && zSig0 < aSig) {
+ /* At least one of the values is a pseudo-denormal,
+ * and there is a carry out of the result. */
+ zExp = 1;
+ goto shiftRight1;
+ }
if (zSig0 == 0) {
return packFloatx80(zSign, 0, 0);
}
--
2.17.1
--
Joseph S. Myers
joseph@codesourcery.com
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH 2/4] softfloat: fix floatx80 pseudo-denormal addition / subtraction
2020-05-01 0:38 [PATCH 2/4] softfloat: fix floatx80 pseudo-denormal addition / subtraction Joseph Myers
@ 2020-05-01 18:56 ` Alex Bennée
2020-05-01 19:02 ` Joseph Myers
0 siblings, 1 reply; 3+ messages in thread
From: Alex Bennée @ 2020-05-01 18:56 UTC (permalink / raw)
To: Joseph Myers; +Cc: qemu-devel
Joseph Myers <joseph@codesourcery.com> writes:
> The softfloat function addFloatx80Sigs, used for addition of values
> with the same sign and subtraction of values with opposite sign, fails
> to handle the case where the two values both have biased exponent zero
> and there is a carry resulting from adding the significands, which can
> occur if one or both values are pseudo-denormals (biased exponent
> zero, explicit integer bit 1). Add a check for that case, so making
> the results match those seen on x86 hardware for pseudo-denormals.
Hmm running the super detailed test:
fp-test -s -l 2 -r all extF80_add extF80_sub
I don't see any difference between before and after the patch. This
makes me wonder if we are (or rather TestFloat) is missing something in
it's test case.
>
> Signed-off-by: Joseph Myers <joseph@codesourcery.com>
> ---
> fpu/softfloat.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/fpu/softfloat.c b/fpu/softfloat.c
> index ac116c70b8..6094d267b5 100644
> --- a/fpu/softfloat.c
> +++ b/fpu/softfloat.c
> @@ -5866,6 +5866,12 @@ static floatx80 addFloatx80Sigs(floatx80 a, floatx80 b, flag zSign,
> zSig1 = 0;
> zSig0 = aSig + bSig;
> if ( aExp == 0 ) {
> + if ((aSig | bSig) & UINT64_C(0x8000000000000000) && zSig0 < aSig) {
> + /* At least one of the values is a pseudo-denormal,
> + * and there is a carry out of the result. */
> + zExp = 1;
> + goto shiftRight1;
> + }
> if (zSig0 == 0) {
> return packFloatx80(zSign, 0, 0);
> }
> --
> 2.17.1
--
Alex Bennée
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH 2/4] softfloat: fix floatx80 pseudo-denormal addition / subtraction
2020-05-01 18:56 ` Alex Bennée
@ 2020-05-01 19:02 ` Joseph Myers
0 siblings, 0 replies; 3+ messages in thread
From: Joseph Myers @ 2020-05-01 19:02 UTC (permalink / raw)
To: Alex Bennée; +Cc: qemu-devel
[-- Attachment #1: Type: text/plain, Size: 1203 bytes --]
On Fri, 1 May 2020, Alex Bennée wrote:
>
> Joseph Myers <joseph@codesourcery.com> writes:
>
> > The softfloat function addFloatx80Sigs, used for addition of values
> > with the same sign and subtraction of values with opposite sign, fails
> > to handle the case where the two values both have biased exponent zero
> > and there is a carry resulting from adding the significands, which can
> > occur if one or both values are pseudo-denormals (biased exponent
> > zero, explicit integer bit 1). Add a check for that case, so making
> > the results match those seen on x86 hardware for pseudo-denormals.
>
> Hmm running the super detailed test:
>
> fp-test -s -l 2 -r all extF80_add extF80_sub
>
> I don't see any difference between before and after the patch. This
> makes me wonder if we are (or rather TestFloat) is missing something in
> it's test case.
It could well only be testing kinds of floating-point representations that
are meaningful in IEEE interchange formats. Pseudo-denormals don't exist
in IEEE interchange formats (and nor do pseudo-NaNs, pseudo-infinities and
un-normals, which are dealt with in floatx80_invalid_encoding).
--
Joseph S. Myers
joseph@codesourcery.com
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2020-05-01 19:03 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2020-05-01 0:38 [PATCH 2/4] softfloat: fix floatx80 pseudo-denormal addition / subtraction Joseph Myers
2020-05-01 18:56 ` Alex Bennée
2020-05-01 19:02 ` Joseph Myers
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.